LTC1458CG#PBF

LTC1458/LTC1458L Quad 12-Bit Rail-to-Rail Micropower DACs U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®1458/LTC1458L are complete single supply, quad rail-to-rail voltage output, 12-bit digital-to-analog converters (DACs) in SO-28 and SSOP-28 packages. They include an output buffer amplifier with variable gain (×1 or × 2) and an easy-to-use 3-wire cascadable serial interface. Quad 12-Bit DAC Buffered True Rail-to-Rail Voltage Output Maximum DNL Error: 0.5LSB 5V Operation, ICC: 1.1mA Typ (LTC1458) 3V Operation, ICC: 800µA Typ (LTC1458L) Internal or External Reference Operation Settling Time: 14µs to ±0.5LSB Schmitt Trigger On Clock Input Allows Direct Optocoupler Interface Power-On Reset and CLR Pin SSOP-28 Package 3-Wire Cascadable Serial Interface with 250kHz Update Rate Low Cost The LTC1458 has an onboard reference of 2.048V and a full-scale output of 4.095V in a × 2 gain configuration. It operates from a single 4.5V to 5.5V supply dissipating only 5.5mW (ICC = 1.1mA typ). The LTC1458L has an onboard 1.22V reference and a fullscale output of 2.5V in a ×2 gain configuration. It operates from a single supply of 2.7V to 5.5V dissipating 2.4mW. Excellent DNL, low supply current and a wide range of built-in functions allow these parts to be used in a host of applications when flexibility, power and single supply operation are important. U APPLICATIO S ■ ■ ■ Digital Calibration Industrial Process Control Automatic Test Equipment Low Power Systems , LTC and LT are registered trademarks of Linear Technology Corporation. U ■ TYPICAL APPLICATIO Daisy-Chained Control Outputs Functional Block Diagram: Quad 12-Bit Rail-to-Rail DAC 2.048V (LTC1458) 1.22V (LTC1458L) FROM µP REFOUT CS/LD CLK 5V (LTC1458) 3V TO 5V (LTC1458L) DIN Differential Nonlinearity vs Input Code VCC 0.5 REFHI C REFHI B 0.4 0.3 DAC C X1/X2 C DAC B 48-BIT REFLO C 0.2 X1/X2 B 0.1 REFLO B SHIFT REGISTER AND REFHI D VOUT B REFHI A DAC REGISTER DNL (LSB) VOUT C 0 –0.1 –0.2 VOUT A –0.3 X1/X2 D X1/X2 A –0.4 REFLO D REFLO A –0.5 VOUT D DAC D DAC A 0 CLR DOUT 512 1024 1536 2048 2560 3072 3584 4095 CODE 1458 G09 1458 BD01 1 LTC1458/LTC1458L W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) VCC to GND .............................................. – 0.5V to 7.5V Logic Inputs to GND ................................ – 0.5V to 7.5V VOUT A , VOUT B, VOUT C, VOUT D, X1/X2 A , X1/X2 B, X1/X2 C, X1/X2 D ......................................... – 0.5V to VCC + 0.5V REFHI A , REFHI B, REFHI C, REFHI D, REFLO A , REFLO B, REFLO C, REFLO D ........................................ – 0.5V to VCC + 0.5V Maximum Junction Temperature ......................... 125°C Operating Temperature Range LTC1458C/LTC1458LC ............................ 0°C to 70°C LTC1458I/LTC1458LI ........................ – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C TOP VIEW X1/X2 C 1 28 VCC VOUT C 2 27 X1/X2 B CS/LD 3 26 VOUT B DIN 4 25 CLR REFHI C 5 24 REFHI B GND 6 23 GND REFLO C 7 22 REFLO B REFLO D 8 21 REFLO A REFHI D 9 20 REFHI A DOUT 10 CLK 11 19 REFOUT 18 NC NC 12 VOUT D 13 X1/X2 D 14 17 VOUT A 16 X1/X2 A 15 VCC G PACKAGE 28-LEAD PLASTIC SSOP ORDER PART NUMBER LTC1458CG LTC1458CSW LTC1458LCG LTC1458LCSW LTC1458IG LTC1458ISW LTC1458LIG LTC1458LISW SW PACKAGE 28-LEAD PLASTIC SO TJMAX = 125°C, θJA = 100°C/W (G) TJMAX = 125°C, θJA = 150°C/W (SW) Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = TMIN to TMAX. VCC = 4.5V to 5.5V (LTC1458), 2.7V to 5.5V (LTC1458L), X1/X2 = REFLO = GND, REFHI = REFOUT, VOUT unloaded, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ±0.5 LSB DAC Resolution ● 12 Bits DNL Differential Nonlinearity Guaranteed Monotonic (Note 2) ● INL Integral Nonlinearity TA = 25°C (Note 2) ● ±1.75 ±2.25 ±4.0 ±4.5 LSB LSB ● ±3.0 ±6.0 ±12 ±18 mV mV VOS Offset Error VOSTC Offset Error Temperature Coefficient VFS Full-Scale Voltage VFSTC Full-Scale Voltage Temperature Coefficient TA = 25°C ±15 µV/°C When Using Internal Reference, LTC1458, TA = 25°C LTC1458 ● 4.065 4.045 4.095 4.095 4.125 4.145 V V When Using Internal Reference, LTC1458L, TA = 25°C LTC1458L ● 2.470 2.460 2.500 2.500 2.530 2.540 V V ± 24 When Using Internal Reference ppm/°C Reference Reference Output Voltage LTC1458 LTC1458L ● ● 2.008 1.195 Reference Line Regulation 2 2.088 1.245 ±20 Reference Output Temperature Coefficient Reference Load Regulation 0 ≤ IOUT ≤ 100µA, LTC1458 LTC1458L Reference Input Range VREFHI ≤ VCC – 1.5V Reference Input Resistance 2.048 1.220 V V ppm/°C ● 0.7 ±2.0 LSB/V ● ● 0.2 0.6 1.5 3.0 LSB LSB 40 kΩ VCC /2 ● 15 24 V LTC1458/LTC1458L ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = TMIN to TMAX. VCC = 4.5V to 5.5V (LTC1458), 2.7V to 5.5V (LTC1458L), X1/X2 = REFLO = GND, REFHI = REFOUT, VOUT unloaded, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP Reference Input Capacitance Short-Circuit Current MAX 15 REFOUT Shorted to GND ● 45 UNITS pF 120 mA 5.5 5.5 V V Power Supply VCC Positive Supply Voltage For Specified Performance, LTC1458 LTC1458L ● ● 4.5 2.7 ICC Supply Current 4.5V ≤ VCC ≤ 5.5V (Note 5) , LTC1458 2.7V ≤ VCC ≤ 5.5V (Note 5), LTC1458L ● ● 1100 800 2400 2000 µA µA Short-Circuit Current Low VOUT Shorted to GND ● 60 120 mA Short-Circuit Current High VOUT Shorted to VCC ● 70 120 mA Output Impedance to GND Input Code = 0 ● 40 160 Ω Voltage Output Slew Rate (Note 3) ● Voltage Output Settling Time (Notes 3, 4) to ±0.5LSB Op Amp DC Performance AC Performance 0.5 Digital Feedthrough SINAD 1.0 V/µs 14 µs 0.3 nV • s AC Feedthrough REFHI = 1kHz, 2VP-P, (Code: All 0s) – 95 dB Signal-to-Noise + Distortion REFHI = 1kHz, 2VP-P, (Code: All 1s) 85 dB The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = TMIN to TMAX. VCC = 5V (LTC1458), 3V (LTC1458L), unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN LTC1458 TYP MAX MIN LTC1458L TYP MAX UNITS Digital I/O VIH Digital Input High Voltage ● VIL Digital Input Low Voltage ● VOH Digital Output High Voltage IOUT = – 1mA ● VOL Digital Output Low Voltage IOUT = 1mA ● ILEAK Digital Input Leakage VIN = GND to VCC CIN Digital Input Capacitance Guaranteed by Design, Not Subject to Test 2.4 2.0 0.8 V 0.6 V 0.4 0.4 V ● ±10 ±10 µA ● 10 10 pF VCC – 1.0 VCC – 0.7 V Switching t1 DIN Valid to CLK Setup ● 40 60 ns t2 DIN Valid to CLK Hold ● 0 0 ns t3 CLK High Time ● 40 60 ns t4 CLK Low Time ● 40 60 ns t5 CS/LD Pulse Width ● 50 80 ns t6 LSB CLK to CS/LD ● 40 60 ns t7 CS/LD Low to CLK ● 20 t8 DOUT Output Delay t9 CLK Low to CS/LD Low CLOAD = 15pF ● 30 150 ● 20 ns 220 30 ns ns 3 LTC1458/LTC1458L ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Nonlinearity is defined from the first code that is greater than or equal to the maximum offset specification to code 4095 (full scale). Note 3: Load is 5kΩ in parallel with 100pF. Note 4: DAC switched between all 1s and the code corresponding to VOS for the part. Note 5: Digital inputs at 0V or VCC. U W TYPICAL PERFOR A CE CHARACTERISTICS LTC1458 Integral Nonlinearity (INL) 2.0 0.4 1.6 0.3 1.2 0.2 0.8 0.1 0 –0.1 –0.2 1.4 1.0 0 –0.4 –0.8 –1.2 –0.4 –1.6 512 1024 1536 2048 2560 3072 3584 4095 CODE 0 0 512 1024 1536 2048 2560 3072 3584 4095 CODE 125°C –55°C 400 300 4.5 4.0 4.0 3.5 3.5 3.0 2.5 1.5 1.0 100 0.5 0 5 10 15 20 25 OUTPUT SINK CURRENT (mA) 30 1458 G04 4 RL 2.0 200 0.1 10 15 20 LOAD CURRENT (mA) REFLO = GND X1/X2 = GND DAC CODE = FFFH 0 10 100 1k LOAD RESISTANCE (Ω) 10k 1458 G05A 25 30 Output Swing vs Load Resistance 4.5 OUTPUT SWING (V) 25°C OUTPUT SWING (V) OUTPUT PULL-DOWN VOLTAGE (mV) REFLO = GND 900 X1/X2 = GND 700 5 1458 G03 Output Swing vs Load Resistance 1000 500 0 1458 G08 Minimum Output Voltage vs Output Sink Current 600 0.6 0.2 1458 G09 800 0.8 0.4 –2.0 0 ∆VOUT < 1LSB REFLO = GND X1/X2 = GND CODE: ALL 1's VOUT = 4.095V 1.2 0.4 –0.3 –0.5 Minimum Supply Headroom for Full Output Swing vs Load Current VCC – VOUT (V) 0.5 INL ERROR (LSB) DNL (LSB) LTC1458 Differential Nonlinearity (DNL) REFLO = GND X1/X2 = GND DAC CODE = OOOH 3.0 VCC 2.5 RL 2.0 1.5 1.0 0.5 0 10 100 1k LOAD RESISTANCE (Ω) 10k 1458 G06A LTC1458/LTC1458L U W TYPICAL PERFOR A CE CHARACTERISTICS LTC1458 Full-Scale Voltage vs Temperature OFFSET VOLTAGE (mV) SFULL-SCALE VOLTAGE (V) 4.105 4.100 4.095 4.090 4.085 –25 5 35 65 TEMPERATURE (°C) 95 125 5 950 4 940 3 930 SUPPLY CURRENT (µA) 4.110 4.080 –55 LTC1458 Supply Current vs Temperature LTC1458 Offset Voltage vs Temperature 2 1 0 –1 –2 910 900 880 870 –4 860 –25 35 65 5 TEMPERATURE (°C) 1458 G06 95 125 VCC = 5V 890 –3 –5 –55 VCC = 5.5V 920 850 –55 VCC = 4.5V –25 35 65 5 TEMPERATURE (°C) 1458 G07 95 125 1458 G05 U U U PI FU CTIO S X1/X2 C, X1/X2 D,X1/X2 A, X1/X2 B (Pins 1, 14, 16, 27): The Input Pin that Sets the Gain for DAC C/D/A/B. When grounded the gain will be 2, i.e., output full-scale will be 2 • REFHI. When connected to VOUT the gain will be 1, i.e., output full-scale will be equal to REFHI. REFLO C, REFLO D, REFLO A, REFLO B, (Pins 7, 8, 21, 22): The Bottom of the DAC Resistor Ladders for the DACs. These can be used to offset zero-scale above ground. REFLO should be connected to ground when no offset is required. VOUT C, VOUT D, VOUT A, VOUT B (Pins 2, 13, 17, 26): The Buffered DAC Outputs. DOUT (Pin 10): The Output of the Shift Register which Becomes Valid on the Rising Edge of the Serial Clock. CS/LD (Pin 3): The Serial Interface Enable and Load Control Input. CLK (Pin 11): The Serial Interface Clock Input. DIN (Pin 4): The Serial Data Input. REFHI C, REFHI D, REFHI A, REFHI B,(Pins 5, 9, 20, 24): The Inputs to the DAC Resistor Ladder for DAC C/D/A/B. GND (Pins 6, 23): Ground. VCC (Pins 15, 28): The Positive Supply Input. 4.5V ≤ VCC ≤ 5.5V (LTC1458), 2.7V ≤ VCC ≤ 5.5V (LTC1458L). Requires a 0.1µF bypass capacitor to ground. REFOUT (Pin 19): The Output of the Internal Reference. CLR (Pin 25): The Clear Pin. Clears all DACs to zero-scale when pulled low. 5 LTC1458/LTC1458L W BLOCK DIAGRA 28 VCC X1/X2 C 1 LD LD 12-BIT DAC C REGISTER 12-BIT DAC B REGISTER VOUT C 2 CS/LD 3 DIN 4 REFHI C 5 24 REFHI B GND 6 23 GND REFLO C 7 22 REFLO B REFLO D 8 21 REFLO A REFHI D 9 20 REFHI A DAC C DAC B 27 X1/X2 B 26 VOUT B POWER-ON RESET 25 CLR 48-BIT SHIFT REGISTER LTC1458: 2.048V LTC1458L: 1.22V DOUT 10 CLK 11 18 NC NC 12 VOUT D 13 19 REFOUT 17 VOUT A DAC D 12-BIT DAC D REGISTER 12-BIT DAC A REGISTER LD LD DAC A X1/X2 D 14 16 X1/X2 A 15 VCC REFHI + VOUT – REFLO X1/X2 1458 BD 6 LTC1458/LTC1458L WU W TI I G DIAGRA t9 CLK DIN t2 t6 B11 C MSB B0 D LSB t1 t4 B0 D PREVIOUS WORD t3 B11 A MSB B0 B LSB CS/LD t5 t8 B11 A PREVIOUS WORD DOUT t7 B10 A PREVIOUS WORD B0 B PREVIOUS WORD B11 C PREVIOUS WORD B0 D PREVIOUS WORD B11 A CURRENT WORD 1458 TD U U DEFI ITIO S Resolution (n): Resolution is defined as the number of digital input bits, n. It defines the number of DAC output states (2n) that divide the full-scale range. The resolution does not imply linearity. Full-Scale Voltage (VFS): This is the output of the DAC when all bits are set to 1. Voltage Offset Error (VOS): The theoretical voltage at the output when the DAC is loaded with all zeros. The output amplifier can have a true negative offset, but because the part is operated from a single supply, the output cannot go below zero. If the offset is negative, the output will remain near 0V resulting in the transfer curve shown in Figure 1. OUTPUT VOLTAGE NEGATIVE OFFSET 0V DAC CODE 1458 F01 Figure 1. Effect of Negative Offset The offset of the part is measured at the code that corresponds to the maximum offset specification: VOS = VOUT – [(Code)(VFS)/(2n – 1)] Least Significant Bit (LSB): One LSB is the ideal voltage difference between two successive codes. LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/4095 Nominal LSBs: LTC1458 LTC1458L LSB = 4.095V/4095 = 1mV LSB = 2.5V/4095 = 0.610mV Integral Nonlinearity (INL): End-point INL is the maximum deviation from a straight line passing through the end-points of the DAC transfer curve. Because the part operates from a single supply and the output cannot go below zero, the linearity is measured between full scale and the code corresponding to the maximum offset specification. The INL error at a given input code is calculated as follows: INL = [VOUT – VOS – (VFS – VOS)(code/4095)]/LSB VOUT = The output voltage of the DAC measured at the given input code 7 LTC1458/LTC1458L U U DEFI ITIO S Differential Nonlinearity (DNL): DNL is the difference between the measured change and the ideal 1LSB change between any two adjacent codes. The DNL error between any two codes is calculated as follows: Digital Feedthrough: The glitch that appears at the analog output caused by AC coupling from the digital inputs when they change state. The area of the glitch is specified in (nV)(sec). DNL = (∆VOUT – LSB)/LSB ∆VOUT = The measured voltage difference between two adjacent codes U OPERATIO Serial Interface Reference The data on the DIN input is loaded into the shift register on the rising edge of the clock. Data is loaded as one 48-bit word, DAC A first, then DAC B, DAC C and DAC D. The MSB is loaded first for each DAC. The DAC registers load the data from the shift register when CS/LD is pulled high. The CLK is disabled internally when CS/LD is high. Note: CLK must be low before CS/LD is pulled low to avoid an extra internal clock pulse. The LTC1458L has an internal reference of 1.22V with a full scale of 2.5V (gain of 2 configuration). The LTC1458 includes an internal 2.048V reference, making 1LSB equal to 1mV (gain of 2 configuration). When the buffer gain is 2, the external reference must be less than VCC /2 and be capable of driving the 15k minimum DAC resistor ladder. The external reference must always be less than VCC – 1.5V. The reference output voltage noise spectral density at 1kHz is 300nV/√Hz. The buffered output of the 48-bit shift register is available on the DOUT pin which swings from ground to VCC. Multiple LTC1458/LTC1458Ls may be daisy-chained together by connecting the DOUT pin to the DIN pin of the next chip, while the CLK and CS/LD signals remain common to all chips in the daisy-chain. The serial data is clocked to all of the chips, then the CS/LD signal is pulled high to update all of them simultaneously. 8 Voltage Output The rail-to-rail buffered output of the LTC1458 family can source or sink 5mA when operating with a 5V supply over the entire operating temperature range while pulling to within 300mV of the positive supply voltage or ground. The output swings to within a few millivolts of either supply rail when unloaded and has an equivalent output resistance of 40Ω when driving a load to the rails. The output can drive 1000pF without going into oscillation. The output voltage noise spectral density at 1kHz is 600nV/√Hz. LTC1458/LTC1458L U W U U APPLICATIO S I FOR ATIO Using Two DACs to Digitally Program the Full Scale and Offset of a Third ≤ 2,500 for VCC = 5V, since DAC C is being operated in × 2 mode for full rail-to-rail output swing. Figure 2 shows how to use one LTC1458 to make a 12-bit DAC with a digitally programmable full scale and offset. DAC A and DAC B are used to control the offset and full scale of DAC C. DAC A is connected in a × 1 configuration and controls the offset of DAC C by moving REFLO C above ground. The minimum value to which this offset can be programmed is 10mV. DAC B is connected in a × 2 configuration and controls the full scale of DAC C by driving REFHI C. Note that the voltage at REFHI C must be less than or equal to VCC/2, corresponding to DAC B’s code The transfer characteristic is: VOUTC = 2 • [DC • (2 • DB – DA) + DA] • REFOUT where REFOUT = The Reference Output DA = (DAC A Digital Code)/4096 This sets the offset. DB = (DAC B Digital Code)/4096 This sets the full scale. DC = (DAC C Digital Code)/4096 VCC X1/X2 C VOUT VOUT C X1/X2 B CS/LD VOUT B CLR DIN REFHI B REFHI C GND GND REFLO C 500Ω 5V 0.1µF LTC1458 LTC1458L REFLO B REFLO A REFLO D REFHI D REFHI A DOUT REFOUT NC CLK VOUT A NC X1/X2 A VOUT D VCC X1/X2 D 1458 F02 Figure 2 9 LTC1458/LTC1458L U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 10.07 – 10.33* (0.397 – 0.407) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 7.65 – 7.90 (0.301 – 0.311) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 5.20 – 5.38** (0.205 – 0.212) 1.73 – 1.99 (0.068 – 0.078) 0° – 8° 0.13 – 0.22 (0.005 – 0.009) 0.55 – 0.95 (0.022 – 0.037) NOTE: DIMENSIONS ARE IN MILLIMETERS *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.152mm (0.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE 10 0.65 (0.0256) BSC 0.25 – 0.38 (0.010 – 0.015) 0.05 – 0.21 (0.002 – 0.008) G28 SSOP 1098 LTC1458/LTC1458L U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. SW Package 28-Lead Plastic Small Outline (Wide 0.300) (LTC DWG # 05-08-1620) 0.697 – 0.712* (17.70 – 18.08) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0.394 – 0.419 (10.007 – 10.643) NOTE 1 0.291 – 0.299** (7.391 – 7.595) 1 2 3 4 5 6 7 8 9 10 0.093 – 0.104 (2.362 – 2.642) 0.010 – 0.029 × 45° (0.254 – 0.737) 11 12 13 14 0.037 – 0.045 (0.940 – 1.143) 0° – 8° TYP 0.009 – 0.013 (0.229 – 0.330) 0.050 (1.270) BSC NOTE 1 0.016 – 0.050 (0.406 – 1.270) 0.014 – 0.019 (0.356 – 0.482) TYP NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 0.004 – 0.012 (0.102 – 0.305) S28 (WIDE) 1098 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC1458/LTC1458L U TYPICAL APPLICATIO VCC X1/X2 C LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V µP VOUT C X1/X2 B CS/LD VOUT B REFHI B REFHI C GND GND REFLO D LTC1458 LTC1458L REFLO B REFLO A REFHI D REFHI A DOUT REFOUT CLK NC LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V CLR DIN REFLO C 0.1µF LTC1458: 4.5V TO 5.5V LTC1458L: 2.7V TO 5.5V VOUT D X1/X2 D LTC1458: 2.048V LTC1458L: 1.22V NC LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V VOUT A X1/X2 A VCC 1458 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1257 Single 12-Bit VOUT DAC, Full Scale: 2.048V, VCC: 4.75V to 15.75V, Reference Can Be Overdriven up to 12V, i.e., FSMAX = 12V 5V to 15V Single Supply, Complete VOUT DAC in SO-8 Package LTC1446/LTC1446L Dual 12-Bit Rail-to-Rail Output DACs in SO-8 Package LTC1446: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1446L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V LTC1450/LTC1450L Single 12-Bit Rail-to-Rail Output DACs with Parallel Interface LTC1450: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1450L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V LTC1451 Single Rail-to-Rail 12-Bit DAC, Full Scale: 4.095V, VCC: 4.5V to 5.5V Low Power, Complete VOUT DAC in SO-8 Package LTC1452 Single Rail-to-Rail 12-Bit VOUT Multiplying DAC, VCC: 2.7V to 5.5V Low Power, Multiplying VOUT DAC with Rail-to-Rail Buffer Amplifier in SO-8 Package LTC1453 Single Rail-to-Rail 12-Bit VOUT DAC, Full Scale: 2.5V, VCC: 2.7V to 5.5V 3V, Low Power, Complete VOUT DAC in SO-8 Package LTC1454/LTC1454L Dual 12-Bit VOUT DACs in SO-16 Package with Added Functionality LTC1454: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1454L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V LTC1456 Single Rail-to-Rail Output 12-Bit DAC with Clear Pin, Full Scale: 4.095V, VCC: 4.5V to 5.5V Low Power, Complete VOUT DAC in SO-8 Package with Clear Pin LTC1655/LTC1655L Single 16-Bit VOUT DAC with Serial Interface in SO-8 VCC = 5V (3V), Low Power, Deglitched, VOUT = 0V to 4.096V (0V to 2.5V) LTC1661 Dual 10-Bit VOUT DAC in 8-Lead MSOP Package VCC = 2.7V to 5.5V Micropower, Rail-to-Rail Output LTC1662 Ultralow Power, Dual 10-Bit DAC in 8-Lead MSOP Package 1.5µA ICC per DAC, 2.7V to 5.5V Supply Range LTC1664 Quad 10-Bit VOUT DAC in 16-Pin Narrow SSOP Pin Compatible with the LTC1660, 2.7V to 5.5V Supply Range LTC1665/LTC1660 Octal 8/10-Bit VOUT DAC in 16-Pin Narrow SSOP VCC = 2.7V to 5.5V, Micropower, Rail-to-Rail Output 12 Linear Technology Corporation 14588lfa LT/LCG 0700 2K REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com  LINEAR TECHNOLOGY CORPORATION 1996