LTC1520CS#PBF

LTC1520 50Mbps Precision Quad Line Receiver U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Precision Propagation Delay: 18ns ±3ns Over Temperature Data Rate: 50Mbps Low tPLH/tPHL Skew: 500ps Typ Low Channel-to-Channel Skew: 400ps Typ Rail-to-Rail Input Common Mode Range High Input Resistance: ≥ 18k, Even When Unpowered Hot Swap Capable Can Withstand Input DC Levels of ±10V Short-Circuit Protected Single 5V Supply LVDS Compatible Will Not Oscillate with Slow Input Signals ■ ■ ■ ■ ■ Each receiver translates differential input levels (VID ≥ 100mV) into valid CMOS and TTL output levels. Its high input resistance (≥ 18k) allows many receivers to be connected to the same driver. The receiver outputs go into a high impedance state when disabled. Protection features include thermal shutdown and a controlled maximum short-circuit current (50mA max) that does not oscillate in and out of short-circuit mode. Input resistance remains ≥18k when the device is unpowered or disabled, thus allowing the LTC1520 to be hot swapped into a backplane without loading the data lines. U APPLICATIONS ■ The LTC®1520 is a high speed, precision differential line receiver that can operate at data rates as high as 50Mbps. A unique architecture provides very stable propagation delays and low skew over a wide input common mode, input overdrive and ambient temperature range. Propagation delay is 18ns ±3ns, while typically tPLH/tPHL skew is 500ps and channel-to-channel skew is 400ps. High Speed Backplane Interface Line Collision Detector PECL and LVDS Line Receivers Level Translator Ring Oscillator Tapped Delay Line The LTC1520 operates from a single 5V supply and draws 12mA of supply current. The part is available in a 16-lead narrow SO package. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATION High Speed Backplane Receiver Propagation Delay Guaranteed to Fall Within Shaded Area (±3ns) LTC1520 + + – – RECEIVER INPUT VID = 500mV VIN = 1V/DIV + RECEIVER OUTPUT VDD = 5V VOUT = 5V/DIV – + – 5V 3.3k –5 3.3k 0.01µF 0 5 10 15 20 25 30 35 40 45 TIME (ns) LTC1520 TA02 1520 TA01 1 LTC1520 U U RATI GS W W W W AXI U U ABSOLUTE PACKAGE/ORDER I FOR ATIO (Note 1) Supply Voltage ....................................................... 10V Digital Input Currents ..................... – 100mA to 100mA Digital Input Voltages ............................... – 0.5V to 10V Receiver Input Voltages ........................................ ±10V Receiver Output Voltages ............. – 0.5V to VDD + 0.5V Short-Circuit Duration .................................... Indefinite Operating Temperature Range .................... 0°C to 70°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C ORDER PART NUMBER TOP VIEW B1 1 16 VDD A1 2 15 B4 OUT 1 3 14 A4 LTC1520CS 13 OUT 4 ENABLE 4 12 NC OUT 2 5 A2 6 11 OUT 3 B2 7 10 A3 9 GND 8 B3 S PACKAGE 16-LEAD PLASTIC SO TJMAX = 150°C, θJA = 90°C/ W Consult factory for Industrial and Military grade parts. DC ELECTRICAL CHARACTERISTICS VDD = 5V ±5% (Notes 2, 3) per receiver, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN VCM Input Common Mode Voltage A, B Inputs ● – 0.2 VIH Input High Voltage Enable Input ● 2 VIL Input Low Voltage Enable Input ● IIN1 Input Current Enable Input ● –1 IIN2 Input Current (A, B) VA, VB = 5V VA, VB = 0 ● ● MAX VDD + 0.2 UNITS V V 0.8 V 1 µA 250 – 250 µA µA ● 18 kΩ RIN Input Resistance (Figure 5) – 0.2V ≤ VCM ≤ VDD + 0.2V CIN A, B Input Capacitance (Note 4) VOC Open-Circuit Input Voltage (Figure 5) VDD = 5V (Note 4) ● 3.2 VID(MIN) Differential Input Threshold Voltage – 0.2V < VCM < VDD + 0.2V ● – 0.1 dVID Input Hysteresis VCM = 2.5V ● VOH Output High Voltage IOUT = – 4mA, VID = 0.1V, VDD = 5V ● VOL Output Low Voltage IOUT = 4mA, VID = 0.1V, VDD = 5V ● IOZR Three-State Output Current 0V ≤ VOUT ≤ VDD ● IDD Total Supply Current All 4 Receivers VID ≥ 0.1V, No Load, Enable = 5V ● IOSR Short-Circuit Current VOUT = 0V, VOUT = VDD ● CMRR Common Mode Rejection Ratio VCM = 2.5V, f = 25MHz 2 TYP 3 3.3 pF 3.4 V 0.1 V 20 mV 4.6 V 0.4 – 10 12 – 50 45 V 10 µA 20 mA 50 mA dB LTC1520 U W SWITCHI G TI E CHARACTERISTICS VDD = 5V ±5% (Notes 2, 3) VID = 500mV, VCM = 2.5V, unless otherwise noted. SYMBOL PARAMETER tPLH, tPHL Input-to-Output Propagation Delay CL = 15pF (Figure 1) tr, tf Rise/Fall Times CL = 15pF tSKD tPLH – tPHL Skew CL = 15pF, Same Receiver (Note 5) tZL Enable to Output Low tZH Enable to Output High tLZ Disable from Output Low tHZ tCH-CH tPKG-PKG fIN CONDITIONS MIN 15 ● TYP MAX 18 21 UNITS ns 2.5 ns ● 500 ps CL = 15pF (Figure 2) ● 10 35 ns CL = 15pF (Figure 2) ● 10 35 ns CL = 15pF (Figure 2) ● 20 35 ns Disable from Output High CL = 15pF (Figure 2) ● 20 35 Channel-to-Channel Skew CL = 15pF (Figure 3) (Note 6) ● 400 ps Package-to-Package Skew CL = 15pF, Same Temperature (Figure 4, Note 4) 1.5 ns Minimum Input Pulse Width (Note 4) 12 ns Maximum Input Frequency (Note 4) 40 MHz The ● denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Recommended: VDD = 5V ±5%. Note 2: All currents into the device pins are positive; all currents out of the device pins are negative. ns Note 3: All typicals are given for VDD = 5V, TA = 25°C. Note 4: Guaranteed by design, but not tested. Note 5: Worst-case tPLH – tPHL skew for a single receiver in a package over the full operating temperature range. Note 6: Maximum difference between any two tPLH or tPHL transitions in a single package over the full operating temperature range. U W TYPICAL PERFORMANCE CHARACTERISTICS Propagation Delay (tPLH/tPHL) vs Temperature 25 15 10 5 100 125 LTC1520 G01 20 PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) TA = 25°C VID = 500mV TA = 25°C VCM = 2.5V 20 50 25 0 75 TEMPERATURE (°C) 25 25 VCM = 2.5V VID = 500mV 0 –50 –25 Propagation Delay (tPLH/tPHL) vs Input Common Mode Propagation Delay (tPLH/tPHL) vs Input Overdrive 15 10 5 0 0.05 20 15 10 5 0 0.1 1 INPUT OVERDRIVE (V) 5 10 1520 G02 0 4 1 3 2 INPUT COMMON MODE (V) 5 LTC1520 G03 3 LTC1520 U W TYPICAL PERFORMANCE CHARACTERISTICS Propagation Delay vs Load Capacitance (tPLH/tPHL) CMRR vs Frequency PROPAGATION DELAY (ns) COMMON MODE REJECTION RATIO (dB) TA = 25°C VID = 500mV VCM = 2.5V 25 20 15 10 5 0 5 105 25 35 55 LOAD CAPACITANCE (pF) 15 Supply Current vs Frequency 46.5 50 46.0 45 45.5 45.0 44.5 44.0 43.5 43.0 1 RECEIVER SWITCHING 25 20 15 0 1k 10 100k FREQUENCY (Hz) 10M 0 5 15 10 FREQUENCY (MHz) 20 Output Duty Cycle vs Frequency Skew vs Temperature (tSKD) 400 25 50.0 VIN = 50% DUTY CYCLE 49.5 25°C 25 1520 G05 LTC1520 G04 Supply Current vs Temperature and Frequency 390 49.0 0°C 380 –45°C 15 10 DUTY CYCLE (%) 100°C SKEW (ps) SUPPLY CURRENT (mA) 30 5 TA = 25°C 1520 G06 20 35 10 42.5 42.0 205 ALL 4 RECEIVERS SWITCHING 40 SUPPLY CURRENT (mA) 30 370 360 48.5 48.0 47.5 47.0 46.5 5 350 46.0 1 RECEIVER SWITCHING 0 0 5 15 10 FREQUENCY (MHz) 20 25 340 –10 10 30 50 70 TEMPERATURE (°C) 1520 G07 90 110 1520 G08 45.5 0 5 15 10 FREQUENCY (MHz) 20 25 1520 G09 U U U PIN FUNCTIONS B1 (Pin 1): Receiver 1 Inverting Input. A1 (Pin 2): Receiver 1 Noninverting Input. RO1 (Pin 3): Receiver 1 Output. Enable (Pin 4): Receiver Output Enable Pin. A logic high input enables the receiver outputs. A logic low input forces the receiver outputs into a high impedance state. Do not float. RO2 (Pin 5): Receiver 2 Output. A2 (Pin 6): Receiver 2 Noninverting Input. B2 (Pin 7): Receiver 2 Inverting Input. GND (Pin 8): Ground Pin. A ground plane is recommended for all LTC1520 applications. 4 B3 (Pin 9): Receiver 3 Inverting Input. A3 (Pin 10): Receiver 3 Noninverting Input. RO3 (Pin 11): Receiver 3 Output. NC (Pin 12): No Connection. RO4 (Pin 13): Receiver 4 Output. A4 (Pin 14): Receiver 4 Noninverting Input. B4 (Pin 15): Receiver 4 Inverting Input. VDD (Pin 16): 5V Supply Pin. This pin should be decoupled with a 0.1µF ceramic capacitor as close as possible to the pin. Recommended: VDD = 5V ±5%. LTC1520 U W W SWITCHI G TI E WAVEFOR S 3V 2.5V INPUT 2.5V t PLH + INPUT 2V 1/4 LTC1520 t PHL VDD/2 OUTPUT – 2.5V VDD/2 OUTPUT 15pF 1520 F01b 1520 F01 Figure 1. Propagation Delay Test Circuit and Waveforms 3V 3V 1.5V ENABLE INPUT A1, A2 1.5V 0V 5V t LZ t ZL OUT 1 OUTPUT NORMALLY LOW 1.5V VOL VOH OUT 1 CH1 OUT 0V t CH-CH VDD/2 CH2 OUT VDD/2 1520 F03 t HZ Figure 3. Any Channel to Any Channel Skew, Same Package 1k RECEIVER OUTPUT VDD 1k VDD/2 t CH-CH 0.2V t ZH S1 VDD/2 0.2V OUTPUT NORMALLY HIGH 1.5V CL 2V B1, B2 = 2.5V S2 1520 F02 Figure 2. Receiver Enable and Disable Timing Test Circuit and Waveforms INPUT A1, B1 VID = 500mV SAME INPUT FOR BOTH PACKAGES PACKAGE 1 OUT 1 t PKG-PKG tPKG-PKG PACKAGE 2 OUT 1 1520 F04 Figure 4. Package-to-Package Propagation Delay Skew U U EQUIVALE T I PUT NETWORKS ≥18k A ≥18k 3.3V A ≥18k B ≥18k 3.3V RECEIVER ENABLED, VDD = 5V B RECEIVER DISABLED OR VDD = 0V 1520 F05 Figure 5. Input Thevenin Equivalent 5 LTC1520 U W U U APPLICATIONS INFORMATION Theory of Operation Unlike typical line receivers whose propagation delay can vary by as much as 500% from package to package and show significant temperature drift, the LTC1520 employs a novel architecture that produces a tightly controlled and temperature compensated propagation delay. The differential timing skew is also minimized between rising and falling output edges, and the propagation delays of any two receivers within a package are very tightly matched. The precision timing features of the LTC1520 reduce overall system timing constraints by providing a narrow 6ns window during which valid data appears at the receiver output. This output timing window applies to all receivers in separate packages over all operating temperatures thereby making the LTC1520 well suited for high speed parallel data transmission applications such as backplanes. In clocked data systems, the low skew minimizes duty cycle distortion of the clock signal. The LTC1520 can propagate signals at frequencies up to 25MHz (50Mbps) with less than 5% duty cycle distortion. When a clock signal is used to retime parallel data, the maximum recommended data transmission rate is 25Mbps to avoid timing errors due to clock distortion. Rail-to-rail input common mode range enables the LTC1520 to be used in both single-ended and differential applications with transmission distances up to 100 feet. Thermal shutdown and short-circuit protection prevent latchup damage to the LTC1520 during fault conditions. reference for transmission line and termination effects. To mitigate transmission errors and duty cycle distortion due to driver ringing, a small output filter or a dampening resistor on VDD may be needed as shown in Figure 6b. To transmit single-ended data over distances up to 10 feet, twisted pair is recommended with the unused wire grounded at both ends (Figure 7). MC74ACT04 (TTL INPUT) PC TRACE 1/4 LTC1520 MC74AC04 (CMOS INPUT) 2.2k 0.01µF 6 + 2.2k 1520 F06a Figure 6a. Single-Ended Receiver 0.01µF 10Ω MC74AC04 10Ω PC TRACE PC TRACE OR 10pF 1520 F06b Figure 6b. Techniques to Minimize Driver Ringing MC74ACT04 MC74AC04 10-FT TWISTED PAIR – 120Ω 1/4 LTC1520 + 5V Single-Ended Applications Over short distances, the LTC1520 can be configured to receive single-ended data by tying one input to a fixed bias voltage and connecting the other input to the driver output. In such applications, standard high speed CMOS logic may be used as a driver for the LTC1520. The receiver trip points may be easily adjusted to accommodate different driver output swings by changing the resistor divider at the fixed input. Figure 6a shows a single-ended receiver configuration with the driver and receiver connected via PC traces. Note that at very high speeds, transmission line and driver ringing effects have to be considered. Motorola’s MECL System Design Handbook serves as an excellent – 5V 3.3k 0.01µF 2.2k 1520 F07 Figure 7. Medium Distance Single-Ended Transmission Using a CMOS Driver Differential Transmission The LTC1520 is well suited for medium distance differential transmission due to its rail-to-rail input common mode range. Clock rates up to 25MHz can be transmitted over 100 feet of high quality twisted pair. Figure 8 shows the LTC1520 U U W U APPLICATIONS INFORMATION LTC1520 receiving differential data from a PECL driver. As in the single-ended configurations, care must be taken to properly terminate the differential data lines to avoid unwanted reflections, etc. 5V 3.3k 0.01µF 3.3k 5V 100-FT TWISTED PAIR 1/4 LTC1520 – + 1/4 LTC1520 RT 1/4 LTC1520 120Ω * 100Ω 100Ω 1/4 LTC1520 9.3MHz OSCILLATOR WITH BETTER THAN 45/55 DUTY CYCLE + 100Ω 5V + – 100Ω 5V + – TYPICAL STABILITY ± 5% OVER TEMPERATURE – *MC10116 1520 F08 0.01µF Figure 8. Differential Transmission Over Long Distances + + + 1/4 LTC1520 1/4 LTC1520 1/4 LTC1520 – – – 6.9MHz OSCILLATOR OUTPUT + Alternate Uses 1/4 LTC1520 The tightly controlled propagation delay of the LTC1520 allows the part to serve as a fixed delay element. Figure 9 shows the LTC1520 used as a tapped delay line with 18ns ±3ns steps. Several LTC1520s may be connected in series to form longer delay lines. Each tap in the delay line is accurate to within ±17% over temperature. As shown in Figure 10, the LTC1520 can be used to create a temperature stable ring oscillator with period increments of 36ns. Low skew and good channel-to-channel matching enable this oscillator to achieve better than a 45/ 55 duty cycle (the duty cycle approaches 50/50 as more LTC1520s are used for lower frequencies). Note that the fixed voltage bias may either be created externally with a resistor divider or generated internally using a bypass capacitor and the internal open circuit bias point (approximately 3.3V). The use of the internal bias point will result in a 1% to 2% distortion of the duty cycle. – 1520 F10 Figure 10. Temperature Stable Ring Oscillators Layout Considerations A ground plane is recommended when using a high frequency device like the LTC1520. A 0.1µF ceramic bypass capacitor less than 1/4 inch away from the VDD pin is also recommended. Good bypassing is especially needed when all four channels are driven simultaneously by the same input. Under these conditions, and with a bypass capacitor more than 1 1/4 inches away from the VDD pin, the parasitic inductances will cause ringing in the VDD and output pins. This in turn can cause false triggering of the output short-circuit detector (Figure 11). When the bypass capacitor is placed close to the VDD pin, however, the LTC1520 operates normally (Figure 12). 0ns DELAY 18ns DELAY INPUT 5V 3.3k 0.01µF + 36ns DELAY 1/4 LTC1520 + – 1/4 LTC1520 + – 1/4 LTC1520 + – 1/4 LTC1520 54ns DELAY 72ns DELAY – 3.3k Figure 9. Tapped Delay Line with 18ns Steps Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1520 F09 7 LTC1520 U W U U APPLICATIONS INFORMATION 160 RECEIVER OUTPUT OSCILLATOR FREQUENCY (kHz) 150 1V/DIV 140 RECEIVER OUTPUT 1V/DIV 0V ALL 4 RECEIVERS DRIVEN BY THE SAME INPUT 130 120 110 100 0V 90 ALL 4 RECEIVERS DRIVEN BY THE SAME INPUT 80 10 0 50ns/DIV 1520 F11 2050ns/DIV30 INPUT VOLTAGE (V) 40 50 1520 F12 Figure 12. VDD Bypassing < 3/8” Away Figure 11. VDD Bypassing > 1 1/4” Away U PACKAGE DESCRIPTION S Package 16-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.386 – 0.394* (9.804 – 10.008) 16 15 14 13 12 11 10 9 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 2 3 5 4 6 7 8 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0° – 8° TYP 0.016 – 0.050 0.406 – 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) TYP S16 0695 **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC486/487 Low Power Quad RS485 Drivers 10Mbps, – 7V to 12V Common Mode Range LTC488/489 Low Power Quad RS485 Receivers 10Mbps, – 7V to 12V Common Mode Range LT 1016 Ultrafast Precision Comparator Single 5V Supply, 10ns Propagation Delay LTC1518 High Speed Quad RS485 Receiver 50Mbps, – 7V to 12V Common Mode Range LTC1519 High Speed Quad RS485 Receiver 50Mbps, – 7V to 12V Common Mode Range ® 8 Linear Technology Corporation 1520fs, sn1520 LT/GP 0996 7K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1996