LTC1546
Software-Selectable
Multiprotocol Transceiver
with Termination
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FEATURES
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DESCRIPTIO
The LTC®1546 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with
the LTC1544, this chip set forms a complete softwareselectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. All necessary cable termination is provided inside
the LTC1546. In most applications, the LTC1546 replaces
both an LTC1543 and an LTC1344A without any changes to
the PC board.
The LTC1546 runs from a single 5V supply using an internal
charge pump that requires only five space-saving surface
mounted capacitors. The LTC1546 is available in a 28-lead
SSOP surface mount package.
Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
TUV Telecom Services Inc. Certified NET1,
NET2 and TBR2 Compliant
On-Chip Cable Termination
Pin Compatible with LTC1543
Complete DTE or DCE Port with LTC1544
Operates from Single 5V Supply
Small Footprint
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APPLICATIO S
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Data Networking
CSU and DSU
Data Routers
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
Complete DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
LL
CTS
DSR
DCD
DTR
RTS
RXD
TXC
D3
R4
18
R2
R3
13 5
22 6
TXD
D3
D2
D1
T
T
T
12
15 11
24 14
LTC1546
LTC1544
D4
SCTE
RXC
D2
D1
R1
10 8
23 20 19 4
1
7
R3
R2
T
T
16
3
9
R1
17
2
TXD A (103)
TXD B
SCTE A (113)
SCTE B
TXC A (114)
TXC B
RXC A (115)
RXC B
RXD A (104)
RXD B
SG (102)
SHIELD (101)
RTS A (105)
RTS B
DTR A (108)
DCD A (109)
DTR B
DCD B
DSR A (107)
CTS A (106)
DSR B
CTS B
LL A (141)
DB-25 CONNECTOR
1546 TA01
1
LTC1546
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ABSOLUTE
RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage ....................................................... 6.5V
Input Voltage
Transmitters ........................... – 0.3V to (VCC + 0.3V)
Receivers ............................................... – 18V to 18V
Logic Pins .............................. – 0.3V to (VCC + 0.3V)
Output Voltage
Transmitters ................. (VEE – 0.3V) to (VDD + 0.3V)
Receivers ................................ – 0.3V to (VCC + 0.3V)
VEE ........................................................ – 10V to 0.3V
VDD ....................................................... – 0.3V to 10V
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output .......................................... Indefinite
VEE .................................................................. 30 sec
Operating Temperature Range
LTC1546C ............................................... 0°C to 70°C
LTC1546I ........................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
TOP VIEW
C1–
1
C1+
2
VDD
3
VCC
4
D1
5
D2
6
D3
7
R1
8
R2
9
28 C2 +
27 C2 –
CHARGE PUMP
26 VEE
25 GND
LTC1546CG
LTC1546IG
24 D1 A
D1
T
D2
T
23 D1 B
22 D2 A
21 D2 B
D3
20 D3/R1 A
T
R3 10
19 D3/R1 B
R1
18 R2 A
M0 11
M1 12
M2 13
R2
T
R3
T
17 R2 B
16 R3 A
15 R3 B
DCE/DTE 14
G PACKAGE
28-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 90°C/ W*
*θJA SOLDERED TO A CIRCUIT BOARD
IS TYPICALLY 60°C/W
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
VCC Supply Current (DCE Mode,
All Digital Pins = GND or VCC)
RS530, RS530-A, X.21 Modes, No Load
RS530, RS530-A, X.21 Modes, Full Load
V.35 Mode
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
MIN
TYP
MAX
UNITS
Supplies
ICC
PD
Internal Power Dissipation (DCE Mode)
RS530, RS530-A, X.21 Modes, Full Load
V.35 Mode, Full Load
V.28 Mode, Full Load
V+
Positive Charge Pump Output Voltage
V.11 or V.28 Mode, No Load
V.35 Mode
V.28 Mode, with Load
V.28 Mode, with Load, IDD = 10mA
V–
Negative Charge Pump Output Voltage
V.28 Mode, No Load
V.28 Mode, Full Load
V.35 Mode
RS530, RS530-A, X.21 Modes, Full Load
2
14
100
126
20
35
60
●
●
●
●
●
●
●
8.0
7.0
8.0
●
●
●
– 7.5
– 5.5
– 4.5
130
170
75
500
mA
mA
mA
mA
mA
µA
410
625
150
mW
mW
mW
9.3
8.0
8.7
6.5
V
V
V
V
– 9.6
– 8.5
– 6.5
– 6.0
V
V
V
V
LTC1546
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL
PARAMETER
fOSC
Charge Pump Oscillator Frequency
tr
Charge Pump Rise Time
CONDITIONS
MIN
No-Cable Mode/Power-Off to Normal Operation
TYP
MAX
UNITS
500
kHz
2
ms
Logic Inputs and Outputs
VIH
Logic Input High Voltage
●
VIL
Logic Input Low Voltage
●
IIN
Logic Input Current
2
V
D1, D2, D3
M0, M1, M2, DCE = GND
M0, M1, M2, DCE = VCC
●
●
●
– 120
– 75
3
4.5
VOH
Output High Voltage
IO = – 3mA
●
VOL
Output Low Voltage
IO = 3mA
●
IOSR
Output Short-Circuit Current
0V ≤ VO ≤ VCC
●
IOZR
Three-State Output Current
M0 = M1 = M2 = VCC, 0V ≤ VO ≤ VCC
VODO
Open Circuit Differential Output Voltage
RL = 1.95k (Figure 1)
●
VODL
Loaded Differential Output Voltage
RL = 50Ω (Figure 1)
RL = 50Ω (Figure 1)
●
0.3
– 50
0.8
V
±10
– 30
±10
µA
µA
µA
V
0.45
50
±1
V
mA
µA
V.11 Driver
0.5VODO
±2
±5
V
0.67VODO
V
V
∆VOD
Change in Magnitude of Differential
Output Voltage
RL = 50Ω (Figure 1)
●
0.2
V
VOC
Common Mode Output Voltage
RL = 50Ω (Figure 1)
●
3
V
∆VOC
Change in Magnitude of Common Mode
Output Voltage
RL = 50Ω (Figure 1)
●
0.2
V
ISS
Short-Circuit Current
VOUT = GND
IOZ
Output Leakage Current
VA and VB ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
●
t r, t f
Rise or Fall Time
(Figures 2, 13)
●
t PLH
Input to Output Rising
(Figures 2, 13)
t PHL
Input to Output Falling
(Figures 2, 13)
∆t
Input to Output Difference, tPLH – tPHL
(Figures 2, 13)
t SKEW
Output to Output Skew
(Figures 2, 13)
±150
mA
±1
±100
µA
2
15
25
ns
●
15
40
65
ns
●
15
40
65
ns
●
0
3
12
ns
3
ns
V.11 Receiver
VTH
Input Threshold Voltage
– 7V ≤ VCM ≤ 7V
●
∆VTH
Input Hysteresis
– 7V ≤ VCM ≤ 7V
●
RIN
Input Impedance
–7V ≤ VCM ≤ 7V (Figure 3)
●
t r, t f
Rise or Fall Time
CL = 50pF (Figures 4, 14)
t PLH
Input to Output Rising
CL = 50pF (Figures 4, 14)
●
50
90
ns
t PHL
Input to Output Falling
CL = 50pF (Figures 4, 14)
●
50
90
ns
∆t
Input to Output Difference, tPLH – tPHL
CL = 50pF (Figures 4, 14)
●
0
4
25
ns
VOD
Differential Output Voltage
Open Circuit, RL = 1.95k (Figure 5)
With Load, – 4V ≤ VCM ≤ 4V (Figure 6)
●
±0.44
±0.55
±1.2
±0.66
V
V
VOA, VOB
Single-Ended Output Voltage
Open Circuit, RL = 1.95k (Figure 5)
●
±1.2
V
VOC
Transmitter Output Offset
RL = 50Ω (Figure 5)
●
±0.6
V
– 0.2
15
100
0.2
V
40
mV
103
Ω
15
ns
V.35 Driver
3
LTC1546
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IOH
Transmitter Output High Current
VA, VB = 0V
●
– 13
– 11
– 9.0
mA
IOL
Transmitter Output Low Current
VA, VB = 0V
●
9.0
11
13
mA
IOZ
Transmitter Output Leakage Current
VA and VB ≤ 0.25V
●
±1
±100
µA
ROD
Transmitter Differential Mode Impedance
50
100
150
Ω
ROC
Transmitter Common Mode Impedance
– 2V ≤ VCM ≤ 2V (Figure 7)
135
150
165
Ω
t r , tf
Rise or Fall Time
(Figures 8, 13)
t PLH
Input to Output
(Figures 8, 13)
●
15
35
65
ns
t PHL
Input to Output
(Figures 8, 13)
●
15
35
65
ns
∆t
Input to Output Difference, tPLH – tPHL
(Figures 8, 13)
●
0
16
ns
t SKEW
Output to Output Skew
(Figures 8, 13)
●
5
ns
4
ns
V.35 Receiver
VTH
Differential Receiver Input Threshold Voltage
– 2V ≤ VCM ≤ 2V (Figure 9)
●
∆VTH
Receiver Input Hysteresis
– 2V ≤ VCM ≤ 2V (Figure 9)
●
RID
Receiver Differential Mode Impedance
– 2V ≤ VCM ≤ 2V
●
RIC
Receiver Common Mode Impedance
– 2V ≤ VCM ≤ 2V (Figure 10)
t r, t f
Rise or Fall Time
CL = 50pF (Figures 4, 14)
tPLH
Input to Output
CL = 50pF (Figures 4, 14)
●
– 0.2
0.2
V
15
40
mV
90
103
110
Ω
135
150
165
Ω
15
ns
50
90
ns
tPHL
Input to Output
CL = 50pF (Figures 4, 14)
●
50
90
ns
∆t
Input to Output Difference, tPLH – tPHL
CL = 50pF (Figures 4, 14)
●
0
4
25
ns
VO
Output Voltage
Open Circuit
RL = 3k (Figure 11)
●
●
±5
±8.5
±10
V
V
ISS
Short-Circuit Current
VOUT = GND
●
±150
mA
ROZ
Power-Off Resistance
– 2V < VO < 2V, Power Off
or No-Cable Mode
●
300
SR
Slew Rate
RL = 7k, CL = 0 (Figures 11, 15)
●
4
t PLH
Input to Output
RL = 3k, CL = 2500pF (Figures 11, 15)
●
t PHL
Input to Output
RL = 3k, CL = 2500pF (Figures 11, 15)
●
V.28 Driver
Ω
30
V/µs
1.5
2.5
µs
1.5
2.5
µs
1.2
0.8
V
V.28 Receiver
VTHL
Input Low Threshold Voltage
(Figure 12)
●
VTLH
Input High Threshold Voltage
(Figure 12)
●
2
1.2
∆VTH
Receiver Input Hysteresis
(Figure 12)
●
0
0.05
0.3
RIN
Receiver Input Impedance
– 15V ≤ VA ≤ 15V
●
3
5
7
t r , tf
tPLH
Rise or Fall Time
CL = 50pF (Figures 12, 16)
Input to Output
CL = 50pF (Figures 12, 16)
●
60
300
ns
tPHL
Input to Output
CL = 50pF (Figures 12, 16)
●
160
300
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
4
V
V
kΩ
15
ns
Note 3: All typicals are given for VCC = 5V, C1 = C2 = CVCC = CVDD = 1µF,
CVEE = 3.3µF and TA = 25°C.
LTC1546
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TYPICAL PERFOR A CE CHARACTERISTICS
V.11 Mode
Supply Current vs Data Rate
V.35 Mode
Supply Current vs Data Rate
180
V.28 Mode
Supply Current vs Data Rate
150
35
34
150
140
130
120
110
145
SUPPLY CURRENT (mA)
160
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
170
140
135
33
32
31
100
90
100
1000
DATA RATE (kBd)
10
10000
30
130
10
100
1000
DATA RATE (kBd)
1546 • G01
10000
10
1546 • G02
V.11 Mode
ICC vs Temperature
100
1546 • G03
V.35 Mode
ICC vs Temperature
115
V.28 Mode
ICC vs Temperature
40
140
110
38
105
ICC (mA)
135
ICC (mA)
ICC (mA)
20
50
DATA RATE (kBd)
100
95
36
34
130
32
90
85
–40 –20
40
20
60
0
TEMPERATURE (°C)
80
100
125
–40 –20
40
20
60
0
TEMPERATURE (°C)
1546 • G04
80
100
30
–40 –20
40
20
60
0
TEMPERATURE (°C)
1546 • G05
80
100
1546 • G06
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PI FU CTIO S
C1 –␣ (Pin 1): Capacitor C1 Negative Terminal. Connect a
1µF capacitor between C1+ and C1–.
R1 (Pin 8): CMOS Level Receiver 1 Output.
R2 (Pin 9): CMOS Level Receiver 2 Output.
C1 +
R3 (Pin 10): CMOS Level Receiver 3 Output.
VDD (Pin 3): Generated Positive Supply Voltage for
V.28. Connect a 1µF capacitor to ground.
M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to VCC. See Table 1.
(Pin 2): Capacitor C1 Positive Terminal. Connect a
1µF capacitor between C1 + and C1 –.
VCC (Pin 4): Positive Supply Voltage Input. 4.75V ≤ VCC
≤ 5.25V. Bypass with a 1µF capacitor to ground.
D1 (Pin 5): TTL Level Driver 1 Input.
D2 (Pin 6): TTL Level Driver 2 Input.
D3 (Pin 7): TTL Level Driver 3 Input.
M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to VCC. See Table 1.
M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to VCC. See Table 1.
DCE/DTE (Pin 14): TTL Level Mode Select Input with PullUp to VCC. See Table 1.
5
LTC1546
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PI FU CTIO S
R3 B (Pin 15): Receiver 3 Noninverting Input.
D1 B (Pin 23): Driver 1 Noninverting Output.
R3 A (Pin 16): Receiver 3 Inverting Input.
D1 A (Pin 24): Driver 1 Inverting Output.
R2 B (Pin 17): Receiver 2 Noninverting Input.
GND (Pin 25): Ground.
R2 A (Pin 18): Receiver 2 Inverting Input.
VEE (Pin 26): Negative Supply Voltage. Connect a 3.3µF
capacitor to GND.
D3/R1 B (Pin 19): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
C2 – (Pin 27): Capacitor C2 Negative Terminal. Connect a
1µF capacitor between C2 + and C2 –.
D3/R1 A (Pin 20): Receiver 1 Inverting Input and Driver 3
Inverting Output.
C2 + (Pin 28): Capacitor C2 Positive Terminal. Connect a
1µF capacitor between C2 + and C2 –.
D2 B (Pin 21): Driver 2 Noninverting Output.
D2 A (Pin 22): Driver 2 Inverting Output.
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BLOCK DIAGRA
CHARGE PUMP
C1–
1
C1–
C2+
28 C2+
C1+
2
C1+
C2–
27 C2–
VDD
3
VDD
VEE
26 VEE
VCC
4
VCC
GND
25 GND
24 D1A
50Ω
S1
D1 5
D1
S2
125Ω
50Ω
23 D1B
22 D2A
50Ω
S1
D2
6
D2
S2
125Ω
50Ω
21 D2B
D3
7
D3
20 D3/R1 A
10k
20k
6k
S3
DCE/DTE 14
10k
51.5Ω
S2
S1
125Ω
51.5Ω
20k
19 D3/R1 B
R1
8
R1
18 R2A
20k
6k
10k
R2
9
51.5Ω
S3
R2
S2
125Ω
10k
51.5Ω
17 R2B
20k
16 R3A
20k
6k
10k
R3 10
51.5Ω
S3
R3
10k
S2
125Ω
51.5Ω
15 R3B
20k
1546 BD
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LTC1546
TEST CIRCUITS
D
RL
B
D
VOD
A
RL
B
A
VOC
CL
100pF
RL
100Ω
CL
100pF
1546 F02
1546 F01
Figure 1. V.11 Driver DC Test Circuit
IB
Figure 2. V.11 Driver AC Test Circuit
B
R
B
IA
VCM = ±7V
A
+
–
CL
A
2(VB – VA)
RIN =
IB – IA 1546 F03
1546 F04
Figure 3. Input Impedance Test Circuit
VOB
Figure 4. V.11, V.35 Receiver AC Test Circuit
VOB
50Ω
125Ω
R
RL
125Ω
50Ω
50Ω
50Ω
50Ω
125Ω
125Ω
50Ω
VOD
50Ω
VOC
RL
+
–
50Ω
VCM
VCM = ±2V
1546 F05
1546 F07
1546 F06
VOA
VOA
Figure 5. V.35 Driver Open-Circuit Test
Figure 6. V.35 Driver Test Circuit
Figure 7. V.35 Driver Common Mode
Impedance Test Circuit
51.5Ω
125Ω
50Ω
50Ω
50Ω
125Ω
125Ω
50Ω
VTH
+
–
1546 F08
VCM
+
–
R
VCM = ± 2V
+
–
51.5Ω
1546 F09
1546 F10
Figure 8. V.35 Driver AC Test Circuit
D
Figure 9. V.35 Receiver DC Test Circuit
A
A
CL
RL
1546 F11
Figure 11. V.28 Driver Test Circuit
VA
Figure 10. Receiver Common Mode
Impedance Test Circuit
R
CL
1546 F12
Figure 12. V.28 Receiver Test Circuit
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LTC1546
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ODE SELECTIO
Table 1
LTC1546 MODE NAME
M2
M1
M0
DCE/DTE
D1
D2
D3
R1
R2
R3
Not Used (Default V.11)
0
0
0
0
V.11
V.11
Z
V.11
V.11
V.11
RS530A
0
0
1
0
V.11
V.11
Z
V.11
V.11
V.11
RS530
0
1
0
0
V.11
V.11
Z
V.11
V.11
V.11
X.21
0
1
1
0
V.11
V.11
Z
V.11
V.11
V.11
V.35
1
0
0
0
V.35
V.35
Z
V.35
V.35
V.35
RS449/V.36
1
0
1
0
V.11
V.11
Z
V.11
V.11
V.11
V.28/RS232
1
1
0
0
V.28
V.28
Z
V.28
V.28
V.28
No Cable
1
1
1
0
Z
Z
Z
Z
Z
Z
Not Used (Default V.11)
0
0
0
1
V.11
V.11
V.11
Z
V.11
V.11
RS530A
0
0
1
1
V.11
V.11
V.11
Z
V.11
V.11
RS530
0
1
0
1
V.11
V.11
V.11
Z
V.11
V.11
X.21
0
1
1
1
V.11
V.11
V.11
Z
V.11
V.11
V.35
1
0
0
1
V.35
V.35
V.35
Z
V.35
V.35
RS449/V.36
1
0
1
1
V.11
V.11
V.11
Z
V.11
V.11
V.28/RS232
1
1
0
1
V.28
V.28
V.28
Z
V.28
V.28
No Cable
1
1
1
1
Z
Z
Z
Z
Z
Z
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W
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SWITCHI G TI E WAVEFOR S
5V
f = 1MHz : t r ≤ 10ns : t f ≤ 10ns
1.5V
D
0V
1.5V
t PHL
t PLH
VO
B–A
–VO
90%
90%
50%
10%
tr
1/2 VO
50%
10%
tf
A
VO
B
t SKEW
t SKEW
1546 F13
Figure 13. V.11, V.35 Driver Propagation Delays
VOD2
B–A
–VOD2
VOH
R
VOL
f = 1MHz : t r ≤ 10ns : t f ≤ 10ns
0V
INPUT
t PHL
t PLH
1.5V
OUTPUT
1.5V
1546 F14
Figure 14. V.11, V.35 Receiver Propagation Delays
8
0V
LTC1546
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W
W
SWITCHI G TI E WAVEFOR S
3V
1.5V
1.5V
D
0V
t PHL
VO
t PLH
3V
0V
A
–VO
SR = 6V
tf
–3V
3V
SR = 6V
tr
0V
–3V
tf
1546 F15
tr
Figure 15. V.28 Driver Propagation Delays
VIH
1.7V
1.3V
A
VIL
t PHL
t PLH
VOH
R
VOL
2.4V
0.8V
1546 F16
Figure 16. V.28 Receiver Propagation Delays
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Overview
The LTC1546 and LTC1544 form a complete softwareselectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. Cable termination is provided on-chip, eliminating the need for discrete termination designs.
A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 17. The LTC1546 half of each port
is used to generate and appropriately terminate the clock
and data signals. The LTC1544 is used to generate the
control signals along with LL (Local Loopback).
Mode Selection
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see Table 1).
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 = 1, M1 = 0, M0 = 0.
For the control signals, the drivers and receivers will
operate in V.28 (RS232) electrical mode. For the clock and
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
The interface protocol may be selected simply by plugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left unconnected (1) or wired to ground (0) in the cable as shown in
Figure 18. The internal pull-up current sources will ensure
a binary 1 when a pin is left unconnected.
The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VCC.
When the cable is removed, leaving all mode pins unconnected, the LTC1546/LTC1544 will enter no-cable mode.
In this mode the LTC1546/LTC1544 supply current drops
to less than 500µA and the LTC1546/LTC1544 driver
outputs are forced into a high impedance state. At the
same time, the R2 and R3 receivers of the LTC1546 are
differentially terminated with 103Ω and the other receivers on the LTC1546 and LTC1544 are terminated with
30kΩ to ground.
9
LTC1546
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APPLICATIO S I FOR ATIO
SERIAL
CONTROLLER
DTE
DCE
LTC1546
LTC1546
SERIAL
CONTROLLER
TXD
D1
TXD
103Ω
R3
TXD
SCTE
D2
SCTE
103Ω
R2
SCTE
R1
D3
TXC
R1
103Ω
TXC
D3
TXC
RXC
R2
103Ω
RXC
D2
RXC
RXD
R3
103Ω
RXD
D1
RXD
LTC1544
LTC1544
RTS
D1
RTS
R3
RTS
DTR
D2
DTR
R2
DTR
D3
R1
DCD
R1
DCD
D3
DCD
DSR
R2
DSR
D2
DSR
CTS
R3
CTS
D1
CTS
LL
LL
D4
R4
R4
LL
D4
1546 F17
Figure 17. Complete Multiprotocol Interface in EIA530 Mode
Cable Termination
Traditional implementations used expensive relays to
switch resistors or required the user to change termination modules every time a new interface standard was
selected. Switching the terminations with FETs is difficult
because the FETs must remain off when the signal voltage
is beyond the supply voltage. Alternatively, custom cables
10
may contain termination in the cable head or route signals
to various terminations on the board.
The LTC1546/LTC1544 chipset solves the cable termination switching problem by automatically providing the
appropriate termination and switching on-chip for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.
LTC1546
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APPLICATIO S I FOR ATIO
(DATA)
M0
LTC1546
M1
M2
DCE/DTE
CONNECTOR
11
12
13
NC
14
NC
CABLE
DCE/DTE
M2
LTC1544
M1
M0
14
13
12
11
(DATA)
1546 F18
Figure 18: Single Port DCE V.35 Mode Selection in the Cable
BALANCED
INTERCONNECTING
CABLE
V.10 (RS423) Interface
All V.10 drivers and receivers necessary for the RS449,
EIA530, EIA530-A, V.36 and X.21 protocols are implemented on the LTC1544.
GENERATOR
LOAD
CABLE
TERMINATION
A typical V.10 unbalanced interface is shown in Figure 19.
A V.10 single-ended generator with output A and ground
C is connected to a differential receiver with input A' connected to A, and ground C' connected via the signal return
to ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 20.
A
A'
C
C'
RECEIVER
1546 F19
Figure 19. Typical V.10 Interface
IZ
The V.10 receiver configuration in the LTC1544 is shown
in Figure 21. In V.10 mode, switch S3 inside the LTC1544
is turned off. The noninverting input is disconnected
inside the LTC1544 receiver and connected to ground. The
cable termination is then the 30k input impedance to
ground of the LTC1544 V.10 receiver.
–10V
3.25mA
–3V
VZ
3V
10V
V.11 (RS422) Interface
A typical V.11 balanced interface is shown in Figure 22. A
V.11 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.11
1546 F20
–3.25mA
Figure 20. V.10 Receiver Input Impedance
11
LTC1546
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APPLICATIO S I FOR ATIO
A'
A
A'
LTC1544
R8
6k
R5
20k
R1
51.5Ω
R6
10k
S3
LTC1546
R8
6k
R6
10k
RECEIVER
S1
R3
124Ω
S2
R4
20k
B
B'
C'
R7
10k
B'
GND
Figure 21. V.10 Receiver Configuration
GENERATOR
A
A'
B
B'
C
C'
RECEIVER
100Ω
MIN
1546 F22
interface has a differential termination at the receiver end
that has a minimum value of 100Ω. The termination
resistor is optional in the V.11 specification, but for the
high speed clock and data lines, the termination is essential to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the impedance curve shown in Figure 20.
In V.11 mode, all switches are off except S1 of the
LTC1546’s receivers which connects a 103Ω differential
termination impedance to the cable as shown in Figure
231. The LTC1544 only handles control signals, so no
termination other than its V.11 receivers’ 30k input impedance is necessary.
1546 F23
In V.28 mode, S3 is closed inside the LTC1546/LTC1544
which connects a 6k (R8) impedance to ground in parallel
with 20k (R5) plus 10k (R6) for a combined impedance of
5k as shown in Figure 25. Proper termination is only provided when the B input of the receivers is floating, since S1
of the LTC1546’s R2 and R3 receivers remains on in V.28
mode1. The noninverting input is disconnected inside the
LTC1546/LTC1544 receiver and connected to a TTL level
reference voltage to give a 1.4V receiver trip point.
A typical V.28 unbalanced interface is shown in Figure 24.
A V.28 single-ended generator with output A and ground
C is connected to a single-ended receiver with input A'
there is no switch S1 in receivers R2 and R3. However, for simplicity, all termination
networks on the LTC1546 can be treated identically if it is assumed that an S1 switch exists and is
always closed on the R2 and R3 receivers.
BALANCED
INTERCONNECTING
CABLE
GENERATOR
LOAD
CABLE
TERMINATION
A
A'
C
C'
RECEIVER
1546 F24
Figure 24. Typical V.28 Interface
A'
LTC1546
R1
51.5Ω
S1
S2
V.28 (RS232) Interface
12
GND
connected to A and ground C' connected via the signal
return to ground C.
Figure 22. Typical V.11 Interface
1Actually,
R7
10k
R4
20k
Figure 23. V.11 Receiver Configuration
LOAD
CABLE
TERMINATION
RECEIVER
S3
R2
51.5Ω
C'
1546 F21
BALANCED
INTERCONNECTING
CABLE
R5
20k
B'
C'
R8
6k
R3
124Ω
R5
20k
R6
10k
S3
R2
51.5Ω
R4
20k
RECEIVER
R7
10k
GND
Figure 25. V.28 Receiver Configuration
1546 F25
LTC1546
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V.35 Interface
No-Cable Mode
A typical V.35 balanced interface is shown in Figure 26. A
V.35 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.35
interface requires a T or delta network termination at the
receiver end and the generator end. The receiver differential impedance measured at the connector must be
100Ω␣ ±10Ω, and the impedance between shorted terminals (A' and B') and ground (C') must be 150Ω ±15Ω.
The no-cable mode (M0 = M1 = M2 = 1) is intended for
the case when the cable is disconnected from the connector. The charge pump, bias circuitry, drivers and
receivers are turned off, the driver outputs are forced into
a high impedance state, and the supply current drops to
less than 200µA. Note that the LTC1546’s R2 and R3
receivers continue to be terminated by a 103Ω differential impedance.
In V.35 mode, both switches S1 and S2 inside the LTC1546
are on, connecting a T network impedance as shown in
Figure 27. The 30k input impedance of the receiver is
placed in parallel with the T network termination, but does
not affect the overall input impedance significantly.
The LTC1546 uses an internal capacitive charge pump to
generate VDD and VEE as shown in Figure 28. A voltage
doubler generates about 8V on VDD and a voltage inverter
generates about – 7.5V on VEE. Four 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The VEE capacitor C5 should be a minimum of
3.3µF. All capacitors are 16V and should be placed as close
as possible to the LTC1546 to reduce EMI.
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground (C) must be 150Ω ±15Ω.
BALANCED
INTERCONNECTING
CABLE
GENERATOR
3
LOAD
CABLE
TERMINATION
125Ω
125Ω
50Ω
B'
C
C'
R8
6k
S1
S2
R3
124Ω
R5
20k
R4
20k
GND
28
C1+
C2 –
27
C2
1µF
LTC1546
C1–
VCC
VEE
GND
26
25
+
C5
3.3µF
Figure 28. Charge Pump
Receiver Fail-Safe
RECEIVER
S3
R2
51.5Ω
C2 +
C4
1µF
1546 F26
R6
10k
4
VDD
1546 F28
LTC1546
R1
51.5Ω
C1
1µF 1
5V
50Ω
B
A'
C'
RECEIVER
2
50Ω
Figure 26. Typical V.35 Interface
B'
C3
1µF
A'
A
50Ω
Charge Pump
All LTC1546/LTC1544 receivers feature fail-safe operation in all modes. If the receiver inputs are left floating or
are shorted together by a termination resistor, the receiver
output will always be forced to a logic high.
DTE vs DCE Operation
R7
10k
1546 F27
Figure 27. V.35 Receiver Configuration
The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1546, and Driver 3/Receiver 1 and Driver 4/
Receiver 4 in the LTC1544. The INVERT pin in the LTC1544
allows the Driver 4/Receiver 4 enable to be high or low true
polarity.
13
LTC1546
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The LTC1546/LTC1544 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender or a port
with one connector that can be configured for DTE or DCE
operation by rerouting the signals to the LTC1546/LTC1544
using a dedicated DTE cable or dedicated DCE cable.
A dedicated DTE port using a DB-25 male connector is
shown in Figure 29. The interface mode is selected by logic
outputs from the controller or from jumpers to either VCC
or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 30.
A port with one DB-25 connector, that can be configured
for either DTE or DCE operation is shown in Figure 31. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via the
LTC1546’s Driver 1. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.
Multiprotocol Interface with RL, LL, TM
and a DB-25 Connector
If the RL, LL and TM signals are implemented, there are not
enough drivers and receivers available in the LTC1546/
LTC1544. In Figure 32, the required control signals are
handled by the LTC1545. The LTC1545 has an additional
single-ended driver/receiver pair that can handle two more
optional control signals such as TM and RL.
14
Cable-Selectable Multiprotocol Interface
A cable-selectable multiprotocol DTE/DCE interface is
shown in Figure 33. The select lines M0, M1 and DCE/DTE
are brought out to the connector. The mode is selected by
the cable by wiring M0 (connector Pin 18) and M1 (connector Pin 21) and DCE/DTE (connector Pin 25) to ground
(connector Pin 7) or letting them float. If M0, M1 or DCE/
DTE is floating, internal pull-up current sources will pull
the signals to VCC. The select bit M2 is hard wired to VCC.
When the cable is pulled out, the interface will go into the
no-cable mode.
Compliance Testing
The LTC1546/LTC1544 chipset has been tested by TUV
Telecom Services Inc. and passed the NET1, NET2 and
TBR2 requirements. Copies of the test reports are available from LTC or TUV Telecom Services.
The titles of the reports are:
NET1 and NET2: Test Report No. NET2/091301/99.
TBR2: Test Report No. CRT2/091301/99.
The address of TUV Telecom Services Inc. is:
TUV Telecom Services Inc.
Type Approval Division
1775 Old Highway 8, Ste 107
St. Paul, MN 55112 USA
TEL: +1 (612) 639-0775
FAX: +1 (612) 639-0873
LTC1546
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TYPICAL APPLICATIO S
VCC
5V
C1
1µF
28
1
27
26
CHARGE
PUMP
2
4
25
C5
1µF
LTC1546
5
TXD
D1
6
SCTE
T
D2
C2
1µF
T
+
C3
1µF
3
C4
3.3µF
24
2
23
14
22
24
21
11
20
15
19
12
18
17
17
9
16
3
15
16
TXD A (103)
TXD B
SCTE A (113)
SCTE B
7
D3
8
TXC
11
12
13
14
C9
1µF
RTS
DTR
T
R2
10
RXD
C10
1µF
R1
9
RXC
T
T
R3
M0
7
M1
M2
1
DCE/DTE
VCC
1
VCC
2
VDD
3
VEE
GND
D1
4
D2
5
DSR
CTS
LL
6
R1
7
R2
8
R3
10
R4
9
M0
M1
M2
11
12
13
14
TXC B
RXC A (115)
RXC B
RXD A (104)
RXD B
SG
SHIELD
DB-25 MALE
CONNECTOR
28
C11
1µF
27
26
4
25
19
24
20
23
23
RTS A (105)
RTS B
DTR A (108)
DTR B
D3
LTC1544
DCD
TXC A (114)
22
8
21
10
20
6
19
22
18
5
17
13
16
18
DCD A (109)
DCD B
DSR A (107)
DSR B
CTS A (106)
CTS B
LL A (141)
D4
M0
INVERT
15
NC
M1
M2
DCE/DTE
1546 F29
Figure 29. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector
15
LTC1546
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TYPICAL APPLICATIO S
VCC
5V
C1
1µF
28
1
27
26
CHARGE
PUMP
2
4
25
C5
1µF
LTC1546
5
RXD
D1
6
RXC
T
D2
C2
1µF
T
+
C3
1µF
3
C4
3.3µF
24
3
23
16
22
17
21
9
20
15
19
12
18
24
17
11
16
2
15
14
RXD A (104)
RXD B
RXC A (115)
RXC B
7
D3
8
TXC
11
12
13
NC
C9
1µF
14
M0
7
M1
M2
1
DCE/DTE
VCC
1
VCC
2
VDD
VEE
GND
D1
4
DSR
T
R3
3
CTS
T
R2
10
TXD
C10
1µF
R1
9
SCTE
T
D2
5
LTC1544
R1
7
DTR
R2
8
RTS
R3
10
LL
R4
9
11
M0
12
M1
13
M2
NC
14
TXC B
SCTE A (113)
SCTE B
TXD A (103)
TXD B
SGND (102)
SHIELD (101)
DB-25 FEMALE
CONNECTOR
28
C11
1µF
27
26
5
25
13
24
6
23
22
CTS A (106)
CTS B
DSR A (107)
DSR B
D3
6
DCD
TXC A (114)
22
8
21
10
20
20
19
23
18
4
17
19
16
18
DCD A (109)
DCD B
DTR A (108)
DTR B
RTS A (105)
RTS B
LL A (141)
D4
M0
INVERT
15
NC
M1
M2
DCE/DTE
1546 F30
Figure 30. Controller-Selectable DCE Port with DB-25 Connector
16
LTC1546
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TYPICAL APPLICATIO S
VCC
5V
C1
1µF
28
1
27
26
CHARGE
PUMP
2
4
25
C5
1µF
LTC1546
5
DTE_TXD/DCE_RXD
D1
6
DTE_SCTE/DCE_RXC
C2
1µF
T
D2
T
+
C3
1µF
3
C4
3.3µF
24
2
23
14
22
24
21
11
20
15
19
12
18
17
17
9
16
3
15
16
DTE
DCE
TXD A
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
7
D3
8
DTE_TXC/DCE_TXC
11
12
13
14
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
C9
1µF
T
R2
10
DTE_RXD/DCE_TXD
C10
1µF
R1
9
DTE_RXC/DCE_SCTE
T
T
R3
M0
7
M1
M2
1
DCE/DTE
VCC
1
VCC
2
VDD
3
VEE
GND
D1
4
D2
5
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_LL
6
R1
7
R2
8
R3
10
R4
9
M0
M1
M2
DCE/DTE
11
12
13
14
SHIELD
DB-25
CONNECTOR
28
C11
1µF
27
26
4
25
19
24
20
23
23
RTS A
CTS A
RTS B
CTS B
DTR A
DSR A
DTR B
DSR B
DCD A
DCD A
D3
LTC1544
DTE_DCD/DCE_DCD
SG
22
8
21
10
20
6
19
22
18
5
17
13
16
18
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
LL A
LL A
D4
M0
INVERT
15
NC
M1
M2
DCE/DTE
1546 F31
Figure 31. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
17
LTC1546
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TYPICAL APPLICATIO S
VCC
5V
C1
1µF
28
1
27
26
CHARGE
PUMP
2
4
25
C5
1µF
LTC1546
5
DTE_TXD/DCE_RXD
D1
T
6
DTE_SCTE/DCE_RXC
D2
C2
1µF
T
+
C3
1µF
3
C4
3.3µF
24
2
23
14
22
24
21
11
7
D3
8
DTE_TXC/DCE_TXC
R2
10
DTE_RXD/DCE_TXD
11
R3
T
T
20
15
19
12
18
17
17
9
16
3
15
16
M0
7
M1
13
M2
14
DCE/DTE
1
12
C10
1µF
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
VCC
5V
C9
1µF
1,19
VCC
2,20
VDD
3
VEE
GND
D1
4
D2
5
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_RI
DTE_RI/DCE_LL
DTE_TM/DCE_RL
DTE_RL/DCE_TM
M0
M1
M2
DCE/DTE
6
R1
7
R2
8
R3
9
D4
10
R4
17
R5
18
11
12
13
14
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
SG
SHIELD
DB-25
CONNECTOR
36
C11
1µF
35
34
4
33
19
32
20
31
23
RTS A
CTS A
RTS B
CTS B
DTR A
DSR A
DTR B
DSR B
DCD A
DCD A
D3
LTC1545
DTE_DCD/DCE_DCD
DCE
RXD A
T
R1
9
DTE_RXC/DCE_SCTE
DTE
TXD A
D5
M0
D4ENB
M1
M2
R4EN
30
8
29
10
28
6
27
22
26
5
25
13
24
18
23
*
22
25
21
21
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
LL
RI
RI
LL
TM
RL
RL
TM
15
*OPTIONAL
16
NC
DCE/DTE
1546 F32
Figure 32. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector
18
LTC1546
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TYPICAL APPLICATIO S
VCC
5V
C1
1µF
28
1
27
26
CHARGE
PUMP
2
4
25
C5
1µF
LTC1546
5
DTE_TXD/DCE_RXD
D1
6
DTE_SCTE/DCE_RXC
C2
1µF
+
C3
1µF
3
T
D2
T
C4
3.3µF
24
2
23
14
22
24
21
11
20
15
19
12
18
17
17
9
16
3
15
16
7
D3
8
DTE_TXC/DCE_TXC
R2
10
DTE_RXD/DCE_TXD
11
12
NC
13
14
DCE
TXD A
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
T
R1
9
DTE_RXC/DCE_SCTE
DTE
R3
T
T
M0
7
M1
M2
1
DCE/DTE
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
SG
SHIELD
DB-25
CONNECTOR
C10
1µF
C9
1µF
VCC
1
VCC
2
VDD
VEE
GND
25
DCE/DTE
21
M1
18
M0
4
RTS A
19
RTS B
20
DTR A
23
DTR B
28
C11
1µF
27
26
3
DTE_RTS/DCE_CTS
D1
24
4
DTE_DTR/DCE_DSR
D2
5
LTC1544
R1
7
DTE_DSR/DCE_DTR
R2
8
DTE_CTS/DCE_RTS
R3
10
R4
9
11
12
NC
13
14
23
CTS A
CTS B
DSR A
DSR B
D3
6
DTE_DCD/DCE_DCD
25
22
8
21
10
20
6
19
22
18
5
17
13
M0
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
CABLE WIRING FOR
DTE/DCE SELECTION
M1
DCE/DTE INVERT
DCD A
DCD B
CABLE WIRING FOR MODE SELECTION
MODE
PIN 18
PIN 21
V.35
PIN 7
PIN 7
RS449, V.36
NC
PIN 7
RS232
PIN 7
NC
16
D4
M2
DCD A
15
NC
MODE
DTE
DCE
PIN 25
PIN 7
NC
1546 F33
Figure 33. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC1546
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
10.07 – 10.33*
(0.397 – 0.407)
28 27 26 25 24 23 22 21 20 19 18 17 16 15
7.65 – 7.90
(0.301 – 0.311)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
5.20 – 5.38**
(0.205 – 0.212)
1.73 – 1.99
(0.068 – 0.078)
0° – 8°
0.13 – 0.22
(0.005 – 0.009)
0.55 – 0.95
(0.022 – 0.037)
NOTE: DIMENSIONS ARE IN MILLIMETERS
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
0.65
(0.0256)
BSC
0.25 – 0.38
(0.010 – 0.015)
0.05 – 0.21
(0.002 – 0.008)
G28 SSOP 1098
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1321
Dual RS232/RS485 Transceiver
Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
LTC1334
Single 5V RS232/RS485 Multiprotocol Transceiver
Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs
LTC1343
Software-Selectable Multiprotocol Transceiver
4-Driver/4-Receiver for Data and Clock Signals
LTC1344A
Software-Selectable Cable Terminator
Perfect for Terminating the LTC1543 (Not Needed with LTC1546)
LTC1345
Single Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
LTC1346A
Dual Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
LTC1543
Software-Selectable Multiprotocol Transceiver
Terminated with LTC1344A for Data and Clock Signals, Companion to
LTC1544 or LTC1545 for Control Signals
LTC1544
Software-Selectable Multiprotocol Transceiver
Companion to LTC1546 or LTC1543 for Control Signals Including LL
LTC1545
Software-Selectable Multiprotocol Transceiver
5-Driver/5-Receiver Companion to LTC1546 or LTC1543
for Control Signals Including LL, TM and RL
20
Linear Technology Corporation
sn1546 1546fs LT/LCG 1200 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1999
工商网监
湘ICP备2023018690号
