LTC1966
Precision Micropower
∆∑ RMS-to-DC Converter
Features
Simple to Use, Requires One Capacitor
True RMS DC Conversion Using ∆Σ Technology
High Accuracy:
0.1% Gain Accuracy from 50Hz to 1kHz
0.25% Total Error from 50Hz to 1kHz
High Linearity:
0.02% Linearity Allows Simple System Calibration
Low Supply Current:
155µA Typ, 170µA Max
Ultralow Shutdown Current:
0.1µA
Constant Bandwidth:
Independent of Input Voltage
800kHz –3dB, 6kHz ±1%
Flexible Supplies:
2.7V to 5.5V Single Supply
Up to ±5.5V Dual Supply
Flexible Inputs:
Differential or Single-Ended
Rail-to-Rail Common Mode Voltage Range
Up to 1VPEAK Differential Voltage
Flexible Output:
Rail-to-Rail Output
Separate Output Reference Pin Allows Level Shifting
Wide Temperature Range:
–55°C to 125°C
Small Size:
Space Saving 8-Pin MSOP Package
Typical Application
2.7V TO 5.5V
IN2
0.1µF
OPT. AC
COUPLING
EN
OUTPUT
LTC1966
OUT RTN
VSS GND
The LTC1966 also has a rail-to-rail output with a separate
output reference pin providing flexible level shifting. The
LTC1966 operates on a single power supply from 2.7V to
5.5V or dual supplies up to ±5.5V. A low power shutdown
mode reduces supply current to 0.5µA.
The LTC1966 is insensitive to PC board soldering and
stresses, as well as operating temperature. The LTC1966
is packaged in the space saving MSOP package which is
ideal for portable applications.
Applications
True RMS Digital Multimeters and Panel Meters
True RMS AC + DC Measurements
n
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L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
No Latency DS is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 6359576, 6362677,
6516291 and 6651036.
0.2
LTC1966, ∆∑
0
–0.2
VDD
IN1
The LTC1966 accepts single-ended or differential input
signals (for EMI/RFI rejection) and supports crest factors up
to 4. Common mode input range is rail-to-rail. Differential
input range is 1VPEAK, and offers unprecedented linearity.
Unlike previously available RMS-to-DC converters, the
superior linearity of the LTC1966 allows hassle free system
calibration at any input voltage.
Quantum Leap in Linearity Performance
Single Supply RMS-to-DC Converter
DIFFERENTIAL
INPUT
The LTC®1966 is a true RMS-to-DC converter that utilizes
an innovative patented ∆Σ computational technique. The
internal delta sigma circuitry of the LTC1966 makes it simpler to use, more accurate, lower power and dramatically
more flexible than conventional log antilog RMS-to-DC
converters.
LINEARITY ERROR (VOUT mV DC – VIN mV ACRMS)
n
n
n
n
n
n
n
n
n
n
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Description
–0.4
CAVE
1µF
1966 TA01
+ VOUT
–
–0.6
CONVENTIONAL
LOG/ANTILOG
–0.8
–1.0
60Hz SINEWAVES
0
50 100 150 200 250 300 350 400 450 500
VIN (mV ACRMS)
1966 TA01b
1966fb
1
LTC1966
Absolute Maximum Ratings
Pin Configuration
(Note 1)
Supply Voltage
VDD to GND.............................................. – 0.3V to 7V
VDD to VSS ............................................. –0.3V to 12V
VSS to GND.............................................. –7V to 0.3V
Input Currents (Note 2)....................................... ±10mA
Output Current (Note 3)...................................... ± 10mA
ENABLE Voltage........................ VSS – 0.3V to VSS + 12V
OUT RTN Voltage................................ VSS – 0.3V to VDD
Operating Temperature Range (Note 4)
LTC1966C/LTC1966I.............................–40°C to 85°C
LTC1966H........................................... –40°C to 125°C
LTC1966MP........................................ –55°C to 125°C
Specified Temperature Range (Note 5)
LTC1966C/LTC1966I.............................–40°C to 85°C
LTC1966H........................................... –40°C to 125°C
LTC1966MP........................................ –55°C to 125°C
Maximum Junction Temperature.......................... 150°C
Storage Temperature Range.................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
TOP VIEW
GND
IN1
IN2
VSS
1
2
3
4
8
7
6
5
ENABLE
VDD
OUT RTN
VOUT
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 220°C/W
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC1966CMS8#PBF
LTC1966CMS8#TRPBF
LTTG
8-Lead Plastic MSOP
0°C to 70°C
LTC1966IMS8#PBF
LTC1966IMS8#TRPBF
LTTH
8-Lead Plastic MSOP
–40°C to 85°C
LTC1966HMS8#PBF
LTC1966HMS8#TRPBF
LTTG
8-Lead Plastic MSOP
–40°C to 125°C
LTC1966MPMS8#PBF
LTC1966MPMS8#TRPBF
LTTG
8-Lead Plastic MSOP
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = – 5V, VOUTRTN = 0V, CAVE = 10µF, VIN = 200mVRMS,
VENABLE = 0.5V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
±0.1
±0.3
±0.4
±0.7
%
%
%
0.1
0.2
0.4
0.6
mV
mV
mV
0.02
0.15
%
Conversion Accuracy
GERR
VOOS
LINERR
Conversion Gain Error
Output Offset Voltage
Linearity Error
50Hz to 1kHz Input (Notes 6, 7)
LTC1966C, LTC1966I
LTC1966H, LTC1966MP
l
l
(Notes 6, 7)
LTC1966C, LTC1966I
LTC1966H, LTC1966MP
l
l
50mV to 350mV (Notes 7, 8)
l
1966fb
2
LTC1966
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = – 5V, VOUTRTN = 0V, CAVE = 10µF, VIN = 200mVRMS,
VENABLE = 0.5V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
PSRR
(Note 9)
LTC1966C, LTC1966I
LTC1966H, LTC1966MP
VIOS
Power Supply Rejection
Input Offset Voltage
MIN
TYP
MAX
UNITS
0.02
0.15
0.20
0.3
%V
%V
%V
0.02
0.8
1.0
mV
mV
l
l
(Notes 6, 7, 10)
l
Accuracy vs Crest Factor (CF)
CF = 4
60Hz Fundamental, 200mVRMS (Note 11)
l
–1
2
mV
CF = 5
60Hz Fundamental, 200mVRMS (Note 11)
l
–20
30
mV
l
VSS
VDD
V
Input Characteristics
IVR
Input Voltage Range
(Note 14)
ZIN
Input Impedance
Average, Differential (Note 12)
Average, Common Mode (Note 12)
CMRRI
Input Common Mode Rejection
(Note 13)
l
VIMAX
Maximum Input Swing
Accuracy = 1% (Note 14)
l
VIMIN
Minimum RMS Input
PSRRI
Power Supply Rejection
8
100
7
1
µV/V
V
5
mV
600
300
µV/V
µV/V
VDD
V
85
30
95
kΩ
kΩ
16
200
µV/V
250
120
l
l
200
1.05
l
VDD Supply (Note 9)
VSS Supply (Note 9)
MΩ
MΩ
Output Characteristics
l
VSS
VENABLE = 0.5V (Note 12)
VENABLE = 4.5V
l
75
Output Common Mode Rejection
(Note 13)
l
Maximum Differential Output Swing
Accuracy = 2%, DC Input (Note 14)
OVR
Output Voltage Range
ZOUT
Output Impedance
CMRRO
VOMAX
l
PSRRO
Power Supply Rejection
VDD Supply (Note 9)
VSS Supply (Note 9)
1.0
0.9
1.05
250
50
l
l
V
V
1000
500
µV/V
µV/V
Frequency Response
f1P
1% Additional Error (Note 15)
CAVE = 10µF
6
kHz
f10P
10% Additional Error (Note 15)
CAVE = 10µF
20
kHz
f– 3dB
±3dB Frequency (Note 15)
800
kHz
Power Supplies
VDD
Positive Supply Voltage
l
2.7
5.5
V
VSS
Negative Supply Voltage
(Note 16)
l
–5.5
0
V
IDD
Positive Supply Current
IN1 = 20mV, IN2 = 0V
IN1 = 200mV, IN2 = 0V
l
155
158
170
µA
µA
ISS
Negative Supply Current
IN1 = 20mV, IN2 = 0V
l
12
20
µA
0.5
10
µA
Shutdown Characteristics
IDDS
Supply Currents
VENABLE = 4.5V
l
ISSS
Supply Currents
VENABLE = 4.5V
LTC1966H, LTC1966MP
l
l
–1
–2
–0.1
µA
µA
IIH
ENABLE Pin Current High
VENABLE = 4.5V
l
–0.3
–0.05
µA
1966fb
3
LTC1966
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = – 5V, VOUTRTN = 0V, CAVE = 10µF, VIN = 200mVRMS,
VENABLE = 0.5V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
IIL
ENABLE Pin Current Low
VENABLE = 0.5V
LTC1966H, LTC1966MP
VTH
ENABLE Threshold Voltage
VDD = 5V, VSS = –5V
VDD = 5V, VSS = GND
VDD = 2.7V, VSS = GND
VHYS
ENABLE Threshold Hysteresis
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs (IN1, IN2) are protected by shunt diodes to VSS and
VDD. If the inputs are driven beyond the rails, the current should be limited
to less than 10mA.
Note 3: The LTC1966 output (VOUT) is high impedance and can be
overdriven, either sinking or sourcing current, to the limits stated.
Note 4: The LTC1966C/LTC1966I are guaranteed functional over
the operating temperature range of – 40°C to 85°C. The LTC1966H/
LTC1966MP are guaranteed functional over the operating temperature
range of –55°C to 125°C.
Note 5: The LTC1966C is guaranteed to meet specified performance from
0°C to 70°C. The LTC1966C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested nor
QA sampled at these temperatures. The LTC1966I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC1966H is guaranteed
to meet specified performance from –40°C to 125°C. The LTC1966MP is
guaranteed to meet specified performance from –55°C to 125°C.
Note 6: High speed automatic testing cannot be performed with
CAVE = 10µF. The LTC1966 is 100% tested with CAVE = 22nF. Correlation
tests have shown that the performance limits above can be guaranteed
with the additional testing being performed to guarantee proper operation
of all the internal circuitry.
Note 7: High speed automatic testing cannot be performed with 60Hz
inputs. The LTC1966 is 100% tested with DC and 10kHz input signals.
Measurements with DC inputs from 50mV to 350mV are used to calculate
the four parameters: GERR, VOOS, VIOS and linearity error. Correlation tests
have shown that the performance limits above can be guaranteed with the
additional testing being performed to guarantee proper operation of all
internal circuitry.
Note 8: The LTC1966 is inherently very linear. Unlike older log/antilog
circuits, its behavior is the same with DC and AC inputs, and DC inputs are
used for high speed testing.
Note 9: The power supply rejections of the LTC1966 are measured with DC
inputs from 50mV to 350mV. The change in accuracy from VDD = 2.7V to
VDD = 5.5V with VSS = 0V is divided by 2.8V. The change in accuracy from
VSS = 0V to VSS = –5.5V with VDD = 5.5V is divided by 5.5V.
Note 10: Previous generation RMS-to-DC converters required nonlinear
input stages as well as a nonlinear core. Some parts specify a DC reversal
error, combining the effects of input nonlinearity and input offset voltage.
The LTC1966 behavior is simpler to characterize and the input offset
voltage is the only significant source of DC reversal error.
l
l
MIN
TYP
MAX
UNITS
–2
–10
–1
–0.1
µA
µA
2.4
2.1
1.3
V
V
V
0.1
V
Note 11: High speed automatic testing cannot be performed with 60Hz
inputs. The LTC1966 is 100% tested with DC stimulus. Correlation tests
have shown that the performance limits above can be guaranteed with the
additional testing being performed to verify proper operation of all internal
circuitry.
Note 12: The LTC1966 is a switched capacitor device and the input/
output impedance is an average impedance over many clock cycles. The
input impedance will not necessarily lead to an attenuation of the input
signal measured. Refer to the Applications Information section titled Input
Impedance for more information.
Note 13: The common mode rejection ratios of the LTC1966 are measured
with DC inputs from 50mV to 350mV. The input CMRR is defined as the
change in VIOS measured between input levels of VSS to VSS + 350mV and
input levels of VDD – 350mV to VDD divided by VDD – VSS – 350mV. The
output CMRR is defined as the change in VOOS measured with OUT RTN =
VSS and OUT RTN = VDD – 350mV divided by VDD – VSS – 350mV.
Note 14: Each input of the LTC1966 can withstand any voltage within
the supply range. These inputs are protected with ESD diodes, so going
beyond the supply voltages can damage the part if the absolute maximum
current ratings are exceeded. Likewise for the output pins. The LTC1966
input and output voltage swings are limited by internal clipping. The
maximum differential input of the LTC1966 (referred to as maximum input
swing) is 1V. This applies to either input polarity, so it can be thought of as
±1V. Because the differential input voltage gets processed by the LTC1966
with gain, it is subject to internal clipping. Exceeding the 1V maximum
can, depending on the input crest factor, impact the accuracy of the output
voltage, but does not damage the part. Fortunately, the LTC1966’s ∆∑
topology is relatively tolerant of momentary internal clipping. The input
clipping is tested with a crest factor of 2, while the output clipping is
tested with a DC input.
Note 15: The LTC1966 exploits oversampling and noise shaping to reduce
the quantization noise of internal 1-bit analog-to-digital conversions. At
higher input frequencies, increasingly large portions of this noise are
aliased down to DC. Because the noise is shifted in frequency, it becomes
a low frequency rumble and is only filtered at the expense of increasingly
long settling times. The LTC1966 is inherently wideband, but the output
accuracy is degraded by this aliased noise. These specifications apply with
CAVE = 10µF and constitute a 3-sigma variation of the output rumble.
Note 16: The LTC1966 can operate down to 2.7V single supply but cannot
operate at ±2.7V. This additional constraint on VSS can be expressed
mathematically as – 3 • (VDD – 2.7V) ≤ VSS ≤ Ground.
1966fb
4
LTC1966
Typical Performance Characteristics
VDD = 5V
VSS = –5V
0.5
0.5
0.4
0.4
0.2
0.1
0
–0.1
–0.2
GAIN ERROR
0.1
0
VOOS
–0.1
VIOS
–0.2
VIOS
0.3
0.2
0.4
0.3
0.2
VOOS
0.1
0.1
GAIN ERROR
0
0
–0.1
–0.1
–0.2
–0.2
1.0
VDD = 2.7V
VSS = GND
0.8
VIOS
0.3
0.2
0.6
0.4
GAIN ERROR
0.1
0.2
0
0
–0.1
–0.2
VOOS
–0.2
–0.4
–0.3
–0.3
–0.3
–0.3
–0.6
–0.4
–0.4
–0.4
–0.4
–0.4
–0.8
–0.5
–0.5
–0.5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
INPUT COMMON MODE (V)
–0.5
–5 –4 –3 –2 –1 0 1 2 3
INPUT COMMON MODE (V)
4
5
1966 G03
0.3
0.2
GAIN ERROR
VOOS
0.1
0
0
VIOS
–0.1
–0.1
GAIN ERROR (%)
0.1
VIOS
0.2
0
0.5
0.4
0.4
0.3
0.3
0.2
VOOS
0.1
0.5
0.1
0
GAIN ERROR
–0.1
–0.1
–0.2
–0.2
GAIN ERROR (%)
0.3
VDD = 5V
VSS = GND
0.2
0.1
VDD = 2.7V
VSS = GND
1.0
0.8
VIOS
0.6
0.4
GAIN ERROR
0.2
0
0
–0.1
–0.2
VOOS
–0.2
–0.4
–0.2
–0.2
–0.3
–0.3
–0.3
–0.3
–0.3
–0.6
–0.4
–0.4
–0.4
–0.4
–0.4
–0.8
–0.5
–0.5
–0.5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT COMMON MODE (V)
–0.5
–5 –4 –3 –2 –1 0 1 2 3
OUTPUT COMMON MODE (V)
4
5
1966 G06
Gain and Offsets vs Temperature
0.3
0.3
0.2
0.2
0.1
GAIN ERROR
VOOS
0
0
–0.1
0.1
VIOS
–0.1
GAIN ERROR (%)
0.3
VDD = 5V
VSS = GND
VIOS
0.2
VOOS
0.1
0.4
0.4
0.3
0.3
0.2
0.1
0
0
–0.1
0.5
GAIN ERROR
–0.1
0.2
0.1
1.0
VDD = 2.7V
VSS = GND
0.8
VIOS
0.6
0.4
GAIN ERROR
0.2
0
0
–0.1
–0.2
VOOS
–0.2
–0.2
–0.2
–0.2
–0.3
–0.3
–0.3
–0.3
–0.3
–0.6
–0.4
–0.4
–0.4
–0.4
–0.4
–0.8
–0.5
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
1966 G09
–0.5
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
1966 G08
–0.2
–0.4
OFFSET VOLTAGE (mV)
0.4
–1.0
Gain and Offsets vs Temperature
0.5
OFFSET VOLTAGE (mV)
0.4
VDD = 5V
VSS = –5V
OFFSET VOLTAGE (mV)
0.5
0.4
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
OUTPUT COMMON MODE (V)
1966 G04
Gain and Offsets vs Temperature
0.5
0.5
0
1966 G05
GAIN ERROR (%)
–0.5
OFFSET VOLTAGE (mV)
0.3
0.2
–1.0
Gain and Offsets
vs Output Common Mode
OFFSET VOLTAGE (mV)
0.4
VDD = 5V
VSS = –5V
OFFSET VOLTAGE (mV)
0.5
0.4
0.4
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
INPUT COMMON MODE (V)
1966 G01
Gain and Offsets
vs Output Common Mode
0.5
0.5
0
1966 G02
Gain and Offsets
vs Output Common Mode
GAIN ERROR (%)
0.5
0.4
–0.3
–0.5
GAIN ERROR (%)
0.5
OFFSET VOLTAGE (mV)
0.3
VDD = 5V
VSS = GND
Gain and Offsets
vs Input Common Mode
OFFSET VOLTAGE (mV)
0.3
0.2
OFFSET VOLTAGE (mV)
GAIN ERROR (%)
0.4
GAIN ERROR (%)
0.5
Gain and Offsets
vs Input Common Mode
GAIN ERROR (%)
Gain and Offsets
vs Input Common Mode
–1.0
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
1966 G07
1966fb
5
LTC1966
Typical Performance Characteristics
VDD = 5V
0.1
VIOS
VOOS
GAIN ERROR
0.3
0.3
0.2
0.1
0
0
– 0.1
NOMINAL
SPECIFIED
CONDITIONS
–0.1
–0.2
–0.3
–0.4
–0.5
0.4
–6
–5
– 0.2
–2
–3
VSS (V)
–4
0
–1
VSS = GND
0.6
VIOS
0.2
0.4
0.2
0.1
GAIN ERROR
0
–0.1
0
– 0.2
VOOS
–0.2
– 0.4
– 0.3
–0.3
– 0.6
– 0.4
–0.4
– 0.8
–0.5
–0.5
2.5
3.0
3.5
4.0
VDD (V)
4.5
5.0
200
250Hz
100Hz
190
180
200mVRMS SCR WAVEFORMS
= 4.7µF
C
160 VAVE= 5V
DD
5%/DIV
150
6
2
3
5
4
1
10
0.15
0.10
0.05
0
–0.20
200
0.10
CAVE = 1µF
0.08 VIN2 = GND
–0.08
–0.10
–500
–300
100
–100
VIN1 (mV)
300
500
1966 G14
–10
AC INPUT
VDD = 5V
–1% ERROR
DC INPUT
VDD = 5V
–15
AC INPUT
VDD = 3V
0
0.5
1
1.5
VIN1 (VRMS)
2.5
2
Shutdown Currents
vs ENABLE Voltage
250
150
125
100
75
50
25
0
–25
1
2
5
3
4
VDD SUPPLY VOLTAGE (V)
IDD
150
100
500
IEN
50
250
ISS
0
0
–50
ISS
0
VDD = 5V
200
IDD
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
EFFECT OF OFFSETS
MAY BE POSITIVE
OR NEGATIVE
–0.06
–5
6
1966 G16
–100
–250
0
1
4
3
5
2
ENABLE PIN VOLTAGE (V)
6
–500
ENABLE PIN CURRENT (nA)
VOUTDC – |VINDC| (mV)
0.06
–0.04
AC INPUTS = 60Hz
SINEWAVES
VIN2 = GND
1% ERROR
1966 G24
VSS = GND
175
5.0
0
50 100 150 200 250 300 350 400 450 500
VIN1 (mV ACRMS)
Quiescent Supply Currents
vs Supply Voltage
–0.02
4.5
1966 G13
DC Linearity
0
2.5 3.0 3.5 4.0
CREST FACTOR
5
–20
0
1966 G12
0.02
2.0
Output Accuracy vs Signal
Amplitude
60Hz SINEWAVES
CAVE = 1µF
VIN2 = GND
CREST FACTOR
0.04
1.5
1966 G15
–0.15
8
100Hz
200.2
199.8
1.0
–1.0
5.5
–0.10
7
60Hz
200.0
–0.05
170
20Hz
200.4
VOUT (mV DC) – VIN (mVRMS)
60Hz
VOUT (mV DC) – VIN (mV ACRMS)
OUTPUT VOLTAGE (mV DC)
0.20
20Hz
200.6
AC Linearity
FUNDAMENTAL
FREQUENCY
210
200mVRMS SCR WAVEFORMS
CAVE = 10µF
200.8 VDD = 5V
O.1%/DIV
1966 G10
Performance vs Large Crest Factors
220
201.0
0.8
1966 G11
230
Performance vs Crest Factor
1
OFFSET VOLTAGE (mV)
0.2
0.4
OFFSET VOLTAGE (mV)
GAIN ERROR (%)
0.3
0.5
GAIN ERROR (%)
0.4
Gain and Offsets vs VDD Supply
0.5
OUTPUT VOLTAGE (mV DC)
Gain and Offsets vs VSS Supply
0.5
1966 G18
1966fb
6
LTC1966
Typical Performance Characteristics
Quiescent Supply Currents
vs Temperature
Input Signal Bandwidth
150
VDD = 5V, VSS = GND
30
VDD = 2.7V, VSS = GND
25
20
130
120
15
VDD = 5V, VSS = –5V
110
100 VDD = 5V, VSS = GND
0.1%
ERROR
35
VDD = 2.7V, VSS = GND
10
1%
ERROR
10%
ERROR
–3dB
10
1
100
10K
100K
1K
INPUT SIGNAL FREQUENCY (Hz)
194
192
190
188
186
1M
30
0.5%/DIV
CAVE = 47µF
25
Common Mode Rejection Ratio
vs Frequency
110
VIN2 = GND
THREE REPRESENTITIVE UNITS
20
200
199
198
197
15
10
5
0
196
–5
0 10 20 30 40 50 60 70 80 90 100
INPUT FREQUENCY (kHz)
1966 G21
–10
–20 –15 –10
0
5
–5
VIN1 (mV DC)
10
15
1000
1966 G20
DC Transfer Function Near Zero
VOUT (mV DC)
OUTPUT DC VOLTAGE (mV)
196
184 1%/DIV
CAVE = 2.2µF
182
10
100
1
INPUT FREQUENCY (kHz)
COMMON MODE REJECTION RATIO (dB)
Bandwidth to 100kHz
195
200
198
1966 G19
1966 G17
201
202
5
0
90
– 60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
202
Input Signal Bandwidth
100
ISS (µA)
IDD (µA)
140
VDD = 5V, VSS = –5V
OUTPUT DC VOLTAGE (mV)
160
1000
OUTPUT DC VOLTAGE (mV)
40
170
20
1966 G22
VDD = 5V
VSS = –5V
±5V INPUT CONVERSION
TO DC OUTPUT
100
90
80
70
60
50
40
30
20
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
1966 G23
1966fb
7
LTC1966
Pin Functions
GND (Pin 1): Ground. A power return pin.
VSS (Pin 4): Negative Voltage Supply. GND to – 5.5V.
OUT RTN (Pin 6): Output Return. The output voltage is
created relative to this pin. The VOUT and OUT RTN pins
are not balanced and this pin should be tied to a low
impedance, both AC and DC. Although it is typically tied
to GND, it can be tied to any arbitrary voltage, VSS < OUT
RTN < (VDD – Max Output). Best results are obtained when
OUT RTN = GND.
VOUT (Pin 5): Output Voltage. This is high impedance.
The RMS averaging is accomplished with a single shunt
capacitor from this node to OUT RTN. The transfer function is given by:
ENABLE (Pin 8): An Active Low Enable Input. LTC1966
is debiased if open circuited or driven to VDD. For normal
operation, pull to GND, a logic low or even VSS.
IN1 (Pin 2): Differential Input. DC coupled (polarity is
irrelevant).
IN2 (Pin 3): Differential Input. DC coupled (polarity is
irrelevant).
( VOUT – OUT RTN) =
VDD (Pin 7): Positive Voltage Supply. 2.7V to 5.5V.
2
Average (IN2 – IN1)
1966fb
8
LTC1966
Applications Information
START
NOT
SURE
READ
RMS-TO-DC
CONVERSION
DO YOU
NEED TRUE RMS-TO-DC
CONVERSION?
FIND SOMEONE WHO DOES
AND GIVE THEM THIS
DATA SHEET
NO
YES
CONTACT LTC BY PHONE OR
AT www.linear.com AND
GET SOME NOW
DO YOU
HAVE ANY LTC1966s
YET?
NO
YES
DID
YOU ALREADY TRY OUT
THE LTC1966?
DO YOU WANT TO
KNOW HOW TO USE THE
LTC1966 FIRST?
NO
YES
READ THE TROUBLESHOOTING
GUIDE. IF NECESSARY, CALL
LTC FOR APPLICATIONS SUPPORT
NO
YES
NO
DID
YOUR CIRCUIT
WORK?
READ THE DESIGN COOKBOOK
YES
CONTACT LTC
AND PLACE YOUR ORDER
YES
NOW DOES YOUR
RMS CIRCUIT WORK
WELL ENOUGH THAT YOU
ARE READY TO BUY
THE LTC1966?
NO
READ THE TROUBLESHOOTING
GUIDE AGAIN OR CALL LTC
FOR APPLICATIONS SUPPORT
1966 TA02
1966fb
9
LTC1966
Applications Information
RMS-TO-DC CONVERSION
Definition of RMS
RMS amplitude is the consistent, fair and standard way to
measure and compare dynamic signals of all shapes and
sizes. Simply stated, the RMS amplitude is the heating
potential of a dynamic waveform. A 1VRMS AC waveform
will generate the same heat in a resistive load as will 1V DC.
1V DC
+
–
R
1V ACRMS
R
1V (AC + DC) RMS
R
SAME
HEAT
1966 F01
Figure 1
Mathematically, RMS is the root of the mean of the square:
VRMS = V2
Alternatives to RMS
Other ways to quantify dynamic waveforms include peak
detection and average rectification. In both cases, an average (DC) value results, but the value is only accurate at
the one chosen waveform type for which it is calibrated,
typically sine waves. The errors with average rectification
are shown in Table 1. Peak detection is worse in all cases
and is rarely used.
The last two entries of Table 1 are chopped sine waves as
is commonly created with thyristors such as SCRs and
Triacs. Figure 2a shows a typical circuit and Figure 2b
shows the resulting load voltage, switch voltage and load
currents. The power delivered to the load depends on the
firing angle, as well as any parasitic losses such as switch
ON voltage drop. Real circuit waveforms will also typically
have significant ringing at the switching transition, dependent on exact circuit parasitics. For the purposes of this
data sheet, SCR waveforms refers to the ideal chopped
sine wave, though the LTC1966 will do faithful RMS-to-DC
conversion with real SCR waveforms as well.
The case shown is for Θ = 90°, which corresponds to 50%
of available power being delivered to the load. As noted in
Table 1, when Θ = 114°, only 25% of the available power
is being delivered to the load and the power drops quickly
as Θ approaches 180°.
With an average rectification scheme and the typical
calibration to compensate for errors with sine waves, the
RMS level of an input sine wave is properly reported; it
is only with a nonsinusoidal waveform that errors occur.
Because of this calibration, and the output reading in
VRMS, the term true RMS got coined to denote the use of
an actual RMS-to-DC converter as opposed to a calibrated
average rectifier.
+ VLOAD –
AC
MAINS
+
VLINE
–
ILOAD
CONTROL
+
–
VTHY
1966 F02a
Figure 2a
Table 1. Errors with Average Rectification vs True RMS
WAVEFORM
VRMS
AVERAGE
RECTIFIED
(V)
Square Wave
1.000
1.000
11%
Sine Wave
1.000
0.900
*Calibrate for 0% Error
Triangle Wave
1.000
0.866
–3.8%
SCR at 1/2 Power,
Θ = 90°
1.000
0.637
–29.3%
SCR at 1/4 Power,
Θ = 114°
1.000
0.536
–40.4%
VLINE
ERROR*
Θ
VLOAD
VTHY
ILOAD
1966 F02b
Figure 2b
1966fb
10
LTC1966
Applications Information
How an RMS-to-DC Converter Works
How the LTC1966 RMS-to-DC Converter Works
Monolithic RMS-to-DC converters use an implicit computation to calculate the RMS value of an input signal.
The fundamental building block is an analog multiply/
divide used as shown in Figure 3. Analysis of this topology is easy and starts by identifying the inputs and the
output of the lowpass filter. The input to the LPF is the
calculation from the multiplier/divider; (VIN)2/VOUT. The
lowpass filter will take the average of this to create the
output, mathematically:
The LTC1966 uses a completely new topology for RMSto-DC conversion, in which a ∆Σ modulator acts as the
divider, and a simple polarity switch is used as the multiplier
as shown in Figure 4.
Dα
VIN
VOUT
∆–∑
REF
VIN
VOUT
±1
( V )2
IN
=
,
VOUT
LPF
Figure 4. Topology of LTC1966
Because VOUT is DC,
2
( V )2 ( VIN )
IN
, so
=
VOUT
VOUT
VOUT
The ∆Σ modulator has a single-bit output whose average
duty cycle (D) will be proportional to the ratio of the input
signal divided by the output. The ∆Σ is a 2nd order modulator with excellent linearity. The single bit output is used to
selectively buffer or invert the input signal. Again, this is a
circuit with excellent linearity, because it operates at only
two points: ±1 gain; the average effective multiplication
over time will be on the straight line between these two
points. The combination of these two elements again creates
a lowpass filter input signal proportional to (VIN)2/VOUT,
which, as shown above, results in RMS-to-DC conversion.
( V )2
IN
=
, and
VOUT
( VOUT )2 = ( VIN )2, or
VOUT =
( VIN )2 = RMS( VIN )
(VIN )
2
VOUT
VIN
× ÷
VOUT
LPF
VOUT
1966 F03
Figure 3. RMS-to-DC Converter with Implicit Computation
Unlike the prior generation RMS-to-DC converters, the
LTC1966 computation does NOT use log/antilog circuits,
which have all the same problems, and more, of log/antilog
multipliers/dividers, i.e., linearity is poor, the bandwidth
changes with the signal amplitude and the gain drifts with
temperature.
The lowpass filter performs the averaging of the RMS
function and must be a lower corner frequency than the
lowest frequency of interest. For line frequency measurements, this filter is simply too large to implement on-chip,
but the LTC1966 needs only one capacitor on the output
to implement the lowpass filter. The user can select this
capacitor depending on frequency range and settling time
requirements, as will be covered in the Design Cookbook
section to follow.
This topology is inherently more stable and linear than
log/antilog implementations primarily because all of the
signal processing occurs in circuits with high gain op amps
operating closed loop.
1966fb
11
LTC1966
Applications Information
More detail of the LTC1966 inner workings is shown in
the Simplified Schematic towards the end of this data
sheet. Note that the internal scalings are such that the ∆Σ
output duty cycle is limited to 0% or 100% only when VIN
exceeds ± 4 • VOUT.
Linearity of an RMS-to-DC Converter
Linearity may seem like an odd property for a device that
implements a function that includes two very nonlinear
processes: squaring and square rooting.
However, an RMS-to-DC converter has a transfer function,
RMS volts in to DC volts out, that should ideally have a
1:1 transfer function. To the extent that the input to output
transfer function does not lie on a straight line, the part
is nonlinear.
A more complete look at linearity uses the simple model
shown in Figure 5. Here an ideal RMS core is corrupted by
both input circuitry and output circuitry that have imperfect
transfer functions. As noted, input offset is introduced in
the input circuitry, while output offset is introduced in the
output circuitry.
Any nonlinearity that occurs in the output circuity will corrupt the RMS in to DC out transfer function. A nonlinearity
in the input circuitry will typically corrupt that transfer
function far less, simply because with an AC input, the
RMS-to-DC conversion will average the nonlinearity from
a whole range of input values together.
INPUT
INPUT CIRCUITRY
• VIOS
• INPUT NONLINEARITY
But the input nonlinearity will still cause problems in an
RMS-to-DC converter because it will corrupt the accuracy
as the input signal shape changes. Although an RMS-to-DC
converter will convert any input waveform to a DC output,
the accuracy is not necessarily as good for all waveforms
as it is with sine waves. A common way to describe dynamic signal wave shapes is crest factor. The crest factor
is the ratio of the peak value relative to the RMS value of
a waveform. A signal with a crest factor of 4, for instance,
has a peak that is four times its RMS value. Because this
peak has energy (proportional to voltage squared) that is
16 times (42) the energy of the RMS value, the peak is
necessarily present for at most 6.25% (1/16) of the time.
The LTC1966 performs very well with crest factors of 4
or less and will respond with reduced accuracy to signals
with higher crest factors. The high performance with crest
factors less than 4 is directly attributable to the high linearity throughout the LTC1966.
The LTC1966 does not require an input rectifier, as is common with traditional log/antilog RMS-to-DC converters.
Thus, the LTC1966 has none of the nonlinearities that are
introduced by rectification.
The excellent linearity of the LTC1966 allows calibration to
be highly effective at reducing system errors. See System
Calibration section following the Design Cookbook.
IDEAL
RMS-TO-DC
CONVERTER
OUTPUT CIRCUITRY
• VOOS
• OUTPUT NONLINEARITY
OUTPUT
1966 F05
Figure 5. Linearity Model of an RMS-to-DC Converter
1966fb
12
LTC1966
Applications Information
The LTC1966 RMS-to-DC converter makes it easy to
implement a rather quirky function. For many applications
all that will be needed is a single capacitor for averaging,
appropriate selection of the I/O connections and power
supply bypassing. Of course, the LTC1966 also requires
power. A wide variety of power supply configurations are
shown in the Typical Applications section towards the end
of this data sheet.
Capacitor Value Selection
The RMS or root-mean-squared value of a signal, the root
of the mean of the square, cannot be computed without
some averaging to obtain the mean function. The LTC1966
true RMS-to-DC converter utilizes a single capacitor on
the output to do the low frequency averaging required for
RMS-to-DC conversion. To give an accurate measure of a
dynamic waveform, the averaging must take place over a
sufficiently long interval to average, rather than track, the
lowest frequency signals of interest. For a single averaging capacitor, the accuracy at low frequencies is depicted
in Figure 6.
However, if the output is examined on an oscilloscope
with a very low frequency input, the incomplete averaging will be seen, and this ripple will be larger than the
error depicted in Figure 6. Such an output is depicted in
Figure 7. The ripple is at twice the frequency of the input
because of the computation of the square of the input.
The typical values shown, 5% peak ripple with 0.05% DC
error, occur with CAVE = 1µF and fINPUT = 10Hz.
If the application calls for the output of the LTC1966 to feed
a sampling or Nyquist A/D converter (or other circuitry that
will not average out this double frequency ripple) a larger
averaging capacitor can be used. This trade-off is depicted
in Figure 8. The peak ripple error can also be reduced by
additional lowpass filtering after the LTC1966, but the
simplest solution is to use a larger averaging capacitor.
1This
frequency dependent error is in addition to the static errors that affect all readings and are
therefore easy to trim or calibrate out. The Error Analyses section to follow discusses the effect
of static error terms.
ACTUAL OUTPUT
WITH RIPPLE
f = 2 × fINPUT
OUTPUT
Design Cookbook
Figure 6 depicts the so-called DC error that results at a
given combination of input frequency and filter capacitor
values1. It is appropriate for most applications, in which
the output is fed to a circuit with an inherently band limited frequency response, such as a dual slope/integrating
A/D converter, a ∆Σ A/D converter or even a mechanical
analog meter.
IDEAL
OUTPUT
DC
ERROR
(0.05%)
PEAK
RIPPLE
(5%)
PEAK
ERROR =
DC ERROR +
PEAK RIPPLE
(5.05%)
DC
AVERAGE
OF ACTUAL
OUTPUT
TIME
1966 F07
Figure 7. Output Ripple Exceeds DC Error
0
–0.2
C = 4.7µF
–0.4
DC ERROR (%)
–0.6
C = 10µF
C = 2.2µF
–0.8
C = 1.0µF
C = 0.47µF
C = 0.1µF
C = 0.22µF
–1.0
–1.2
–1.4
–1.6
–1.8
–2.0
1
10
INPUT FREQUENCY (Hz)
Figure 6. DC Error vs Input Frequency
20
50
60
100
1966 F06
1966fb
13
LTC1966
Applications Information
0
–0.2
PEAK ERROR (%)
–0.4
C = 100µF
–0.6
–0.8
C = 47µF
–1.0
C = 22µF
C = 10µF
C = 2.2µF
C = 4.7µF
C = 1µF
–1.2
–1.4
–1.6
–1.8
–2.0
1
10
INPUT FREQUENCY (Hz)
20
Figure 8. Peak Error vs Input Frequency with One Cap Averaging
A 1µF capacitor is a good choice for many applications.
The peak error at 50Hz/60Hz will be 10kHz inputs.
– This is a fundamental characteristic of this topology. The LTC1966 is designed to work very well
with inputs of 1kHz or less. It works okay as high
as 1MHz, but it is limited by aliased ∆Σ noise.
Solution: Bandwidth limit the input or digitally filter
the resulting output.
8. Large errors occur at crest factors approaching, but
less than 4.
– Insufficient averaging.
Solution: Increase CAVE. See Crest Factor and AC + DC
Waveforms section for discussion of output droop.
10. Gain is low by ≅1% or more, no other problems.
– Probably due to circuit loading. With a DMM or
a 10× scope probe, ZIN = 10MΩ. The LTC1966
output is 85kΩ, resulting in – 0.85% gain error.
Output impedance is higher with the DC accurate
post filter.
Solution: Remove the shunt loading or buffer the
output.
– Loading can also be caused by cheap averaging
capacitors.
Solution: Use a high quality metal film capacitor
for CAVE.
9. Screwy results, errors > spec limits, typically 1% to 5%.
– High impedance (85kΩ) and high accuracy (0.1%)
require clean boards! Flux residue, finger grime, etc.
all wreak havoc at this level.
LOADING DRAGS DOWN GAIN
Solution: Wash the board.
LTC1966
Helpful Hint: Sensitivity to leakages can be reduced
significantly through the use of guard traces.
VOUT
85k
OUT RTN
mV
5
6
DCV
10M
DMM
200mVRMS IN
–0.85%
KEEP BOARD CLEAN
1966 TS10
LTC1966
1966fb
33
LTC1966
Typical Applications
±5V Supplies, Differential, DC-Coupled
RMS-to-DC Converter
5V Single Supply, Differential, AC-Coupled
RMS-to-DC Converter
5V
5V
DC + AC
INPUTS
(1VPEAK
DIFFERENTIAL)
VDD
VDD
LTC1966
LTC1966
IN1
VOUT
CAVE
1µF
IN2 OUT RTN
AC INPUTS
(1VPEAK
DIFFERENTIAL)
DC OUTPUT
VSS GND EN
IN1
VOUT
IN2 OUT RTN
CC
0.1µF
1966 TA05
±2.5V Supplies, Single Ended, DC-Coupled
RMS-to-DC Converter with Shutdown
2.7V Single Supply, Single Ended, AC-Coupled
RMS-to-DC Converter with Shutdown
2.7V/3V CMOS
OFF
ON
2V
EN VDD
OFF ON
CC
0.1µF
VSS
–2.5V
–2V
EN VDD
LTC1966
IN1
0.1µF
X7R
2.5V
2.7V
AC INPUT
(1VPEAK)
DC OUTPUT
VSS GND EN
1966 TA03
–5V
CAVE
1µF
VOUT
CAVE
1µF
IN2 OUT RTN
DC OUTPUT
DC + AC
INPUT
(1VPEAK)
GND
LTC1966
IN1
VOUT
CAVE
1µF
IN2 OUT RTN
VSS
GND
–2.5V
–2.5V
DC OUTPUT
1966 TA04
1966 TA06
Battery Powered Single-Ended AC-Coupled
RMS-to-DC Converter
AC INPUT
(1VPEAK)
CC
0.1µF
9V
VDD
LTC1966
IN1
GND
LT1175CS8-5
SHDN
VIN
0.1µF
X7R
VOUT
IN2 OUT RTN
DC
CAVE OUTPUT
1µF
VSS GND EN
OUT
SENSE
1966 TA07
1966fb
34
LTC1966
Simplified Schematic
VDD
C12
GND
VSS
C1
Y1
Y2
C2
IN1
2nd ORDER ∆∑ MODULATOR
IN2
C3
C5
C7
+
C9
+
A1
C4
OUTPUT
–
A2
C8
CAVE
C11
–
OUT RTN
1966 SS
C6
EN
TO BIAS CONTROL
C10
CLOSED
DURING
SHUTDOWN
30k
BLEED RESISTOR
FOR CAVE
1966fb
35
LTC1966
Package Description
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
0.254
(.010)
7 6 5
0.52
(.0205)
REF
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
3.20 – 3.45
(.126 – .136)
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.42 ± 0.038
(.0165 ± .0015)
TYP
8
0.65
(.0256)
BSC
1
1.10
(.043)
MAX
2 3
4
0.86
(.034)
REF
0.18
(.007)
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS8) 0307 REV F
1966fb
36
LTC1966
Revision History
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
B
5/11
Revised entire data sheet to add H- and MP- grades
PAGE NUMBER
1 to 38
1966fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
37
LTC1966
Typical Application
RMS Noise Measurement
5V
VOLTAGE
NOISE IN
5V
VDD
+
100Ω
10k
1/2
LTC6203
IN1
–
1mVDC
1µVRMS NOISE
VOUT
CAVE
1µF
IN2 OUT RTN
–5V
100Ω
VSS GND EN
0.1µF
–5V
100k
1966 TA10
BW 1kHz TO 100kHz
INPUT SENSITIVITY = 1µVRMS TYP
1.5µF
AC CURRENT
71.2A MAX
50Hz TO 400Hz
VOUT =
LTC1966
70A Current Measurement
Single Supply RMS Current Measurement
5V
V+
LTC1966
IN1
T1
VOUT
10Ω
CAVE
1µF
IN2 OUT RTN
VOUT
4mVDC/ARMS
AC CURRENT
71.2A MAX
50Hz TO 400Hz
LTC1966
IN1
T1
CAVE
1µF
IN2 OUT RTN
VSS GND EN
T1: CR MAGNETICS CR8348-2500-N
www.crmagnetics.com
VOUT
10Ω
VOUT = 4mVDC/ARMS
100k VSS GND EN
–5V
1966 TA09
0.1µF
1966 TA08
100k
T1: CR MAGNETICS CR8348-2500-N
www.crmagnetics.com
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LT®1077
Micropower, Single Supply Precision Op Amp
48µA ISY, 60µV VOS(MAX), 450pA IOS(MAX)
LT1175-5
Negative, –5V Fixed, Micropower LDO Regulator
45µA IQ, Available in SO-8 or SOT-223
LT1494
1.5µA Max, Precision Rail-to-Rail I/O Op Amp
375µV VOS(MAX), 100pA IOS(MAX)
LT1782
General Purpose SOT-23 Rail-to-Rail Op Amp
40µA ISY, 800µV VOS(MAX), 2nA IOS(MAX)
LT1880
SOT-23 Rail-to-Rail Output Precision Op Amp
1.2mA ISY, 150µV VOS(MAX), 900pA IOS(MAX)
LTC1967
Precision, Extended Bandwidth RMS to DC Converter
330µA ISY, ∆∑ RMS Conversion to 4MHz
LTC1968
Precision, Wide Bandwidth RMS to DC Converter
2.3mA ISY, ∆∑ RMS Conversion to 15MHz
LTC2050
Zero Drift Op Amp in SOT-23
750µA ISY, 3µV VOS(MAX), 75pA IB(MAX)
LT2178/LT2178A
17µA Max, Single Supply Precision Dual Op Amp
14µA ISY, 120µV VOS(MAX), 350pA IOS(MAX)
LTC2402
2-Channel, 24-bit, Micropower, No Latency ∆Σ™ ADC
200µA ISY, 4ppm INL, 10ppm TUE
LTC2420
20-bit, Micropower, No Latency ∆Σ ADC in SO-8
200µA ISY, 8ppm INL, 16ppm TUE
LTC2422
2-Channel, 20-bit, Micropower, No Latency ∆Σ ADC
Dual Channel Version of LTC2420
1966fb
38 Linear Technology Corporation
LT 0511 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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