LTC2480
16-Bit ∆Σ ADC with Easy Drive
Input Current Cancellation
FEATURES
DESCRIPTION
Extended Temperature Range of –40°C to 125°C
n Easy Drive Technology Enables Rail-to-Rail Inputs
with Zero Differential Input Current
n Directly Digitizes High Impedance Sensors with
Full Accuracy
n Programmable Gain from 1 to 256
n GND to V
CC Input/Reference Common Mode Range
n Programmable 50Hz, 60Hz or Simultaneous
50Hz/60Hz Rejection Mode
n 2ppm (0.25LSB) INL, No Missing Codes
n 1ppm Offset and 15ppm Full-Scale Error
n Selectable 2x Speed Mode (15Hz Using Internal
Oscillator)
n No Latency: Digital Filter Settles in a Single Cycle
n Single Supply 2.7V to 5.5V Operation
n Internal Oscillator
n Available in a Tiny (3mm × 3mm) 10-Lead
DFN Package and 10-Lead MSOP Package
The LTC®2480 combines a 16-bit plus sign No Latency
∆Σ™ analog-to-digital converter with patented Easy Drive™
technology. The patented sampling scheme eliminates
dynamic input current errors and the shortcomings of onchip buffering through automatic cancellation of differential
input current. This allows large external source impedances
and input signals, with rail-to-rail input range to be directly
digitized while maintaining exceptional DC accuracy.
n
APPLICATIONS
Direct Sensor Digitizer
Weight Scales
n Direct Temperature Measurement
n Strain Gauge Transducers
n Instrumentation
n Industrial Process Control
n DVMs and Meters
n
n
The LTC2480 includes on-chip programmable gain and
an oscillator. The LTC2480 can be configured to provide a
programmable gain from 1 to 256 in 8 steps, measure an
external signal or internal temperature sensor and reject
line frequencies. 50Hz, 60Hz or simultaneous 50Hz/60Hz
line frequency rejection can be selected as well as a 2x
speed-up mode.
The LTC2480 allows a wide common mode input range
(0V to VCC) independent of the reference voltage. The
reference can be as low as 100mV or can be tied directly
to VCC. The LTC2480 includes an on-chip trimmed oscillator eliminating the need for external crystals or oscillators. Absolute accuracy and low drift are automatically
maintained through continuous, transparent, offset and
full-scale calibration.
L, LT, LTC and LTM, Linear Technology and the Linear logo are registered trademarks and
No Latency ∆Σ and Easy Drive are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Patents pending.
TYPICAL APPLICATION
+FS Error vs RSOURCE at IN+ and IN–
VCC
10k
IDIFF = 0
VIN+
SENSE
VREF
VCC
LTC2480
10k
VIN–
0.1µF
GND
SDI
SDO
4-WIRE
SPI INTERFACE
SCK
fO
CS
+FS ERROR (ppm)
1µF
0.1µF
80
VCC = 5V
= 5V
60 VREF
VIN+ = 3.75V
– = 1.25V
V
IN
40
fO = GND
T
20 A = 25°C
CIN = 1µF
0
–20
–40
2480 TA01
–60
–80
1
10
100
1k
RSOURCE (Ω)
10k
100k
2480 TA04
2480fe
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1
LTC2480
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
Supply Voltage (VCC) to GND....................... –0.3V to 6V
Analog Input Voltage to GND........ –0.3V to (VCC + 0.3V)
Reference Input Voltage to GND... –0.3V to (VCC + 0.3V)
Digital Input Voltage to GND......... –0.3V to (VCC + 0.3V)
Digital Output Voltage to GND....... –0.3V to (VCC + 0.3V)
Operating Temperature Range
LTC2480C................................................ 0°C to 70°C
LTC2480I ............................................ –40°C to 85°C
LTC2480H ......................................... –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
PIN CONFIGURATION
TOP VIEW
SDI
1
VCC
2
VREF
3
IN+
4
IN–
5
11
GND
TOP VIEW
10 fO
9 SCK
SDI
VCC
VREF
IN+
IN–
8 GND
7 SDO
6 CS
1
2
3
4
5
10
9
8
7
6
fO
SCK
GND
SDO
CS
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 120°C/W
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2480CDD#PBF
LTC2480CDD#TRPBF
LBJY
10-Lead (3mm × 3mm) Plastic DFN
0°C to 70°C
LTC2480IDD#PBF
LTC2480IDD#TRPBF
LBJY
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC2480CMS#PBF
LTC2480CMS#TRPBF
LTCWB
10-Lead Plastic MSOP
0°C to 70°C
LTC2480IMS#PBF
LTC2480IMS#TRPBF
LTCWB
10-Lead Plastic MSOP
–40°C to 85°C
LTC2480HDD#PBF
LTC2480HDD#TRPBF
LBJY
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC2480HMS#PBF
LTC2480HMS#TRPBF
LTCWB
10-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2480fe
2
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LTC2480
ELECTRICAL
CHARACTERISTICS (NORMAL SPEED) l denotes the specifications which
The
apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4)
PARAMETER
CONDITIONS
MIN
TYP
MAX
Resolution (No Missing Codes)
0.1 ≤ VREF ≤ VCC, –FS ≤ VIN ≤ +FS (Note 5)
l
Integral Nonlinearity
5V ≤ VCC ≤ 5.5V, VREF = 5V, VIN(CM) = 2.5V (Note 6)
2.7V ≤ VCC ≤ 5.5V, VREF = 2.5V, VIN(CM) = 1.25V (Note 6)
l
2
1
10
Offset Error
2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC (Note 14)
l
0.5
2.5
Offset Error Drift
2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC
Positive Full-Scale Error
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF (H-Grade)
Positive Full-Scale Error Drift
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
Negative Full-Scale Error
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF (H-Grade)
Negative Full-Scale Error Drift
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
0.1
ppm of
VREF/°C
Total Unadjusted Error
5V ≤ VCC ≤ 5.5V, VREF = 2.5V, VIN(CM) = 1.25V
5V ≤ VCC ≤ 5.5V, VREF = 5V, VIN(CM) = 2.5V
2.7V ≤ VCC ≤ 5.5V, VREF = 2.5V, VIN(CM) = 1.25V
15
ppm of VREF
ppm of VREF
ppm of VREF
Output Noise
5V ≤ VCC ≤ 5.5V, VREF = 5V, GND ≤ IN– = IN+ ≤ VCC (Note 13)
0.6
µVRMS
Internal PTAT Signal
TA = 27°C
16
Bits
10
0.1
390
450
1
256
l
µV
ppm of VREF
ppm of VREF
ppm of
VREF/°C
25
40
l
l
ppm of VREF
ppm of VREF
nV/°C
25
40
l
l
Programmable Gain
UNITS
ppm of VREF
ppm of VREF
mV
ELECTRICAL
CHARACTERISTICS (2X SPEED) l denotes the specifications which apply over the
The
full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4)
PARAMETER
CONDITIONS
Resolution (No Missing Codes)
0.1 ≤ VREF ≤ VCC, –FS ≤ VIN ≤ +FS (Note 5)
l
Integral Nonlinearity
5V ≤ VCC ≤ 5.5V, VREF = 5V, VIN(CM) = 2.5V (Note 6)
2.7V ≤ VCC ≤ 5.5V, VREF = 2.5V, VIN(CM) = 1.25V (Note 6)
l
2
1
10
ppm of VREF
ppm of VREF
Offset Error
2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC (Note 14)
l
0.5
2
mV
Offset Error Drift
2.5V ≤ VREF ≤ VCC, GND ≤ IN+ = IN– ≤ VCC
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF (H-Grade)
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
l
l
25
40
ppm of VREF
ppm of VREF
Negative Full-Scale Error
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF (H-Grade)
l
l
Negative Full-Scale Error Drift
2.5V ≤ VREF ≤ VCC, IN+ = 0.75VREF , IN– = 0.25VREF
Output Noise
5V ≤ VCC ≤ 5.5V, VREF = 5V, GND ≤ IN– = IN+ ≤ VCC (Note 13)
Programmable Gain
(Note 15)
Positive Full-Scale Error
Positive Full-Scale Error Drift
MIN
TYP
MAX
16
Bits
100
nV/°C
0.1
ppm of
VREF/°C
25
40
0.1
1
ppm of VREF
ppm of VREF
ppm of
VREF/°C
0.84
l
UNITS
µVRMS
128
2480fe
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3
LTC2480
CONVERTER CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4)
PARAMETER
CONDITIONS
Input Common Mode Rejection DC
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Note 5)
MIN
, GND ≤ IN– = IN+ ≤ V
TYP
MAX
UNITS
l
140
dB
Input Common Mode Rejection
50Hz ±2%
2.5V ≤ VREF ≤ VCC
CC (Note 5)
l
140
dB
Input Common Mode Rejection
60Hz ±2%
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Note 5)
l
140
dB
Input Normal Mode Rejection
50Hz ±2%
l
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Notes 5, 7)
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Notes 5, 7) (H-Grade) l
110
104
120
dB
dB
Input Normal Mode Rejection
60Hz ±2%
l
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Notes 5, 8)
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Notes 5, 8) (H-Grade) l
110
104
120
dB
dB
Input Normal Mode Rejection
50Hz/60Hz ±2%
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Notes 5, 9)
l
87
Reference Common Mode
Rejection DC
2.5V ≤ VREF ≤ VCC, GND ≤ IN– = IN+ ≤ VCC (Note 5)
l
120
Power Supply Rejection DC
dB
140
dB
VREF = 2.5V, IN– = IN+ = GND
120
dB
Power Supply Rejection, 50Hz ±2%
VREF = 2.5V, IN– = IN+ = GND (Notes 7, 9)
120
dB
Power Supply Rejection, 60Hz ±2%
= 2.5V, IN– = IN+ = GND (Notes 8, 9)
120
dB
VREF
ANALOG
INPUT AND REFERENCE l denotes the specifications which apply over the full operating
The
temperature range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
IN+
Absolute/Common Mode IN+ Voltage
CONDITIONS
MIN
GND – 0.3V
VCC + 0.3V
V
IN–
Absolute/Common Mode IN– Voltage
GND – 0.3V
VCC + 0.3V
V
FS
Full-Scale of the Differential Input (IN+ – IN–)
l
0.5VREF/GAIN
TYP
MAX
UNITS
V
LSB
Least Significant Bit of the Output Code
l
FS/216
VIN
Input Differential Voltage Range (IN+ – IN–)
l
–FS
+FS
V
VREF
Reference Voltage Range
l
0.1
VCC
V
(IN+)
IN+ Sampling Capacitance
11
pF
CS (IN–)
IN– Sampling Capacitance
11
pF
CS
CS (VREF)
VREF Sampling Capacitance
IDC_LEAK (IN+)
IN+ DC Leakage Current
Sleep Mode, IN+ = GND
l
–10
11
1
10
nA
pF
IDC_LEAK (IN–)
IN– DC Leakage Current
Sleep Mode, IN– = GND
l
–10
1
10
nA
IDC_LEAK (VREF)
VREF DC Leakage Current
Sleep Mode, VREF = VCC
l
–100
1
100
nA
ANALOG
INPUTS AND DIGITAL OUTPUTS l denotes the specifications which apply over the
The
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
VIH
High Level Input Voltage CS, fO, SDI
2.7V ≤ VCC ≤ 5.5V (Note 16)
l
VIL
Low Level Input Voltage CS, fO, SDI
2.7V ≤ VCC ≤ 5.5V
l
VIH
High Level Input Voltage SCK
2.7V ≤ VCC ≤ 5.5V (Note 10)
l
VIL
Low Level Input Voltage SCK
2.7V ≤ VCC ≤ 5.5V (Note 10)
l
IIN
Digital Input Current CS, fO, SDI
0V ≤ VIN ≤ VCC
l
TYP
MAX
VCC – 0.5
V
0.5
VCC – 0.5
–10
UNITS
V
V
0.5
V
10
µA
2480fe
4
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LTC2480
ANALOG
INPUTS AND DIGITAL OUTPUTS l denotes the specifications which apply over the
The
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
0V ≤ VIN ≤ VCC (Note 10)
IIN
Digital Input Current SCK
CIN
Digital Input Capacitance CS, fO, SDI
MIN
CIN
Digital Input Capacitance SCK
VOH
High Level Output Voltage SDO
IO = –800µA
l
VOL
Low Level Output Voltage SDO
IO = 1.6mA
l
VOH
High Level Output Voltage SCK
IO = –800µA
l
VOL
Low Level Output Voltage SCK
IO = 1.6mA
l
IOZ
Hi-Z Output Leakage SDO
TYP
–10
l
MAX
UNITS
10
µA
10
pF
10
pF
VCC – 0.5
V
0.4
V
0.4
V
10
µA
VCC – 0.5
V
–10
l
POWER
REQUIREMENTS l denotes the specifications which apply over the full operating temperature
The
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
VCC
Supply Voltage
ICC
Supply Current
CONDITIONS
MIN
2.7
l
Conversion Mode (Note 12)
Sleep Mode (Note 12)
H-Grade
TYP
160
1
l
l
l
MAX
UNITS
5.5
V
250
2
20
µA
µA
µA
TIMING
CHARACTERISTICS l denotes the specifications which apply over the full operating temperature
The
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
fEOSC
External Oscillator Frequency Range
(Note 15)
MAX
UNITS
l
tHEO
MIN
10
1000
kHz
External Oscillator High Period
l
0.125
100
µs
tLEO
External Oscillator Low Period
l
0.125
100
tCONV_1
Conversion Time for 1x Speed Mode
50Hz Mode
50Hz Mode (H-Grade)
60Hz Mode
60Hz Mode (H-Grade)
Simultaneous 50Hz/60Hz Mode
Simultaneous 50Hz/60Hz Mode (H-Grade)
External Oscillator
l
l
l
l
l
l
l
163.5
160.3
157.2
165.1
160.3
157.2
136.3
133.6
131.0
137.6
133.6
131.0
149.9
146.9
144.1
151.0
146.9
144.1
41036/fEOSC (in kHz)
ms
ms
ms
ms
ms
ms
ms
tCONV_2
Conversion Time for 2x Speed Mode
50Hz Mode
50Hz Mode (H-Grade)
60Hz Mode
60Hz Mode (H-Grade)
Simultaneous 50Hz/60Hz Mode
Simultaneous 50Hz/60Hz Mode (H-Grade)
External Oscillator
l
l
l
l
l
l
l
78.7
80.3
65.6
66.9
72.2
73.6
ms
ms
ms
ms
ms
ms
ms
fISCK
Internal SCK Frequency
Internal Oscillator (Note 10)
External Oscillator (Notes 10, 11)
DISCK
Internal SCK Duty Cycle
(Note 10)
l
fESCK
External SCK Frequency Range
(Note 10)
l
TYP
20556/fEOSC (in kHz)
81.9
82.7
68.2
68.9
75.1
75.6
38.4
fEOSC/8
45
µs
kHz
kHz
55
%
4000
kHz
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5
LTC2480
TIMING
CHARACTERISTICS l denotes the specifications which apply over the full operating temperature
The
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
tLESCK
External SCK Low Period
(Note 10)
l
MIN
tHESCK
External SCK High Period
(Note 10)
l
125
tDOUT_ISCK
Internal SCK 24-Bit Data Output Time
Internal Oscillator (Notes 10, 12)
External Oscillator (Notes 10, 11)
l
l
0.61
(Note 10)
l
TYP
MAX
125
UNITS
ns
ns
0.625
0.64
192/fEOSC (in kHz)
ms
ms
24/fESCK (in kHz)
ms
tDOUT_ESCK
External SCK 24-Bit Data Output Time
t1
CS↓ to SDO Low
l
0
200
ns
t2
CS↑ to SDO High Z
l
t3
CS↓ to SCK↓
t4
CS↓ to SCK↑
tKQMAX
SCK↓ to SDO Valid
tKQMIN
SDO Hold After SCK↓
l
15
ns
t5
SCK Set-Up Before CS↓
l
50
ns
t6
SCK Hold After CS↓
l
t7
SDI Setup Before SCK↑
(Note 5)
l
100
ns
t8
SDI Hold After SCK↑
(Note 5)
l
100
ns
0
200
ns
Internal SCK Mode
l
0
200
ns
External SCK Mode
l
50
200
l
(Note 5)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: VCC = 2.7V to 5.5V unless otherwise specified.
VREFCM = VREF/2, FS = 0.5VREF/GAIN
VIN = IN+ – IN–, VIN(CM) = (IN+ + IN–)/2
Note 4: Use internal conversion clock or external conversion clock source
with fEOSC = 307.2kHz unless otherwise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: 50Hz mode (internal oscillator) or fEOSC = 256kHz ±2% (external
oscillator).
ns
50
ns
ns
Note 8: 60Hz mode (internal oscillator) or fEOSC = 307.2kHz ±2% (external
oscillator).
Note 9: Simultaneous 50Hz/60Hz mode (internal oscillator) or fEOSC =
280kHz ±2% (external oscillator).
Note 10: The SCK can be configured in external SCK mode or internal SCK
mode. In external SCK mode, the SCK pin is used as digital input and the
driving clock is fESCK. In internal SCK mode, the SCK pin is used as digital
output and the output clock signal during the data output is fISCK.
Note 11: The external oscillator is connected to the fO pin. The external
oscillator frequency, fEOSC, is expressed in kHz.
Note 12: The converter uses the internal oscillator.
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
Note 15: Refer to Applications Information section for performance vs
data rate graphs.
Note 16: For VCC < 3V, VIH is 2.5V for pin fO.
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LTC2480
TYPICAL PERFORMANCE CHARACTERISTICS
Integral Nonlinearity
(VCC = 5V, VREF = 5V)
2
25°C
0
85°C
–1
–2
1
–45°C, 25°C, 90°C
0
–1
–2
–3
–2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5
INPUT VOLTAGE (V)
2
–0.75
4
0
12
25°C
VCC = 5V
VREF = 5V
VIN(CM) = 1.25V
fO = GND
8
85°C
–45°C
–4
–8
2
12
85°C
–4
12
12
NUMBER OF READINGS (%)
2
–0.75
1.8
2480 G07
85°C
–45°C
–4
–12
–1.25
1.25
–0.25
0.25
0.75
INPUT VOLTAGE (V)
–0.75
–0.25
0.25
0.75
INPUT VOLTAGE (V)
2480 G03
Long-Term ADC Readings
VCC = 5V, VREF = 5V, VIN = 0V, VIN(CM) = 2.5V
4 GAIN = 256, TA = 25°C, RMS NOISE = 0.60µV
10,000 CONSECUTIVE
READINGS
RMS = 0.59µV
VCC = 2.7V
AVERAGE = –0.19µV
VREF = 2.5V
10 VIN = 0V
GAIN = 256
8 TA = 25°C
3
6
4
0
–3 –2.4 –1.8 –1.2 –0.6 0 0.6
OUTPUT READING (µV)
1.25
5
2
1
0
–1
–2
–3
2
1.2
25°C
0
Noise Histogram (7.5sps)
14
–3 –2.4 –1.8 –1.2 –0.6 0 0.6
OUTPUT READING (µV)
4
2480 G02
14
4
1.25
2480 G06
–8
Noise Histogram (6.8sps)
NUMBER OF READINGS (%)
8
–45°C
0
2480 G01
6
–0.25
0.25
0.75
INPUT VOLTAGE (V)
VCC = 2.7V
VREF = 2.5V
VIN(CM) = 1.25V
fO = GND
25°C
4
–12
–1.25
2.5
10,000 CONSECUTIVE
READINGS
RMS = 0.60µV
VCC = 5V
AVERAGE = –0.69µV
VREF = 5V
10 VIN = 0V
GAIN = 256
8 TA = 25°C
–0.75
Total Unadjusted Error
(VCC = 2.7V, VREF = 2.5V)
–8
–12
–2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5
INPUT VOLTAGE (V)
0
–1
Total Unadjusted Error
(VCC = 5V, VREF = 2.5V)
TUE (ppm OF VREF)
TUE (ppm OF VREF)
8
0
2480 G05
Total Unadjusted Error
(VCC = 5V, VREF = 5V)
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
fO = GND
–45°C, 25°C, 90°C
–3
–1.25
1.25
–0.25
0.25
0.75
INPUT VOLTAGE (V)
2480 G04
12
1
–2
–3
–1.25
2.5
VCC = 2.7V
VREF = 2.5V
VIN(CM) = 1.25V
fO = GND
2
INL (ppm OF VREF)
–45°C
3
VCC = 5V
VREF = 2.5V
VIN(CM) = 1.25V
fO = GND
TUE (ppm OF VREF)
1
Integral Nonlinearity
(VCC = 2.7V, VREF = 2.5V)
ADC READING (µV)
INL (ppm OF VREF)
2
3
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
fO = GND
INL (ppm OF VREF)
3
Integral Nonlinearity
(VCC = 5V, VREF = 2.5V)
–4
1.2
1.8
2480 G08
–5
0
10
30
40
20
TIME (HOURS)
50
60
2480 G09
2480fe
For more information www.linear.com/LTC2480
7
LTC2480
TYPICAL PERFORMANCE CHARACTERISTICS
RMS Noise
vs Input Differential Voltage
0.8
VCC = 5V
VREF = 5V
GAIN = 256
VIN(CM) = 2.5V
TA = 25°C
VCC = 5V
VREF = 5V
VIN = 0V
VIN(CM) = GND
GAIN = 256
TA = 25°C
0.9
0.7
0.6
1.0
0.8
0.7
0.6
0.5
0.4
2.5
–1
0
2
1
3
5
4
0.8
OFFSET ERROR (ppm OF VREF)
0.6
0.7
0.6
0.5
0.5
3.1
3.5
3.9 4.3
VCC (V)
4.7
5.1
0.4
5.5
0
1
2
3
VREF (V)
4
0.1
OFFSET ERROR (ppm OF VREF)
OFFSET ERROR (ppm OF VREF)
0.2
0.3
VCC = 5V
VREF = 5V
VIN = 0V
VIN(CM) = GND
fO = GND
0
–0.1
–0.2
–0.3
–45 –30 –15
0 15 30 45 60
TEMPERATURE (°C)
75
90
2480 G16
5
0.2
0.1
0
–0.1
–0.2
–0.3
–1
0
1
3
2
VIN(CM) (V)
5
4
0.2
0.1
Offset Error vs VCC
0.3
REF+ = 2.5V
– = GND
REF
VIN = 0V
VIN(CM) = GND
GAIN = 256
TA = 25°C
0
Offset Error vs VREF
VCC = 5V
REF– = GND
VIN = 0V
VIN(CM) = GND
GAIN = 256
TA = 25°C
0.2
0.1
0
–0.1
–0.1
–0.2
–0.3
2.7
6
2480 G15
OFFSET ERROR (ppm OF VREF)
Offset Error vs Temperature
90
VCC = 5V
VREF = 5V
VIN = 0V
GAIN = 256
TA = 25°C
2480 G14
2480 G13
0.3
75
Offset Error vs VIN(CM)
0.3
VCC = 5V
VIN = 0V
VIN(CM) = GND
GAIN = 256
TA = 25°C
0.9
0.7
0 15 30 45 60
TEMPERATURE (°C)
2480 G12
RMS Noise vs VREF
1.0
VREF = 2.5V
VIN = 0V
VIN(CM) = GND
GAIN = 256
TA = 25°C
0.4
2.7
0.4
–45 –30 –15
6
2480 G11
RMS NOISE (µV)
RMS NOISE (µV)
0.8
0.6
VIN(CM) (V)
RMS Noise vs VCC
0.9
0.7
0.5
2480 G10
1.0
VCC = 5V
VREF = 5V
VIN = 0V
VIN(CM) = GND
GAIN = 256
0.8
0.5
0.4
–2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2
INPUT DIFFERENTIAL VOLTAGE (V)
RMS Noise vs Temperature (TA)
0.9
RMS NOISE (µV)
RMS NOISE (ppm OF VREF)
0.9
RMS Noise vs VIN(CM)
1.0
RMS NOISE (µV)
1.0
–0.2
3.1
3.5
3.9 4.3
VCC (V)
4.7
5.1
5.5
2480 G17
–0.3
0
1
2
3
VREF (V)
4
5
2480 G18
2480fe
8
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LTC2480
TYPICAL PERFORMANCE CHARACTERISTICS
On-Chip Oscillator Frequency
vs VCC
On-Chip Oscillator Frequency
vs Temperature
310
310
304
VCC = 4.1V
VREF = 2.5V
VIN = 0V
VIN(CM) = GND
fO = GND
304
75
300
90
2.5
3.0
3.5
4.0
VCC (V)
4.5
5.0
–60
–80
–100
–120
–120
–140
30600
0 20 40 60 80 100 120 140 160 180 200 220
FREQUENCY AT VCC (Hz)
200
VCC = 4.1V DC ±0.7V
= 2.5V
V
–20 INREF
+ = GND
– = GND
IN
–40 fO = GND
TA = 25°C
–100
30650
30700
VCC = 5V
1.0
0.8
VCC = 2.7V
0.4
0
–45 –30 –15
400
350
300
250
0 15 30 45 60
TEMPERATURE (°C)
75
90
2480 G32
VCC = 2.7V
140
120
0 15 30 45 60
TEMPERATURE (°C)
100
3
2
VCC = 5V
90
10
20
OUTPUT DATA RATE (READINGS/SEC)
30
2480 G33
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
fO = GND
1
0
25°C, 90°C
–1
–2
VCC = 3V
0
75
2480 G31
200
150
0.2
VCC = 5V
Integral Nonlinearity (2x Speed
Mode; VCC = 5V, VREF = 5V)
VREF = VCC
IN+ = GND
IN– = GND
SCK = NC
SDO = NC
SDI = GND
CS GND
fO = EXT OSC
TA = 25°C
450
SUPPLY CURRENT (µA)
SLEEP MODE CURRENT (µA)
500
1M
160
Conversion Current
vs Output Data Rate
2.0
0.6
180
fO = GND
CS = GND
SCK = NC
SDO = NC
SDI = GND
2480 G30
Sleep Mode Current
vs Temperature
1.2
10k 100k
1k
100
FREQUENCY AT VCC (Hz)
100
–45 –30 –15
30800
30750
FREQUENCY AT VCC (Hz)
2480 G29
fO = GND
1.8 CS = V
CC
1.6 SCK = NC
SDO = NC
1.4 SDI = GND
10
Conversion Current
vs Temperature
CONVERSION CURRENT (µA)
–80
1
2480 G28
0
VCC = 4.1V DC ±1.4V
VREF = 2.5V
IN+ = GND
IN– = GND
fO = GND
TA = 25°C
–60
–140
–140
PSRR vs Frequency at VCC
REJECTION (dB)
REJECTION (dB)
–40
5.5
2480 G27
PSRR vs Frequency at VCC
–20
–80
–120
2480 G26
0
–60
–100
302
0 15 30 45 60
TEMPERATURE (°C)
–40
INL (ppm OF VREF)
300
–45 –30 –15
306
VCC = 4.1V DC
VREF = 2.5V
IN+ = GND
IN– = GND
fO = GND
TA = 25°C
–20
REJECTION (dB)
306
302
VREF = 2.5V
VIN = 0V
VIN(CM) = GND
fO = GND
308
FREQUENCY (kHz)
FREQUENCY (kHz)
308
PSRR vs Frequency at VCC
0
–45°C
–3
–2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5
INPUT VOLTAGE (V)
2
2.5
2480 G34
2480fe
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9
LTC2480
TYPICAL PERFORMANCE CHARACTERISTICS
Integral Nonlinearity (2x Speed
Mode; VCC = 5V, VREF = 2.5V)
1
90°C
0
–45°C, 25°C
–1
16
VCC = 2.7V
VREF = 2.5V
VIN(CM) = 1.25V
fO = GND
2
INL (ppm OF VREF)
2
INL (ppm OF VREF)
3
VCC = 5V
VREF = 2.5V
VIN(CM) = 1.25V
fO = GND
1
NUMBER OF READINGS (%)
3
90°C
0
–45°C, 25°C
–1
–2
–2
–3
–1.25
–0.75
–3
–1.25
1.25
–0.25
0.25
0.75
INPUT VOLTAGE (V)
200
–0.75
–0.25
0.25
0.75
INPUT VOLTAGE (V)
OFFSET ERROR (µV)
RMS NOISE (µV)
0.6
0.4
VCC = 5V
VIN = 0V
VIN(CM) = GND
fO = GND
TA = 25°C
240
194
192
190
188
186
180
5
–1
1
0
3
VIN(CM) (V)
2
4
0
VCC = 5V
VIN = 0V
VIN(CM) = GND
fO = GND
TA = 25°C
220
4.5
5
5.5
2480 G41
90
VCC = 4.1V DC
REF+ = 2.5V
REF– = GND
IN+ = GND
IN– = GND
fO = GND
TA = 25°C
–20
–40
210
200
190
160
75
2480 G40
REJECTION (dB)
OFFSET ERROR (µV)
OFFSET ERROR (µV)
4
3.5
VCC (V)
0 15 30 45 60
TEMPERATURE (°C)
PSRR vs Frequency at VCC
(2x Speed Mode)
–60
–80
–100
–120
170
3
160
–45 –30 –15
6
5
180
50
2.5
190
2480 G39
230
100
2
200
170
240
150
0
210
Offset Error vs VREF
(2x Speed Mode)
VREF = 2.5V
VIN = 0V
VIN(CM) = GND
fO = GND
TA = 25°C
200
220
180
2480 G38
Offset Error vs VCC
(2x Speed Mode)
188.6
VCC = 5V
VREF = 5V
VIN = 0V
VIN(CM) = GND
fO = GND
230
182
4
183.8
186.2
OUTPUT READING (µV)
Offset Error vs Temperature
(2x Speed Mode)
184
3
2
VREF (V)
181.4
2480 G37
OFFSET ERROR (µV)
196
0.8
250
4
0
179
1.25
VCC = 5V
VREF = 5V
VIN = 0V
fO = GND
TA = 25°C
198
1
6
Offset Error vs VIN(CM)
(2x Speed Mode)
1.0
0
8
2480 G36
RMS Noise vs VREF
(2x Speed Mode)
0.2
RMS = 0.86µV
10,000 CONSECUTIVE
AVERAGE = 0.184mV
14 READINGS
VCC = 5V
12 VREF = 5V
VIN = 0V
GAIN = 256
10
TA = 25°C
2
2480 G35
0
Noise Histogram
(2x Speed Mode)
Integral Nonlinearity (2x Speed
Mode; VCC = 2.7V, VREF = 2.5V)
0
1
2
3
VREF (V)
4
5
2480 G42
–140
1
10
10k 100k
1k
100
FREQUENCY AT VCC (Hz)
1M
2480 G43
2480fe
10
For more information www.linear.com/LTC2480
LTC2480
TYPICAL PERFORMANCE CHARACTERISTICS
PSRR vs Frequency at VCC
(2x Speed Mode)
PSRR vs Frequency at VCC
(2x Speed Mode)
RREJECTION (dB)
–20
–40
–60
0
VCC = 4.1V DC ±1.4V
REF+ = 2.5V
REF– = GND
IN+ = GND
IN– = GND
fO = GND
TA = 25°C
VCC = 4.1V DC ±0.7V
REF+ = 2.5V
REF– = GND
IN+ = GND
–40 IN– = GND
fO = GND
–60 TA = 25°C
–20
REJECTION (dB)
0
–80
–80
–100
–100
–120
–120
–140
0 20 40 60 80 100 120 140 160 180 200 220
FREQUENCY AT VCC (Hz)
–140
30600
30650
30700
30750
FREQUENCY AT VCC (Hz)
30800
2480 G45
2480 G44
PIN FUNCTIONS
SDI (Pin 1): Serial Data Input. This pin is used to select
the GAIN, line frequency rejection, input, temperature
sensor and 2x speed mode. Data is shifted into the SDI
pin on the rising edge of serial clock (SCK).
VCC (Pin 2): Positive Supply Voltage. Bypass to GND (Pin 8)
with a 1µF tantalum capacitor in parallel with 0.1µF ceramic
capacitor as close to the part as possible.
VREF (Pin 3): Positive Reference Input. The voltage on
this pin can have any value between 0.1V and VCC. The
negative reference input is GND (Pin 8).
IN+ (Pin 4), IN– (Pin 5): Differential Analog Inputs. The
voltage on these pins can have any value between GND
– 0.3V and VCC + 0.3V. Within these limits the converter
bipolar input range (VIN = IN+ – IN–) extends from –0.5
• VREF/GAIN to 0.5 • VREF/GAIN. Outside this input range
the converter produces unique overrange and underrange
output codes.
CS (Pin 6): Active LOW Chip Select. A LOW on this pin
enables the digital input/output and wakes up the ADC.
Following each conversion the ADC automatically enters
the sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the data output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 7): Three-State Digital Output. During the data
output period, this pin is used as the serial data output.
When the chip select CS is HIGH (CS = VCC), the SDO pin
is in a high impedance state. During the conversion and
sleep periods, this pin is used as the conversion status
output. The conversion status can be observed by pulling
CS LOW.
GND (Pin 8): Ground. Shared pin for analog ground, digital
ground and reference ground. Should be connected directly
to a ground plane through a minimum impedance.
2480fe
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11
LTC2480
PIN FUNCTIONS
SCK (Pin 9): Bidirectional Digital Clock Pin. In internal
serial clock operation mode, SCK is used as the digital
output for the internal serial interface clock during the
data input/output period. In external serial clock operation
mode, SCK is used as the digital input for the external serial interface clock during the data output period. A weak
internal pull-up is automatically activated in internal serial
clock operation mode. The serial clock operation mode
is determined by the logic level applied to the SCK pin at
power up or during the most recent falling edge of CS.
fO (Pin 10): Frequency Control Pin. Digital input that
controls the conversion clock. When fO is connected to
GND the converter uses its internal oscillator running at
307.2kHz. The conversion clock may also be overridden by
driving the fO pin with an external clock in order to change
the output rate or the digital filter rejection null.
GND (Exposed Pad Pin 11): This pin is ground and should
be soldered to the PCB ground plane. For prototyping
purposes, this pin may remain floating.
FUNCTIONAL BLOCK DIAGRAM
2
3
4
5
VREF
VCC
IN+
IN+
IN–
3RD ORDER
∆Σ ADC
(1-256)
IN–
REF–
GAIN
MUX
TEMP
SENSOR
SDI
REF+
SCK
SERIAL
INTERFACE
SD0
CS
fO
AUTOCALIBRATION
AND CONTROL
GND
8
1
9
7
6
10
INTERNAL
OSCILLATOR
2480 FD
TEST CIRCUITS
VCC
1.69k
SDO
SDO
1.69k
Hi-Z TO VOH
VOL TO VOH
VOH TO Hi-Z
CLOAD = 20pF
CLOAD = 20pF
Hi-Z TO VOL
VOH TO VOL
VOL TO Hi-Z
2480 TA02
2480 TA03
2480fe
12
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LTC2480
TIMING DIAGRAMS
Timing Diagram Using Internal SCK
CS
t1
t2
SDO
tKQMIN
t3
tKQMAX
SCK
t7
t8
SDI
2480 TD1
SLEEP
DATA IN/OUT
CONVERSION
Timing Diagram Using External SCK
CS
t1
t2
SDO
t5
SCK
tKQMIN
t6
t4
t7
tKQMAX
t8
SDI
2480 TD2
SLEEP
DATA IN/OUT
CONVERSION
APPLICATIONS INFORMATION
CONVERTER OPERATION
CONVERT
Converter Operation Cycle
The LTC2480 is a low power, delta-sigma analog-to-digital converter with an easy to use 4-wire serial interface
and automatic differential input current cancellation.
Its operation is made up of three states. The converter
operating cycle begins with the conversion, followed by
the low power sleep state and ends with the data output
(see Figure 1). The 4-wire interface consists of serial data
output (SDO), serial clock (SCK), chip select (CS) and
serial data input (SDI).
Initially, the LTC2480 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
SLEEP
FALSE
CS = LOW
AND
SCK
TRUE
DATA OUTPUT
CONFIGURATION INPUT
2480 F01
Figure 1. LTC2480 State Transition Diagram
2480fe
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13
LTC2480
APPLICATIONS INFORMATION
While in this sleep state, power consumption is reduced
by two orders of magnitude. The part remains in the sleep
state as long as CS is HIGH. The conversion result is held
indefinitely in a static shift register while the converter is
in the sleep state.
Once CS is pulled LOW, the device exits the low power
mode and enters the data output state. If CS is pulled HIGH
before the first rising edge of SCK, the device returns to
the low power sleep mode and the conversion result is
still held in the internal static shift register. If CS remains
LOW after the first rising edge of SCK, the device begins
outputting the conversion result. Taking CS high at this
point will terminate the data input and output state and
start a new conversion. The conversion result is shifted
out of the device through the serial data output pin (SDO)
on the falling edge of the serial clock (SCK) (see Figure 2).
The LTC2480 includes a serial data input pin (SDI) in
which data is latched by the device on the rising edge of
SCK (Figure 2). The bit stream applied to this pin can be
used to select various features of the LTC2480, including
an on-chip temperature sensor, programmable GAIN, line
frequency rejection and output data rate. Alternatively,
this pin may be tied to ground and the part will perform
conversions in a default state. In the default state (SDI
grounded) the device simply performs conversions on
the user applied input with a GAIN of 1 and simultaneous
rejection of 50Hz and 60Hz line frequencies.
Through timing control of the CS and SCK pins, the LTC2480
offers several flexible modes of operation (internal or
external SCK and free-running conversion modes). These
various modes do not require programming configuration
registers; moreover, they do not disturb the cyclic operation
described above. These modes of operation are described
in detail in the Serial Interface Timing Modes section.
Easy Drive Input Current Cancellation
The LTC2480 combines a high precision delta-sigma ADC
with an automatic differential input current cancellation
front end. A proprietary front-end passive sampling
network transparently removes the differential input
current. This enables external RC networks and high
impedance sensors to directly interface to the LTC2480
without external amplifiers. The remaining common
mode input current is eliminated by either balancing
the differential input impedances or setting the common
mode input equal to the common mode reference (see
the Automatic Input Current Cancellation section). This
unique architecture does not require on-chip buffers
enabling input signals to swing all the way to ground
and up to VCC. Furthermore, the cancellation does
not interfere with the transparent offset and full-scale
auto-calibration and the absolute accuracy (full-scale
+ offset + linearity) is maintained even with external
RC networks.
Accessing the Special Features of the LTC2480
The LTC2480 combines a high resolution, low noise ∆Σ
analog-to-digital converter with an on-chip selectable
temperature sensor, programmable gain, programmable
digital filter and output rate control. These special features
are selected through a single 8-bit serial input word during
the data input/output cycle (see Figure 2).
The LTC2480 powers up in a default mode commonly
used for most measurements. The device will remain in
this mode as long as the serial data input (SDI) is low.
In this default mode, the measured input is external, the
GAIN is 1, the digital filter simultaneously rejects 50Hz
and 60Hz line frequency noise, and the speed mode is 1x
(offset automatically, continuously calibrated).
A simple serial interface grants access to any or all special
functions contained within the LTC2480. In order to change
the mode of operation, an enable bit (EN) followed by up
to 7 bits of data are shifted into the device (see Table 1).
The first 3 bits (GS2, GS1, GS0) control the GAIN of the
converter from 1 to 256. The 4th bit (IM) is used to select
the internal temperature sensor as the conversion input,
while the 5th and 6th bits (FA, FB) combine to determine
the line frequency rejection mode. The 7th bit (SPD) is
used to double the output rate by disabling the offset auto
calibration.
2480fe
14
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LTC2480
APPLICATIONS INFORMATION
CS
SDO
Hi-Z
BIT 23
BIT 22
BIT 21
BIT 20
BIT 19
EOC
DMY
SIG
MSB
B16
BIT 18
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB
GS2
GS1
GS0
IM
CONVERSION RESULT
PREVIOUS
CONFIGURATION BITS
SCK
SDI
EN
GS2
GS1
GS0
IM
FA
SLEEP
FB
SPD
DON’T CARE
DATA INPUT/OUTPUT
CONVERSION
2480 F02
Figure 2. Input/Output Data Timing
Table 1. Selecting Special Modes
Gain
EN GS2 GS1 GS0
X X
0 X
0 0
0
1
0 1
0
1
1 0
0
1
1 1
0
1
0 0
1
1
0 1
1
1
1 0
1
1
1 1
1
1
0 0
0
1
0 1
0
1
1 0
0
1
1 1
0
1
0 0
1
1
0 1
1
1
1 0
1
1
1 1
1
1
1
1
Any Gain
1
1
1 X X X
1 X X X
1 X X X
1 X X X
Rejection
Mode
IM FA FB SPD
X
X X X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Any
0
0
Rejection
1
0
Mode
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
1
0
Any
1
0 Speed
0
1
1
0
1
0
0
X
1
0
1
X
1
1
0
X
1
1
1
X
Comments
Keep Previous Mode
External Input, Gain = 1, Autocalibration
External Input, Gain = 4, Autocalibration
External Input, Gain = 8, Autocalibration
External Input, Gain = 16, Autocalibration
External Input, Gain = 32, Autocalibration
External Input, Gain = 64, Autocalibration
External Input, Gain = 128, Autocalibration
External Input, Gain = 256, Autocalibration
External Input, Gain = 1, 2x Speed
External Input, Gain = 2, 2x Speed
External Input, Gain = 4, 2x Speed
External Input, Gain = 8, 2x Speed
External Input, Gain = 16, 2x Speed
External Input, Gain = 32, 2x Speed
External Input, Gain = 64, 2x Speed
External Input, Gain = 128, 2x Speed
External Input, Simultaneous 50Hz/60Hz Rejection
External Input, 50Hz Rejection
External Input, 60Hz Rejection
Reserved, Do Not Use
Temperature Input, 50Hz/60Hz Rejection, Gain = 1, Autocalibration
Temperature Input, 50Hz Rejection, Gain = 1, Autocalibration
Temperature Input, 60Hz Rejection, Gain = 1, Autocalibration
Reserved, Do Not Use
2480 TBL1
2480fe
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15
LTC2480
APPLICATIONS INFORMATION
Table 2a. The LTC2480 Performance vs GAIN in Normal Speed Mode (VCC = 5V, VREF = 5V)
GAIN
1
4
8
16
32
64
128
256
Input Span
±2.5
±0.625
±0.312
±0.156
±78m
±39m
±19.5m
±9.76m
V
LSB
38.1
9.54
4.77
2.38
1.19
0.596
0.298
0.149
µV
65536
65536
65536
65536
65536
65536
32768
16384
Counts
Noise Free Resolution*
UNIT
Gain Error
5
5
5
5
5
5
5
8
Offset Error
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ppm of FS
µV
UNIT
Table 2b. The LTC2480 Performance vs GAIN in 2x Speed Mode (VCC = 5V, VREF = 5V)
GAIN
1
2
4
8
16
32
64
128
Input Span
±2.5
±1.25
±0.625
±0.312
±0.156
±78m
±39m
±19.5m
V
LSB
38.1
19.1
9.54
4.77
2.38
1.19
0.596
0.298
µV
65536
65536
65536
65536
65536
65536
45875
22937
Gain Error
Noise Free Resolution*
5
5
5
5
5
5
5
5
Offset Error
200
200
200
200
200
200
200
200
Counts
ppm of FS
µV
*The resolution in counts is calculated as the FS divided by LSB or the RMS noise value, whichever is larger.
GAIN (GS2, GS1, GS0)
Rejection Mode (FA, FB)
The input referred gain of the LTC2480 is adjustable from
1 to 256. With a gain of 1, the differential input range is
±VREF/2 and the common mode input range is rail-to-rail.
As the GAIN is increased, the differential input range is reduced to ±VREF/2 • GAIN but the common mode input range
remains rail-to-rail. As the differential gain is increased,
low level voltages are digitized with greater resolution. At
a gain of 256, the LTC2480 digitizes an input signal range
of ±9.76mV with over 16,000 counts.
The LTC2480 includes a high accuracy on-chip oscillator with no required external components. Coupled with
a 4th order digital lowpass filter, the LTC2480 rejects
line frequency noise. In the default mode, the LTC2480
simultaneously rejects 50Hz and 60Hz by at least 87dB.
The LTC2480 can also be configured to selectively reject
50Hz or 60Hz to better than 110dB.
Temperature Sensor (IM)
The LTC2480 includes an on-chip temperature sensor.
The temperature sensor is selected by setting IM = 1 in
the serial input data stream. Conversions are performed
directly on the temperature sensor by the converter. While
operating in this mode, the device behaves as a temperature to bits converter. The digital reading is proportional
to the absolute temperature of the device. This feature
allows the converter to linearize temperature sensors or
continuously remove temperature effects from external
sensors. Several applications leveraging this feature are
presented in more detail in the applications section. While
operating in this mode, the gain is set to 1 and the speed
is set to normal independent of the control bits (GS2,
GS1, GS0 and SPD).
Speed Mode (SPD)
The LTC2480 continuously performs offset calibrations.
Every conversion cycle, two conversions are automatically
performed (default) and the results combined. This result
is free from offset and drift. In applications where the offset
is not critical, the autocalibration feature can be disabled
with the benefit of twice the output rate.
Linearity, full-scale accuracy and full-scale drift are identical for both 2x and 1x speed modes. In both the 1x and
2x speed there is no latency. This enables input steps or
multiplexer channel changes to settle in a single conversion cycle easing system overhead and increasing the
effective conversion rate.
2480fe
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Output Data Format
The LTC2480 serial output data stream is 24 bits long.
The first 3 bits represent status information indicating
the sign and conversion state. The next 17 bits are the
conversion result, MSB first. The remaining 4 bits indicate
the configuration state associated with the current conversion result. Bit 20 and bit 21 are also used to indicate
an underrange condition (the differential input voltage
is below –FS) or an overrange condition (the differential
input voltage is above +FS).
In applications where the processor generates 32 clock
cycles, or to remain compatible with higher resolution
converters, the LTC2480’s digital interface will ignore
extra clock edges seen during the next conversion period
after the 24th and output “1” for the extra clock cycles.
Furthermore, CS may be pulled high prior to outputting
all 24 bits, aborting the data out transfer and initiating a
new conversion.
Bit 21 (third output bit) is the conversion result sign
indicator (SIG). If VIN is >0, this bit is HIGH. If VIN is 1nF at Both
IN+ and IN–. Can Take
Large Source Resistance
with Negligible Error
CEXT > 1nF at Both IN+
and IN–. Can Take Large
Source Resistance.
Unbalanced Resistance
Results in an Offset
Varying
VIN(CM) – VREF(CM)
CEXT > 1nF at Both IN+
and IN–. Can Take Large
Source Resistance with
Negligible Error
Minimize IN+ and IN–
Capacitors and Avoid
Large Source Impedance
( 1nF) may be
required as reference filters in certain configurations. Such
capacitors will average the reference sampling charge and
the external source resistance will see a quasi constant
reference differential impedance.
In the following discussion, it is assumed the input and
reference common mode are the same. Using internal
oscillator for 60Hz mode, the typical differential reference
resistance is 1MΩ which generates a full-scale (VREF/2)
gain error of 0.51ppm for each ohm of source resistance
driving the VREF pin. For 50Hz/60Hz mode, the related
difference resistance is 1.1MΩ and the resulting full-scale
error is 0.46ppm for each ohm of source resistance driving the VREF pin. For 50Hz mode, the related difference
resistance is 1.2MΩ and the resulting full-scale error is
0.42ppm for each ohm of source resistance driving the
VREF pin. When fO is driven by an external oscillator with a
frequency fEOSC (external conversion clock operation), the
typical differential reference resistance is 0.30 • 1012/fEOSC
Ω and each ohm of source resistance driving the VREF pin
will result in 1.67 • 10–6 • fEOSCppm gain error. The typical
+FS and –FS errors for various combinations of source
resistance seen by the VREF pin and external capacitance
connected to that pin are shown in Figures 15-18.
In addition to this gain error, the converter INL performance is degraded by the reference source impedance.
The INL is caused by the input dependent terms
–VIN2/(VREF • REQ) – (0.5 • VREF • DT)/REQ in the reference
pin current as expressed in Figure 11. When using internal
oscillator and 60Hz mode, every 100Ω of reference source
resistance translates into about 0.67ppm additional INL
error. When using internal oscillator and 50Hz/60Hz mode,
every 100Ω of reference source resistance translates into
about 0.61ppm additional INL error. When using internal
oscillator and 50Hz mode, every 100Ω of reference source
resistance translates into about 0.56ppm additional INL
error. When fO is driven by an external oscillator with a
frequency fEOSC, every 100Ω of source resistance driving
2480fe
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10
90
VCC = 5V
VREF = 5V
VIN+ = 3.75V
VIN– = 1.25V
fO = GND
TA = 25°C
+FS ERROR (ppm)
70
60
50
0
CREF = 0.01µF
CREF = 0.001µF
CREF = 100pF
CREF = 0pF
40
30
20
–20
–30
–40
–50
VCC = 5V
–60 VREF = 5V
V + = 1.25V
–70 VIN– = 3.75V
IN
–80 fO = GND
TA = 25°C
–90
10
0
10
0
–10
10
0
CREF = 0.01µF
CREF = 0.001µF
CREF = 100pF
CREF = 0pF
–10
–FS ERROR (ppm)
80
1k
100
RSOURCE (Ω)
10k
100k
1k
100
RSOURCE (Ω)
10k
2480 F16
2480 F15
Figure 15. +FS Error vs RSOURCE at VREF (Small CREF)
VCC = 5V
VREF = 5V
VIN+ = 3.75V
VIN– = 1.25V
fO = GND
TA = 25°C
+FS ERROR (ppm)
400
300
0
CREF = 1µF, 10µF
–100
CREF = 0.1µF
200
CREF = 0.01µF
100
0
Figure 16. –FS Error vs RSOURCE at VREF (Small CREF)
–FS ERROR (ppm)
500
CREF = 0.01µF
–200
CREF = 1µF, 10µF
–300
VCC = 5V
VREF = 5V
VIN+ = 1.25V
VIN– = 3.75V
fO = GND
TA = 25°C
–400
0
200
600
400
RSOURCE (Ω)
800
1000
–500
0
2480 F17
Figure 17. +FS Error vs RSOURCE at VREF (Large CREF)
INL (ppm OF VREF)
VCC = 5V
8 VREF = 5V
VIN(CM) = 2.5V
6 T = 25°C
A
4 CREF = 10µF
R = 1k
2
R = 500Ω
0
R = 100Ω
–2
–4
–6
–8
–0.3
0.1
–0.1
VIN/VREF (V)
0.3
200
CREF = 0.1µF
600
400
RSOURCE (Ω)
800
1000
2480 F18
Figure 18. –FS Error vs RSOURCE at VREF (Large CREF)
VREF translates into about 2.18 • 10–6 • fEOSCppm additional INL error. Figure 19 shows the typical INL error due
to the source resistance driving the VREF pin when large
CREF values are used. The user is advised to minimize the
source impedance driving the VREF pin.
10
–10
–0.5
100k
0.5
2480 F19
Figure 19. INL vs Differential Input Voltage and
Reference Source Resistance for CREF > 1µF
In applications where the reference and input common
mode voltages are different, extra errors are introduced.
For every 1V of the reference and input common mode
voltage difference (VREFCM – VINCM) and a 5V reference,
each Ohm of reference source resistance introduces an
extra (VREFCM – VINCM)/(VREF • REQ) full-scale gain error,
which is 0.074ppm when using internal oscillator and 60Hz
mode. When using internal oscillator and 50Hz/60Hz mode,
the extra full-scale gain error is 0.067ppm. When using
2480fe
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LTC2480
APPLICATIONS INFORMATION
internal oscillator and 50Hz mode, the extra gain error is
0.061ppm. If an external clock is used, the corresponding
extra gain error is 0.24 • 10–6 • fEOSCppm.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capacitors
and upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typically better than 0.5%. Such
a specification can also be easily achieved by an external
clock. When relatively stable resistors (50ppm/°C) are
used for the external source impedance seen by VREF+
and GND, the expected drift of the dynamic current gain
error will be insignificant (about 1% of its value over the
entire temperature and voltage range). Even for the most
stringent applications a one-time calibration operation
may be sufficient.
In addition to the reference sampling charge, the reference pins ESD protection diodes have a temperature
dependent leakage current. This leakage current, nominally
1nA (±10nA max), results in a small gain error. A 100Ω
source resistance will create a 0.05µV typical and 0.5µV
maximum full-scale error.
3500
40
20
10
0
–10
An increase in fEOSC over the nominal 307.2kHz will translate
into a proportional increase in the maximum output data
rate. The increase in output rate is nevertheless accompanied by two potential effects, which must be carefully
considered.
First, a change in fEOSC will result in a proportional change
in the internal notch position and in a reduction of the
converter differential mode rejection at the power line
0
VIN(CM) = VREF(CM)
VCC = VREF = 5V
fO = EXT CLOCK
TA = 25°C
TA = 85°C
3000
TA = 25°C
TA = 85°C
30
When using its internal oscillator, the LTC2480 produces
up to 7.5 samples per second (sps) with a notch frequency
of 60Hz, 6.25sps with a notch frequency of 50Hz and
6.82sps with the 50Hz/60Hz rejection mode. The actual
output data rate will depend upon the length of the sleep
and data output phases which are controlled by the user
and which can be made insignificantly short. When operated with an external conversion clock (fO connected to
an external oscillator), the LTC2480 output data rate can
be increased as desired. The duration of the conversion
phase is 41036/fEOSC. If fEOSC = 307.2kHz, the converter
behaves as if the internal oscillator is used and the notch
is set at 60Hz.
2500
–500
–FS ERROR (ppm OF VREF)
VIN(CM) = VREF(CM)
VCC = VREF = 5V
VIN = 0V
fO = EXT CLOCK
+FS ERROR (ppm OF VREF)
OFFSET ERROR (ppm OF VREF)
50
Output Data Rate
–1000
2000
–1500
1500
–2000
1000
500
0
10
20
OUTPUT DATA RATE (READINGS/SEC)
30
2480 F20
Figure 20. Offset Error vs Output Data
Rate and Temperature
0
VIN(CM) = VREF(CM)
VCC = VREF = 5V
fO = EXT CLOCK
TA = 25°C
TA = 85°C
–2500
–3000
0
20
10
OUTPUT DATA RATE (READINGS/SEC)
30
2480 F21
Figure 21. +FS Error vs Output Data
Rate and Temperature
–3500
0
20
10
OUTPUT DATA RATE (READINGS/SEC)
30
2480 F22
Figure 22. –FS Error vs Output Data
Rate and Temperature
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LTC2480
APPLICATIONS INFORMATION
frequency. In many applications, the subsequent performance degradation can be substantially reduced by
relying upon the LTC2480’s exceptional common mode
rejection and by carefully eliminating common mode to
differential mode conversion sources in the input circuit.
The user should avoid single-ended input filters and should
maintain a very high degree of matching and symmetry
in the circuits driving the IN+ and IN– pins.
Second, the increase in clock frequency will increase
proportionally the amount of sampling charge transferred
through the input and the reference pins. If large external
input and/or reference capacitors (CIN, CREF) are used,
the previous section provides formulae for evaluating the
effect of the source resistance upon the converter perfor-
22
20
RESOLUTION (BITS)
20
18
TA = 25°C
TA = 85°C
VIN(CM) = VREF(CM)
VCC = VREF = 5V
VIN = 0V
fO = EXT CLOCK
RES = LOG 2 (VREF/NOISERMS)
14
12
0
20
10
OUTPUT DATA RATE (READINGS/SEC)
30
2480 F23
Figure 23. Resolution (NoiseRMS ≤ 1LSB)
vs Output Data Rate and Temperature
18
16
TA = 25°C
TA = 85°C
VIN(CM) = VREF(CM)
12 VCC = VREF = 5V
fO = EXT CLOCK
RES = LOG 2 (VREF/INLMAX)
10
0
10
20
OUTPUT DATA RATE (READINGS/SEC)
14
2480 F24
VIN(CM) = VREF(CM)
VIN = 0V
15 fO = EXT CLOCK
TA = 25°C
VCC = 5V, VREF = 2.5V
VCC = VREF = 5V
10
5
0
–5
–10
0
10
20
OUTPUT DATA RATE (READINGS/SEC)
30
2480 F25
Figure 25. Offset Error vs Output
Data Rate and Reference Voltage
22
24
22
20
20
18
16 VIN(CM) = VREF(CM)
VIN = 0V
fO = EXT CLOCK
14 T = 25°C
A
RES = LOG 2 (VREF/NOISERMS)
12
V = 5V, V
= 2.5V
CC
10
30
Figure 24. Resolution (INLMAX ≤ 1LSB)
vs Output Data Rate and Temperature
RESOLUTION (BITS)
16
OFFSET ERROR (ppm OF VREF)
20
RESOLUTION (BITS)
RESOLUTION (BITS)
Typical measured performance curves for output data rates
up to 25 readings per second are shown in Figures 20 to
27. In order to obtain the highest possible level of accuracy
from this converter at output data rates above 20 readings
per second, the user is advised to maximize the power
supply voltage used and to limit the maximum ambient
operating temperature. In certain circumstances, a reduction of the differential reference voltage may be beneficial.
22
24
10
mance for any value of fEOSC. If small external input and/
or reference capacitors (CIN, CREF) are used, the effect of
the external source resistance upon the LTC2480 typical
performance can be inferred from Figures 13, 14, 15 and
16 in which the horizontal axis is scaled by 307200/fEOSC.
REF
VCC = VREF = 5V
0
20
10
OUTPUT DATA RATE (READINGS/SEC)
30
2480 F26
Figure 26. Resolution (NoiseRMS ≤ 1LSB)
vs Output Data Rate and Reference Voltage
18
16 VIN(CM) = VREF(CM)
VIN = 0V
REF– = GND
14 fO = EXT CLOCK
TA = 25°C
RES = LOG 2 (VREF/INLMAX)
12
VCC = 5V, VREF = 2.5V
VCC = VREF = 5V
10
0
10
20
OUTPUT DATA RATE (READINGS/SEC)
30
2480 F27
Figure 27. Resolution (INLMAX ≤ 1LSB)
vs Output Data Rate and Reference Voltage
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LTC2480
APPLICATIONS INFORMATION
Input Bandwidth
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled
very accurately by a first order filter with the pole located
at the 3dB frequency. When the internal oscillator is used,
the shape of the LTC2480 input bandwidth is shown in
Figure 28. When an external oscillator of frequency fEOSC
is used, the shape of the LTC2480 input bandwidth can
be derived from Figure 28, 60Hz mode curve in which the
horizontal axis is scaled by fEOSC/307200.
The conversion noise (600nVRMS typical for VREF = 5V)
can be modeled by a white noise source connected to a
noise free converter. The noise spectral density is 47nV√Hz
for an infinite bandwidth source and 64nV√Hz for a single
0.5MHz pole source. From these numbers, it is clear that
particular attention must be given to the design of external
amplification circuits. Such circuits face the simultaneous
requirements of very low bandwidth (just a few Hz) in
order to reduce the output referred noise and relatively
high bandwidth (at least 500kHz) necessary to drive the
input switched-capacitor network. A possible solution is
a high gain, low bandwidth amplifier stage followed by a
high bandwidth unity-gain buffer.
When external amplifiers are driving the LTC2480, the
ADC input referred system noise calculation can be
simplified by Figure 29. The noise of an amplifier driving
the LTC2480 input pin can be modeled as a band limited
white noise source. Its bandwidth can be approximated
by the bandwidth of a single pole lowpass filter with a
corner frequency fi. The amplifier noise spectral density
is ni. From Figure 29, using fi as the x-axis selector, we
–1
50Hz AND
60Hz MODE
–2
50Hz MODE
–3
60Hz MODE
–4
–5
–6
1
3
4
0
5
2
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
2480 F28
Figure 28. Input Signal Bandwidth Using the Internal Oscillator
100
INPUT REFERRED NOISE
EQUIVALENT BANDWIDTH (Hz)
The combined effect of the internal SINC4 digital filter and
of the analog and digital autocalibration circuits determines
the LTC2480 input bandwidth. When the internal oscillator
is used with the notch set at 60Hz, the 3dB input bandwidth
is 3.63Hz. When the internal oscillator is used with the
notch set at 50Hz, the 3dB input bandwidth is 3.02Hz.
If an external conversion clock generator of frequency
fEOSC is connected to the fO pin, the 3dB input bandwidth
is 11.8 • 10–6 • fEOSC.
INPUT SIGNAL ATTENUATION (dB)
0
10
60Hz MODE
50Hz MODE
1
0.1
0.1
1
10 100 1k
10k 100k 1M
INPUT NOISE SOURCE SINGLE POLE
EQUIVALENT BANDWIDTH (Hz) 2480 F29
Figure 29. Input Referred Noise Equivalent Bandwidth
of an Input Connected White Noise Source
can find on the y-axis the noise equivalent bandwidth freqi
of the input driving amplifier. This bandwidth includes
the band limiting effects of the ADC internal calibration
and filtering. The noise of the driving amplifier referred
to the converter input and including all these effects can
be calculated as N = ni • √freqi. The total system noise
(referred to the LTC2480 input) can now be obtained by
summing as square root of sum of squares the three ADC
input referred noise sources: the LTC2480 internal noise,
the noise of the IN+ driving amplifier and the noise of the
IN– driving amplifier.
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APPLICATIONS INFORMATION
If the fO pin is driven by an external oscillator of frequency
fEOSC, Figure 29 can still be used for noise calculation if
the x-axis is scaled by fEOSC/307200. For large values of
the ratio fEOSC/307200, the Figure 29 plot accuracy begins
to decrease, but at the same time the LTC2480 noise floor
rises and the noise contribution of the driving amplifiers
lose significance.
Normal Mode Rejection and Anti-aliasing
The SINC4 digital filter provides greater than 120dB normal
mode rejection at all frequencies except DC and integer
multiples of the modulator sampling frequency (fS). The
LTC2480’s autocalibration circuits further simplify the
anti-aliasing requirements by additional normal mode
signal filtering both in the analog and digital domain.
Independent of the operating mode, fS = 256 • fN = 2048
• fOUT(MAX) where fN is the notch frequency and fOUT(MAX)
is the maximum output data rate. In the internal oscillator mode with a 50Hz notch setting, fS = 12800Hz, with
50Hz/60Hz rejection, fS = 13960Hz and with a 60Hz notch
setting fS = 15360Hz. In the external oscillator mode, fS =
0
0
–10
–10
INPUT NORMAL MODE REJECTION (dB)
INPUT NORMAL MODE REJECTION (dB)
One of the advantages delta-sigma ADCs offer over
conventional ADCs is on-chip digital filtering. Combined
with a large oversampling ratio, the LTC2480 significantly
simplifies anti-aliasing filter requirements. Additionally,
the input current cancellation feature of the LTC2480 al-
lows external lowpass filtering without degrading the DC
performance of the device.
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0 fS 2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS 10fS11fS12fS
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
2480 F30
INPUT NORMAL MODE REJECTION (dB)
0
fN = fEOSC/5120
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
fN
2fN 3fN 4fN 5fN 6fN 7fN
INPUT SIGNAL FREQUENCY (Hz)
8fN
2480 F31
Figure 31. Input Normal Mode Rejection, Internal
Oscillator and 60Hz Notch Mode or External Oscillator
0
INPUT NORMAL MODE REJECTION (dB)
Figure 30. Input Normal Mode Rejection,
Internal Oscillator and 50Hz Notch Mode
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
250fN 252fN 254fN 256fN 258fN 260fN 262fN
INPUT SIGNAL FREQUENCY (Hz)
2480 F32
Figure 32. Input Normal Mode Rejection at DC
0 fS 2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS 10fS
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
2480 F33
Figure 33. Input Normal Mode Rejection at fS = 256fN
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LTC2480
APPLICATIONS INFORMATION
fEOSC/20. The performance of the normal mode rejection
is shown in Figures 30 and 31.
the LTC2480 for the 50Hz rejection mode and 50Hz/60Hz
rejection mode are shown in Figures 35 and 36.
In 1x speed mode, the regions of low rejection occurring
at integer multiples of fS have a very narrow bandwidth.
Magnified details of the normal mode rejection curves
are shown in Figure 32 (rejection near DC) and Figure 33
(rejection at fS = 256fN) where fN represents the notch
frequency. These curves have been derived for the external oscillator mode but they can be used in all operating
modes by appropriately selecting the fN value.
As a result of these remarkable normal mode specifications, minimal (if any) anti-alias filtering is required in front
of the LTC2480. If passive RC components are placed in
front of the LTC2480, the input dynamic current should
be considered (see Input Current section). In this case,
the differential input current cancellation feature of the
LTC2480 allows external RC networks without significant
degradation in DC performance.
The user can expect to achieve this level of performance
using the internal oscillator as it is demonstrated by
Figures 34, 35 and 36. Typical measured values of the
normal mode rejection of the LTC2480 operating with an
internal oscillator and a 60Hz notch setting are shown in
Figure 34 superimposed over the theoretical calculated
curve. Similarly, the measured normal mode rejection of
Traditional high order delta-sigma modulators, while providing very good linearity and resolution, suffer from potential instabilities at large input signal levels. The proprietary
architecture used for the LTC2480 third order modulator
resolves this problem and guarantees a predictable stable
behavior at input signal levels of up to 150% of full-scale.
In many industrial applications, it is not uncommon to have
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
VIN(P-P) = 5V
TA = 25°C
MEASURED DATA
CALCULATED DATA
–20
–40
–60
–80
–100
–120
0
15
30
45
60
75
0
NORMAL MODE REJECTION (dB)
NORMAL MODE REJECTION (dB)
0
–40
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
VIN(P-P) = 5V
TA = 25°C
–60
–80
–100
–120
90 105 120 135 150 165 180 195 210 225 240
INPUT FREQUENCY (Hz)
MEASURED DATA
CALCULATED DATA
–20
0
12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5 200
INPUT FREQUENCY (Hz)
2480 F35
2480 F34
Figure 35. Input Normal Mode Rejection vs Input Frequency
with Input Perturbation of 100% Full-Scale (50Hz Notch)
Figure 34. Input Normal Mode Rejection vs Input Frequency
with Input Perturbation of 100% Full-Scale (60Hz Notch)
MEASURED DATA
CALCULATED DATA
–20
–40
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
VIN(P-P) = 5V
TA = 25°C
–60
–80
–100
–120
0
20
40
60
80
100
120
140
INPUT FREQUENCY (Hz)
160
180
200
220
2480 F36
Figure 36. Input Normal Mode Rejection vs Input Frequency
with Input Perturbation of 100% Full-Scale (50Hz/60Hz Mode)
0
NORMAL MODE REJECTION (dB)
NORMAL MODE REJECTION (dB)
0
VIN(P-P) = 5V
VIN(P-P) = 7.5V
(150% OF FULL SCALE)
–20
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
TA = 25°C
–40
–60
–80
–100
–120
0
15
30
45
60
75
90 105 120 135 150 165 180 195 210 225 240
INPUT FREQUENCY (Hz)
Figure 37. Measured Input Normal Mode Rejection
vs Input Frequency with Input Perturbation of 150%
Full-Scale (60Hz Notch)
2480 F37
2480fe
36
For more information www.linear.com/LTC2480
LTC2480
APPLICATIONS INFORMATION
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
TA = 25°C
VIN(P-P) = 5V
VIN(P-P) = 7.5V
(150% OF FULL SCALE)
–20
–40
–60
–80
–20
–40
–60
–80
–100
–100
–120
0
INPUT NORMAL REJECTION (dB)
NORMAL MODE REJECTION (dB)
0
12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5 200
INPUT FREQUENCY (Hz)
0
–120
0
fN
2fN 3fN 4fN 5fN 6fN 7fN
INPUT SIGNAL FREQUENCY (fN)
2480 F39
2480 F38
Figure 39. Input Normal Mode
Rejection 2x Speed Mode
–20
–20
–40
–60
–80
–100
MEASURED DATA
VCC = 5V
CALCULATED DATA VREF = 5V
VINCM = 2.5V
VIN(P-P) = 5V
fO = GND
TA = 25°C
–40
–60
–80
–100
–120
248 250 252 254 256 258 260 262 264
INPUT SIGNAL FREQUENCY (fN)
–120
0
25
50 75 100 125 150 175 200 225
INPUT FREQUENCY (Hz)
2480 F48
Figure 40. Input Normal Mode
Rejection 2x Speed Mode
2480 F41
Figure 41. Input Normal Mode
Rejection vs Input Frequency,
2x Speed Mode and 50Hz/60Hz Mode
to measure microvolt level signals superimposed over volt
level perturbations and the LTC2480 is eminently suited
for such tasks. When the perturbation is differential, the
specification of interest is the normal mode rejection for
large input signal levels. With a reference voltage VREF = 5V,
the LTC2480 has a full-scale differential input range of
5V peak-to-peak. Figures 37 and 38 show measurement
results for the LTC2480 normal mode rejection ratio with a
7.5V peak-to-peak (150% of full-scale) input signal superimposed over the more traditional normal mode rejection
ratio results obtained with a 5V peak-to-peak (full-scale)
input signal. In Figure 37, the LTC2480 uses the internal
oscillator with the notch set at 60Hz (fO = LOW) and in
Figure 38 it uses the internal oscillator with the notch set
at 50Hz. It is clear that the LTC2480 rejection performance
is maintained with no compromises in this extreme situation. When operating with large input signal levels, the
–70
NORMAL MODE REJECTION (dB)
0
NORMAL MODE REJECTION (dB)
INPUT NORMAL REJECTION (dB)
Figure 38. Measured Input Normal Mode Rejection
vs Input Frequency with Input Perturbation of 150%
Full-Scale (50Hz Notch)
0
8fN
–80
NO AVERAGE
–90
–100
–110
WITH
RUNNING
AVERAGE
–120
–130
–140
60
62
54 56
58
48 50
52
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
2480 F42
Figure 42. Input Normal Mode
Rejection 2x Speed Mode
user must observe that such signals do not violate the
device absolute maximum ratings.
Using the 2x speed mode of the LTC2480, the device
bypasses the digital offset calibration operation to double
the output data rate. The superior normal mode rejection
is maintained as shown in Figures 30 and 31. However,
the magnified details near DC and fS = 256fN are different,
see Figures 39 and 40. In 2x speed mode, the bandwidth is
11.4Hz for the 50Hz rejection mode, 13.6Hz for the 60Hz
rejection mode and 12.4Hz for the 50Hz/60Hz rejection
mode. Typical measured values of the normal mode rejection of the LTC2480 operating with the internal oscillator
and 2x speed mode is shown in Figure 41.
When the LTC2480 is configured in 2x speed mode, by
performing a running average, a SINC1 notch is combined
with the SINC4 digital filter, yielding the normal mode
2480fe
For more information www.linear.com/LTC2480
37
LTC2480
APPLICATIONS INFORMATION
rejection identical as that for the 1x speed mode. The
averaging operation still keeps the output rate with the
following algorithm:
Result 1 = average (sample 0, sample 1)
Result 2 = average (sample 1, sample 2)
……
Result n = average (sample n – 1, sample n)
The main advantage of the running average is that it
achieves simultaneous 50Hz/60Hz rejection at twice the
effective output rate, as shown in Figure 42. The raw output
data provides a better than 70dB rejection over 48Hz to
62.4Hz, which covers both 50Hz ±2% and 60Hz ±2%. With
running average on, the rejection is better than 87dB for
both 50Hz ±2% and 60Hz ±2%.
Complete Thermocouple Measurement System with
Cold Junction Compensation
The LTC2480 is ideal for direct digitization of thermocouples and other low voltage output sensors. The input
has a typical offset error of 500nV (2.5µV max) offset
drift of 10nV/°C and a noise level of 600nVRMS. The input
span may be optimized for various sensors by setting the
gain of the PGA. Using an external 5V reference with a
PGA gain of 64 gives a ±78mV input range—perfect for
thermocouples.
Figure 44 (last page of this data sheet) is a complete type
K thermocouple meter. The only signal conditioning is a
simple surge protection network. In any thermocouple
meter, the cold junction temperature sensor must be at
the same temperature as the junction between the thermocouple materials and the copper printed circuit board
traces. The tiny LTC2480 can be tucked neatly underneath
an Omega MPJ-K-F thermocouple socket ensuring close
thermal coupling.
The LTC2480’s 1.4mV/°C PTAT circuit measures the
cold junction temperature. Once the thermocouple voltage and cold junction temperature are known, there are
many ways of calculating the thermocouple temperature
including a straight-line approximation, lookup tables or
a polynomial curve fit. Calibration is performed by applying an accurate 500mV to the ADC input derived from an
LT®1236 reference and measuring the local temperature
with an accurate thermometer as shown in Figure 43. In
calibration mode, the up and down buttons are used to
adjust the local temperature reading until it matches an
accurate thermometer. Both the voltage and temperature
calibration are easily automated.
The complete microcontroller code for this application is
available on the LTC2480 product Web page at:
http://www.linear.com
It can be used as a template for may different instruments
and it illustrates how to generate calibration coefficients
for the onboard temperature sensor. Extensive comments
detail the operation of the program. The read_LTC2480()
function controls the operation of the LTC2480 and is
listed below for reference.
5V
ISOTHERMAL
2
+
G1
NC1M4V0
LT1236
IN OUT
TRIM
GND
4
6
5
R2
2k
R7
8k
R8
1k
C8
1µF
4
5
IN+
IN–
3
2
REF
VCC
CS
SCK
LTC2480 SDO
SDI
GND GND fO
8
TYPE K
THERMOCOUPLE
JACK
(OMEGA MPJ-K-F)
C7
0.1µF
6
9
7
1
10
11
2480 F43
26.3C
Figure 43. Calibration Setup
2480fe
38
For more information www.linear.com/LTC2480
LTC2480
APPLICATIONS INFORMATION
/*** read_LTC2480() ************************************************************
This is the function that actually does all the work of talking to the LTC2480.
The spi_read() function performs an 8 bit bidirectional transfer on the SPI bus.
Data changes state on falling clock edges and is valid on rising edges, as
determined by the setup_spi() line in the initialize() function.
A good starting point when porting to other processors is to write your own
spi_write function. Note that each processor has its own way of configuring
the SPI port, and different compilers may or may not have built-in functions
for the SPI port. Also, since the state of the LTC2480’s SDO line indicates
when a conversion is complete you need to be able to read the state of this line
through the processor’s serial data input. Most processors will let you read
this pin as if it were a general purpose I/O line, but there may be some that
don’t.
When in doubt, you can always write a “bit bang” function for troubleshooting
purposes.
The “fourbytes” structure allows byte access to the 32 bit return value:
struct fourbytes
{
int8 te0;
int8 te1;
int8 te2;
int8 te3;
};
//
//
//
//
//
//
Define structure of four consecutive bytes
To allow byte access to a 32 bit int or float.
The make32() function in this compiler will
also work, but a union of 4 bytes and a 32 bit int
is probably more portable.
Also note that the lower 4 bits are the configuration word from the previous
conversion. The 4 LSBs are cleared so that
they don’t affect any subsequent mathematical operations. While you can do a
right shift by 4, there is no point if you are going to convert to floating point
numbers - just adjust your scaling constants appropriately.
*******************************************************************************/
signed int32 read_LTC2480(char config)
{
union
// adc_code.bits32
all 32 bits
{
// adc_code.by.te0
byte 0
signed int32 bits32;
// adc_code.by.te1
byte 1
struct fourbytes by;
// adc_code.by.te2
byte 2
} adc_code;
// adc_code.by.te3
byte 3
output_low(CS);
while(input(PIN_C4)) {}
// Enable LTC2480 SPI interface
// Wait for end of conversion. The longest
// you will ever wait is one whole conversion period
// Now is the time to switch any multiplexers because the conversion is finished
// and you have the whole data output time for things to settle.
adc_code.by.te3
adc_code.by.te2
adc_code.by.te1
adc_code.by.te0
=
=
=
=
0;
spi_read(config);
spi_read(0);
spi_read(0);
output_high(CS);
// Set upper byte to zero.
// Read first byte, send config byte
// Read 2nd byte, send speed bit
// Read 3rd byte. ‘0’ argument is necessary
// to act as SPI master!! (compiler
// and processor specific.)
// Disable LTC2480 SPI interface
// Clear configuration bits and subtract offset. This results in
// a 2’s complement 32 bit integer with the LTC2480’s MSB in the 2^20 position
adc_code.by.te0 = adc_code.by.te0 & 0xF0;
adc_code.bits32 = adc_code.bits32 - 0x00200000;
return adc_code.bits32;
} // End of read_LTC2480()
2480fe
For more information www.linear.com/LTC2480
39
LTC2480
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
R = 0.125
TYP
0.40 ± 0.10
6
10
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
PACKAGE
TOP MARK
OUTLINE (SEE NOTE 6)
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50
BSC
2.38 ±0.05
(2 SIDES)
5
0.00 – 0.05
1
(DD) DFN REV C 0310
0.25 ± 0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
2. DRAWING NOT TO SCALE
5. EXPOSED PAD SHALL BE SOLDER PLATED
3. ALL DIMENSIONS ARE IN MILLIMETERS
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev F)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.50
0.305 ±0.038
(.0197)
(.0120 ±.0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0.497 ±0.076
(.0196 ±.003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS) 0213 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
2. DRAWING NOT TO SCALE
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
2480fe
40
For more information www.linear.com/LTC2480
LTC2480
REVISION HISTORY
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
11/09
Revised Tables 3 and 4.
17
C
04/10
Added H-Grade to Absolute Maximum Ratings, Order Information, Electrical Characteristics (Normal Speed),
Electrical Characteristics (2x Speed), Converter Characteristics, Power Requirements, and Timing Characteristics.
2-5
D
07/10
Revised Typical Application drawing
1
4, 6
Added Note 16
E
06/14
Clarify temperature sensor performance
Clarify performance vs fO frequency, reduce external oscillator max frequency to 1MHz
Corrected quantization noise equation to VREF/217
1, 3
5, 32, 33
20
2480fe
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC2480
41
LTC2480
TYPICAL APPLICATION
5V
C8
1µF
PIC16F73
C7
0.1µF
18
17
16
15
14
13
12
11
28
27
26
25
24
23
22
21
7
6
5
4
3
2
ISOTHERMAL
R2
2k
4
IN+
–
TYPE K
THERMOCOUPLE
JACK
(OMEGA MPJ-K-F)
5
IN
3
2
REF
VCC
CS
SCK
LTC2480 SDO
SDI
GND GND fO
8
6
9
7
1
10
11
5V
D7
D6
2 × 16 CHARACTER
D5
LCD DISPLAY
D4
(OPTREX DMC162488
EN
OR SIMILAR)
RW
CONTRAST
GND D0 D1 D2 D3 RS
VCC
5V
1
R6
5k
2
3
5V
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
RA5
RA4
RA3
RA2
RA1
RA0
VDD
OSC1
OSC2
MCLR
20
C6
0.1µF
9
5V
Y1
6MHz
10
R1
1 10k
D1
BAT54
5V
9
VSS
19
VSS
2480 F44
CALIBRATE
2
1
R3
10k
DOWN
R4
10k
R5
10k
UP
Figure 44. Complete Type K Thermocouple Meter
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1050
Precision Chopper Stabilized Op Amp
No External Components 5µV Offset, 1.6µVP-P Noise
LT1236A-5
Precision Bandgap Reference, 5V
0.05% Max Initial Accuracy, 5ppm/°C Drift
LT1460
Micropower Series Reference
0.075% Max Initial Accuracy, 10ppm/°C Max Drift
LTC2400
24-Bit, No Latency ∆Σ ADC in SO-8
0.3ppm Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200µA
LTC2401/LTC2402
1-/2-Channel, 24-Bit, No Latency ∆Σ ADCs in MSOP
0.6ppm Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200µA
LTC2404/LTC2408
4-/8-Channel, 24-Bit, No Latency ∆Σ ADCs
with Differential Inputs
0.3ppm Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200µA
LTC2410
24-Bit, No Latency ∆Σ ADC with Differential Inputs
0.8µVRMS Noise, 2ppm INL
LTC2411/LTC2411-1 24-Bit, No Latency ∆Σ ADCs with Differential Inputs in MSOP 1.45µVRMS Noise, 4ppm INL,
Simultaneous 50Hz/60Hz Rejection (LTC2411-1)
LTC2413
24-Bit, No Latency ∆Σ ADC with Differential Inputs
Simultaneous 50Hz/60Hz Rejection, 800nVRMS Noise
LTC2415/LTC2415-1 24-Bit, No Latency ∆Σ ADCs with 15Hz Output Rate
Pin-Compatible with the LTC2410
LTC2414/LTC2418
8-/16-Channel 24-Bit, No Latency ∆Σ ADCs
0.2ppm Noise, 2ppm INL, 3ppm Total Unadjusted Errors 200µA
LTC2420
20-Bit, No Latency ∆Σ ADC in SO-8
1.2ppm Noise, 8ppm INL, Pin-Compatible with LTC2400
LTC2430/LTC2431
20-Bit, No Latency ∆Σ ADCs with Differential Inputs
2.8µV Noise, SSOP-16/MSOP Package
LTC2435/LTC2435-1 20-Bit, No Latency ∆Σ ADCs with 15Hz Output Rate
3ppm INL, Simultaneous 50Hz/60Hz Rejection
LTC2440
High Speed, Low Noise 24-Bit ∆Σ ADC
3.5kHz Output Rate, 200nV Noise, 24.6 ENOBs
LTC2482
16-Bit ∆Σ ADC with Easy Drive Inputs
Pin-Compatible with LTC2480/LTC2484
LTC2484
24-Bit ∆Σ ADC with Easy Drive Inputs
Pin-Compatible with LTC2480/LTC2482
2480fe
42
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC2480
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC2480
LT 0614 REV E • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2005
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