LTC2960ITS8-1#TRMPBF

LTC2960 36V Nano-Current Two-Input Voltage Monitor Description Features n n n n n n n n 850nA Quiescent Current Operating Range: 2.5V < VCC < 36V 1.5% (Max) Accuracy Over Temperature Adjustable Reset Threshold Wide Temperature Range (–40°C to 125°C) Adjustable IN+/IN– Threshold Manual Reset Input Compact 2mm × 2mm 8-lead DFN and TSOT-23 (ThinSOT™) Packages Applications n n n n Portable Equipment Battery Powered Equipment Security Systems Automotive Systems LTC2960 Option Table Option LTC2960-1 LTC2960-2 LTC2960-3 LTC2960-4 Inputs ADJ/IN+ ADJ/IN– ADJ/IN+ ADJ/IN– Reset Timeout Period 15ms/200ms 15ms/200ms 200ms 200ms Output Type 36V Open-Drain 36V Open-Drain Active Pull-Up Active Pull-Up The LTC®2960 is a nano-current, high voltage two-input voltage monitor, ideally suited for multicell battery applications. External resistive dividers configure custom comparator thresholds. The supervisory circuit monitors the ADJ input and pulls the RST output low when the input drops below threshold. A reset timeout period delays the return of the RST output to a high state when the input rises above the threshold. The spare comparator allows voltage conditions to be detected with either a non-inverting input, IN+(LTC2960-1/LTC2960-3) or an inverting input, IN– (LTC2960-2/LTC2960-4). A manual reset (MR) input is provided for external activation of the reset output. Other options provided on the LTC2960-1/LTC2960-2 include a reset timeout period select pin, RT, to select between 15ms or 200ms reset timeout periods. The LTC2960-3/ LTC2960-4 have a fixed 200ms reset timeout period. The RST and OUT outputs are available with active pull-up circuits to an output logic supply pin (LTC2960-3/LTC2960-4) or 36V open-drain outputs (LTC2960-1/LTC2960-2). L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Battery and Regulator Monitor Supply Current vs Supply Voltage 1200 6V < VIN < 8.4V + R2 6.04M C1 0.1µF 50V Li-Ion 4.2V + GND R4 1.3M C2 1µF LTC2960-3 DVCC VCC R1 402k IN+ RST RESET MR OUT ADJ LOW BATTERY GND MR=5V, 27C 900 ICC (nA) Li-Ion 4.2V LTC3632 DC/DC VOUT 1.8V 600 300 R3 402k 2960 TA01 POWER-FAIL FALLING THRESHOLD = 6.410V RESET FALLING THRESHOLD = 1.693V 0 0 8 16 24 VCC (V) 32 40 2960 TA01a 2960fa For more information www.linear.com/LTC2960 1 LTC2960 Absolute Maximum Ratings (Notes 1 & 2) Input Voltages VCC , RT, MR........................................... –0.3V to 40V DVCC......................................................... –0.3V to 6V ADJ, IN+, IN–.......................................... –0.3V to 3.5V Output Voltages (LTC2960-1/LTC2960-2) RST, OUT................................................ –0.3V to 40V Output Voltages (LTC2960-3/LTC2960-4) RST, OUT (DVCC ≥ 1.6V).......... –0.3V to (DVCC + 0.3V) RST, OUT (DVCC = GND)........................ –0.3V to 6.3V Average Currents RST, OUT............................................................±5mA Operating Ambient Temperature Range LTC2960C................................................. 0°C to 70°C LTC2960I..............................................–40°C to 85°C LTC2960H........................................... –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) TSOT-23 Package.............................................. 300°C Pin Configuration TOP VIEW 8 IN+/IN– VCC 1 RT/DVCC 2 RST 3 9 OUT 4 TOP VIEW IN+/IN– ADJ MR GND 7 ADJ 6 MR 5 GND DC8 PACKAGE 8-LEAD (2mm × 2mm) PLASTIC DFN 1 2 3 4 8 7 6 5 VCC RT/DVCC RST OUT TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150°C, qJA = 195°C/W TJMAX = 150°C, qJA = 80.6°C/W EXPOSED PAD (PIN 9) PCB GND CONNECTION OPTIONAL Order Information Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2960CDC-1#TRMPBF LTC2960CDC-1#TRPBF LFZZ 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C LTC2960IDC-1#TRMPBF LTC2960IDC-1#TRPBF LFZZ 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C LTC2960HDC-1#TRMPBF LTC2960HDC-1#TRPBF LFZZ 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC2960CDC-2#TRMPBF LTC2960CDC-2#TRPBF LGBC 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C LTC2960IDC-2#TRMPBF LTC2960IDC-2#TRPBF LGBC 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C LTC2960HDC-2#TRMPBF LTC2960HDC-2#TRPBF LGBC 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC2960CDC-3#TRMPBF LTC2960CDC-3#TRPBF LFSF 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C LTC2960IDC-3#TRMPBF LTC2960IDC-3#TRPBF LFSF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C LTC2960HDC-3#TRMPBF LTC2960HDC-3#TRPBF LFSF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC2960CDC-4#TRMPBF LTC2960CDC-4#TRPBF LGBF 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C LTC2960IDC-4#TRMPBF LTC2960IDC-4#TRPBF LGBF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C LTC2960HDC-4#TRMPBF LTC2960HDC-4#TRPBF LGBF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C 2 2960fa For more information www.linear.com/LTC2960 LTC2960 Order Information Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2960CTS8-1#TRMPBF LTC2960CTS8-1#TRPBF LTFZY 8-Lead Plastic TSOT-23 0°C to 70°C LTC2960ITS8-1#TRMPBF LTFZY 8-Lead Plastic TSOT-23 –40°C to 85°C LTC2960HTS8-1#TRMPBF LTC2960HTS8-1#TRPBF LTFZY 8-Lead Plastic TSOT-23 –40°C to 125°C LTC2960CTS8-2#TRMPBF LTC2960CTS8-2#TRPBF LTGBB 8-Lead Plastic TSOT-23 0°C to 70°C LTC2960ITS8-2#TRMPBF LTGBB 8-Lead Plastic TSOT-23 –40°C to 85°C LTC2960HTS8-2#TRMPBF LTC2960HTS8-2#TRPBF LTGBB 8-Lead Plastic TSOT-23 –40°C to 125°C LTC2960CTS8-3#TRMPBF LTC2960CTS8-3#TRPBF LTFSD 8-Lead Plastic TSOT-23 0°C to 70°C LTC2960ITS8-3#TRMPBF LTC2960ITS8-1#TRPBF LTC2960ITS8-2#TRPBF LTFSD 8-Lead Plastic TSOT-23 –40°C to 85°C LTC2960HTS8-3#TRMPBF LTC2960HTS8-3#TRPBF LTC2960ITS8-3#TRPBF LTFSD 8-Lead Plastic TSOT-23 –40°C to 125°C LTC2960CTS8-4#TRMPBF LTC2960CTS8-4#TRPBF LTGBD 8-Lead Plastic TSOT-23 0°C to 70°C LTC2960ITS8-4#TRMPBF LTGBD 8-Lead Plastic TSOT-23 –40°C to 85°C LTGBD 8-Lead Plastic TSOT-23 –40°C to 125°C LTC2960ITS8-4#TRPBF LTC2960HTS8-4#TRMPBF LTC2960HTS8-4#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Electrical Characteristics The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VCC = 7V, DVCC = 3.3V unless otherwise noted (Note 2). SYMBOL PARAMETER VCC VCC Input Supply Operating Range VUVLO VCC Undervoltage Lockout VCC Undervoltage Lockout Hysteresis ICC VCC Input Supply Current DVCC DVCC Input Supply Operating Range IDVCC DVCC Input Current CONDITIONS MIN l 2.5 VCC Rising l 1.85 MR = 5V, VCC = 36V, –40°C ≤ TA ≤ 85°C MR = 5V, VCC = 36V, –40°C ≤ TA ≤ 125°C l l 400 400 l 1.6 RST = OUT = LOW DVCC = 5.5V l Monitored Voltage Falling Monitored Voltage Rising l l TYP 100 850 850 MAX UNITS 36 V 2.3 V mV 1250 2000 nA nA 5.5 V ±50 nA 400 400 406 406 mV mV THRESHOLD ADJUSTMENT INPUTS: ADJ, IN+/IN– VTH ADJ/IN+ Input Threshold IN– Input Threshold VTHM ADJ to IN+/IN– Threshold Matching ±2 ±6 mV VRHYS ADJ Threshold Hysteresis Monitored Voltage Rising l 8 10 15 mV V+ IN+ Threshold Hysteresis Monitored Voltage Rising l 18 20 25 mV IN– Threshold Hysteresis Monitored Voltage Falling l 18 20 25 mV tUV Under Voltage Detect to RST, OUT Falling V = VTH – 40mV l 80 170 500 µs ITH(LKG) Input Leakage Current V = 420mV, –40°C ≤ TA ≤ 85°C V = 420mV, –40°C ≤ TA ≤ 125°C l l ±0.1 ±0.1 ±1 ±10 nA nA HYS – V HYS 394 394 l 2960fa For more information www.linear.com/LTC2960 3 LTC2960 Electrical Characteristics The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VCC = 7V, DVCC = 3.3V unless otherwise noted (Note 2). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CONTROL INPUTS: MR, RT VRT Control Input Threshold RT l 0.4 1.4 VMR Control Input Threshold MR l 0.4 1.4 tPW MR Minimum Detectable Pulse Width l 20 tPD Propagation Delay to RST Falling Manual Reset Falling l 1 VMR Manual Reset Open Voltage MR Open, MR Load = 100nA l 2.6 IMR Manual Reset Low Current MR = 400mV, VCC ≥ 2.5V l –0.35 ILK Input Leakage Current RT = 15V MR = 15V l l V V µs 7 –1 20 µs 4 V –3 µA ±100 ±100 nA nA 100 400 mV mV STATUS OUTPUTS: RST, OUT VOL Voltage Output Low VCC = 1.2V, I = 10µA (LTC2960-1/LTC2960-3) VCC = 3V, I = 500µA l l VOH Voltage Output High I = –100µA (LTC2960-3/LTC2960-4) l IOH Leakage Current, Output High V = 5.5V V = 15V (LTC2960-1/LTC2960-2) V = 5.5V, DVCC = GND l l l ISC Output Short-Circuit Current RST = GND DVCC = 6V (LTC2960-3/ LTC2960-4) OUT = GND DVCC = 6V (LTC2960-3/ LTC2960-4) l l 0.8 0.8 tRST Reset Timeout Period LTC2960-3/LTC2960-4 RT Input High RT Input Low l l l 140 140 10 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. 25 100 0.7•DVCC V 200 200 15 ±50 ±100 ±50 nA nA nA 3 3 mA mA 280 280 25 ms ms ms Note 2. All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. Typical Performance Characteristics Supply Current vs Supply Voltage MR Current vs MR Voltage 1500 1.2 1.0 27°C –45°C 300 0.6 0.4 0 8 16 24 VCC(V) 32 40 0 1.5 1.0 VCC = 2.5V 0.5 0.2 2960 G01 4 0.8 VCC = 7V 2.0 VCC = 2.5V MR CURRENT (µA) MR CURRENT (µA) ICC (nA) 90°C 900 600 2.5 VCC = 7V 125°C 1200 0 Supply Current vs MR Voltage 0 1 2 3 MR VOLTAGE (V) 4 5 2960 G02 0 0 1 2 3 MR VOLTAGE (V) 4 5 2960 G03 2960fa For more information www.linear.com/LTC2960 LTC2960 Typical Performance Characteristics Normalized Reset Timeout Period vs Temperature 1.9 1.4 MR INPUT THRESHOLD 27°C 0.9 3.0 3.5 4.0 VCC (V) 4.5 4.0 VCC = 7V ADJ/IN+/IN– VCC = 7V 1.2 1.1 1.0 0.9 3.0 2.0 1.0 0.8 0.7 –50 5.0 –25 0 25 50 75 TEMPERATURE (°C) 100 2960 G04 0.0 0.1 125 1 10 COMPARATOR OVERDRIVE (%) 2960 G05 ADJ, IN+, IN– Threshold vs Temperature 2960 G06 3.5 V+ 410 400 HYS 3.0 VRHYS 2.5 VTH 2.0 VOH (V) 420 390 125°C 90°C 27°C –45°C 1.5 1.0 V–HYS 380 0.5 370 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 0 125 VCC =7V DVCC =3.3V –0.2 –0.4 –0.6 PULL-DOWN CURRENT(mA) 0 –0.8 2960 G07 2960 G08 Voltage Output HIGH vs Pull-Down Current (RST/OUT) Voltage Output LOW vs Pull-Up Current (RST/OUT) 2.0 2.0 125°C 90°C 27°C –45°C 1.6 125°C 90°C 27°C –45°C 1.6 VOH (V) 1.2 0.8 1.2 0.8 0.4 0.4 0 100 Voltage Output HIGH vs Pull-Down Current (RST/OUT) 430 VTH (mV) 0.4 2.5 Comparator Overvoltage/ Undervoltage Glitch Immunity GLITCH DURATION (ms) MR OPEN VOLTAGE 27°C NORMALIZED RESET TIME PERIOD 1.3 2.4 VOL (V) RISING THRESHOLD/OPEN VOLTAGE (V) MR Rising Threshold/Open Voltage vs VCC VCC =7V DVCC =3.3V 0 1 2 3 4 PULL-UP CURRENT (mA) 5 0 VCC =7V DVCC =1.6V 0 2960 G09 –20 –40 –60 PULL-DOWN CURRENT(µA) –80 2960 G08 2960fa For more information www.linear.com/LTC2960 5 LTC2960 Pin Functions ADJ: Reset Threshold Adjustment Input. Tie to resistive divider to configure desired reset threshold. DVCC: (LTC2960-3/LTC2960-4) Logic Supply Input. Used for setting the logic swing of the RST and OUT outputs. Useful for interfacing with logic voltages different from VCC. Bypass DVCC with 0.1µF to GND. Grounding DVCC allows OUT and RST to act as open drain outputs. Exposed Pad (DFN Only): Exposed pad may be left floating or connected to device ground. GND: Device ground. IN–: (LTC2960-2/LTC2960-4) IN– Threshold Adjustment Input. Tie to resistive divider to configure required threshold. Tie to GND if unused. IN+: (LTC2960-1/LTC2960-3) IN+ Threshold Adjustment Input. Tie to resistive divider to configure required threshold. Tie to GND if unused. MR: Manual Reset Input. Attach a push-button switch or logic signal between this input and ground. A logic low on this input pulls RST low. When the MR input returns to logic high, RST returns high after a reset timeout period has expired. Leave open if unused. 6 OUT: (LTC2960-1/LTC2960-3) Pulls low when monitored voltage falls below the IN+ threshold. Released when the IN+ voltage rises above its threshold by 5%. For the LTC2960-3, OUT is driven by DVCC when logic high. OUT is open drain if DVCC is grounded. Leave open if unused. (LTC2960-2/LTC2960-4) OUT pulls low when the monitored voltage rises above the IN– threshold. Released when monitored voltage falls below IN– threshold by 5%. For the LTC2960-4, OUT is driven to DVCC for a logic high. OUT is open drain if DVCC is grounded. Leave open if unused. RST: Reset Output. Pulls low when monitored voltage falls below the reset (ADJ) threshold. RST is released after monitored voltage exceeds the reset threshold plus 2.5% hysteresis and after reset timeout period has expired. For the LTC2960-3/LTC2960-4, RST is driven to DVCC for a logic high. RST is open drain if DVCC is grounded. Leave open if unused. RT: (LTC2960-1/LTC2960-2) Reset Timeout Period Selection Input. Tie to GND for 15ms delay. Tie to VCC for 200ms delay. VCC: Power Supply Input. When VCC falls below the falling UVLO threshold, the outputs are pulled low. If VCC falls below 1.2V the logic state of the outputs cannot be guaranteed. Bypass VCC with 0.1µF to GND. Use appropriate voltage rating for bypass capacitor. 2960fa For more information www.linear.com/LTC2960 LTC2960 Block Diagram VCC 400mV REFERENCE REGULATOR RT LTC2960-1/LTC2960-2 0.4V DVCC LTC2960-3/LTC2960-4 1µA MR RST ADJ – RESET DELAY + 0.4V LTC2960-2/LTC2960-4 OUT + IN+ (LTC2960-1/LTC2960-3) IN– (LTC2960-2/LTC2960-4) – LTC2960-1/LTC2960-3 GND 2960 BD Timing Diagram IN+/OUT TIMING VTH + V+HYS VTH VIN+ OUT IN–/OUT TIMING VTH VTH + V –HYS VIN– OUT ADJ/RST TIMING VTH + VRHYS VTH VADJ tRST tRST RST MR 2960 TD tPD 2960fa For more information www.linear.com/LTC2960 7 LTC2960 Applications Information VOLTAGE MONITORING THRESHOLD CONFIGURATION The LTC2960 is a voltage supervisor with a wide operating voltage range up to 36V with only 850nA quiescent current. The supervisor has two outputs, RST and OUT that provide voltage monitoring capabilities for system power-up, power-down and brown-out conditions. Built-in hysteresis and a reset timeout period ensure that fluctuations due to load transients or supply noise do not cause chattering of the status outputs. The LTC2960 can provide reset and voltage status signals to a microprocessor based system or can alternatively be used as an Under Voltage Lock Out (UVLO) for DC/DC switchers or LDOs for control over a battery operated system. The LTC2960 monitors voltage applied to its inputs IN+/IN– and ADJ. A resistive divider connected between a monitored voltage and ground is used to bias the inputs. Figure 1 demonstrates how the inputs can be made dependent upon a single voltage (V1). Only three resistors are required. To calculate their values, specify desired falling reset (VR) and IN+ (VIN+) thresholds with VIN+ > VR. For example: If the monitored voltage drops below the reset threshold, RST pulls low until the ADJ input rises above 0.4V plus 2.5% hysteresis. An internal reset timer delays the return of the RST output to a high state to provide monitored voltage settling and initialization time. The RST output is typically connected to a processor reset input. ADJ RST IN+ OUT If the monitored supply voltage falls to the IN+ (LTC2960-1/ LTC2960-3) threshold, the spare comparator pulls OUT low. OUT remains low until the IN+ input rises above 0.4V plus 5% hysteresis. OUT is typically used to signal preparation for controlled shutdown. For example, the OUT output may be connected to a processor nonmaskable interrupt (NMI). Upon interrupt, the processor begins shutdown procedures such as supply sequencing and/or storage/ erasure of system state in nonvolatile memory. If the monitored supply voltage rises to the IN– threshold (LTC2960-2/LTC2960-4), the spare comparator pulls OUT low. OUT remains low until the IN– falls below 0.4V minus 5% hysteresis. The LTC2960-2/LTC2960-4 operates as an undervoltage and overvoltage monitor. Few, if any, external components are necessary for reliable operation. However, a decoupling capacitor between VCC and ground is recommended (0.01µF minimum). Use a capacitor with a compatible voltage rating. VIN+ = 6.4V, VR = 6V V1 LTC2960-1/ LTC2960-3 R3 R2 R1 2960 F01 Figure 1. Configuration for Single Voltage Monitoring The solution for R1, R2 and R3 provides three equations and three unknowns. Maximum resistor size is governed by maximum input leakage current. For the LTC2960, the maximum input leakage current below 85°C is 1nA. For a maximum error of 1% due to both input currents, the resistor divider current should be at least 100 times the sum of the leakage currents, or 0.2µA. If the total divider resistance is chosen arbitrarily to be 8MΩ, such as in this example, then the current is 750nA at the reset threshold. This results in a leakage current error well below 1%. For RSUM = 8MΩ, then: RSUM = R1 + R2 + R3 Both the falling reset and IN+ thresholds are 0.4V, so: R1= VTH •RSUM = 0.4V • 8MΩ = 500k VIN + 6.4V The closest 1% value is 499k. R2 can be determined from: V •R 0.4V • 8MΩ R2 = TH SUM – R1= – 499k VR 6V R2 = 34.33k 8 2960fa For more information www.linear.com/LTC2960 LTC2960 Applications Information The closest 1% resistor value is 34k. R3 is easily obtained from: R3 = RSUM – R1 – R2 = 8M – 499k – 34k R3 = 7.467MΩ The closest 1% resistor value is 7.5MΩ. Plugging the standard values back into the equations yields the design values for the falling reset and IN+ voltages: to a user defined voltage up to 36V with a resistor. The open-drain pull-up voltage may be greater than VCC. Select a resistor compatible with desired output rise time and load current specifications. Figure 3 demonstrates typical LTC2960-1 OUT output behavior. When the status outputs are low, power is dissipated in the pull-up resistors. 7.5 VIN+ = 6.4V, VRST = 6.028V Figure 2 demonstrates how the inputs can be biased to monitor two voltages (V1, V2). In this example, four resistors are required. Calculate each divider ratio for the desired falling threshold (VFT) using: RnB = VFT – 1= VFT – 1 RnA VTH 0.4V In Figure 2, OUT is tied back to the MR input, making the state of the RST output dependent upon both V1 and V2. If V1 and V2 are both above the configured falling threshold plus hysteresis, RST is allowed to pull high. If independent operation of the status outputs is desired, simply omit the OUT and MR connection. V1 V2 R2B LTC2960-1/ LTC2960-3 R1B ADJ IN+ R2A R1A RST MR OUT 2960 F02 Figure 2. Dual Voltage Monitoring SELECTING OUTPUT LOGIC STYLE The LTC2960 status outputs are available in two options: open-drain (LTC2960-1/LTC2960-2) or active pull-up with the DVCC pin replacing the RT pin (LTC2960-3/LTC2960-4). The open-drain option allows the outputs to be pulled up OUT (V) 6 4.5 3 1.5 0 0 1.5 3 4.5 VCC (V) 6 7.5 2960 F03 Figure 3. OUT vs VCC (LTC2960-1) Externally Configured for 6V Threshold with RST Tied to VCC Through Pull-Up Resistor The outputs of both the LTC2960-3 and LTC2960-4 can be configured as either low voltage active pull-up or opendrain. This is done by tying the DVCC pin to either a supply or GND. Using the active pull-up configuration, DVCC tied to a supply, lowers power dissipation by eliminating the static current drawn by pull-up resistors when the outputs are low and improves output rise time. In Figure 4(a), an LTC2960-3 has active pull-up outputs configured by tying DVCC to a 1.6V to 5.5V supply. In Figure 4(b), the LTC2960-3 has open-drain outputs configured by tying the DVCC pin to ground. When DVCC is connected to ground both outputs are open-drain and pull-up resistors are required. Some applications require RST and/or OUT outputs to be valid with VCC down to ground when DVCC is tied to VCC. Active pull-up satisfies this requirement with the addition of an optional external resistor from the output to ground. The resistor provides a path for leakage currents, preventing the output from floating to undetermined voltages when connected to high impedance (such as CMOS logic inputs). The resistor value should be small enough to provide effective pull-down without excessively loading the 2960fa For more information www.linear.com/LTC2960 9 LTC2960 Applications Information pull-up circuitry. A 100k resistor from output to ground is satisfactory for most applications. When the status outputs are high, power is dissipated in the pull-down resistors. If VCC falls below the falling UVLO threshold, the outputs are pulled to ground. The outputs are guaranteed to stay low for VCC ≥ 1.2V regardless of the output logic configuration. When VCC < 1.2V, the active pull-up output behaves similarly to an open-drain output with a pull-up resistor. LTC2960-3 0.4V IN+ DVCC 1.6V TO 5.5V OUT + – and MR is a solution to this issue. The MR input can be pulled to 36V maximum and will not affect the internal circuitry. Input MR is often pulled down through the use of a pushbutton switch. SELECTING THE RESET TIMEOUT PERIOD Use the RT input (LTC2960-1/ LTC2960-2) to select between two fixed reset timeout periods. Connect RT to ground for a 15ms timeout. Connect RT to VCC for a 200ms timeout. The reset timeout period occurs after the ADJ input is driven above threshold and the MR input transitions above its logic threshold. After the reset timeout period, the RST output is allowed to pull up to a high state as shown in Figure 5. The RT input is replaced by the DVCC input in the LTC2960-3/LTC2960-4 options and the reset timeout period defaults to 200ms. ADJ (a). PUSH-PULL CONFIGURATION 15ms LTC2960-3 RST, RT = GND DVCC 6.3V MAX 200ms RST, RT = VCC 2960 F05 0.4V IN+ OUT + Figure 5. Selectable Reset Timeout Period – EXTERNAL HYSTERESIS (b). OPEN-DRAIN CONFIGURATION 2960 F04 Figure 4. LTC2960-3 (LTC2960-4) RST and OUT Outputs Are Configurable as Push-Pull or Open-Drain MANUAL RESET INPUT When ADJ is above its reset threshold and the manual reset input (MR) is pulled low, the RST output is forced low. RST remains low for the selected reset timeout period after the manual reset input is released and pulled high. The manual reset input is pulled up internally through a 1µA current source to an internal bias voltage (see Electrical Characteristics). If external leakage currents have the ability to pull down the manual reset input below its logic threshold, a pull-up resistor placed between VCC 10 The LTC2960 IN+ comparator hysteresis is 20mV (V+HYS), or 5% referred to VTH. Certain applications require more than the built-in native hysteresis. The application schematic in Figure 6 adds one additional resistor (R6) to a typical attenuator network. The procedure below is used to determine a value for R6 to provide an increase over the native hysteresis. In this example, it is desired to double the native hysteresis from 300mV to 600mV and achieve a falling threshold of 6V. Before including R6, the rising threshold (VR) is 6.293V while the falling threshold (VF) is 5.993V. The hysteresis referred to VA is calculated from:  R4  VHYST ( VA ) = VPHYS  1+  =20mV •15 = 300mV  R5  2960fa For more information www.linear.com/LTC2960 LTC2960 Applications Information VA The falling threshold can be restored to the original value by reducing the value of R5. Under the assumption that the addition of R6 has a negligible impact on the rising threshold, a new R4/R5 ratio can be calculated as shown: R4 VR 6.6V = – 1= – 1= 14.71 + 420mV R5 VTH + V HYS VB LTC2960-3 R4 681k DVCC IN+ R5 48.7k ( OUT Given the ratio of R4/R5, the closest 1% resistor value for R5 is 46.4k. With the actual resistor values now known, the final thresholds can be calculated by plugging the values into the equations above for VR and VF to obtain: R6 6.81M 2960 F06 Figure 6. External Hysteresis The addition of R6 allows OUT to sink or source current to the summing junction at IN+. Neglecting internal switch resistances and providing that R6 >> R5, the externally modified hysteresis (referred to VA) becomes:  R4  V HEXT ≈ VHYS(VA) + VB   R6  Since the amount of hysteresis is to be doubled, the second term in the above expression needs to be about 300mV. With a logic supply, VB, equal to 3V, the ratio R4/ R6 should be about 0.1. Choosing R6 to be 6.81M satisfies the design criteria. The addition of R6 modifies the rising and falling thresholds originally determined by R4 and R5. The modified rising threshold becomes:  R4 R4  VR = VTH + V+HYS • 1+ +   R5 R6  ( ) = ( 400mV + 20mV ) • (1+ 13.98 + 0.1) = 6.3336V It is apparent that the R4/R6 term does not affect the rising threshold significantly resulting in a change of only +0.645%. The falling threshold incorporating R6 is:  R4 R4  VTH – VB   + VF = VTH  1+    R5 R6  VTH   = 0.4V • (1+ 13.98 – 0.65) = 5.732V ) VR = 6.626V, VF = 6.010V, VHYST = 616mV As a result of the added current component through R6 an error term exists that is a function of the pull-up voltage, VB in Figure 6. Operation with Supply Transients over 40V and Hot Swapping The circuit in Figure 7(a) allows the LTC2960 to withstand high voltage transients. The magnitude of the voltage transients that can be absorbed is set by the voltage rating of RZ. A TT-IRC pulse-withstanding surface mount 1206 resistor with a nominal voltage rating of 200V is used. The external 30V Zener diode (Z1) and the 143kΩ current limiting resistor (RZ) protect the VIN supply pin of the LTC2960. Note that there is a speed penalty which is the time constant determined by RZ and C1, 14.3ms in this example. If VIN is below 30V, there is a voltage drop across RZ that is dependent on the quiescent current of the LTC2960 which is nominally less than 150mV but can be as high as 290mV if MR is pulled low. The maximum voltage drop is determined by the maximum specified ICC and MR pull-up currents. For conditions where the Zener conducts current, it can be biased in the microamp range owing to the low quiescent current of the LTC2960. For a supply voltage of 150V, the Zener is biased 17V. 2960fa For more information www.linear.com/LTC2960 11 LTC2960 Applications Information When a supply voltage is abruptly connected to the input resonant ringing can occur as a result of series inductance. The peak voltage could rise to 2x the input supply but in practice can reach 2.5x if a capacitor with a strong voltage coefficient is present. If a 12V supply is hot plugged the resulting ringing could reach the abs max of VCC. Any circuit with an input of more than 7V should be scrutinized for ringing. Circuit board trace inductances of as little as 10nH can produce significant ringing. VIN MAX 200V RZ 143k PWC1206LF143kJ* Z1 BZX84C30 BV = 30V C1 0.1µF 50V VCC LTC2960 *TT-IRC (a) VIN One effective means to eliminate ringing is to include a 10–100Ω resistance in series with the supply input before the VCC capacitor shown in Figure 7(b). This provides damping for the resonant circuit but imposes a time constant to VCC. In Figure 7(b), the time constant of RS and C1 is 2µs. RS 20 C1 0.1µF 50V VCC LTC2960 2960 F07 (b) Figure 7. Operation with High Voltage Transients and Hot Swapping 12 2960fa For more information www.linear.com/LTC2960 LTC2960 Typical Applications Configurable Regulator UVLO and Low Battery Indicator internal switch when it reaches 2.5V. With a threshold of 5.537V the LTC2960 OUT output disables the load before this occurs in order to prevent damage to the batteries. In addition to the UVLO signal, the LTC2960 provides a low battery indicator for the system. Figure 9 shows an alternative arrangement in which the LTC2960 monitors the output of the 3.3V regulator to provide a reset signal. In the circuit of Figure 8, the high voltage open drain OUT output is used as a configurable UVLO signal for a switching regulator. A Li-Ion battery can contain protection circuitry that open circuits its terminals through an BUCK CONVERTER VBAT 6V TO 8.4V Li-Ion 4.2V Li-Ion 4.2V NOT ALL LT3991 COMPONENTS SHOWN R3 5.11M* + R4 10M VCC RT IN+ C1 0.1µF 25V R2 49.9k + VIN VOUT 3.3V VOUT LT3991 C2 47µF 16V EN GND R5 1M OUT LTC2960-1 ADJ MR R1 348k RST LOW BATTERY GND 2960 F08 *VISHAY-DALE CRCW SERIES 0603 1% UVLO FALLING THRESHOLD = 5.537V RESET FALLING THRESHOLD = 6.33V Figure 8. Configurable Regulator UVLO and Low Battery Indicator BUCK CONVERTER VBAT 6V TO 8.4V Li-Ion 4.2V Li-Ion 4.2V + C1 0.1µF 25V R5 10M R2 6.04M VCC RT OUT LTC2960-1 + R1 402k NOT ALL LT3991 COMPONENTS SHOWN RESD* 10k UVLO FALLING THRESHOLD = 6.410V RESET FALLING THRESHOLD = 2.649V IN+ ADJ MR RST GND VIN VOUT 3.3V VOUT LT3991 EN GND C2 47µF 16V R4 2.26M R6 1M RESET R3 402k 2960 F09 *OPTIONAL RESISTOR FOR ADDED ESD PROTECTION Figure 9. Configurable Regulator UVLO and Supervisor 2960fa For more information www.linear.com/LTC2960 13 LTC2960 Typical Applications current in the event of a reverse battery condition. In all three examples, the load drops to