LTC3026EMSE-1#TRPBF

LTC3026-1 1.5A Low Input Voltage VLDO Linear Regulator FEATURES DESCRIPTION n The LTC®3026-1 is a very low dropout (VLDO™) linear regulator that can operate at input voltages down to 1.14V. The device is capable of supplying 1.5A of output current with a typical dropout voltage of only 100mV. Output current comes directly from the input supply to maximize efficiency. n n n n n n n n n n n Input Voltage Range: 1.14V to 5.5V Low Dropout Voltage: 100mV at IOUT = 1.5A Adjustable Output Range: 0.4V to 2.6V Output Current: Up to 1.5A Excellent Supply Rejection Even Near Dropout Shutdown Disconnects Load from VIN and VBST Low Operating Current: IIN = 95μA at VIN = 1.5V IBIAS = 175μA at VBIAS = 5V Low Shutdown Current: IIN < 1μA (Typ), IBST = 0.1μA (Typ) Stable with 10μF or Greater Ceramic Capacitors Short-Circuit, Reverse Current Protected Overtemperature Protected Available in 10-Lead MSOP and 10-Lead (3mm × 3mm) DFN Packages The LTC3026-1 is the same as the LTC3026 but has the boost converter internally disabled. With the boost converter disabled, the SW pin of the LTC3026 is replaced with a ground pin and the BST pin is replaced with a BIAS pin that requires an external 5V supply for operation. The LTC3026-1 regulator is stable with 10μF or greater ceramic output capacitors. The device has a low 0.4V reference voltage which is used to program the output voltage via two external resistors. The device also has internal current limit, overtemperature shutdown, and reverse output current protection. The LTC3026-1 is available in a small 10-lead MSOP or low profile (0.75mm) 10-lead 3mm × 3mm DFN package. APPLICATIONS n n n High Efficiency Linear Regulator Post Regulator for Switching Supplies Microprocessor Supply L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks and ThinSOT, VLDO are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 1.2V Output Voltage from 1.5V Input Supply Dropout Voltage vs Output Current 150 LTC3026-1 BIAS IN 1μF 0.4V VBIAS = 5V 1μF + – VOUT = 1.2V, 1.5A OUT 8.06k OFF ON SHDN ADJ GNDS GND DROPOUT (mV) VIN = 1.5V 100 1.2V 1.5V 2.0V 2.6V 50 COUT 10μF 100k 4.02k 0 PG 30261 TA01a 0 1.0 0.5 1.5 IOUT (A) 30261 TA01b 30261f 1 LTC3026-1 ABSOLUTE MAXIMUM RATINGS (Note 1) VBIAS to GND................................................ –0.3V to 6V VIN to GND ................................................... –0.3V to 6V PG to GND ................................................... –0.3V to 6V SHDN to GND............................................ –0.3V to 6.3V ADJ to GND.................................. –0.3V to (VIN + 0.3V) GND to GNDS............................................ –0.3V to 0.3V Output Short-Circuit Duration .......................... Indefinite Operating Junction Temperature Range (Note 7) ............................................. –40°C to 125°C Storage Temperature Range .................. –65°C to 125°C Lead Temperature (MSE, Soldering, 10 sec) ......... 300°C PIN CONFIGURATION TOP VIEW IN 1 IN 2 TOP VIEW 10 OUT IN IN GND GNDS BIAS 9 OUT 11 GND GND 3 GNDS 4 7 PG BIAS 5 6 SHDN 8 ADJ 1 2 3 4 5 11 GND 10 9 8 7 6 OUT OUT ADJ PG SHDN MSE PACKAGE 10-LEAD PLASTIC MSOP DD PACKAGE 10-LEAD (3mm = 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB TJMAX = 125°C, θJA = 40°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3026EDD-1#PBF LTC3026EDD-1#TRPBF LGHG 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC3026IDD-1#PBF LTC3026IDD-1#TRPBF LGHG 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC3026EMSE-1#PBF LTC3026EMSE-1#TRPBF LTGHH 10-Lead Plastic MSOP –40°C to 125°C LTC3026IMSE-1#PBF LTC3026IMSE-1#TRPBF LTGHH 10-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 30261f 2 LTC3026-1 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TJ = 25°C. (Note 7) VIN = 1.5V, VOUT = 1.2V, VBIAS = 5V, CIN = CBIAS = 1μF, COUT = 10μF (all capacitors ceramic) unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Operating Voltage (Note 2) l 5.5 V IIN Operating Current IOUT = 100μA, VSHDN = VIN, 1.2V ≤ VIN ≤ 5V l 95 200 μA Shutdown Current VSHDN = 0V, VIN = 3.5V l 0.6 20 μA VBIAS BIAS Operating Voltage (Note 6) VSHDN = VIN VBIASUVLO BIAS Undervoltage Lockout l 4.5 5 5.5 V l 4.0 4.25 4.4 V 175 275 μA 1 5 μA 0.4 0.4 0.403 0.405 V V 2.6 V 250 mV 100 nA l BIAS Operating Current IOUT = 100μA, VSHDN = VIN BIAS Shutdown Current VSHDN = 0V VADJ Regulation Voltage (Note 4) 1mA ≤ IOUT ≤ 1.5A, 1.14V ≤ VIN ≤ 3.5V, VBST = 5V, VOUT = 0.8V 1mA ≤ IOUT ≤ 1.5A, 1.14V ≤ VIN ≤ 3.5V, VBST = 5V, VOUT = 0.8V l OUT Programming Range IBIAS 1.14 l 0.397 0.395 0.4 Dropout Voltage (Note 5) VIN = 1.5V, VADJ = 0.38, IOUT = 1.5A l IADJ ADJ Input Current VADJ = 0.4V l –100 VSHDN = VIN l 1.5 IOUT Continuous Output Current ILIM Output Current Current Limit en Output Voltage Noise f = 10Hz to 100kHz, IL = 800mA VIHSHDN SHDN Input High Voltage 1.14V ≤ VIN ≤ 3.5V 3.5V ≤ VIN ≤ 5.5V l l VILSHDN SHDN Input Low Voltage 1.14V ≤ VIN ≤ 5.5V l IIHSHDN SHDN Input High Current SHDN = VIN IILSHDN SHDN Input Low Current SHDN = 0V 100 A 3 VOLPG PG Output Low Voltage IPG = 2mA IOHPG PG Output High Leakage Current VPG = 5.5V PG Output Threshold (Note 3) PG High to Low PG Low to High Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. This IC has overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 2: Minimum Operating Voltage required for regulation is: VIN ≥ VOUT(MIN) + VDROPOUT Note 3: PG threshold expressed as a percentage difference from the “VADJ Regulation Voltage” as given in the table. Note 4: Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. A 110 μVRMS 1.0 1.2 V V 0.4 V –1 1 μA –1 1 μA l –12 –10 0.1 0.4 V 0.01 1 μA –9 –7 –6 –4 % % Note 5: Dropout voltage is minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to VIN – VDROPOUT. Note 6: To maintain correct regulation VOUT ≤ VBIAS – 2.4V Note 7: The LTC3026-1 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3026E-1 is guaranteed to meet specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3026I-1 is guaranteed over the –40°C to 125°C operating junction temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal impedance. 30261f 3 LTC3026-1 TYPICAL PERFORMANCE CHARACTERISTICS BIAS Supply Current ADJ Voltage vs Temperature IN Supply Current 200 404 200 403 100 VBIAS = 5V 125°C 85°C 25°C –40°C 50 100 3.5 140 DROPOUT (mV) 2.0 3.5V 100 80 2.5V 125°C 85°C 25°C –40°C 20 1.2V 0 1.2 125 1.4 1.6 1.8 2.0 2.4 2.2 VIN (V) 30261 G04 VIN Ripple Rejection VBIAS = 5V VIN = 1.5V VOUT =1.2V IOUT = 800mA COUT = 10μF 10 0 100 1000 10000 100000 1000000 1E+07 FREQUENCY (Hz) 30261 G07 30 20 VBIAS = 5V VOUT =1.2V IOUT = 800mA COUT = 10μF 0 1.2 2.6 1.4 1.6 1.8 2.0 VIN (V) 2.2 2.4 2.6 30261 G06 Output Current Limit 5.0 RISE RISE FALL FALL RISE 900 FALL VOUT = 0V TA = 25°C 4.5 4.0 3.5 IOUT (A) VSHDN THRESHOLD (mV) RIPPLE REJECTION (dB) 30 20 100kHz 30261 G05 60 40 125 1MHz Shutdown Threshold 50 100 40 10 1200 70 25 50 75 TEMPERATURE (°C) 10kHz 60 100 0 50 40 0 25 50 75 TEMPERATURE (°C) –25 VIN Ripple Rejection 120 1.0 –25 VBIAS = 5V VIN = 1.5V VOUT =1.2V 30261 G03 RIPPLE REJECTION (dB) 4.0 0 –50 398 60 VFB = 0.38V 180 I OUT =1.5A 160 4.5 2.5 1.5A 399 396 –50 200 3.0 1mA 400 Dropout Voltage vs Input Voltage IN Shutdown Current 0.5 401 30261 G02 5.0 1.5 402 397 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) 30261 G01 INPUT CURRENT (μA) 5V VBST BIAS==5V 125°C 85°C 25°C –40°C 50 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) ADJUST VOLTAGE (mV) 150 IIN (μA) IBIAS (μA) 150 3.0 2.5 600 CURRENT LIMIT 2.0 125°C 25°C –40°C 300 1 2 3 4 VIN (V) 5 THERMAL LIMIT 1.5 6 30261 G08 1.0 1.0 1.5 2.0 2.5 VIN (V) 3.0 3.5 30261 G09 30261f 4 LTC3026-1 TYPICAL PERFORMANCE CHARACTERISTICS Delay from Enable to PG BIAS to OUT Headroom Voltage 2.22 400 2.20 375 2.16 350 2.14 DELAY (μs) VBIAS – VOUT (V) 2.18 2.12 2.10 325 300 2.08 2.06 VOUT = 0.8V ROUT = 8Ω 85°C 25°C –40°C 275 2.04 2.02 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 250 125 30261 G10 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) 30261 G11 Output Load Transient Response IN Supply Transient Response 1.5A IOUT 2mA 2V VIN 1.5V OUT AC 20mV/DIV VOUT AC 10mV/DIV VOUT = 1.5V COUT = 10μF VIN = 1.7V VBIAS = 5V 50μs/DIV 30261 G12 VOUT = 1.2V IOUT = 800mA COUT = 10μF VBIAS = 5V TA = 25°C 10μs/DIV 30261 G13 30261f 5 LTC3026-1 PIN FUNCTIONS IN (Pins 1, 2): Input Supply Voltage. Output load current is supplied directly from IN. The IN pin should be locally bypassed to ground if the LTC3026-1 is more than a few inches away from another source of bulk capacitance. In general, the output impedance of a battery rises with frequency, so it is usually advisable to include an input bypass capacitor when supplying IN from a battery. A capacitor in the range of 0.1μF to 4.7μF is usually sufficient. GND (Pin 3, Exposed Pad Pin 11): Ground and Heat Sink. Connect the exposed pad to the PCB ground plane or large pad for optimum thermal performance. GNDS (Pin 4): Ground Sense Pin. Tie directly to Pin 3 GND external to the part. BIAS (Pin 5): BIAS Voltage Pin. Must be connected to an external 5V supply. A 1μF low ESR ceramic capacitor is recommended for bypassing the BIAS pin. SHDN (Pin 6): Shutdown Input Pin, Active Low. This pin is used to put the LTC3026-1 into shutdown. The SHDN pin current is typically less than 10nA. The SHDN pin cannot be left floating and must be tied to a valid logic level (such as IN) if not used. PG (Pin 7): Power Good Pin. When PG is high impedance OUT is in regulation, and low impedance when OUT is in shutdown or out of regulation. ADJ (Pin 8): Output Adjust Pin. This is the input to the error amplifier. It has a typical bias current of 0.1nA flowing into the pin. The ADJ pin reference voltage is 0.4V referenced to ground. The output voltage range is 0.4V to 2.6V and is typically set by connecting ADJ to a resistor divider from OUT to GND. See Figure 3. OUT (Pins 9, 10): Regulated Output Voltage. The OUT pins supply power to the load. A minimum output capacitance of 5μF is required to ensure stability. Larger output capacitors may be required for applications with large transient loads to limit peak voltage transients. See the Applications Information section for more information on output capacitance. 30261f 6 LTC3026-1 BLOCK DIAGRAM SHDN 6 5 BIAS SHDN + 0.4V REFERENCE – UVLO VOFF 7 – – PG IN 1,2 0.372V OUT 9,10 + – + + 8 ADJ OVERSHOOT DETECT GNDS 4 GND 3, 11 30261 BD 30261f 7 LTC3026-1 OPERATION The LTC3026-1 is a VLDO (very low dropout) linear regulator which operates from input voltages as low as 1.14V. The LDO uses an internal NMOS transistor as the pass device in a source-follower configuration. The BIAS pin provides the higher supply necessary for the LDO circuitry while the output current comes directly from the IN input for high efficiency regulation. 1.5A IOUT 0mA OUT AC 20mV/DIV The LTC3026-1 is the same as the LTC3026 but has the boost converter disabled. The SW pin of the LTC3026 has been replaced with a GNDS pin. Because the boost converter is disabled, an external 5V supply must be present to drive the BIAS pin (formally BST on the LTC3026). LDO Operation An undervoltage lockout comparator (UVLO) senses the BIAS pin voltage to ensure that the bias supply for the LDO is greater than 4.2V before enabling the LDO. If BIAS is below 4.2V, the UVLO shuts down the LDO, and OUT is pulled to GND through the external divider. The LDO provides a high accuracy output capable of supplying 1.5A of output current with a typical dropout voltage of only 100mV. A single ceramic capacitor as small as 10μF is all that is required for output bypassing. A low reference voltage allows the LTC3026-1 output to be programmed to much lower voltages than available in common LDOs (range of 0.4V to 2.6V). The devices also include current limit and thermal overload protection, and will survive an output short-circuit indefinitely. The fast transient response of the follower output stage overcomes the traditional trade-off between dropout voltage, quiescent current and load transient response inherent in most LDO regulator architectures, see Figure 1. The LTC3026-1 also includes a soft-start feature to prevent excessive current flow at VIN during start-up. When the LDO is enabled, the soft-start circuitry gradually increases the LDO reference voltage from 0V to 0.4V over a period of approximately 200μs, see Figure 2. VOUT = 1.5V COUT = 10μF VIN = 1.7V VBIAS = 5V 100μs/DIV 30261 F01 Figure 1. Output Load Step Response SHDN HI LO 1.5V OUT 0V 1.5V PG 0V TA = 25°C ROUT = 1Ω VIN = 1.7V VBIAS = 5V 100μs/DIV 30261 F02 Figure 2. Soft-Start with Boost Disable Adjustable Output Voltage The output voltage is set by the ratio of two external resistors as shown in Figure 3. The device servos the output to maintain the ADJ pin voltage at 0.4V (referenced to ground). Thus, the current in R1 is equal to 0.4V/R1. For good transient response, stability and accuracy the current in R1 should be at least 80μA, thus, the value of R1 should be no greater than 5k. The current in R2 is the current in R1 plus the ADJ pin bias current. Since the ADJ pin bias current is typically 125°C) should be avoided as it can degrade the performance or shorten the life of the part. Reverse Input Current Protection The LTC3026-1 features reverse input current protection to limit current draw from any supplementary power source at the output. Figure 6 shows the reverse output current limit for constant input and output voltages cases. Note: Positive input current represents current flowing into the VIN pin of LTC3026-1. 30 IN CURRENT LIMIT ABOVE 1.45V IIN CURRENT (μA) 20 With VOUT held at or below the output regulation voltage and VIN varied, IN current flow will follow Figure 6’s curves. IIN reverse current ramps up to about 16μA as the VIN approaches VOUT. Reverse input current will spike up as VIN approaches within about 30mV of VOUT as the reverse current protection circuitry is disabled and normal operation resumes. As VIN transitions above VOUT the reverse current transitions into short-circuit current as long as VOUT is held below the regulation voltage. Layout Considerations Connection from BIAS and OUT pins to their respective ceramic bypass capacitor should be kept as short as possible. The ground side of the bypass capacitors should be connected directly to the ground plane for best results or through short traces back to the GND pin of the part. Long traces will increase the effective series ESR and inductance of the capacitor which can degrade performance. Because the ADJ pin is relatively high impedance (depending on the resistor divider used), stray capacitance at this pin should be minimized (