LTC3538
800mA Synchronous
Buck-Boost
DC/DC Converter
FEATURES
■
■
■
■
■
■
■
■
■
■
■
DESCRIPTION
Regulated Output with Input Voltages Above,
Below, or Equal to the Output
800mA Continuous Output Current from a Single
Lithium-Ion/Polymer Cell
Single Inductor
1.8V to 5.25V VOUT Range
2.4V to 5.5V VIN Range
1MHz Fixed Frequency Operation
Output Disconnect in Shutdown
35μA Quiesecent Current in Burst Mode Operation
VIN
VOUT
IOUT _ BURST(BUCK) = 0.27A; VOUT < VIN
The maximum average Burst Mode output current that
can be delivered in the four-switch buck-boost region is
limited to the boost equation specified above.
INDUCTOR SELECTION
To achieve high efficiency, a low ESR inductor should be
utilized for the converter. The inductor must have a saturation rating greater than the worst case average inductor
current plus half the ripple current. The peak-to-peak current ripple will be larger in buck and boost mode than in
the buck-boost region. The peak-to-peak inductor current
ripple for each mode can be calculated from the following
formulas, where f is the frequency (1MHz typical) and L
is the inductance in μH.
ΔIL,P-P,BUCK =
VOUT • ( VIN – VOUT ) / VIN
ΔIL,P-P,BOOST =
f •L
For high efficiency, choose a ferrite inductor with a high
frequency core material to reduce core loses. The inductor should have low ESR (equivalent series resistance) to
reduce the I2R losses, and must be able to handle the peak
inductor current without saturating. Molded chokes or chip
inductors usually do not have enough core to support the
peak inductor currents in the 1A to 2A region. To minimize
radiated noise, use a shielded inductor. See Table 1 for a
suggested list of inductor suppliers.
Output Capacitor Selection
The bulk value of the output filter capacitor is selected to
reduce the ripple due to charge into the capacitor each
cycle. The steady state ripple due to charge is given by:
ΔVP-P, BOOST = ILOAD • (VOUT – VIN)/(COUT • VOUT • f)V
ΔVP-P,BUCK = (VIN – VOUT) • VOUT/(8 • L • VIN • COUT • f2)V
where COUT = output filter capacitor, F
A
f •L
VOUT • ( VOUT – VIN ) / VOUT
In addition to affecting output current ripple, the size of the
inductor can also affect the stability of the feedback loop.
In boost mode, the converter transfer function has a right
half plane zero at a frequency that is inversely proportional
to the value of the inductor. As a result, a large inductor
can move this zero to a frequency low enough to degrade
the phase margin of the feedback loop. It is recommended
that the inductor value be chosen less than 10μH.
ILOAD = Output load current, A
A
where f = frequency (1MHz typical), Hz
L = inductor, H
Table 1. Inductor Vendor Information
SUPPLIER
PHONE
FAX
WEB SITE
Coilcraft
(847) 639-6400
(847) 639-1469
www.coilcraft.com
CoEv Magnetics
(800) 227-7040
(650) 361-2508
www.tycoelectronics.com
Murata
(814) 237-1431
(800) 831-9172
(814) 238-0490
www.murata.com
Sumida
USA: (847) 956-0666
Japan: 81 (3) 3607-5111
USA: (847) 956-0702
Japan: 81(3) 3607-5144
www.sumida.com
TDK
(847) 803-6100
(847) 803-6296
www.component.tdk.com
TOKO
(847) 297-0070
(847) 699-7864
www.tokoam.com
3538fb
10
LTC3538
OPERATION
Since the output current is discontinuous in boost mode,
the ripple in this mode will generally be much larger than
the magnitude of the ripple in buck mode.
Minimizing solution size is usually a priority. Please be
aware that ceramic capacitors can exhibit a significant
reduction in effective capacitance when a bias is applied.
The capacitors exhibiting the highest reduction are those
packaged in the smallest case size.
importantly, leakage and parasitic capacitance need to
be minimized. During start-up, 1.5μA is typically sourced
from VC. The leakage of an external pull-down device and
compensation components tied to VC, must therefore be
minimized to ensure proper start-up. Capacitance from
the pull-down device should also be minimized as it can
affect converter stability. An N-channel MOSFET such as
the FDV301N or similar is recommended if an external
discrete N-channel MOSFET is needed.
Input Capacitor Selection
PCB Layout Considerations
Since VIN is the supply voltage for the IC it is recommended
to place at least a 4.7μF, low ESR ceramic bypass capacitor close to VIN and GND. It is also important to minimize
any stray resistance from the converter to the battery or
other power source.
The LTC3538 switches large currents at high frequencies.
Special care should be given to the PCB layout to ensure
stable, noise-free operation. Figure 3 depicts the recommended PCB layout to be utilized for the LTC3538. A few
key guidelines follow:
Optional Schottky Diodes
1. All circulating current paths should be kept as short as
possible. This can be accomplished by keeping the routes
to all components (except the FB divider network) in
Figure 3 as short and as wide as possible. Capacitor ground
connections should via down to the ground plane in the
shortest route possible. The bypass capacitor on VIN should
be placed as close to the IC as possible and should have
the shortest possible paths to ground.
Schottky diodes across the synchronous switches B and
D are not required, but do provide a lower drop during the
break-before-make time (typically 15ns), thus improving
efficiency. Use a surface mount Schottky diode such as an
MBRM120T3 or equivalent. Do not use ordinary rectifier
diodes since their slow recovery times will compromise
efficiency.
Table 2. Capacitor Vendor Information
SUPPLIER PHONE
AVX
FAX
WEB SITE
(803) 448-9411 (803) 448-1943 www.avxcorp.com
Sanyo
(619) 661-6322 (619) 661-1055 www.sanyovideo.com
Taiyo
Yuden
(408) 573-4150 (408) 573-4159 www.t-yuden.com
TDK
(847) 803-6100 (847) 803-6296 www.component.tdk.com
Shutdown MOSFET Selection
A discrete external N-channel MOSFET, open-drain pulldown device or other suitable means can be used to put
the part in shutdown by pulling VC below 0.25V. Since
the error amplifier sources 13μA typically when active
and 1.5μA in shutdown, a relatively high resistance pulldown device can be used to pull VC below 0.25V. More
2. The small signal ground pad (GND) should have a single
point connection to the power ground. A convenient way
to achieve this is to short this pin directly to the Exposed
Pad as shown in Figure 3.
3. The components in bold and their connections should
all be placed over a complete ground plane.
4. To prevent large circulating currents from disrupting
the output voltage sensing, the ground for the resistor
divider should be returned directly to the small signal
ground (GND) as shown.
5. Use of vias in the attach pad will enhance the thermal
environment of the converter especially if the vias extend
to a ground plane region on the exposed bottom surface
of the PCB.
3538fb
11
LTC3538
OPERATION
ƒ FILTER _ POLE =
VIN
2• VOUT • π • L • COUT
Hz
(in boost mode)
1
FB
8
VIN
2
VC
7
SW1
3
GND
6
SW2
4
BURST
5
where L is in Henries and COUT is in Farads.
The output filter zero is given by:
1
ƒ FILTER _ ZERO =
Hz
2• π •RESR • COUT
where RESR is the equivalent series resistance of the
output capacitor.
VOUT
VOUT
A troublesome feature in boost mode is the right-half plane
zero (RHP), given by:
VIN 2
ƒ RHPZ =
Hz
2• π •IOUT •L • VOUT
3538 F03
VIA TO GND PLANE
Figure 3. LTC3538 Recommended PCB Layout
The loop gain is typically rolled off before the RHP zero
frequency.
Closing the Feedback Loop
The LTC3538 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(buck, boost, buck-boost), but is usually no greater than
15. The output filter exhibits a double pole response, as
given by:
ƒ FILTER _ POLE =
A simple Type I compensation network can be incorporated
to stabilize the loop, but at a cost of reduced bandwidth and
slower transient response. To ensure proper phase margin
using Type I compensation, the loop must be crossed
over a decade before the LC double pole. Referring to
Figure 4, the unity-gain frequency of the error amplifier
with the Type I compensation is given by:
1
ƒ UG =
Hz
2• π •R1• CP1
1
Hz
2• π • L • COUT
(in buck mode)
VOUT
+
–
1V
R1
FB
1
R2
VC
2
CP1
3538 F04
Figure 4. Error Amplifier with Type I Compensation
3538fb
12
LTC3538
OPERATION
Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a higher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output filter. Referring to Figure 5, the location of the
poles and zeros are given by:
1
ƒ POLE1 ≅
Hz
2• π • 32e3 •R1• CP1
(which is extremly close to DC)
1
Hz
2• π •R Z • CP1
1
ƒ ZERO2 =
Hz
2• π •R1• CZ1
1
ƒ POLE2 =
Hz
2• π •R Z • CP2
ƒ ZERO1 =
where resistance is in Ohms and capacitance is in
Farads.
VOUT
+
–
R1
1V
CZ1
FB
1
R2
CP2
VC
RZ
CP1
2
3538 F05
Figure 5. Error Amplifier with Type III Compensation
3538fb
13
LTC3538
TYPICAL APPLICATION
High Efficiency 5V/500mA from USB Input
L1
3.3μH
VOUT
5V, 500mA
LTC3538
USB
4.35V TO 5.25V
SW1
SW2
VIN
VOUT
CIN
10μF
PWM
10k
33pF
COUT
22μF
FB
BURST
BURST
VC
GND
ON OFF
1Ω
R1
806k
330pF
M1
15k
R2
200k
3538 TA03
CIN: TAIYO YUDEN JMK212BJ106MG
COUT: TAIYO YUDEN JMK325BJ226MM
L1: SUMIDA CDRH2D18/HP-3R3NC
M1: μP OPEN DRAIN I/O OR FAIRCHILD FDV301N
3538fb
14
LTC3538
PACKAGE DESCRIPTION
DCB Package
8-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
0.70 ±0.05
1.35 ±0.05
3.50 ±0.05
1.65 ± 0.05
2.10 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.45 BSC
1.35 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
R = 0.05
5
TYP
2.00 ±0.10
(2 SIDES)
0.40 ± 0.10
8
1.35 ±0.10
1.65 ± 0.10
3.00 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR 0.25
× 45° CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DCB8) DFN 0106 REV A
4
0.200 REF
1
0.23 ± 0.05
0.45 BSC
0.75 ±0.05
1.35 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3538fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3538
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3407
600mA (IOUT), 1.5MHz Dual Synchronous Step-Up DC/DC Converter
VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V
IQ = 40μA, ISD ≤1μA, SC70 Package
LTC3410
300mA (ISW), 2.25MHz Synchronous Step-Down DC/DC Converter in SC70 VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V
IQ = 26μA, ISD ≤1μA, MS Package
LTC3411
1.25A (IOUT), 4MHz Synchronous Step-Down DC/DC Converter
VIN: 2.625V to 5.5V, VOUT(MIN) = 0.8V
IQ = 62μA, ISD ≤1μA, MS Package
LTC3412
2.5A (IOUT), 4MHz Synchronous Step-Down DC/DC Converter
VIN: 2.625V to 5.5V, VOUT(MIN) = 0.8V
IQ = 62μA, ISD ≤1μA, TSSOP16E Package
LTC3421
3A (ISW), 3MHz Synchronous Step-Up DC/DC Converter
VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V
IQ = 12μA, ISD