LTC3639
High Efficiency, 150V
100mA Synchronous
Step-Down Regulator
FEATURES
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Wide Operating Input Voltage Range: 4V to 150V
Synchronous Operation for Highest Efficiency
Internal High Side and Low Side Power MOSFETs
No Compensation Required
Adjustable 10mA to 100mA Maximum Output
Current
Low Dropout Operation: 100% Duty Cycle
Low Quiescent Current: 12µA
Wide Output Range: 0.8V to VIN
0.8V ±1% Feedback Voltage Reference
Precise RUN Pin Threshold
Internal or External Soft-Start
Programmable 1.8V, 3.3V, 5V or Adjustable Output
Few External Components Required
Programmable Input Overvoltage Lockout
Thermally Enhanced High Voltage MSOP Package
APPLICATIONS
Industrial Control Supplies
Medical Devices
n Distributed Power Systems
n Portable Instruments
n Battery-Operated Devices
n Automotive
n Avionics
n
The LTC®3639 is a high efficiency step-down DC/DC
regulator with internal high side and synchronous power
switches that draws only 12μA typical DC supply current
while maintaining a regulated output voltage at no load.
The LTC3639 can supply up to 100mA load current and
features a programmable peak current limit that provides
a simple method for optimizing efficiency and for reducing output ripple and component size. The LTC3639’s
combination of Burst Mode® operation, integrated power
switches, low quiescent current, and programmable peak
current limit provides high efficiency over a broad range
of load currents.
With its wide input range of 4V to 150V and programmable
overvoltage lockout, the LTC3639 is a robust regulator
suited for regulating from a wide variety of power sources.
Additionally, the LTC3639 includes a precise run threshold
and soft-start feature to guarantee that the power system
start-up is well-controlled in any environment.
The LTC3639 is available in a thermally enhanced high
voltage-capable 16-lead MSE package with four missing pins.
n
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
TYPICAL APPLICATION
Efficiency and Power Loss vs Load Current
100
90
5V to 150V Input to 5V Output, 100mA Step-Down Regulator
470µH
1µF
200V
VIN
SW
LTC3639
RUN
VFB
OVLO
VPRG2
SS
VPRG1
GND
3639 TA01a
VOUT
5V
10µF 100mA
EFFICIENCY
70
50
40
30
1000
VIN = 12V
VIN = 36V
VIN = 72V
VIN = 150V
60
100
POWER LOSS
10
POWER LOSS (mW)
VIN
5V TO 150V
VOUT = 5V
80
EFFICIENCY (%)
n
DESCRIPTION
20
10
0
0.1
1
1
10
LOAD CURRENT (mA)
100
3639 TA01b
3639fc
For more information www.linear.com/LTC3639
1
LTC3639
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
VIN Supply Voltage.................................... –0.3V to 150V
RUN Voltage............................................. –0.3V to 150V
SS, FBO, OVLO, ISET Voltages....................... –0.3V to 6V
VFB, VPRG1, VPRG2 Voltages.......................... –0.3V to 6V
Operating Junction Temperature Range (Notes 2, 3)
LTC3639E, LTC3639I.......................... –40°C to 125°C
LTC3639H........................................... –40°C to 150°C
LTC3639MP........................................ –55°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
TOP VIEW
SW 1
16 GND
VIN 3
FBO
VPRG2
VPRG1
GND
17
GND
5
6
7
8
14 RUN
12
11
10
9
OVLO
ISET
SS
VFB
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 40°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3639EMSE#PBF
LTC3639EMSE#TRPBF
3639
16-Lead Plastic MSOP
–40°C to 125°C
LTC3639IMSE#PBF
LTC3639IMSE#TRPBF
3639
16-Lead Plastic MSOP
–40°C to 125°C
LTC3639HMSE#PBF
LTC3639HMSE#TRPBF
3639
16-Lead Plastic MSOP
–40°C to 150°C
LTC3639MPMSE#PBF
LTC3639MPMSE#TRPBF
3639
16-Lead Plastic MSOP
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping
container.Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
150
V
Input Supply (VIN)
VIN
Input Voltage Operating Range
VOUT
Output Voltage Operating Range
UVLO
VIN Undervoltage Lockout
IQ
DC Supply Current (Note 4)
Active Mode
Sleep Mode
Shutdown Mode
4
0.8
VIN Rising
VIN Falling
Hysteresis
l
l
3.5
3.3
No Load
VRUN = 0V
V
4.0
3.8
V
V
mV
150
12
1.4
350
22
6
µA
µA
µA
1.21
1.10
110
1.25
1.14
V
V
mV
VRUN
RUN Pin Threshold
RUN Rising
RUN Falling
Hysteresis
IRUN
RUN Pin Leakage Current
RUN = 1.3V
–10
0
10
nA
VOVLO
OVLO Pin Threshold
OVLO Rising
OVLO Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.25
1.14
V
V
mV
2
1.17
1.06
VIN
3.75
3.5
250
3639fc
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LTC3639
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Output Supply (VFB)
Feedback Comparator Threshold
(Adjustable Output)
VFB Rising, VPRG1 = VPRG2 = 0V
LTC3639E, LTC3639I
LTC3639H, LTC3639MP
l
l
0.792
0.788
0.800
0.800
0.808
0.812
VFBH
Feedback Comparator Hysteresis
(Adjustable Output)
VFB Falling, VPRG1 = VPRG2 = 0V
l
3
5
9
mV
IFB
Feedback Pin Current
VFB = 1V, VPRG1 = VPRG2 = 0V
VFB(FIXED)
Feedback Comparator Thresholds
(Fixed Output)
VFB(ADJ)
–10
0
10
nA
VFB Rising, VPRG1 = SS, VPRG2 = 0V
VFB Falling, VPRG1 = SS, VPRG2 = 0V
l
l
4.94
4.91
5.015
4.985
5.09
5.06
V
V
VFB Rising, VPRG1 = 0V, VPRG2 = SS
VFB Falling, VPRG1 = 0V, VPRG2 = SS
l
l
3.26
3.24
3.31
3.29
3.36
3.34
V
V
VFB Rising, VPRG1 = VPRG2 = SS
VFB Falling, VPRG1 = VPRG2 = SS
l
l
1.78
1.77
1.81
1.80
1.84
1.83
V
V
ISET Floating
100k Resistor from ISET to GND
ISET Shorted to GND
l
l
l
200
100
17
230
120
25
260
140
30
mA
mA
mA
Operation
IPEAK
Peak Current Comparator Threshold
RON
Power Switch On-Resistance
Top Switch
Bottom Switch
ISW = –50mA
ISW = 50mA
4.2
2.2
ILSW
Switch Pin Leakage Current
VIN = 150V, SW = 0V
ISS
Soft-Start Pin Pull-Up Current
VSS < 2.5V
tINT(SS)
Internal Soft-Start Time
SS Pin Floating
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3639 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3639E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3639I is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC3639H is guaranteed over the –40°C to 150°C operating junction
temperature range and the LTC3639MP is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
4
Ω
Ω
0.1
1
μA
5
6
μA
1
ms
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PD • θJA)
where θJA is 40°C/W for the MSOP package.
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
3639fc
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3
LTC3639
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current,
VOUT = 5V
Efficiency vs Load Current,
VOUT = 3.3V
90
80
80
80
70
70
70
60
50
40
ISET OPEN
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 36V
VIN = 72V
VIN = 150V
30
10
0
0.1
1
10
LOAD CURRENT (mA)
60
50
40
ISET OPEN
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 36V
VIN = 72V
VIN = 150V
30
20
10
0
0.1
100
1
10
LOAD CURRENT (mA)
3639 G01
60
50
40
30
0
75
50
100
VIN VOLTAGE (V)
25
125
800
799
798
–55
150
125
155
PEAK CURRENT (mA)
25
50
1.16
1.14
1.12
75
100 125 150 175 200
RISET (kΩ)
3639 G07
FALLING
1.10
1.08
250
200
150
RISET = 100kΩ
100
0
–55
65
35
95
5
TEMPERATURE (°C)
125
155
3639 G06
Peak Current Trip Threshold
vs Input Voltage
ISET OPEN
50
0
1.20
1.18
300
250
200
50
RISING
1.22
1.06
–55 –25
300
250
4
95
5
35
65
TEMPERATURE (°C)
1.24
Peak Current Trip Threshold
vs Temperature
100
100
3639 G03
3639 G05
Peak Current Trip Threshold
vs RISET
0
–25
3639 G04
150
1
10
LOAD CURRENT (mA)
RUN and OVLO Comparator
Threshold vs Temperature
801
ILOAD = 100mA
ILOAD = 10mA
ILOAD = 1mA
0
0
0.1
100
RUN OR OVLO THRESHOLD VOLTAGE (V)
EFFICIENCY (%)
70
ISET OPEN
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 36V
VIN = 72V
VIN = 150V
30
10
802
THRESHOLD VOLTAGE (V)
80
10
40
Feedback Comparator Trip
Threshold vs Temperature
ISET OPEN
FIGURE 13 CIRCUIT
20
50
3639 G02
Efficiency vs Input Voltage,
VOUT = 5V
90
60
20
PEAK CURRENT (mA)
100
EFFICIENCY (%)
100
90
EFFICIENCY (%)
100
90
EFFICIENCY (%)
100
20
PEAK CURRENT TRIP THRESHOLD (mA)
Efficiency vs Load Current,
VOUT = 1.8V
65
95
5
35
TEMPERATURE (°C)
200
150
RISET = 100kΩ
100
50
ISET = GND
–25
ISET OPEN
125
155
3639 G08
0
ISET = GND
0
30
60
90
VIN VOLTAGE (V)
120
150
3639 G09
3639fc
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LTC3639
TYPICAL PERFORMANCE CHARACTERISTICS
Quiescent Supply Current
vs Temperature
Quiescent Supply Current
vs Input Voltage
30
5
30
60
90
VIN VOLTAGE (V)
20
15
SLEEP
10
5
SHUTDOWN
0
7
–25
65
35
5
95
TEMPERATURE (°C)
VIN = 150V
6
5
4
3
2
SW = 150V
1
0
SW = 0V
–1
SHUTDOWN
0
–55
150
120
SWITCH LEAKAGE CURRENT (µA)
10
0
8
VIN = 150V
25
SLEEP
VIN SUPPLY CURRENT (µA)
VIN SUPPLY CURRENT (µA)
15
Switch Leakage Current
vs Temperature
125
155
–2
–55 –25
95
65
35
TEMPERATURE (°C)
5
3639 G10
125
155
3639 G12
3639 G11
Switch On-Resistance
vs Temperature
7
8
6
7
SWITCH ON-RESISTANCE (Ω)
SWITCH ON-RESISTANCE (Ω)
Switch On-Resistance
vs Input Voltage
5
TOP
4
3
BOTTOM
2
1
Load Step Transient Response
OUTPUT
VOLTAGE
50mV/DIV
6
TOP
5
LOAD
CURRENT
50mA/DIV
4
BOTTOM
VIN = 48V
200µs/DIV
VOUT = 3.3V
1mA TO 100mA LOAD STEP
FIGURE 14 CIRCUIT
3
2
0
30
60
90
VIN VOLTAGE (V)
150
120
1
–55 –25
65
95
35
TEMPERATURE (°C)
3639 G13
Operating Waveforms, VIN = 48V
OUTPUT
VOLTAGE
50mV/DIV
SWITCH
VOLTAGE
20V/DIV
SWITCH
VOLTAGE
50V/DIV
INDUCTOR
CURRENT
200mA/DIV
INDUCTOR
CURRENT
200mA/DIV
3639 G16
125
155
3639 G14
Operating Waveforms, VIN = 150V
OUTPUT
VOLTAGE
50mV/DIV
VIN = 48V
10µs/DIV
VOUT = 3.3V
IOUT = 100mA
FIGURE 14 CIRCUIT
5
3639 G15
Short-Circuit and Recovery
OUTPUT
VOLTAGE
1V/DIV
INDUCTOR
CURRENT
100mA/DIV
VIN = 150V
10µs/DIV
VOUT = 3.3V
IOUT = 50mA
FIGURE 14 CIRCUIT
3639 G17
500µs/DIV
FIGURE 14 CIRCUIT
3639 G18
3639fc
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5
LTC3639
PIN FUNCTIONS
SW (Pin 1): Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
VIN (Pin 3): Main Supply Pin. A ceramic bypass capacitor
should be tied between this pin and GND.
FBO (Pin 5): Feedback Comparator Output. The typical
pull-up current is 20µA. The typical pull-down impedance
is 70Ω.
VPRG2, VPRG1 (Pins 6, 7): Output Voltage Selection. Short
both pins to ground for a resistive divider programmable
output voltage. Short VPRG1 to SS and short VPRG2 to
ground for a 5V output voltage. Short VPRG1 to ground
and short VPRG2 to SS for a 3.3V output voltage. Short
both pins to SS for a 1.8V output voltage.
GND (Pin 8, 16, Exposed Pad Pin 17): Ground. The exposed pad must be soldered to the PCB ground plane for
rated thermal performance.
VFB (Pin 9): Output Voltage Feedback. When configured
for an adjustable output voltage, connect to an external
resistive divider to divide the output voltage down for
comparison to the 0.8V reference. For the fixed output
configuration, directly connect this pin to the output.
SS (Pin 10): Soft-Start Control Input. A capacitor to
ground at this pin sets the output voltage ramp time. A
50µA current initially charges the soft-start capacitor until
switching begins, at which time the current is reduced to
6
its nominal value of 5µA. The output voltage ramp time
from zero to its regulated value is 1ms for every 6.25nF
of capacitance from SS to GND. If left floating, the ramp
time defaults to an internal 1ms soft-start.
ISET (Pin 11): Peak Current Set Input. A resistor from this
pin to ground sets the peak current comparator threshold.
Leave floating for the maximum peak current (230mA
typical) or short to ground for minimum peak current
(25mA typical). The maximum output current is one-half
the peak current. The 5µA current that is sourced out of
this pin when switching is reduced to 1µA in sleep. Optionally, a capacitor can be placed from this pin to GND
to trade off efficiency for light load output voltage ripple.
See Applications Information.
OVLO (Pin 12): Overvoltage Lockout Input. Connect to
the input supply through a resistor divider to set the overvoltage lockout level. A voltage on this pin above 1.21V
disables the internal MOSFET switches. Normal operation
resumes when the voltage on this pin decreases below
1.10V. Exceeding the OVLO lockout threshold triggers a
soft-start reset, resulting in a graceful recovery from an
input supply transient. Tie this pin to ground if the overvoltage is not used.
RUN (Pin 14): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC3639, reducing quiescent
current to approximately 1.4µA. Optionally, connect to the
input supply through a resistor divider to set the undervoltage lockout.
3639fc
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LTC3639
BLOCK DIAGRAM
1.3V
11
ACTIVE: 5µA
SLEEP: 1µA
ISET
VIN
+
3
CIN
PEAK CURRENT
COMPARATOR
+
–
14
12
RUN
+
1.21V
–
OVLO
LOGIC
AND
SHOOTTHROUGH
PREVENTION
–
SW
VOUT
COUT
GND
1.21V
L1
1
+
16
+
–
5V
REVERSE CURRENT
COMPARATOR
20µA
5
FEEDBACK
COMPARATOR
FBO
+
+
–
70Ω
8
17
VOLTAGE
REFERENCE
START-UP: 50µA
NORMAL: 5µA
0.800V
R1
R2
GND
GND
5V
VPRG2 VPRG1
GND
GND
SS
SS
GND
SS
GND
SS
VOUT
ADJUSTABLE
5V FIXED
3.3V FIXED
1.8V FIXED
R1
VFB
VPRG1
VPRG2
R2
1.0M ∞
4.2M 800k
2.5M 800k
1.0M 800k
SS
10
9
7
6
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
3639 BD
3639fc
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7
LTC3639
OPERATION
(Refer to Block Diagram)
The LTC3639 is a synchronous step-down DC/DC regulator
with internal power switches that uses Burst Mode control, combining low quiescent current with high switching
frequency, which results in high efficiency across a wide
range of load currents. Burst Mode operation functions by
using short “burst” cycles to switch the inductor current
through the internal power MOSFETs, followed by a sleep
cycle where the power switches are off and the load current is supplied by the output capacitor. During the sleep
cycle, the LTC3639 draws only 12µA of supply current.
At light loads, the burst cycles are a small percentage of
the total cycle time which minimizes the average supply
current, greatly improving efficiency. Figure 1 shows an
example of Burst Mode operation. The switching frequency
is dependent on the inductor value, peak current, input
voltage and output voltage.
SLEEP
CYCLE
BURST
CYCLE
SWITCHING
FREQUENCY
INDUCTOR
CURRENT
BURST
FREQUENCY
OUTPUT
VOLTAGE
∆VOUT
3639 F01
Figure 1. Burst Mode Operation
Main Control Loop
The LTC3639 uses the VPRG1 and VPRG2 control pins to
connect internal feedback resistors to the VFB pin. This
enables fixed outputs of 1.8V, 3.3V or 5V without increasing component count, input supply current or exposure to
noise on the sensitive input to the feedback comparator.
8
External feedback resistors (adjustable mode) can be used
by connecting both VPRG1 and VPRG2 to ground.
In adjustable mode the feedback comparator monitors
the voltage on the VFB pin and compares it to an internal
800mV reference. If this voltage is greater than the reference, the comparator activates a sleep mode in which the
power switches and current comparators are disabled,
reducing the VIN pin supply current to only 12µA. As the
load current discharges the output capacitor, the voltage
on the VFB pin decreases. When this voltage falls 5mV
below the 800mV reference, the feedback comparator
trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak current comparator threshold or the voltage on the VFB pin
exceeds 800mV, at which time the high side power switch
is turned off and the low side power switch (N-channel
MOSFET) turns on. The inductor current ramps down until
the reverse current comparator trips, signaling that the
current is close to zero. If the voltage on the VFB pin is
still less than the 800mV reference, the high side power
switch is turned on again and another cycle commences.
The average current during a burst cycle will normally be
greater than the average load current. For this architecture,
the maximum average output current is equal to half of
the peak current.
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage, and inductor value. This behavior
provides inherent short-circuit protection. If the output is
shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switch turns on only when the inductor current is near
zero, the LTC3639 inherently switches at a lower frequency
during start-up or short-circuit conditions.
3639fc
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LTC3639
OPERATION
(Refer to Block Diagram)
Start-Up and Shutdown
If the voltage on the RUN pin is less than 0.7V, the LTC3639
enters a shutdown mode in which all internal circuitry is
disabled, reducing the DC supply current to 1.4µA. When the
voltage on the RUN pin exceeds 1.21V, normal operation of
the main control loop is enabled. The RUN pin comparator
has 110mV of internal hysteresis, and therefore must fall
below 1.1V to disable the main control loop.
An internal 1ms soft-start function limits the ramp rate of
the output voltage on start-up to prevent excessive input
supply droop. If a longer ramp time and consequently less
supply droop is desired, a capacitor can be placed from the
SS pin to ground. The 5µA current that is sourced out of
this pin will create a smooth voltage ramp on the capacitor.
If this ramp rate is slower than the internal 1ms soft-start,
then the output voltage will be limited by the ramp rate
on the SS pin instead. The internal and external soft-start
functions are reset on start-up and after an undervoltage
or overvoltage event on the input supply.
Peak Inductor Current Programming
The peak current comparator nominally limits the peak
inductor current to 230mA. This peak inductor current
can be adjusted by placing a resistor from the ISET pin to
ground. The 5µA current sourced out of this pin through
the resistor generates a voltage that adjusts the peak current comparator threshold.
During sleep mode, the current sourced out of the ISET pin
is reduced to 1µA. The ISET current is increased back to 5µA
on the first switching cycle after exiting sleep mode. The
ISET current reduction in sleep mode, along with adding
a filtering capacitor, CISET, from the ISET pin to ground,
provides a method of reducing light load output voltage
ripple at the expense of lower efficiency and slightly degraded load step transient response.
Dropout Operation
When the input supply decreases toward the output supply, the duty cycle increases to maintain regulation. The
P-channel MOSFET top switch in the LTC3639 allows
the duty cycle to increase all the way to 100%. At 100%
duty cycle, the P-channel MOSFET stays on continuously,
providing output current equal to the peak current, which
is twice the maximum load current when not in dropout.
Input Undervoltage and Overvoltage Lockout
The LTC3639 additionally implements protection features
which inhibit switching when the input voltage is not within
a programmable operating range. By use of a resistive
divider from the input supply to ground, the RUN and
OVLO pins serve as a precise input supply voltage monitor.
Switching is disabled when either the RUN pin falls below
1.1V or the OVLO pin rises above 1.21V, which can be
configured to limit switching to a specific range of input
supply voltage. Furthermore, if the input voltage falls below
3.5V typical (3.8V maximum), an internal undervoltage
detector disables switching.
When switching is disabled, the LTC3639 can safely sustain
input voltages up to the absolute maximum rating of 150V.
Input supply undervoltage or overvoltage events trigger a
soft-start reset, which results in a graceful recovery from
an input supply transient.
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9
LTC3639
APPLICATIONS INFORMATION
The basic LTC3639 application circuit is shown on the
front page of this data sheet. External component selection is determined by the maximum load current requirement and begins with the selection of the peak current
programming resistor, RISET. The inductor value L can
then be determined, followed by capacitors CIN and COUT.
Peak Current Resistor Selection
The peak current comparator has a maximum current
limit of at least 200mA, which guarantees a maximum
average current of 100mA. For applications that demand
less current, the peak current threshold can be reduced
to as little as 17mA. This lower peak current allows the
efficiency and component selection to be optimized for
lower current applications.
The peak current threshold is linearly proportional to the
voltage on the ISET pin, with 100mV and 1V corresponding
to 20mA and 200mA peak current respectively. This pin
may be driven by an external voltage source to modulate
the peak current, which may be beneficial in some applications. Usually, the peak current is programmed with an
appropriately chosen resistor (RISET) between the ISET pin
and ground. The voltage generated on the ISET pin by RISET
and the internal 5µA current source sets the peak current.
The value of resistor for a particular peak current can be
computed by using Figure 2 or the following equation:
The internal 5μA current source is reduced to 1μA in sleep
mode to maximize efficiency and to facilitate a tradeoff
between efficiency and light load output voltage ripple, as
described in the Optimizing Output Voltage Ripple section.
The peak current is internally limited to be within the range
of 20mA to 200mA. Shorting the ISET pin to ground programs the current limit to 20mA, and leaving it floating sets
the current limit to the maximum value of 200mA. When
selecting this resistor value, be aware that the maximum
average output current for this architecture is limited to
half of the peak current. Therefore, be sure to select a value
that sets the peak current with enough margin to provide
adequate load current under all conditions. Selecting the
peak current to be 2.2 times greater than the maximum
load current is a good starting point for most applications.
Inductor Selection
The inductor, input voltage, output voltage, and peak current
determine the switching frequency during a burst cycle of
the LTC3639. For a given input voltage, output voltage,
and peak current, the inductor value sets the switching
frequency during a burst cycle when the output is in regulation. Generally, switching at a frequency between 50kHz
and 200kHz yields high efficiency, and 100kHz is a good
first choice for many applications. The inductor value can
be determined by the following equation:
RISET = IPEAK • 106
where 20mA < IPEAK < 200mA.
250
The variation in switching frequency during a burst cycle
with input voltage and inductance is shown in Figure 3. For
lower values of IPEAK, multiply the frequency in Figure 3
by 230mA/IPEAK.
CURRENT (mA)
200
TYPICAL PEAK
INDUCTOR
CURRENT
150
An additional constraint on the inductor value is the
LTC3639’s 150ns minimum on-time of the switches.
Therefore, in order to keep the current in the inductor
100
MAXIMUM
LOAD
CURRENT
50
0
0
25
50
V
V
L = OUT • 1– OUT
VIN
f •IPEAK
75 100 125 150 175 200
RISET (kΩ)
3639 F02
Figure 2. RISET Selection
10
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APPLICATIONS INFORMATION
10000
ISET OPEN
120
100
L = 100µH
80
L = 220µH
INDUCTOR VALUE (µH)
SWITCHING FREQUENCY (kHz)
140
60
40
L = 330µH
1000
20
0
0
30
60
90
120
VIN INPUT VOLTAGE (V)
150
100
10
3639 F03
100
PEAK INDUCTOR CURRENT (mA)
300
3639 F04
Figure 3. Switching Frequency for VOUT = 3.3V
Figure 4. Recommended Inductor Values for Maximum Efficiency
well-controlled, the inductor value must be chosen so that
it is larger than a minimum value which can be computed
as follows:
for small surface mount inductors as a function of peak
current is shown in Figure 4. The values in this range are a
good compromise between the trade-offs discussed above.
For applications where board area is not a limiting factor,
inductors with larger cores can be used, which extends
the recommended range of Figure 4 to larger values.
L>
L>
VIN(MAX) • tON(MIN)
IPEAK
•1.2 and
VOUT • 3.5µH
•1.2
1V
Inductor Core Selection
where VIN(MAX) is the maximum input supply voltage when
switching is enabled, tON(MIN) is 150ns, IPEAK is the peak
current, VOUT is the regulated output voltage, and the
factor of 1.2 accounts for typical inductor tolerance and
variation over temperature.
For applications that have large input supply transients,
the OVLO pin can be used to disable switching above the
maximum operating voltage VIN(MAX) so that the minimum
inductor value is not artificially limited by a transient
condition. Inductor values that violate the above equation
will cause the peak current to overshoot and permanent
damage to the part may occur.
Although the previous equation provides the minimum
inductor value, higher efficiency is generally achieved with
a larger inductor value, which produces a lower switching
frequency. For a given inductor type, however, as inductance is increased DC resistance (DCR) also increases.
Higher DCR translates into higher copper losses and lower
current rating, both of which place an upper limit on the
inductance. The recommended range of inductor values
Once the value for L is known, the type of inductor must
be selected. High efficiency regulators generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently output voltage
ripple. Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate energy but generally cost more
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LTC3639
APPLICATIONS INFORMATION
than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly
depends on the price versus size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
TDK, Toko, and Sumida.
of VOUT/160 due to the 5mV typical hysteresis of the feedback comparator. The time delay of the comparator adds
an additional ripple voltage that is a function of the load
current. During this delay time, the LTC3639 continues to
switch and supply current to the output. The output ripple
can be approximated by:
CIN and COUT Selection
The input capacitor, CIN, is needed to filter the trapezoidal
current at the source of the top high side MOSFET. CIN
should be sized to provide the energy required to magnetize the inductor without causing a large decrease in
input voltage (∆VIN). The relationship between CIN and
∆VIN is given by:
L •IPEAK 2
CIN >
2 • VIN • ∆VIN
To prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by:
VOUT
•
VIN
VIN
–1
VOUT
The output capacitor, COUT, filters the inductor’s ripple
current and stores energy to satisfy the load current when
the LTC3639 is in sleep. The output ripple has a lower limit
IPEAK • 2 •10 –6
V
∆VOUT – OUT
160
The value of the output capacitor must also be large enough
to accept the energy stored in the inductor without a large
change in output voltage during a single switching cycle.
Setting this voltage step equal to 1% of the output voltage,
the output capacitor must be:
2
This formula has a maximum at VIN = 2VOUT, where IRMS =
IOUT/2. This simple worst-case condition is commonly used
for design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based only on 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design.
12
The output ripple is a maximum at no load and approaches
lower limit of VOUT/160 at full load. Choose the output
capacitor COUT to limit the output voltage ripple ∆VOUT
using the following equation:
COUT ≥
It is recommended to use a larger value for CIN than
calculated by the previous equation since capacitance
decreases with applied voltage. In general, a 1µF X7R ceramic capacitor is a good choice for CIN in most LTC3639
applications.
IRMS = IOUT(MAX) •
IPEAK
4 • 10 –6 VOUT
∆VOUT ≈
–ILOAD •
+
2
COUT
160
100%
L I
COUT > • PEAK •
2 VOUT
1%
Typically, a capacitor that satisfies the voltage ripple requirement is adequate to filter the inductor ripple. To avoid
overheating, the output capacitor must also be sized to
handle the ripple current generated by the inductor. The
worst-case ripple current in the output capacitor is given
by IRMS = IPEAK/2. Multiple capacitors placed in parallel
may be needed to meet the ESR and RMS current handling
requirements.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
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APPLICATIONS INFORMATION
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and longterm reliability. Ceramic capacitors have excellent low ESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
of ceramic capacitors in series with trace inductance can
also lead to significant input voltage ringing.
Input Voltage Steps
If the input voltage falls below the regulated output voltage,
the body diode of the internal high side MOSFET will conduct
current from the output supply to the input supply. If the
input voltage falls rapidly, the voltage across the inductor
will be significant and may saturate the inductor. A large
current will then flow through the high side MOSFET body
diode, resulting in excessive power dissipation that may
damage the part.
If rapid voltage steps are expected on the input supply, put
a small silicon or Schottky diode in series with the VIN pin
to prevent reverse current and inductor saturation, shown
below as D1 in Figure 5. The diode should be sized for a
LTC3639
INPUT
SUPPLY
D1
VIN
SW
L
VOUT
COUT
CIN
3639 F05
Figure 5. Preventing Current Flow to the Input
reverse voltage of greater than the regulated output voltage, and to withstand repetitive currents higher than the
maximum peak current of the LTC3639.
Ceramic Capacitors and Audible Noise
Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple
current, high voltage rating, and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
VIN. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at VIN large enough to damage the part.
For applications with inductive source impedance, such
as a long wire, a series RC network may be required in
LIN
LTC3639
VIN
R=
LIN
CIN
CIN
3639 F06
4 • CIN
Figure 6. Series RC to Reduce VIN Ringing
parallel with CIN to dampen the ringing of the input supply.
Figure 6 shows this circuit and the typical values required
to dampen the ringing. Refer to Application Note 88 for additional information on suppressing input supply transients.
Ceramic capacitors are also piezoelectric. The LTC3639’s
burst frequency depends on the load current, and in some
applications the LTC3639 can excite the ceramic capacitor at audio frequencies, generating audible noise. This
noise is typically very quiet to a casual ear; however, if the
noise is unacceptable, use a high performance tantalum
or electrolytic capacitor at the output.
Output Voltage Programming
The LTC3639 has three fixed output voltage modes and
an adjustable mode that can be selected with the VPRG1
and VPRG2 pins. The fixed output modes use an internal
feedback divider which enables higher efficiency, higher
noise immunity, and lower output voltage ripple for 5V,
3.3V, and 1.8V applications. To select the fixed 5V output
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13
LTC3639
APPLICATIONS INFORMATION
voltage, connect VPRG1 to SS and VPRG2 to GND. For 3.3V,
connect VPRG1 to GND and VPRG2 to SS. For 1.8V, connect
both VPRG1 and VPRG2 to SS. For any of the fixed output
voltage options, directly connect the VFB pin to VOUT.
VOUT
LTC3639
4.2M
800k
SS
VPRG1
VPRG2
Figure 8. Setting the Output Voltage with
External and Internal Resistors
0.8V
R1
R2
3639 F07
Figure 7. Setting the Output Voltage with External Resistors
The resistive divider allows the VFB pin to sense a fraction
of the output voltage as shown in Figure 7. The output
voltage can range from 0.8V to VIN. Be careful to keep
the divider resistors very close to the VFB pin to minimize
noise pick-up on the sensitive VFB trace.
To minimize the no-load supply current, resistor values in
the megohm range may be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leakage
current to the output node or switch node exceeds the load
current, the output voltage will be pulled up. In normal
operation, this is generally a minor concern since the load
current is much greater than the leakage.
To avoid excessively large values of R1 in high output voltage applications (VOUT ≥ 10V), a combination of external
and internal resistors can be used to set the output voltage. This has an additional benefit of increasing the noise
14
R2
3639 F08
VOUT
VFB
LTC3639
VPRG1
VPRG2
R1
5V
0.8V
For the adjustable output mode (VPRG1 = VPRG2 = GND),
the output voltage is set by an external resistive divider
according to the following equation:
R1
VOUT = 0.8V • 1+
R2
VFB
immunity on the VFB pin. Figure 8 shows the LTC3639
with the VFB pin configured for a 5V fixed output with an
external divider to generate a higher output voltage. The
internal 5M resistance appears in parallel with R2, and
the value of R2 must be adjusted accordingly. R2 should
be chosen to be less than 200k to keep the output voltage variation less than 1% due to the tolerance of the
LTC3639’s internal resistor.
RUN Pin and Overvoltage/Undervoltage Lockout
The LTC3639 has a low power shutdown mode controlled
by the RUN pin. Pulling the RUN pin below 0.7V puts the
LTC3639 into a low quiescent current shutdown mode
(IQ ~ 1.4µA). When the RUN pin is greater than 1.21V,
switching is enabled. Figure 9 shows examples of configurations for driving the RUN pin from logic.
The RUN and OVLO pins can alternatively be configured
as precise undervoltage (UVLO) and overvoltage (OVLO)
lockouts on the VIN supply with a resistive divider from VIN
to ground. A simple resistive divider can be used as shown
in Figure 10 to meet specific VIN voltage requirements.
The current that flows through the R3-R4-R5 divider will
directly add to the shutdown, sleep, and active current of
the LTC3639, and care should be taken to minimize the
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APPLICATIONS INFORMATION
VIN
SUPPLY
4.7M
LTC3639
RUN
LTC3639
RUN
3639 F09
Figure 9. RUN Pin Interface to Logic
VIN
R3
Similarly, for applications that do not require a precise
UVLO, the RUN pin can be tied to VIN. In this configuration,
the UVLO threshold is limited to the internal VIN UVLO
thresholds as shown in the Electrical Characteristics table.
The resistor values for the OVLO can be computed using
the previous equations with R3 = 0Ω.
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the OVLO pin from exceeding 6V, the following relation
should be satisfied:
RUN
R4
LTC3639
OVLO
R5
3639 F10
Figure 10. Adjustable UV and OV Lockout
impact of this current on the overall efficiency of the application circuit. Resistor values in the megohm range may
be required to keep the impact on quiescent shutdown and
sleep currents low. To pick resistor values, the sum total
of R3 + R4 + R5 (RTOTAL) should be chosen first based
on the allowable DC current that can be drawn from VIN.
The individual values of R3, R4 and R5 can then be calculated from the following equations:
1.21V
R5 = R TOTAL •
Rising VIN OVLO Threshold
R4 = R TOTAL •
1.21V
–R5
Rising VIN UVLO Threshold
R3 = R TOTAL –R5 –R4
For applications that do not need a precise external OVLO,
the OVLO pin should be tied directly to ground. The RUN
pin in this type of application can be used as an external
UVLO using the previous equations with R5 = 0Ω.
R5
VIN(MAX) •
< 6V
R3 + R4 + R5
Soft-Start
Soft-start is implemented by ramping the effective reference voltage from 0V to 0.8V. To increase the duration
of the reference voltage soft-start, place a capacitor from
the SS pin to ground. An internal 5µA pull-up current will
charge this capacitor. The value of the soft-start capacitor
can be calculated by the following equation:
CSS = Soft-Start Time •
5µA
0.8V
The minimum soft-start time is limited to the internal
soft-start timer of 1ms. When the LTC3639 detects a fault
condition (input supply undervoltage or overvoltage) or
when the RUN pin falls below 1.1V, the SS pin is quickly
pulled to ground and the internal soft-start timer is reset.
This ensures an orderly restart when using an external
soft-start capacitor.
Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half of the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
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15
LTC3639
APPLICATIONS INFORMATION
ramp time can be significant. Therefore, the output voltage
ramp time from 0V to the regulated VOUT value is limited
to a minimum of
Ramp Time ≥
2COUT
V
IPEAK OUT
Optimizing Output Voltage Ripple
After the peak current resistor and inductor have been
selected to meet the load current and frequency requirements, an optional capacitor, CISET can be added in parallel
with RISET to reduce the output voltage ripple dependency
on load current.
At light loads the output voltage ripple will be a maximum.
The peak inductor current is controlled by the voltage on
the ISET pin. The current out of the ISET pin is 5µA while
the LTC3639 is active and is reduced to 1µA during sleep
mode. The ISET current will return to 5µA on the first
switching cycle after sleep mode. Placing a parallel RC
network to ground on the ISET pin filters the ISET voltage
as the LTC3639 enters and exits sleep mode, which in
turn will affect the output voltage ripple, efficiency, and
load step transient performance.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: VIN operating current and I2R losses. The VIN
16
operating current dominates the efficiency loss at very
low load currents whereas the I2R loss dominates the
efficiency loss at medium to high load currents.
1. The VIN operating current comprises two components:
The DC supply current as given in the electrical characteristics and the internal MOSFET gate charge currents.
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
high again, a packet of charge, ∆Q, moves from VIN to
ground. The resulting ∆Q/dt is the current out of VIN
that is typically larger than the DC bias current.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. When
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the low side NMOS switch. Thus, the series
resistance looking back into the switch pin is a function
of the top and bottom switch RDS(ON) values and the
duty cycle (DC = VOUT/VIN) as follows:
RSW = (RDS(ON)TOP)DC + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics curves. Thus, to obtain the I2R losses, simply add
RSW to RL and multiply the result by the square of the
average output current:
I2R Loss = IO2(RSW + RL)
Other losses, including CIN and COUT ESR dissipative
losses and inductor core losses, generally account for
less than 2% of the total power loss.
Thermal Considerations
In most applications, the LTC3639 does not dissipate much
heat due to its high efficiency. But, in applications where
the LTC3639 is running at high ambient temperature with
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low supply voltage and high duty cycles, such as dropout,
the heat dissipated may exceed the maximum junction
temperature of the part.
Pin Clearance/Creepage Considerations
To prevent the LTC3639 from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise from
ambient to junction is given by:
The LTC3639 MSE package has been uniquely designed to
meet high voltage clearance and creepage requirements.
Pins 2, 4, 13, and 15 are omitted to increase the spacing between adjacent high voltage solder pads (VIN, SW,
and RUN) to a minimum of 0.657mm which is sufficient
for most applications. For more information, refer to the
printed circuit board design standards described in IPC2221 (www.ipc.org).
TR = PD • θJA
Design Example
Where PD is the power dissipated by the regulator and
θJA is the thermal resistance from the junction of the die
to the ambient temperature.
The junction temperature is given by:
TJ = TA + TR
As a design example, consider using the LTC3639 in an
application with the following specifications: VIN = 36V
to 72V (48V nominal), VOUT = 12V, IOUT = 100mA, f =
200kHz, and that switching is enabled when VIN is between
30V and 90V.
Generally, the worst-case power dissipation is in dropout
at low input voltage. In dropout, the LTC3639 can provide
a DC current as high as the full 230mA peak current to the
output. At low input voltage, this current flows through a
higher resistance MOSFET, which dissipates more power.
First, calculate the inductor value based on the switching
frequency:
As an example, consider the LTC3639 in dropout at an input
voltage of 5V, a load current of 230mA and an ambient
temperature of 85°C. From the Typical Performance graphs
of Switch On-Resistance, the RDS(ON) of the top switch
at VIN = 5V and 100°C is approximately 7.5Ω. Therefore,
the power dissipated by the part is:
Choose a 220µH inductor as a standard value. Next, verify
that this meets the LMIN requirement at the maximum
input voltage:
PD = (ILOAD)2 • RDS(ON) = (230mA)2 • 7.5Ω = 0.4W
Therefore, the minimum inductor requirement is satisfied
and the 220μH inductor value may be used.
For the MSOP package the θJA is 40°C/W. Thus, the junction temperature of the regulator is:
40°C
= 101°C
W
which is below the maximum junction temperature of
150°C.
12V
12V
L=
• 1–
≅ 196µH
200kHz • 0.23A 48V
LMIN =
90V •150ns
•1.2 = 70µH
0.23A
Next, CIN and COUT are selected. For this design, CIN should
be sized for a current rating of at least:
TJ = 85°C+ 0.4W •
IRMS = 100mA •
12V
36V
•
– 1≅ 47mARMS
36V
12V
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LTC3639
APPLICATIONS INFORMATION
The value of CIN is selected to keep the input from drooping less than 360mV (1%) at low line:
CIN >
220µH• 0.23A 2
≅ 0.45µF
2 • 36V • 360mV
The undervoltage and overvoltage lockout requirements
on VIN can be satisfied with a resistive divider from VIN to
the RUN and OVLO pins (refer to Figure 10). Choose R3 +
R4 + R5 = 2.5M to minimize the loading on VIN. Calculate
R3, R4 and R5 as follows:
Since the capacitance of capacitors decreases with DC
bias, a 1µF capacitor should be chosen.
R5 =
1.21V • 2.5MΩ
= 33.6k
VIN _ OV(RISING)
COUT will be selected based on a value large enough to
satisfy the output voltage ripple requirement. For a 1%
output ripple (120mV), the value of the output capacitor
can be calculated from:
R4 =
1.21V • 2.5MΩ
–R5 = 67.2k
VIN _ UV(RISING)
COUT ≥
–6
0.23A • 2 •10
≅ 10µF
12V
120mV –
160
COUT also needs an ESR that will satisfy the output voltage
ripple requirement. The required ESR can be calculated
from:
ESR <
120mV
≅ 522mΩ
0.23A
A 10µF ceramic capacitor has significantly less ESR than
522mΩ. The output voltage can now be programmed by
choosing the values of R1 and R2. Since the output voltage is higher than 10V, the LTC3639 should be set for a
5V fixed output with an external divider to divide the 12V
output down to 5V. R2 is chosen to be less than 200k
to keep the output voltage variation to less than 1% due
to the internal 5M resistor tolerance. Set R2 = 196k and
calculate R1 as:
R1=
12V – 5V
• (196kΩ ||5MΩ ) = 264kΩ
5V
R3 = 2.5MΩ –R4 –R5 = 2.4M
Since specific resistor values in the megohm range are
generally less available, it may be necessary to scale R3,
R4, and R5 to a standard value of R3. For this example,
choose R3 = 2.2M and scale R4 and R5 by 2.2M/2.4M.
Then, R4 = 61.6k and R5 = 30.8k. Choose standard values
of R3 = 2.2M, R4 = 62k, and R5 = 30.9k. Note that the falling thresholds for both UVLO and OVLO will be 10% less
than the rising thresholds, or 27V and 81V respectively.
220µH
VIN
36V TO 72V
VIN
SW
LTC3639
2.2M
VFB
RUN
1µF
267k
FBO
62k
ISET
10µF
SS
OVLO
VPRG1
30.9k
VOUT
12V
100mA
GND
196k
VPRG2
3639 F11
Figure 11. 36V to 72V Input to 12V Output, 100mA Regulator
Choose a standard value of 267k for R1.
18
3639fc
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LTC3639
APPLICATIONS INFORMATION
The ISET pin should be left open in this example to select
maximum peak current (230mA). Figure 11 shows a
complete schematic for this design example.
L1
VIN
VIN
R3
SW
LTC3639
VFB
RUN
R4
FBO
CIN
PC Board Layout Checklist
1. Large switched currents flow in the power switches and
input capacitor. The loop formed by these components
should be as small as possible. A ground plane is recommended to minimize ground impedance.
2. Connect the (+) terminal of the input capacitor, CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small signal nodes. The rapid transitions on the switching
node can couple to high impedance nodes, in particular
VFB, and create increased output ripple.
COUT
ISET
VPRG1
VPRG2
GND
OVLO
SS
R5
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3639. Check the following in your layout:
VOUT
R1
CSS
R2
RISET
L1
GND
CIN
VOUT
COUT
VIN
R4
R2 R1
R3
R5
RISET
CSS
GND
VIAS TO GROUND PLANE
VIAS TO INPUT SUPPLY (VIN)
VIAS TO OUTPUT SUPPLY (VOUT)
OUTLINE OF LOCAL GROUND PLANE
3639 F12
Figure 12. Example PCB Layout
3639fc
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19
LTC3639
TYPICAL APPLICATIONS
Efficiency vs Input Voltage
VIN
SW
LTC3639
FBO
COUT
10µF
10V
SS
ISET
VPRG1
OVLO
VPRG2
GND
VOUT = 5V
85
80
VOUT = 3.3V
75
70
VOUT = 1.8V
65
3639 F13
*VOUT = VIN FOR VIN < 5V
CIN: TDK C5750X7R2E105K
COUT: TDK C3216X7R1C106M
L1: TDK SLF12555T-102MR34
IOUT = 50mA
90
VFB
RUN
CIN
1µF
250V
95
VOUT*
5V
100mA
EFFICIENCY (%)
VIN
4V TO 150V
L1
1000µH
60
0
30
120
60
90
VIN INPUT VOLTAGE (V)
150
3639 F13b
Figure 13. High Efficiency 100mA Regulator
L1
150µH
VIN
4V TO 150V
VIN
VOUT
3.3V
100mA
SW
LTC3639
RUN
Soft-Start Waveform
VFB
FBO
CIN
1µF
250V
470nF
SS
ISET
VPRG2
OVLO
VPRG1
GND
220k
220pF
COUT
22µF
6.3V
X5R
OUTPUT
VOLTAGE
500mV/DIV
3639 F14
CIN: TDK C5750X7R2E105K
L1: COILCRAFT LPS6235-154ML
10ms/DIV
3639 F14b
Figure 14. Low Output Voltage Ripple 100mA Regulator with 75ms Soft-Start
20
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LTC3639
TYPICAL APPLICATIONS
4V to 135V Input to –15V Output Positive-to-Negative Regulator
L1
220µH
VIN
4V TO 135V
SW
VIN
CIN
1µF
200V
LTC3639
RUN
200k
VFB
FBO
SS
ISET
VPRG1
OVLO
VPRG2
GND
102k
COUT
10µF
25V
VOUT
–15V
VIN
I
• PEAK
VIN + VOUT
2
CIN: VISHAY VJ2225Y105KXCA
COUT: AVX 12103C106KAT
L1: SUMIDA CDRH105RNP-221NC
MAXIMUM LOAD CURRENT ≈
3639 TA04a
Maximum Load Current
vs Input Voltage
MAXIMUM LOAD CURRENT (mA)
100
VOUT = –5V
90
80
VOUT = –15V
70
60
50
40
30
20
0
30
120
60
90
VIN INPUT VOLTAGE (V)
150
3639 TA04b
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21
LTC3639
TYPICAL APPLICATIONS
Output Voltage Ripple
vs Load Current
L1
330µH
VIN
4V TO 150V
VIN
SW
100k
LTC3639
VFB
RUN
FBO
CIN
1µF
250V
VOUT
1.2V
50mA
COUT
100µF
SS
ISET
VPRG1
OVLO
VPRG2
GND
100k
CSET
1nF
200k
3639 TA03a
CIN: AVX 2225PC105MAT1A
COUT: KEMET C1210C107M9PAC
L1: COOPER SD25-331
PEAK-TO-PEAK OUTPUT VOLTAGE RIPPLE (mV)
4V to 150V Input to 1.2V/50mA Output Regulator with Low Output Voltage Ripple
45
VIN = 36V
40
COUT = 47µF
CSET = OPEN
35
30
25
COUT = 47µF
CSET = 1nF
20
15
COUT = 100µF
CSET = 1nF
10
5
0
10
0
VIN
SW
LTC3639
R1
715k
CIN
1µF
250V
R2
5k
221k
VFB
RUN
ISET
FBO
OVLO
GND
SS
VPRG1
VPRG2
35.7k
COUT
2.2µF
50V
3639 TA06a
INPUT CURRENT LIMIT =
VOUT
R2 5µA •R1 VOUT
R2
•
• 1+
•
≈
10 R1+R2
10 R1+R2
VIN
VIN
• 25mA ≤ 100mA
36V
CIN: MURATA GRM55DR72E105KW01L
COUT: TDK C3225X7R1H225M
L1: WÜRTH 744 778 922 2
*MAXIMUM LOAD CURRENT =
22
3639 TA03b
120
VOUT
36V
100mA*
MAXIMUM CURRENT (mA)
L1
220µH
50
Maximum Load and Input Current
vs Input Voltage
40V to 150V Input to 36V/100mA Output with 25mA Input Current Limit
VIN
40V TO 150V
40
20
30
LOAD CURRENT (mA)
100
MAXIMUM LOAD CURRENT
80
60
40
20
0
MAXIMUM INPUT CURRENT
40 50 60 70 80 90 100 110 120 130 140 150
VIN INPUT VOLTAGE (V)
3639 TA06b
3639fc
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LTC3639
TYPICAL APPLICATIONS
Burst Frequency vs Load Current
100
VIN = 36V
BURST FREQUENCY (kHz)
WITH BURST FREQUENCY LIMIT
5V to 150V Input to 5V/100mA Output with 20kHz Minimum Burst Frequency
CIN
1µF
250V
VIN
SW
953k
LTC3639
RUN
VFB
ISET
FBO
VPRG2
VPRG1
OVLO
SS
GND
V+
LTC6994-1
IN
OUT
DIV
100k
30Ω
2N7000
VOUT
5V
100mA
1
WITHOUT BURST FREQUENCY LIMIT
0.1
0.1
COUT
10µF
10V
SET
GND
1
10
LOAD CURRENT (mA)
100
3639 TA08b
Input Current vs Load Current
200k
100
VIN = 36V
3639 TA08a
CIN: KEMET C2225C105KARACTU
COUT: MURATA GRM40X5R106K10H520
L1: BOURNS SRR1005-221KCT-ND
INPUT CURRENT (mA)
VIN
5V TO 150V
L1
220µH
10
10
WITH BURST FREQUENCY LIMIT
1
0.1
WITHOUT BURST FREQUENCY LIMIT
0.01
0.1
1
10
LOAD CURRENT (mA)
100
3639 TA08c
3639fc
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23
LTC3639
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
16
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
1.0 BSC
(.039)
BSC
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16 14 121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
1
3 567 8
1.0
(.039)
BSC
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
24
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16(12)) 0213 REV D
3639fc
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LTC3639
REVISION HISTORY
REV
DATE
DESCRIPTION
A
7/13
Clarified equations
B
10/13
PAGE NUMBER
10, 11
Clarified last paragraph in Description
1
Clarified graphs
4
Clarified graphs
5
Clarified FBO (pin 5) description
6
Clarified Peak Inductor Current Programming description
9
Clarified Applications Information
16
Renumbered figures
C
D
3/14
12/14
19, 20
Clarified Typical Applications figures
21
Lowest peak current reduced from 20mA to 17mA to match Electrical Characteristics table.
10
Minor revision on Inductor Core Selection formula.
11
Minor correction on Typical Application Figure 14 for 3.3V programmable output.
20
Clarified Top 3 Graphs with Vertical Logarithmic Lines
4
Clarified OVLO Pin Function
6
Clarified Related Parts List
26
3639fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC3639
25
LTC3639
TYPICAL APPLICATION
12V/100mA Automotive Supply
L1
470µH
VIN
SW
90
SS
GND
VPRG1
VPRG2
196k
60
50
100
40
30
POWER LOSS
10
20
3639 TA07
10
*VOUT = VIN FOR VIN < 12V
CIN: AVX 2225PC105MAT1A
COUT: KEMET C1206C475K4RAC
L1: COILCRAFT MSS1048T-474KL
VIN = 24V 1000
VIN = 48V
VIN = 120V
70
POWER LOSS (mW)
ISET
FBO
OVLO
COUT
4.7µF
16V
X7R
EFFICIENCY
80
VFB
RUN
CIN
1µF
250V
X7R
267k
LTC3639
100
VOUT
12V*
100mA
EFFICIENCY (%)
VIN
4V TO 150V
Efficiency and Power Loss vs
Load Current
0
0.1
1
1
10
LOAD CURRENT (mA)
100
3639 TA07b
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3638
140V, 250mA Step-Down Regulator
VIN: 4V to 140V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 1.4μA, MSOP16E
Package
LTC7138
140V, 400mA Step-Down Regulator
VIN: 4V to 140V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 1.4μA, MSOP16E
Package
LTC3630A
76V, 500mA Synchronous Step-Down DC/DC
Regulato
VIN: 4V to 76V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 5mm DFN16, MSOP16E Packages
LTC3637
76V, 1A Step-Down Regulator
VIN: 4V to 76V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 3μA, 3mm × 5mm
DFN16, MSOP16E Packages
LTC3642
45V (Transient to 60V), 50mA Synchronous StepDown DC/DC Regulator
VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 3mm DFN8, MSOP8 Packages
LTC3631/LTC3631-3.3
LTC3631-5
45V (Transient to 60V), 100mA Synchronous StepDown DC/DC Regulator
VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 3mm DFN8, MSOP8 Packages
LTC3632
50V (Transient to 60V), 20mA Synchronous StepDown DC/DC Regulator
VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 3mm DFN8, MSOP8 Packages
LTC3810
100V Synchronous Step-Down DC/DC Controller
VIN: 6.4V to 100V, VOUT(MIN) = 0.8V, IQ = 2mA, ISD < 240µA,
SSOP28 Package
LTC3891
60V Synchronous Step-Down DC/DC Controller with VIN: 4V to 60V, VOUT(MIN) = 0.8V, IQ = 50µA, ISD < 14µA,
3mm × 4mm QFN20, TSSOP20E Packages
Burst Mode Operation
LTC4366-1/LTC4366-2 High Voltage Surge Stopper
26 Linear Technology Corporation
VIN: 9V to > 500V, Adjustable Output Clamp Voltage, ISD = 14µA,
2mm × 3mm DFN8, TSOT8 Packages
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC3639
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC3639
3639fc
LT 1214 REV D • PRINTED IN USA
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