LTC3703-5
60V Synchronous
Switching Regulator Controller
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FEATURES
DESCRIPTIO
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The LTC®3703-5 is a synchronous step-down switching
regulator controller that can directly step-down voltages
from up to 60V input, making it ideal for telecom and automotive applications. The LTC3703-5 drives external logic
level N-channel MOSFETs using a constant frequency (up
to 600kHz), voltage mode architecture.
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High Voltage Operation: Up to 60V
Large 1Ω Gate Drivers (with 5V Supply)
No Current Sense Resistor Required
Step-Up or Step-Down DC/DC Converter
Dual N-Channel MOSFET Synchronous Drive
Excellent Line and Load Transient Response
Programmable Constant Frequency: 100kHz to
600kHz
±1% Reference Accuracy
Synchronizable up to 600kHz
Selectable Pulse Skip Mode Operation
Low Shutdown Current: 25µA Typ
Programmable Current Limit
Undervoltage Lockout
Programmable Soft-Start
16-Pin Narrow SSOP and 28-Pin SSOP Packages
A precise internal reference provides 1% DC accuracy. A
high bandwidth error amplifier and patented* line feed
forward compensation provide very fast line and load
transient response. Strong 1Ω gate drivers allow the
LTC3703-5 to drive multiple MOSFETs for higher current
applications. The operating frequency is user programmable from 100kHz to 600kHz and can also be synchronized to an external clock for noise-sensitive applications.
Current limit is programmable with an external resistor
and utilizes the voltage drop across the synchronous
MOSFET to eliminate the need for a current sense resistor.
For applications requiring up to 100V operation, refer to
the LTC3703 data sheet.
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APPLICATIO S
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48V Telecom and Base Station Power Supplies
Networking Equipment, Servers
Automotive and Industrial Control
PARAMETER
Maximum VIN
MOSFET Gate Drive
VCC UV+
VCC UV–
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*U.S. Patent Numbers: 5408150, 5055767, 6677210, 5847554, 5481178, 6304066, 6580258;
Others Pending.
LTC3703-5
60V
4.5V to 15V
3.7V
3.1V
LTC3703
100V
9.3V to 15V
8.7V
6.2V
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TYPICAL APPLICATIO
High Efficiency High Voltage Step-Down Converter
VCC
5V
Efficiency vs Load Current
22µF
MMDL770T1
VIN
6V TO 60V
MODE/SYNC VIN
+
30k
FSET
COMP
TG
LTC3703-5
FB
SW
INV
0.1µF
100Ω
0.1µF
8µH
12k
IMAX
VCC
10Ω
270µF
16V
DRVCC
+
VOUT
5V
5A
VIN = 42V
90
85
Si7850DP
RUN/SS
BG
D1
MBR1100
10µF
113k
1%
VIN = 24V
95
Si7850DP
470pF
21.5k
1%
VIN = 12V
22µF
×2
BOOST
10k
1000pF
100
EFFICIENCY (%)
+
GND
80
0
BGRTN
1µF
2200pF
1
3
2
LOAD CURRENT (A)
4
5
37053 TA04b
37035 TA04
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LTC3703-5
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ABSOLUTE
AXI U RATI GS (Note 1)
Supply Voltages
VCC, DRVCC .......................................... –0.3V to 15V
(DRVCC – BGRTN), (BOOST – SW) ...... –0.3V to 15V
BOOST (Continuous) ............................ –0.3V to 85V
BOOST (400ms) ................................... –0.3V to 95V
BGRTN ...................................................... –5V to 0V
VIN Voltage (Continuous) .......................... –0.3V to 70V
VIN Voltage (400ms) ................................. –0.3V to 80V
SW Voltage (Continuous) ............................ –1V to 70V
SW Voltage (400ms) ................................... –1V to 80V
Run/SS Voltage .......................................... –0.3V to 5V
MODE/SYNC, INV Voltages ....................... –0.3V to 15V
fSET, FB, IMAX, COMP Voltages ................... –0.3V to 3V
Driver Outputs
TG ................................ SW – 0.3V to BOOST + 0.3V
BG ........................... BGRTN – 0.3V to DRVCC + 0.3V
Peak Output Current 100mV
VCC Rising
VCC Falling
Hysteresis
●
●
●
10.5
– 25
0.7
2.3
9
3.4
2.8
0.45
RSET = 25kΩ
270
100
f < 200kHz
89
0.75
(Note 8)
0.75
(Note 8)
Op Amp DC Open Loop Gain
(Note 4)
Op Amp Unity Gain Crossover Frequency (Note 6)
FB Input Current
0 ≤ VFB ≤ 3V
COMP Sink/Source Current
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC3703-5 is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3703I-5 is guaranteed over the full
–40°C to 125°C operating junction temperature range.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LTC3703-5: TJ = TA + (PD • 100 °C/W) G Package
Note 4: The LTC3703-5 is tested in a feedback loop that servos VFB to the
74
±5
0.007
0.01
0.8
20
0
1.5
0
80
0
12
10
0.9
3.8
17
3.7
3.1
0.65
300
200
93
1
1.2
1
1.2
85
25
0
±10
1
2
1
130
1
13.5
55
1.2
5.3
25
4.1
3.4
0.85
330
600
96
1.8
1.8
1
kHz
kHz
ns
%
A
Ω
A
Ω
dB
MHz
µA
mA
reference voltage with the COMP pin forced to a voltage between 1V and 2V.
Note 5: The dynamic input supply current is higher due to the power
MOSFET gate charging being delivered at the switching frequency
(QG • fOSC).
Note 6: Guaranteed by design. Not subject to test.
Note 7: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 8: RDS(ON) guaranteed by correlation to wafer level measurement.
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LTC3703-5
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TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Input Voltage
TA = 25°C (unless otherwise noted).
Load Transient Response
Efficiency vs Load Current
100
100
VIN = 24V
95
IOUT = 1A
EFFICIENCY (%)
IOUT = 5A
90
85
VOUT
50mV/DIV
AC COUPLED
VIN = 42V
90
IOUT
2A/DIV
85
VOUT = 5V
f = 250kHz
FORCED CONTINUOUS
80
0
10
20
30
40
INPUT VOLTAGE (V)
VOUT = 12V
f = 250kHz
PULSE SKIP ENABLED
80
50
60
0
1
50µs/DIV
VIN = 50V
VOUT = 12V
1A TO 5A LOAD STEP
2
3
LOAD CURRENT (A)
4
37035 G01
37035 G02
VCC Current vs VCC Voltage
3.5
4
120
COMP = 1.5V
100
3
2.5
2.0
VCC CURRENT (mA)
VCC CURRENT (mA)
VCC Shutdown Current vs VCC
Voltage
VCC Current vs Temperature
VCC RISING
3.0
VFB = 0V
1.5
1.0
COMP = 1.5V
2
VFB = 0V
60
40
20
0
0
2.5
5
10
7.5
VCC VOLTAGE (V)
12.5
0
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
15
0
2
4
10 12
6
8
VCC VOLTAGE (V)
37035 G05
37035 G04
VCC Shutdown Current
vs Temperature
16
Normalized Frequency
vs Temperature
Reference Voltage
vs Temperature
0.803
VCC = 5V
14
37035 G06
1.20
1.15
25
20
15
10
0.802
NORMALIZED FREQUENCY
REFERENCE VOLTAGE (V)
30
VCC CURRENT (µA)
80
1
0.5
35
37035 G03
5
VCC CURRENT (µA)
EFFICIENCY (%)
95
0.801
0.800
0.799
5
1.10
1.05
1.00
0.95
0.90
0.85
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
37035 G07
0.798
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
37035 G08
0.80
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
37035 G09
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TYPICAL PERFOR A CE CHARACTERISTICS
Driver Pull-Down RDS(ON)
vs Temperature
Driver Peak Source Current
vs Temperature
1.2
Driver Peak Source Current
vs Supply Voltage
2
VCC = 5V
3.0
VCC = 5V
PEAK SOURCE CURRENT (A)
1.6
1.1
RDS(ON) (Ω)
PEAK SOURCE CURRENT (A)
1.8
1.0
1.4
1.2
1
0.8
0.9
0.4
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
37035 G10
1.0
0
0
2.5
7.5
10
12.5
5
DRVCC/BOOST VOLTAGE (V)
200
15
37035 G12
Rise/Fall Time
vs Gate Capacitance
1.3
RUN/SS Pull-Up Current
vs Temperature
6
VCC = 5V
1.2
VCC = 5V
5
1.0
0.9
0.8
150
RUN/SS CURRENT (µA)
RISE/FALL TIME (ns)
1.1
RDS(ON) (Ω)
1.5
37035 G11
Driver Pull-Down RDS(ON)
vs Supply Voltage
RISE TIME
100
50
FALL TIME
0.7
0.6
2.5
5
7.5
10
12.5
DRVCC/BOOST VOLTAGE (V)
0
15
4
3
2
1
10
15
5
GATE CAPACITANCE (nF)
0
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
20
15735 G15
37035 G14
37035 G13
RUN/SS Pull-Up Current
vs VCC Voltage
RUN/SS Sink Current
vs SW Voltage
Max % DC vs RUN/SS Voltage
25
5
100
IMAX = 0.3V
90
20
4
3
2
1
80
MAX DUTY CYCLE (%)
RUN/SS SINK CURRENT (µA)
RUN/SS PULL-UP CURRENT (µA)
2.0
0.5
0.6
0.8
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
2.5
15
10
5
0
70
60
50
40
30
20
10
–5
0
0
–10
0
2.5
5
7.5
10
VCC VOLTAGE (V)
12.5
15
37035 G16
0
0.1
0.5
0.2 0.3 0.4
|SW| VOLTAGE (V)
0.6
0.7
37035 G17
–10
0.5
1.0
2.0
1.5
RUN VOLTAGE (V)
2.5
3.0
37035 G18
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LTC3703-5
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TYPICAL PERFOR A CE CHARACTERISTICS
IMAX Current vs Temperature
Max % DC vs Frequency and
Temperature
% Duty Cycle vs COMP Voltage
100
13
100
95
12
MAX DUTY CYCLE (%)
DUTY CYCLE (%)
IMAX SOURCE CURRENT (µA)
VIN = 10V
80
VIN = 50V
60
VIN = 25V
40
20
11
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
–45°C
85
25°C
80
90°C
75
0
0.5
0.75
1.00
1.25 1.50
COMP (V)
1.75
2.00
70
125°C
0
100
200 300 400 500
FREQUENCY (kHz)
37035 G20
37035 G19
Shutdown Threshold vs
Temperature
600
700
37035 G21
tON(MIN) vs Temperature
1.4
200
1.2
180
160
1.0
tON(MIN) (ns)
SHUTDOWN THRESHOLD (V)
90
0.8
0.6
0.4
140
120
100
80
0.2
60
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
37035 G22
40
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
37035 G23
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LTC3703-5
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PI FU CTIO S
(GN16/G28)
MODE/SYNC (Pin 1/Pin 6): Pulse Skip Mode Enable/Sync
Pin. This multifunction pin provides Pulse Skip Mode enable/disable control and an external clock input for synchronization of the internal oscillator. Pulling this pin below 0.8V
or to an external logic-level synchronization signal disables
Pulse Skip Mode operation and forces continuous operation. Pulling the pin above 0.8V enables Pulse Skip Mode
operation. This pin can also be connected to a feedback
resistor divider from a secondary winding on the inductor
to regulate a second output voltage.
fSET (Pin 2/Pin 7): Frequency Set. A resistor connected to
this pin sets the free running frequency of the internal oscillator. See applications section for resistor value selection details.
COMP (Pin 3/Pin 8): Loop Compensation. This pin is connected directly to the output of the internal error amplifier.
An RC network is used at the COMP pin to compensate the
feedback loop for optimal transient response.
FB (Pin 4/Pin 9): Feedback Input. Connect FB through a
resistor divider network to VOUT to set the output voltage.
Also connect the loop compensation network from COMP
to FB.
IMAX (Pin 5/Pin 10): Current Limit Set. The IMAX pin sets
the current limit comparator threshold. If the voltage drop
across the bottom MOSFET exceeds the magnitude of the
voltage at IMAX, the controller goes into current limit. The
IMAX pin has an internal 12µA current source, allowing the
current threshold to be set with a single external resistor
to ground. See the Current Limit Programming section for
more information on choosing RIMAX.
INV (Pin 6/Pin 11): Top/Bottom Gate Invert. Pulling this pin
above 2V sets the controller to operate in step-up (boost)
mode with the TG output driving the synchronous MOSFET
and the BG output driving the main switch. Below 1V, the
controller will operate in step-down (buck) mode.
RUN/SS (Pin 7/Pin 13): Run/Soft-Start. Pulling RUN/SS below 0.9V will shut down the LTC3703-5, turn off both of the
external MOSFET switches and reduce the quiescent supply current to 25µA. A capacitor from RUN/SS to ground
will control the turn-on time and rate of rise of the output
voltage at power-up. An internal 4µA current source pullup at the RUN/SS pin sets the turn-on time at approximately
750ms/µF.
GND (Pin 8/Pin 14): Ground Pin.
BGRTN (Pin 9/Pin 15): Bottom Gate Return. This pin connects to the source of the pull-down MOSFET in the BG
driver and is normally connected to ground. Connecting a
negative supply to this pin allows the synchronous
MOSFET’s gate to be pulled below ground to help prevent
false turn-on during high dV/dt transitions on the SW node.
See the Applications Information section for more details.
BG (Pin 10/Pin 19): Bottom Gate Drive. The BG pin drives
the gate of the bottom N-channel synchronous switch
MOSFET. This pin swings from BGRTN to DRVCC.
DRVCC (Pin 11/Pin 20): Driver Power Supply Pin. DRVCC
provides power to the BG output driver. This pin should be
connected to a voltage high enough to fully turn on the
external MOSFETs, normally 4.5V to 15V for logic level
threshold MOSFETs. DRVCC should be bypassed to BGRTN
with a 10µF, low ESR (X5R or better) ceramic capacitor.
VCC (Pin 12/Pin 21) : Main Supply Pin. All internal circuits
except the output drivers are powered from this pin. VCC
should be connected to a low noise power supply voltage
between 4.5V and 15V and should be bypassed to GND
(Pin 8) with at least a 0.1µF capacitor in close proximity to
the LTC3703-5.
SW (Pin 13/Pin 26): Switch Node Connection to Inductor
and Bootstrap Capacitor. Voltage swing at this pin is from
a Schottky diode (external) voltage drop below ground to
VIN.
TG (Pin 14/Pin 27): Top Gate Drive. The TG pin drives the
gate of the top N-channel synchronous switch MOSFET. The
TG driver draws power from the BOOST pin and returns to
the SW pin, providing true floating drive to the top MOSFET.
BOOST (Pin 15/Pin 28): Top Gate Driver Supply. The BOOST
pin supplies power to the floating TG driver. The BOOST pin
should be bypassed to SW with a low ESR (X5R or better)
0.1µF ceramic capacitor. An additional fast recovery Schottky diode from DRVCC to BOOST will create a complete floating charge-pumped supply at BOOST.
VIN (Pin 16/Pin 1): Input Voltage Sense Pin. This pin is connected to the high voltage input of the regulator and is used
by the internal feedforward compensation circuitry to improve line regulation. This is not a supply pin.
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LTC3703-5
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FU CTIO AL DIAGRA
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RSET
FSET
2
OVERCURRENT
12µA
4µA
IMAX
–
5
RMAX
+
50mV
–
±
+
RUN/SS
±
–
5
CSS
1V
CHIP
SD
+
3.2V
INV
UVSD OTSD
SYNC
DETECT
MODE/SYNC 1
EXT SYNC
VCC
+
OSC
DB
–
FORCED CONTINUOUS
INV
REVERSE
CURRENT
15
COMP
14
3
0.8V
FB
R2
R1
4
+
+ FB
–
÷
% DC
LIMIT
–
PWM
+
13
DRIVE
LOGIC
11
VIN 16
+MIN–
10
+MAX–
9
VCC
(> VOUT,
the top MOSFETs’ “on” resistance is normally less important for overall efficiency than its input capacitance at
operating frequencies above 300kHz. MOSFET manufacturers have designed special purpose devices that provide
reasonably low “on” resistance with significantly reduced
input capacitance for the main switch application in switching regulators.
Selection criteria for the power MOSFETs include the “on”
resistance RDS(ON), input capacitance, breakdown voltage
and maximum output current.
The most important parameter in high voltage applications is breakdown voltage BVDSS. Both the top and
bottom MOSFETs will see full input voltage plus any
additional ringing on the switch node across its drain-tosource during its off-time and must be chosen with the
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LTC3703-5
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APPLICATIO S I FOR ATIO
appropriate breakdown specification. Since most MOSFETs
in the 30V to 60V range have logic level thresholds
(VGS(MIN) ≥ 4.5V), the LTC3703-5 is designed to be used
with a 4.5V to 15V gate drive supply (DRVCC pin).
For maximum efficiency, on-resistance RDS(ON) and input
capacitance should be minimized. Low RDS(ON) minimizes
conduction losses and low input capacitance minimizes
transition losses. MOSFET input capacitance is a combination of several components but can be taken from the
typical “gate charge” curve included on most data sheets
(Figure 8).
VIN
MILLER EFFECT
V
VGS
a
b
QIN
CMILLER = (QB – QA)/VDS
+
VGS
+V
DS
–
–
MainSwitchDutyCycle =
VOUT
VIN
SynchronousSwitchDutyCycle =
VIN – VOUT
VIN
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
VOUT
2
IMAX ) (1 + δ)RDR(ON) +
(
VIN
I
VIN2 MAX (RDR )(CMILLER ) •
2
⎡
1
1 ⎤
+
⎢
⎥( f)
⎢⎣ VCC – VTH(IL) VTH(IL) ⎥⎦
V –V
PSYNC = IN OUT (IMAX )2 (1 + δ)RDS(0N)
VIN
PMAIN =
37035 F08
Figure 8. Gate Charge Characteristic
The curve is generated by forcing a constant input current
into the gate of a common source, current source loaded
stage and then plotting the gate voltage versus time. The
initial slope is the effect of the gate-to-source and the gateto-drain capacitance. The flat portion of the curve is the
result of the Miller multiplication effect of the drain-to-gate
capacitance as the drain drops the voltage across the
current source load. The upper sloping line is due to the
drain-to-gate accumulation capacitance and the gate-tosource capacitance. The Miller charge (the increase in
coulombs on the horizontal axis from a to b while the curve
is flat) is specified for a given VDS drain voltage, but can be
adjusted for different VDS voltages by multiplying by the
ratio of the application VDS to the curve specified VDS
values. A way to estimate the CMILLER term is to take the
change in gate charge from points a and b on a manufacturers data sheet and divide by the stated VDS voltage
specified. CMILLER is the most important selection criteria
for determining the transition loss term in the top MOSFET
but is not directly specified on MOSFET data sheets. CRSS
and COS are specified sometimes but definitions of these
parameters are not included.
When the controller is operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
where δ is the temperature dependency of RDS(ON), RDR is
the effective top driver resistance (approximately 2Ω at
VGS = VMILLER), VIN is the drain potential and the change
in drain potential in the particular application. VTH(IL) is the
data sheet specified typical gate threshold voltage specified in the power MOSFET data sheet at the specified drain
current. CMILLER is the calculated capacitance using the
gate charge curve from the MOSFET data sheet and the
technique described above.
Both MOSFETs have I2R losses while the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For VIN < 25V, the
high current efficiency generally improves with larger
MOSFETs, while for VIN > 25V, the transition losses
rapidly increase to the point that the use of a higher
RDS(ON) device with lower CMILLER actually provides higher
efficiency. The synchronous MOSFET losses are greatest
at high input voltage when the top switch duty factor is low
or during a short circuit when the synchronous switch is
on close to 100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs temperature curve, and
typically varies from 0.005/°C to 0.01/°C depending on
the particular MOSFET used.
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APPLICATIO S I FOR ATIO
Multiple MOSFETs can be used in parallel to lower RDS(ON)
and meet the current and thermal requirements if desired.
The LTC3703-5 contains large low impedance drivers
capable of driving large gate capacitances without significantly slowing transition times. In fact, when driving
MOSFETs with very low gate charge, it is sometimes
helpful to slow down the drivers by adding small gate
resistors (10Ω or less) to reduce noise and EMI caused by
the fast transitions.
Schottky Diode Selection
The Schottky diode D1 shown in the circuit on the first
page of this data sheet conducts during the dead time
between the conduction of the power MOSFETs. This
prevents the body diode of the bottom MOSFET from
turning on and storing charge during the dead time and
requiring a reverse recovery period that could cost as
much as 1% to 2% in efficiency. A 1A Schottky diode is
generally a good size for 3A to 5A regulators. Larger
diodes result in additional losses due to their larger
junction capacitance. The diode can be omitted if the
efficiency loss can be tolerated.
In continuous mode, the drain current of the top MOSFET
is approximately a square wave of duty cycle VOUT/VIN
which must be supplied by the input capacitor. To prevent
large input transients, a low ESR input capacitor sized for
the maximum RMS current is given by:
⎞
VOUT ⎛ VIN
– 1⎟
⎜
VIN ⎝ VOUT ⎠
A good approach is to use a combination of aluminum
electrolytics for bulk capacitance and ceramics for low
ESR and RMS current. If the RMS current cannot be
handled by the aluminum capacitors alone, when used
together, the percentage of RMS current that will be
supplied by the aluminum capacitor is reduced to
approximately:
% IRMS,ALUM ≈
Input Capacitor Selection
ICIN(RMS) ≅ IO(MAX)
electrolytics must be used for regulators with input supplies above 30V. Ceramic capacitors have the advantage of
very low ESR and can handle high RMS current, but
ceramics with high voltage ratings (>50V) are not available
with more than a few microfarads of capacitance. Furthermore, ceramics have high voltage coefficients which means
that the capacitance values decrease even more when used
at the rated voltage. X5R and X7R type ceramics are recommended for their lower voltage and temperature coefficients. Another consideration when using ceramics is
their high Q which, if not properly damped, may result in
excessive voltage stress on the power MOSFETs. Aluminum electrolytics have much higher bulk capacitance, but
they have higher ESR and lower RMS current ratings.
1/ 2
This formula has a maximum at VIN = 2VOUT, where IRMS
= IO(MAX)/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that the ripple current ratings from
capacitor manufacturers are often based on only 2000 hours
of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature
than required. Several capacitors may also be placed in
parallel to meet size or height requirements in the design.
Because tantalum and OS-CON capacitors are not available in voltages above 30V, ceramics or aluminum
1
1 + (8fCRESR
)2
• 100%
where RESR is the ESR of the aluminum capacitor and C is
the overall capacitance of the ceramic capacitors. Using an
aluminum electrolytic with a ceramic also helps damp the
high Q of the ceramic, minimizing ringing.
Output Capacitor Selection
The selection of COUT is primarily determined by the ESR
required to minimize voltage ripple. The output ripple
(∆VOUT) is approximately equal to:
⎛
1 ⎞
∆VOUT ≤ ∆IL ⎜ ESR +
⎟
⎝
8fC OUT ⎠
Since ∆IL increases with input voltage, the output ripple is
highest at maximum input voltage. ESR also has a significant effect on the load transient response. Fast load
transitions at the output will appear as voltage across the
ESR of COUT until the feedback loop in the LTC3703-5 can
change the inductor current to match the new load current
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value. Typically, once the ESR requirement is satisfied the
capacitance is adequate for filtering and has the required
RMS current rating.
Manufacturers such as Nichicon, Nippon Chemi-Con and
Sanyo should be considered for high performance
throughhole capacitors. The OS-CON (organic semiconductor dielectric) capacitor available from Sanyo has the
lowest product of ESR and size of any aluminum electrolytic at a somewhat higher price. An additional ceramic
capacitor in parallel with OS-CON capacitors is recommended to reduce the effect of their lead inductance.
In surface mount applications, multiple capacitors placed
in parallel may be required to meet the ESR, RMS current
handling and load step requirements. Dry tantalum, special polymer and aluminum electrolytic capacitors are
available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only use
types that have been surge tested for use in switching
power supplies. Several excellent surge-tested choices
are the AVX TPS and TPSV or the KEMET T510 series.
Aluminum electrolytic capacitors have significantly higher
ESR, but can be used in cost-driven applications providing
that consideration is given to ripple current ratings and
long term reliability. Other capacitor types include
Panasonic SP and Sanyo POSCAPs.
Output Voltage
The LTC3703-5 output voltage is set by a resistor divider
according to the following formula:
⎛ R1⎞
VOUT = 0.8V⎜ 1 + ⎟
⎝ R2⎠
The external resistor divider is connected to the output as
shown in the Functional Diagram, allowing remote voltage
sensing. The resultant feedback signal is compared with
the internal precision 800mV voltage reference by the
error amplifier. The internal reference has a guaranteed
tolerance of ±1%. Tolerance of the feedback resistors will
add additional error to the output voltage. 0.1% to 1%
resistors are recommended.
MOSFET Driver Supplies (DRVCC and BOOST)
The LTC3703-5 drivers are supplied from the DRVCC and
BOOST pins (see Figure 2), which have an absolute
maximum voltage of 15V. If the main supply voltage, VIN,
is higher than 15V a separate supply with a voltage
between 5V and 15V must be used to power the drivers. If
a separate supply is not available, one can easily be
generated from the main supply using one of the circuits
shown in Figure 9. If the output voltage is between 5V and
15V, the output can be used to directly power the drivers
as shown in Figure 9a. If the output is below 5V, Figure 9b
shows an easy way to boost the supply voltage to a
sufficient level. This boost circuit uses the LT1613 in a
ThinSOTTM package and a chip inductor for minimal extra
area ( VIN.
For hard shorts, the inductor current is limited only by the
input supply capability. Refer to Current Limit Programming for buck mode for further considerations for current
limit programming.
quency so that the overall loop gain is 0dB here. The
compensation component to achieve this, using a Type 1
amplifier (see Figure 11), is:
Boost Converter: Feedback Loop/Compensation
Run/Soft-Start Function
Compensating a voltage mode boost converter is unfortunately more difficult than for a buck converter. This is due
to an additional right-half plane (RHP) zero that is present
in the boost converter but not in a buck. The additional phase
lag resulting from the RHP zero is difficult if not impossible
to compensate even with a Type 3 loop, so the best approach
is usually to roll off the loop gain at a lower frequency than
what could be achievable in buck converter.
The RUN/SS pin is a multipurpose pin that provide a softstart function and a means to shut down the LTC3703-5.
Soft-start reduces the input supply’s surge current by
gradually increasing the duty cycle and can also be used
for power supply sequencing.
A typical gain/phase plot of a voltage-mode boost converter is shown in Figure 16. The modulator gain and
phase can be measured as described for a buck converter
or can be estimated as follows:
GAIN (COMP-to-VOUT DC gain) = 20Log(VOUT2/VIN)
Dominant Pole: fP =
VIN
1
•
VOUT 2π LC
Since significant phase shift begins at frequencies above
the dominant LC pole, choose a crossover frequency no
greater than about half this pole frequency. The gain of the
compensation network should equal –GAIN at this fre-
G = 10–GAIN/20
C1 = 1/(2π • f • G • R1)
Pulling RUN/SS below 1V puts the LTC3703-5 into a low
quiescent current shutdown (IQ ≅ 25µA). This pin can be
driven directly from logic as shown in Figure 17. Releasing
RUN/SS
2V/DIV
VOUT
5V/DIV
IL
2A/DIV
VIN = 50V
ILOAD = 2A
CSS = 0.01µF
2ms/DIV
37035 F17
Figure 17. LTC3703-5 Startup Operation
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the RUN/SS pin allows an internal 4µA current source to
charge up the soft-start capacitor CSS. When the voltage
on RUN/SS reaches 1V, the LTC3703-5 begins operating
at its minimum on-time. As the RUN/SS voltage increases
from 1V to 3V, the duty cycle is allowed to increase from
0% to 100%. The duty cycle control minimizes input
supply inrush current and elimates output voltage overshoot at start-up and ensures current limit protection even
with a hard short. The RUN/SS voltage is internally clamped
at 4V.
If RUN/SS starts at 0V, the delay before starting is
approximately:
1V
C SS = (0.25s / µF )C SS
4µA
plus an additional delay, before the output will reach its
regulated value, of:
tDELAY,START =
3V – 1V
C SS = (0.5s / µF )C SS
4µA
The start delay can be reduced by using diode D1 in
Figure 18.
tDELAY,REG ≥
3.3V
OR 5V
RUN/SS
RUN/SS
D1
CSS
CSS
37035 F18
Figure 18. RUN/SS Pin Interfacing
MODE/SYNC Pin (Operating Mode and Secondary
Winding Control)
The MODE/SYNC pin is a dual function pin that can be used
for enabling or disabling Pulse Skip Mode operation and
also as an external clock input for synchronizing the internal oscillator (see next section). Pulse Skip Mode is enabled
when the MODE/SYNC pin is above 0.8V and is disabled,
i.e. forced continuous, when the pin is below 0.8V.
In addition to providing a logic input to force continuous
operation and external synchronization, the MODE/SYNC
pin provides a means to regulate a flyback winding output
as shown in Figure 9c. The auxiliary output is taken from
a second winding on the core of the inductor, converting
it to a transformer. The auxiliary output voltage is set by
the main output voltage and the turns ratio of the extra
winding to the primary winding as follows:
VSEC ≈ (N + 1)VOUT
Since the secondary winding only draws current when the
synchronous switch is on, load regulation at the auxiliary
output will be relatively good as long as the main output is
running in continuous mode. As the load on the primary
output drops and the LTC3703-5 switches to Pulse Skip
Mode operation, the auxiliary output may not be able to
maintain regulation, especially if the load on the auxiliary
output remains heavy. To avoid this, the auxiliary output
voltage can be divided down with a conventional feedback
resistor string with the divided auxiliary output voltage fed
back to the MODE/SYNC pin. The MODE/SYNC threshold
is trimmed to 800mV with 20mV of hysteresis, allowing
precise control of the auxiliary voltage and is set as
follows:
⎛ R1⎞
VSEC(MIN) ≈ 0.8V⎜ 1 + ⎟
⎝ R2⎠
where R1 and R2 are shown in Figure 9c.
If the LTC3703-5 is operating in Pulse Skip Mode and the
auxiliary output voltage drops below VSEC(MIN), the MODE/
SYNC pin will trip and the LTC3703-5 will resume continuous operation regardless of the load on the main output.
Thus, the MODE/SYNC pin removes the requirement that
power must be drawn from the inductor primary in order
to extract power from the auxiliary winding. With the loop
in continuous mode (MODE/SYNC < 0.8V), the auxiliary
outputs may nominally be loaded without regard to the
primary output load.
The following table summarizes the possible states available on the MODE/SYNC pin:
Table 1.
MODE/SYNC Pin
DC Voltage: 0V to 0.75V
DC Voltage: ≥ 0.87V
Feedback Resistors
Ext. Clock: 0V to ≥ 2V
Condition
Forced Continuous
Current Reversal Enabled
Pulse Skip Mode Operation
No Current Reversal
Regulating a Secondary Winding
Forced Continuous
No Current Reversal
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MODE/SYNC Pin (External Synchronization)
The internal LTC3703-5 oscillator can be synchronized to
an external oscillator by applying and clocking the MODE/
SYNC pin with a signal above 2VP-P. The internal oscillator
locks to the external clock after the second clock transition is received. When external synchronization is detected, LTC3703-5 will operate in forced continuous
mode. If an external clock transition is not detected for
three successive periods, the internal oscillator will revert
to the frequency programmed by the RSET resistor. The
internal oscillator can synchronize to frequencies between 100kHz and 600kHz, independent of the frequency
programmed by the RSET resistor. However, it is recommended that an RSET resistor be chosen such that the
frequency programmed by the RSET resistor is close to the
expected frequency of the external clock. In this way, the
best converter operation (ripple, component stress, etc)
is achieved if the external clock signal is lost.
Minimum On-Time Considerations (Buck Mode)
Minimum on-time tON(MIN) is the smallest amount of time
that the LTC3703-5 is capable of turning the top MOSFET
on and off again. It is determined by internal timing delays
and the amount of gate charge required to turn on the top
MOSFET. Low duty cycle applications may approach this
minimum on-time limit and care should be taken to ensure
that:
V
tON = OUT > tON(MIN)
VIN • f
where tON(MIN) is typically 200ns.
If the duty cycle falls below what can be accommodated by
the minimum on-time, the LTC3703-5 will begin to skip
cycles. The output will be regulated, but the ripple current
and ripple voltage will increase. If lower frequency operation is acceptable, the on-time can be increased above
tON(MIN) for the same step-down ratio.
PC board trace clearance between high and low voltage
pins in higher voltage applications. Where clearance is an
issue, the G28 package should be used. The G28 package
has 4 unconnected pins between the all adjacent high
voltage and low voltage pins, providing 5(0.0106”) =
0.053” clearance which will be sufficient for most applications up to 60V. For more information, refer to the printed
circuit board design standards described in IPC-2221
(www.ipc.org).
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power (x100%). Percent efficiency can be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. It is often useful to analyze the individual
losses to determine what is limiting the efficiency and
what change would produce the most improvement. Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3703-5 circuits: 1) LTC3703-5 VCC current,
2) MOSFET gate current, 3) I2R losses and 4) Topside
MOSFET transition losses.
1. VCC Supply current. The VCC current is the DC supply
current given in the Electrical Characteristics table which
powers the internal control circuitry of the LTC3703-5.
Total supply current is typically about 2.5mA and usually
results in a small (
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