LTC4007
4A, High Efficiency,
Standalone Li-Ion Battery Charger
FEATURES
DESCRIPTION
Complete Charger Controller for 3- or 4-Cell
Lithium-Ion Batteries
n High Conversion Efficiency: Up to 96%
n Output Currents Exceeding 4A
n ±0.8% Charging Voltage Accuracy
n Built-In Charge Termination for Li-Ion Batteries
n AC Adapter Current Limiting Maximizes Charge Rate*
n Thermistor Input for Temperature Qualified Charging
n Wide Input Voltage Range: 6V to 28V
n 0.5V Dropout Voltage; Maximum Duty Cycle: 98%
n Programmable Charge Current: ±4% Accuracy
n Indicator Outputs for Charging, C/10 Current Detection,
AC Adapter Present, Low Battery, Input Current
Limiting and Faults
n Charging Current Monitor Output
n Available in a 24-Pin Narrow SSOP Package
The LTC®4007 is a complete constant-current/constant-voltage charger controller for 3- or 4-cell lithium-ion batteries.
The PWM controller uses a synchronous, quasi-constant
frequency, constant off-time architecture that will not generate audible noise even when using ceramic capacitors.
Charging current is programmable to ±4% accuracy using
a programming resistor. Charging current can also be monitored as a voltage across the programming resistor.
n
The output float voltage is pin programmed for cell count
(3 cells or 4 cells) and chemistry (4.2V/4.1V). A timer,
programmed by an external resistor, sets the charge termination time. Charging is automatically restarted when
cell voltage falls below 3.9V/cell.
LTC4007 includes a thermistor input, which suspends
charging if an unsafe temperature condition is detected.
If the cell voltage is less than 2.5V, a low-battery indicator
asserts and can be used to program a trickle charge current
to safely charge depleted batteries. The FAULT pin is also
asserted and charging terminates if the low-battery condition persists for more than 1/4 of the total charge time.
APPLICATIONS
n
n
n
n
Notebook Computers
Portable Instruments
Battery-Backup Systems
Standalone Li-Ion Chargers
All registered trademarks and trademarks are the property of their respective owners. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
5723970.
TYPICAL APPLICATION
12.6V, 4A Li-Ion Battery Charger
INPUT SWITCH
DCIN
0V TO 28V
0.1µF
VLOGIC
100k
100k
100k
LOBAT
3C4C
DCIN
CHEM
INFET
LOBAT
CLP
ICL
ICL
ACP
ACP
TGATE
SHDN
BGATE
FAULT
FAULT
PGND
CHG
THERMISTOR
10k
NTC
32.4k
CHG
CSP
FLAG
BAT
NTC
0.025Ω
Q1
10µH
Q2
GND
TIMING RESISTOR
(~2 HOURS)
0.025Ω
20µF
Li-Ion
BATTERY
3.01k
3.01k
CHARGING
CURRENT
MONITOR
ITH
0.47µF
SYSTEM
LOAD
20µF
PROG
RT
309k
15nF
LTC4007 CLN
SHDN
FLAG
4.99k
6.04k
0.12µF
0.0047µF
Q1: Si4431DY
Q2: FDC6459
26.7k
4007 TA01
Rev D
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1
LTC4007
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
Voltage from DCIN, CLP, CLN to GND.......... +32V/–0.3V
PGND with Respect to GND................................... ±0.3V
CSP, BAT to GND.......................................... +28V/–0.3V
CHEM, 3C4C, RT to GND................................. +7V/–0.3V
NTC............................................................... +10V/–0.3V
ACP, SHDN, CHG, FLAG,
FAULT, LOBAT, ICL........................................ +32V/–0.3V
CLP to CLN.............................................................±0.5V
Operating Ambient Temperature Range
(Note 4) .............................................. –40°C to 85°C
Operating Junction Temperature............ –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
ORDER INFORMATION
TOP VIEW
DCIN
1
24 SHDN
CHG
2
23 INFET
ACP
3
22 BGATE
RT
4
21 PGND
FAULT
5
20 TGATE
GND
6
19 CLN
3C4C
7
18 CLP
LOBAT
8
17 FLAG
NTC
9
16 CHEM
ITH 10
15 BAT
PROG 11
14 CSP
NC 12
13 ICL
GN PACKAGE
24-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 88°C/W
http://www.linear.com/product/LTC4007#orderinfo
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4007EGN#PBF
LTC4007EGN#TRPBF
LTC4007EGN
24-Lead Plastic SSOP
–40°C to 85°C
Consult ADI Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL PARAMETER
DCIN Operating Range
Operating Current
IQ
Charge Voltage Accuracy
VTOL
ITOL
Charge Current Accuracy (Note 3)
CONDITIONS
Sum of Current from CLP, CLN , DCIN
Nominal Values: 12.3V, 12.6V, 16.4V,
16.8V (Note 2)
VCSP – VBAT Target = 100mV
MIN
6
TTOL
Termination Timer Accuracy
Shutdown
Battery Leakage Current
UVLO
Undervoltage Lockout Threshold
Shutdown Threshold at SHDN
SHDN Pin Current
Operating Current in Shutdown
DCIN = 0V
SHDN = 3V
DCIN Rising, VBAT = 0
l
l
l
l
l
l
VSHDN = 0V, Sum of Current from CLP,
CLN, DCIN
–0.8
–1.0
–4
–5
–60
–35
MAX
28
5
0.8
1.0
4
5
60
35
–15
15
%
35
10
5.5
2.5
µA
µA
V
V
µA
mA
3
l
VBAT < 6V, VCSP – VBAT Target = 10mV
6V ≤ VBAT ≤ VLOBAT, VCSP – VBAT
Target = 10mV
RRT = 270k
TYP
–10
4.2
1
15
4.7
1.6
–10
2
3
UNITS
V
mA
%
%
%
%
%
%
Rev D
2
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LTC4007
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL PARAMETER
Current Sense Amplifier, CA1
Input Bias Current Into BAT Pin
CMSL
CA1/I1 Input Common Mode Low
CMSH
CA1/I1 Input Common Mode High
Current Comparators ICMP and IREV
ITMAX
Maximum Current Sense Threshold (VCSP – VBAT)
Reverse Current Threshold (VCSP – VBAT)
ITREV
Current Sense Amplifier, CA2
Transconductance
Source Current
Sink Current
Current Limit Amplifier
Transconductance
Current Limit Threshold
VCLP
CLP Input Bias Current
ICLP
Voltage Error Amplifier, EA
Transconductance
Sink Current
OVSD
Overvoltage Shutdown Threshold as a Percent of
Programmed Charger Voltage
Input P-Channel FET Driver (INFET)
DCIN Detection Threshold (VDCIN – VCLN)
Forward Regulation Voltage (VDCIN – VCLN)
Reverse Voltage Turn-Off Voltage (VDCIN – VCLN )
INFET “On” Clamping Voltage (VDCIN – VINFET)
INFET “Off” Clamping Voltage (VDCIN – VINFET)
Thermistor
NTCVR Reference Voltage During Sample Time
High Threshold
Low Threshold
Thermistor Disable Current
Indicator Outputs (ACP, CHG, FLAG, LOBAT, ICL, FAULT
C10TOL FLAG (C/10) Accuracy
LBTOL LOBAT Threshold Accuracy
RESTART Threshold Accuracy
CONDITIONS
MIN
TYP
MAX
11.67
l
0
VCLN – 0.2
l
VITH = 2.5V
l
140
l
93
1.4
100
100
102
l
0
0.17
0.25
25
–25
5.8
50
–60
5
NTCVR
• 0.48
NTCVR
• 0.115
4.5
NTCVR
• 0.5
NTCVR
• 0.125
l
l
VNTC Rising
l
VNTC Falling
l
l
VNTC ≤ 10V
ICL Threshold Accuracy
107
l
DCIN Voltage Ramping Down
IINFET = 1µA
IINFET = –25µA
l
l
l
l
l
l
l
l
l
0.375
7.10
7.27
9.46
9.70
11.13
11.40
14.84
15.20
83
0.397
7.32
7.50
9.76
10
11.42
11.70
15.23
15.60
93
µA
V
V
mV
mV
mmho
µA
µA
1
36
107
Measured at ITH, VITH = 1.4V
Voltage Falling at PROG
3C4C = 0V, CHEM = 0V
3C4C = 0V, CHEM = Open
3C4C = Open, CHEM = 0V
3C4C = Open, CHEM = Open
3C4C = 0V, CHEM = 0V
3C4C = 0V, CHEM = Open
3C4C = Open, CHEM = 0V
3C4C = Open, CHEM = Open
200
1
–40
40
Measured at ITH, VITH = 1.4V
Measured at ITH, VITH = 1.4V
DCIN Voltage Ramping Up
from VCLN – 0.1V
165
–30
UNITS
mmho
mV
nA
110
mmho
µA
%
V
6.5
0.25
mV
mV
V
V
V
V
NTCVR
• 0.52
NTCVR
• 0.135
10
µA
0.420
7.52
7.71
10.10
10.28
11.65
11.94
15.54
15.92
1O5
V
V
V
V
V
V
V
V
V
mV
V
Rev D
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3
LTC4007
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL PARAMETER
Low Logic Level of ACP, CHG, FLAG, LOBAT,
VOL
ICL, FAULT
High Logic Level of CHG, LOBAT, ICL
VOH
Off State Leakage Current of ACP, FLAG, FAULT
IOFF
Pull-Up Current on CHG, LOBAT, ICL
IPO
Charge Termination Defeat Threshold at CHG
Programming Inputs (CHEM and 3C4C)
High Logic Level
VIH
Low Logic Level
VIL
Pull-Up Current
IPI
Oscillator
Regulator Switching Frequency
fOSC
Regulator Switching Frequency in Drop Out
fMIN
DCMAX Regulator Maximum Duty Cycle
Gate Drivers (TGATE, BGATE)
VTGATE High (VCLN – VTGATE)
VBGATE High
VTGATE Low (VCLN – VTGATE)
VBGATE Low
TGATE Transition Time
TGTR
TGATE Rise Time
TGTF
TGATE Fall Time
BGATE Transition Time
BGTR
BGATE Rise Time
BGTF
BGATE Fall Time
VTGATE at Shutdown (VCLN – VTGATE)
VBGATE at Shutdown
CONDITIONS
IOL = 100µA
MIN
TYP
l
IOH = –1µA
VOH = 3V
V = 0V
l
2.7
–1
MAX
0.5
1
–10
1
UNITS
V
V
µA
µA
V
3.3
V
V
µA
345
kHz
kHz
%
5.6
5.6
50
10
10
50
mV
V
V
mV
CLOAD = 3000pF, 10% to 90%
CLOAD = 3000pF, 10% to 90%
50
50
110
100
ns
ns
CLOAD = 3000pF, 10% to 90%
CLOAD = 3000pF, 10% to 90%
ITGATE = –1µA, DCIN = 0V, CLN = 12V
IBGATE = 1µA, DCIN = 0V, CLN = 12V
40
40
90
80
100
100
ns
ns
mV
mV
l
l
1
V = 0V
–14
Duty Cycle ≥ 98%
VCSP = VBAT
ITGATE = –1mA
CLOAD = 3000pF
CLOAD = 3000pF
IBGATE = 1mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: See "Test Circuit".
255
20
98
4.5
4.5
300
25
99
Note 3: Does not include tolerance of current sense resistor or current
programming resistor.
Note 4: The LTC4007E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Rev D
4
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LTC4007
TYPICAL PERFORMANCE CHARACTERISTICS
INFET Response Time to
Reverse Current
Line Regulation
0
0.05
–0.5
0
–1.0
OUTPUT VOLTAGE ERROR (%)
Vgs OF PFET (2V/DIV)
Vgs = 0
0.10
Vs OF PFET (5V/DIV)
VOUT ERROR (%)
–0.05
C3C4 = OPEN
–0.10
–0.15
–0.20
C3C4 = GND
–0.25
–0.30
Vs = 0V
–0.35
Id (REVERSE) OF
PFET (5A/DIV)
Id = 0A
–0.45
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
3C4C = GND
3C4C = OPEN
–4.5
–0.40
1.25µs/DIV
VOUT vs IOUT
13
TEST PERFORMED ON DEMOBOARD
VCHARGE = 12.6V
VIN = 15VDC
CHARGER = ON
PFET = 1/2 Si4925DY
ICHARGE = BAT
LOW
HIGH
HIGH
HIGH
HIGH*
HIGH*
Running
LOW
Input current limited charging
>BAT
LOW
HIGH
HIGH
HIGH*
HIGH*
LOW
Running
LOW
Charger paused due to thermistor out of range
>BAT
LOW
HIGH
X
X
LOW
(from
NTC)
HIGH
Paused
LOW
X
HIGH
X
X
HIGH
HIGH
LOW
Reset
HIGH
Terminated by low-battery fault (Note 1)
>BAT
LOW
HIGH
LOW
HIGH*
LOW
LOW
>T/4
HIGH
(Faulted)
Timer is reset when FLAG goes low, then
terminates after 1/4 T
>BAT
LOW
HIGH
HIGH
LOW
HIGH
LOW
>T/4
after
FLAG =
LOW
HIGH
(Waiting for
Restart
Terminated by expired timer
>BAT
LOW
HIGH
HIGH
HIGH
HIGH
LOW
>T
HIGH
(Waiting for
Restart
Shut down by SHDN pin
Charge termination defeated
Shut down by undervoltage lockout
X
X
X
X
X
X
X
X
Forced LOW
>BAT +
7% of programmed value). In this
case, both MOSFETs are turned off until the overvoltage
condition is cleared. This feature is useful for batteries
which “load dump” themselves by opening their protection switch to perform functions such as calibration or
pulse mode charging.
therefore,
voltage, thereby reducing charging current. The ICL indicator output will go low when this condition is detected and
the FLAG indicator will be inhibited if it is not already LOW.
PWM Watchdog Timer
There is a watchdog timer that observes the activity on
the BGATE and TGATE pins. If TGATE stops switching for
more than 40µs, the watchdog activates and turns off
the top MOSFET for about 400ns. The watchdog engages
to prevent very low frequency operation in dropout—a
potential source of audible noise when using ceramic
input and output capacitors.
Charger Start-Up
When the charger is enabled, it will not begin switching
until the ITH voltage exceeds a threshold that assures
initial current will be positive. This threshold is 5% to
15% of the maximum programmed current. After the
charger begins switching, the various loops will control
the current at a level that is higher or lower than the initial
current. The duration of this transient condition depends
upon the loop compensation, but is typically less than
100µs.
Thermistor Detection
The thermistor detection circuit is shown in Figure 3. It
requires an external resistor and capacitor in order to
function properly.
The thermistor detector performs a sample-and-hold
function. An internal clock, whose frequency is determined
Rev D
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11
LTC4007
OPERATION
by the timing resistor connected to RT, keeps switch S1
closed to sample the thermistor:
tHOLD = 10 • RRT • 17.5pF = 54µs,
tSAMPLE = 127.5 • 20 • RRT • 17.5pF = 13.8ms,
When the tHOLD interval ends the result of the thermistor
testing is stored in the D flip-flop (DFF). If the voltage at
NTC is within the limits provided by the resistor divider
feeding the comparators, then the NOR gate output will
be low and the DFF will set TBAD to zero and charging will
continue. If the voltage at NTC is outside of the resistor divider limits, then the DFF will set TBAD to one, the
charger will be shut down, FAULT pin is set low and the
timer will be suspended until TBAD returns to zero (see
Figure 4).
for RRT = 309k
for RRT = 309k
The external RC network is driven to approximately 4.5V
and settles to a final value across the thermistor of:
VRTH(FINAL) =
4.5V •R TH
R TH +R9
This voltage is stored by C7. Then the switch is opened
for a short period of time to read the voltage across the
thermistor.
LTC4007
R9
32.4k
RTH
10k
NTC
C7
0.47µF
9
CLK
–
NTC
S1
+
~4.5V
60k
+
–
45k
–
+
15k
D
TBAD
Q
C
4007 F03
Figure 3.
CLK
(NOT TO
SCALE)
tHOLD
VOLTAGE ACROSS THERMISTOR
tSAMPLE
COMPARATOR HIGH LIMIT
VNTC
COMPARATOR LOW LIMIT
4007 F04
Figure 4.
Rev D
12
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LTC4007
APPLICATIONS INFORMATION
Battery Detection
LTC4007
PROG
It is generally not good practice to connect a battery while
the charger is running. The timer is in an unknown state
and the charger could provide a large surge current into
the battery for a brief time. The Figure 5 circuit keeps the
charger shut down and the timer reset while a battery is
not connected.
4007 F05
Figure 5.
Charger Current Programming
The basic formula for charging current is:
VREF • 3.01kΩ /RPROG – 0.035V
RSENSE
VREF = 1.19V
This leaves two degrees of freedom: RSENSE and RPROG.
The 3.01k input resistors must not be altered since internal currents and voltages are trimmed for this value. Pick
RSENSE by setting the average voltage between CSP and
BAT to be close to 100mV during maximum charger current. Then RPROG can be determined by solving the above
equation for RPROG.
RPROG =
VREF • 3.01kΩ
RSENSE •ICHARGE(MAX) + 0.035V
Table 2. Recommended RSNS and RPROG Resistor Values
IMAX (A)
5V
0V
RSENSE (Ω) 1%
RSENSE (W)
RZ
102k
Q1
2N7002
4007 F06
Figure 6. PWM Current Programming
24 SHDN
SWITCH CLOSED
WHEN BATTERY
CONNECTED
CPROG
RPROG
LTC4007
1 DCIN
ADAPTER
POWER
ICHARGE(MAX) =
11
RPROG (kΩ) 1%
1.0
0.100
0.25
26.7
2.0
0.050
0.25
26.7
3.0
0.033
0.5
26.7
4.0
0.025
0.5
26.7
Charging current can be programmed by pulse width
modulating RPROG with a switch Q1 to RPROG at a frequency higher than a few kHz (Figure 6). CPROG must
be increased to reduce the ripple caused by the RPROG
switching. The compensation capacitor at ITH will probably need to be increased also to improve stability and prevent large overshoot currents during start-up conditions.
Charging current will be proportional to the duty cycle of
the switch with full current at 100% duty cycle and zero
current when Q1 is off.
Maintaining C/10 Accuracy
The C/10 comparator threshold that drives the FLAG pin
has a fixed threshold of approximately VPROG = 400mV.
This threshold works well when RPROG is 26.7k, but will
not yield a 10% charging current indication if RPROG
is a different value. There are situations where a standard value of RSENSE will not allow the desired value of
charging current when using the preferred RPROG value.
In these cases, where the full-scale voltage across RSENSE
is within ±20mV of the 100mV full-scale target, the input
resistors connected to CSP and BAT can be adjusted to
provide the desired maximum programming current as
well as the correct FLAG trip point.
For example, the desired max charging current is 2.5A but
the best RSENSE value is 0.033Ω. In this case, the voltage across RSENSE at maximum charging current is only
82.5mV, normally RPROG would be 30.1k but the nominal
FLAG trip point is only 5% of maximum charging current.
If the input resistors are reduced by the same amount as
Rev D
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13
LTC4007
APPLICATIONS INFORMATION
the full-scale voltage is reduced then, R4 = R5 = 2.49k and
RPROG = 26.7k, the maximum charging current is still 2.5A
but the FLAG trip point is maintained at 10% of full scale.
Charger Voltage Programming
Pins CHEM and C3C4 are used to program the charger
final output voltage. The CHEM pin programs Li-Ion battery chemistry for 4.1V/cell (low) or 4.2V/cell (high). The
C3C4 pin selects either 3 series cells (low) or 4 series cells
(high). It is recommended that these pins be shorted to
ground (logic low) or left open (logic high) to effect the
desired logic level. Use open-collector or open-drain outputs when interfacing to the CHEM and 3C4C pins from a
logic control circuit.
Table 3. Charger Voltage Programming
VFINAL (V)
3C4C
CHEM
12.3
LOW
LOW
12.6
LOW
HIGH
16.4
HIGH
LOW
16.8
HIGH
HIGH
Setting the Timer Resistor
The charger termination timer is designed for a range
of 1hour to 3 hour with a ±15% uncertainty. The timer
is programmed by the resistor RRT using the following
equation:
tTIMER = 10 • 227 • RRT • 17.5pF (seconds)
180
160
tTIMER (MINUTES)
There are other effects to consider. The voltage across the
current comparator is scaled to obtain the same values
as the 100mV sense voltage target, but the input referred
sense voltage is reduced, causing some careful consideration of the ripple current. Input referred maximum
comparator threshold is 117mV, which is the same ratio
of 1.4x the DC target. Input referred IREV threshold is
scaled back to –24mV. The current at which the switcher
starts will be reduced as well so there is some risk of
boost activity. These concerns can be addressed by using
a slightly larger inductor to compensate for the reduction
of tolerance to ripple current.
200
140
120
100
80
60
40
20
0
100 150 200 250 300 350 400 450 500
RRT (kΩ)
4007 F07
Figure 7. tTIMER vs RRT
It is important to keep the parasitic capacitance on the RT
pin to a minimum. The trace connecting RT to RRT should
be as short as possible.
Soft-Start
The LTC4007 is soft started by the 0.12µF capacitor on
the ITH pin. On start-up, ITH pin voltage will rise quickly
to 0.5V, then ramp up at a rate set by the internal 40µA
pull-up current and the external capacitor. Battery charging
current starts ramping up when ITH voltage reaches 0.8V
and full current is achieved with ITH at 2V. With a 0.12µF
capacitor, time to reach full charge current is about 2ms
and it is assumed that input voltage to the charger will
reach full value in less than 2ms. The capacitor can be
increased up to 1µF if longer input start-up times are
needed.
Input and Output Capacitors
The input capacitor (C2) is assumed to absorb all input
switching ripple current in the converter, so it must have
adequate ripple current rating. Worst-case RMS ripple
current will be equal to one half of output charging current. Actual capacitance value is not critical. Solid tantalum low ESR capacitors have high ripple current rating
in a relatively small surface mount package, but caution
Rev D
14
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LTC4007
APPLICATIONS INFORMATION
must be used when tantalum capacitors are used for input
or output bypass. High input surge currents can be created when the adapter is hot-plugged to the charger or
when a battery is connected to the charger. Solid tantalum
capacitors have a known failure mechanism when subjected to very high turn-on surge currents. Kemet T495
series of “Surge Robust” low ESR tantalums are rated for
high surge conditions such as battery to ground.
The relatively high ESR of an aluminum electrolytic for
C1, located at the AC adapter input terminal, is helpful in
reducing ringing during the hot-plug event. Refer to AN88
for more information.
Highest possible voltage rating on the capacitor will minimize problems. Consult with the manufacturer before use.
Alternatives include high capacity ceramic (at least 20µF)
from Tokin, United Chemi-Con/Marcon, et al. Other alternative capacitors include OS-CON capacitors from Sanyo.
The output capacitor (C3) is also assumed to absorb
output switching current ripple. The general formula for
capacitor current is:
⎛
⎞
V
0.29 ( VBAT ) ⎜ 1– BAT ⎟
⎝ VDCIN ⎠
IRMS =
(L1)( f )
Inductor Selection
Higher operating frequencies allow the use of smaller
inductor and capacitor values. A higher frequency generally results in lower efficiency because of MOSFET gate
charge losses. In addition, the effect of inductor value
on ripple current and low current operation must also
be considered. The inductor ripple current ∆IL decreases
with higher frequency and increases with higher VIN.
ΔIL =
⎛ V ⎞
1
VOUT ⎜ 1– OUT ⎟
VIN ⎠
( f )(L )
⎝
Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting
ripple current is ∆IL = 0.4(IMAX). In no case should ∆IL
exceed 0.6(IMAX) due to limits imposed by IREV and CA1.
Remember the maximum ∆IL occurs at the maximum
input voltage. In practice 10µH is the lowest value recommended for use.
Lower charger currents generally call for larger inductor
values. Use Table 4 as a guide for selecting the correct
inductor value for your application.
Table 4.
For example:
VDCIN = 19V, VBAT = 12.6V, L1 = 10µH, and
f = 300kHz, IRMS = 0.41A.
EMI considerations usually make it desirable to minimize ripple current in the battery leads, and beads or
inductors may be added to increase battery impedance
at the 300kHz switching frequency. Switching ripple current splits between the battery and the output capacitor
depending on the ESR of the output capacitor and the battery impedance. If the ESR of C3 is 0.2Ω and the battery
impedance is raised to 4Ω with a bead or inductor, only
5% of the current ripple will flow in the battery.
MAX AVERAGE
CURRENT (A)
INPUT VOLTAGE (V)
MINIMUM INDUCTOR
VALUE (µH)
1
≤20
40 ±20%
1
>20
56 ±20%
2
≤20
20 ±20%
2
>20
30 ±20%
3
≤20
15 ±20%
3
>20
20 ±20%
4
≤20
10 ±20%
4
>20
15 ±20%
Rev D
For more information www.analog.com
15
LTC4007
APPLICATIONS INFORMATION
Charger Switching Power MOSFET
and Diode Selection
Two external power MOSFETs must be selected for use
with the charger: a P-channel MOSFET for the top (main)
switch and an N-channel MOSFET for the bottom (synchronous) switch.
The peak-to-peak gate drive levels are set internally. This
voltage is typically 6V. Consequently, logic-level threshold
MOSFETs must be used. Pay close attention to the BVDSS
specification for the MOSFETs as well; many of the logic
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance RDS(ON), total gate capacitance QG, reverse
transfer capacitance CRSS, input voltage and maximum
output current. The charger is operating in continuous
mode at moderate to high currents so the duty cycles for
the top and bottom MOSFETs are given by:
Main Switch Duty Cycle = VOUT/VIN
Synchronous Switch Duty Cycle = (VIN – VOUT)/VIN.
The MOSFET power dissipations at maximum output current are given by:
PMAIN = VOUT/VIN(IMAX)2(1 + δ∆T)RDS(ON)
+ k(VIN)2(IMAX)(CRSS)(fOSC)
PSYNC = (VIN – VOUT)/VIN(IMAX)2(1 + δ∆T)RDS(ON)
Where δ∆T is the temperature dependency of RDS(ON)
and k is a constant inversely related to the gate drive
current. Both MOSFETs have I2R losses while the PMAIN
equation includes an additional term for transition losses,
which are highest at high input voltages. For VIN < 20V
the high current efficiency generally improves with larger
MOSFETs, while for VIN > 20V the transition losses rapidly increase to the point that the use of a higher RDS(ON)
device with lower CRSS actually provides higher efficiency. The synchronous MOSFET losses are greatest at
high input voltage or during a short circuit when the duty
cycle in this switch in nearly 100%. The term (1 +δ∆T) is
generally given for a MOSFET in the form of a normalized
RDS(ON) vs temperature curve, but δ = 0.005/°C can be
used as an approximation for low voltage MOSFETs. CRSS
= QGD/∆VDS is usually specified in the MOSFET characteristics. The constant k = 2 can be used to estimate the
contributions of the two terms in the main switch dissipation equation.
If the charger is to operate in low dropout mode or with
a high duty cycle greater than 85%, then the topside
P-channel efficiency generally improves with a larger
MOSFET. Using asymmetrical MOSFETs may achieve cost
savings or efficiency gains.
The Schottky diode D1, shown in the Typical Application
on the back page, conducts during the dead-time between
the conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on
and storing charge during the dead-time, which could cost
as much as 1% in efficiency. A 1A Schottky is generally
a good size for 4A regulators due to the relatively small
average current. Larger diodes can result in additional
transition losses due to their larger junction capacitance.
The diode may be omitted if the efficiency loss can be
tolerated.
Calculating IC Power Dissipation
The power dissipation of the LTC4007 is dependent upon
the gate charge of the top and bottom MOSFETs (QG1 &
QG2 respectively) The gate charge is determined from the
manufacturer’s data sheet and is dependent upon both
the gate voltage swing and the drain voltage swing of the
MOSFET. Use 6V for the gate voltage swing and VDCIN for
the drain voltage swing.
PD = VDCIN • (fOSC (QG1 + QG2) + IQ)
Example:
VDCIN = 19V, fOSC = 345kHz, QG1 = QG2 = 15nC,
IQ = 5mA
PD = 292mW
Rev D
16
For more information www.analog.com
LTC4007
APPLICATIONS INFORMATION
Adapter Limiting
An important feature of the LTC4007 is the ability to
automatically adjust charging current to a level which
avoids overloading the wall adapter. This allows the product to operate at the same time that batteries are being
charged without complex load management algorithms.
Additionally, batteries will automatically be charged at the
maximum possible rate of which the adapter is capable.
This feature is created by sensing total adapter output current and adjusting charging current downward if a preset
adapter current limit is exceeded. True analog control is
used, with closed-loop feedback ensuring that adapter load
current remains within limits. Amplifier CL1 in Figure 8
senses the voltage across RCL, connected between the
CLP and CLN pins. When this voltage exceeds 100mV,
the amplifier will override programmed charging current
to limit adapter current to 100mV/RCL. A lowpass filter
formed by 5kΩ and 15nF is required to eliminate switching noise. If the current limit is not used, CLP and CLN
should be connected together and tied to DCIN.
Note that the ICL pin will be asserted when the voltage
across RCL is 93mV, before the adapter limit regulation
threshold.
LTC4007
100mV
–
+
18
CLP
15nF
CL1
5k
+
19
*RCL =
RCL*
CLN
100mV
ADAPTER CURRENT LIMIT
+
AC ADAPTER
INPUT
VIN
CIN
input current limit tolerance and use that current to determine the resistor value.
RCL = 100mV/ILIM
ILIM = Adapter Min Current –
(Adapter Min Current • 7%)
Table 5. Common RCL Resistor Values
ADAPTER
RATING (A)
RCL VALUE*
(Ω) 1%
RCL POWER
DISSIPATION (W)
RCL POWER
RATING (W)
1.5
0.06
0.135
0.25
1.8
0.05
0.162
0.25
2
0.045
0.18
0.25
2.3
0.039
0.206
0.25
2.5
0.036
0.225
0.5
2.7
0.033
0.241
0.5
3
0.03
0.27
0.5
* Values shown above are rounded to nearest standard value.
As is often the case, the wall adapter will usually have
at least a +10% current limit margin and many times
one can simply set the adapter current limit value to the
actual adapter rating (see Table 5).
Designing the Thermistor Network
There are several networks that will yield the desired function of voltage vs temperature needed for proper operation of the thermistor. The simplest of these is the voltage
divider shown in Figure 9. Unfortunately, since the HIGH/
LOW comparator thresholds are fixed internally, there is
only one thermistor type that can be used in this network;
the thermistor must have a HIGH/LOW resistance ratio of
1:7. If this happy circumstance is true for you, then simply
set R9 = RTH(LOW).
4007 F08
LTC4007
Figure 8. Adapter Current Limiting
NTC 9
R9
C7
Setting Input Current Limit
To set the input current limit, you need to know the minimum wall adapter current rating. Subtract 7% for the
RTH
4007 F09
Figure 9. Voltage Divider Thermistor Network
Rev D
For more information www.analog.com
17
LTC4007
APPLICATIONS INFORMATION
LTC4007
NTC 9
Example #2: 100kΩ NTC
R9
C7
R9A
RTH
4007 F10
Figure 10. General Thermistor Network
If you are using a thermistor that doesn’t have a 1:7 HIGH/
LOW ratio, or you wish to set the HIGH/LOW limits to
different temperatures, then the more generic network in
Figure 10 should work.
Once the thermistor, RTH, has been selected and the
thermistor value is known at the temperature limits, then
resistors R9 and R9A are given by:
For NTC thermistors:
TLOW = 5°C, THIGH = 50°C
RTH = 100k at 25°C,
RTH(LOW) = 272.05k at 5°C
RTH(HIGH) = 33.195k at 50°C
R9 = 226.9k → 226k (nearest 1% value)
R9A = 1.365M → 1.37M (nearest 1% value)
Example #3: 22kΩ PTC
TLOW = 0°C, THIGH = 50°C
RTH = 22k at 25°C,
RTH(LOW) = 6.53k at 0°C
RTH(HIGH) = 61.4k at 50°C
R9 = 43.9k → 44.2k (nearest 1% value)
R9A = 154k
R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(LOW) – RTH(HIGH))
Sizing the Thermistor Hold Capacitor
R9A = 6 RTH(LOW) • RTH(HIGH)/(RTH(LOW) – 7 •
RTH(HIGH))
During the hold interval, C7 must hold the voltage across
the thermistor relatively constant to avoid false readings.
A reasonable amount of ripple on NTC during the hold
interval is about 10mV to 15mV. Therefore, the value of
C7 is given by:
Where RTH(LOW) > 7 • RTH(HIGH)
For PTC thermistors:
R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(HIGH) – RTH(LOW))
C7 = tHOLD/(R9/7 • –ln(1 – 8 • 15mV/4.5V))
R9A = 6 RTH(LOW) • RTH(HIGH)/(RTH(HIGH) – 7 •
RTH(LOW))
= 10 • RRT • 17.5pF/(R9/7 • –ln(1 – 8 • 15mV/4.5V)
Where RTH(HIGH) > 7 • RTH(LOW)
Example #1: 10kΩ NTC with custom limits
TLOW = 0°C, THIGH = 50°C
RTH = 10k at 25°C,
RTH(LOW) = 32.582k at 0°C
RTH(HIGH) = 3.635k at 50°C
R9 = 24.55k → 24.3k (nearest 1% value)
R9A = 99.6k → 100k (nearest 1% value)
Example:
R9 = 24.3k
RRT = 309k (~2 hour timer)
C7 = 0.57µF → 0.56µF (nearest value)
Rev D
18
For more information www.analog.com
LTC4007
APPLICATIONS INFORMATION
Disabling the Thermistor Function
If the thermistor is not needed, connecting a resistor
between DCIN and NTC will disable it. The resistor should
be sized to provide at least 10µA with the minimum voltage applied to DCIN and 10V at NTC. Do not exceed 30µA.
Generally, a 301k resistor will work for DCIN less than
15V. A 499k resistor is recommended for DCIN between
15V and 24V.
Conditioning Depleted Batteries
Severely depleted batteries, with less than 2.5V/cell,
should be conditioned with a trickle charge to prevent
possible damage. This trickle charge is typically 10% of
the 1C rate of the battery. The LTC4007 can automatically trickle charge depleted batteries using the circuit
in Figure 11. If the battery voltage is less than 2.5V/cell
(2.44V/cell if CHEM is low) then the LOBAT indicator will
be low and Q4 is off. This programs the charging current
with RPROG = R6 + R14. Charging current is approximately
300mA. When the cell voltage becomes greater than 2.5V
the LOBAT indicator goes high, Q4 shorts out R13, then
RPROG = R6. Charging current is then equal to 3A.
PCB Layout Considerations
For maximum efficiency, the switch node rise and fall
times should be minimized. To prevent magnetic and
electrical field radiation and high frequency resonant
problems, proper layout of the components connected
to the IC is essential (see Figure 12). Here is a PCB layout
priority list for proper layout. Layout the PCB using this
specific order.
1. Input capacitors need to be placed as close as possible to switching FET’s supply and ground connections.
Shortest copper trace connections possible. These
parts must be on the same layer of copper. Vias must
not be used to make this connection.
2. The control IC needs to be close to the switching FET’s
gate terminals. Keep the gate drive signals short for
a clean FET drive. This includes IC supply pins that
connect to the switching FET source pins. The IC can
be placed on the opposite side of the PCB relative to
above.
3. Place inductor input as close as possible to switching
FET’s output connection. Minimize the surface area of
this trace. Make the trace width the minimum amount
needed to support current—no copper fills or pours.
Avoid running the connection using multiple layers in
parallel. Minimize capacitance from this node to any
other trace or plane.
4. Place the output current sense resistor right next to the
inductor output but oriented such that the IC’s current
sense feedback traces going to resistor are not long.
The feedback traces need to be routed together as a
single pair on the same layer at any given time with
smallest trace spacing possible. Locate any filter component on these traces next to the IC and not at the
sense resistor location.
5. Place output capacitors next to the sense resistor output and ground.
6. Output capacitor ground connections need to feed
into same copper that connects to the input capacitor
ground before tying back into system ground.
Rev D
For more information www.analog.com
19
LTC4007
APPLICATIONS INFORMATION
General Rules
7. Connection of switching ground to system ground or
internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.
8. Route analog ground as a trace tied back to IC ground
(analog ground pin if present) before connecting to any
other ground. Avoid using the system ground plane.
CAD trick: make analog ground a separate ground net
and use a 0Ω resistor to tie analog ground to system
ground.
9. A good rule of thumb for via count for a given high
current path is to use 0.5A per via. Be consistent.
10. If possible, place all the parts listed above on the
same PCB layer.
11. Copper fills or pours are good for all power connections except as noted above in Rule 3. You can also
use copper planes on multiple layers in parallel too—
this helps with thermal management and lower trace
inductance improving EMI performance further.
12. For best current programming accuracy provide a
Kelvin connection from RSENSE to CSP and BAT. See
Figure 12 as an example.
It is important to keep the parasitic capacitance on the RT,
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
Rev D
20
For more information www.analog.com
LTC4007
APPLICATIONS INFORMATION
Q3
INPUT SWITCH
DCIN
0V TO 20V
3A
VLOGIC
LOBAT
C1
0.1µF
R10
100k
R11
100k
R12
100k
*
3C4C
DCIN
*
CHEM
INFET
LOBAT
CLP
ICL
ACP
ACP
TGATE
SHDN
SHDN
BGATE
FAULT
FAULT
PGND
FLAG
THERMISTOR
C7
0.47µF
RT
309k
1%
Q2
D1
RSENSE
0.033Ω
1%
ITH
GND
TIMING RESISTOR
(~2 HOURS)
L1
15µH 3A
BAT
C3
20µF
R5 3.01k 1%
PROG
RT
Q1
SYSTEM
LOAD
R4
3.01k
1%
BAT
FLAG
NTC
C2
20µF
CSP
CHG
R9 32.4k 1%
RCL
0.033Ω
1%
C4
15nF
LTC4007 CLN
ICL
CHG
R1
4.99k
1%
R7
6.04k
1%
C6
0.12µF
C5
0.0047µF
R6
26.7k
1%
R14
52.3k
1%
Q4
*PIN OPEN
D1: MBRM140T3
Q1: Si4431ADY
Q2: FDC645N
Q4: 2N7002 OR BSS138
MONITOR
(CHARGING
CURRENT
MONITOR)
4007 F11
Figure 11. Circuit Application (16.8V/3A) to Automatically Trickle Charge Depleted Batteries
Rev D
For more information www.analog.com
21
LTC4007
APPLICATIONS INFORMATION
SWITCH NODE
DIRECTION OF CHARGING CURRENT
L1
VBAT
C2
VIN
RSENSE
HIGH
FREQUENCY
CIRCULATING
PATH
D1
C3
BAT
4007 F13
CSP
BAT
4007 F12
Figure 12. High Speed Switching Path
Figure 13. Kelvin Sensing of Charging Current
PACKAGE DESCRIPTION
GN Package
24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 – .344*
(8.560 – 8.738)
24 23 22 21 20 19 18 17 16 15 1413
.045 ±.005
.229 – .244
(5.817 – 6.198)
.254 MIN
.033
(0.838)
REF
.150 – .157**
(3.810 – 3.988)
.150 – .165
1
.0165 ±.0015
2 3
4
5 6
7
8
9 10 11 12
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
.015 ± .004
× 45°
(0.38 ± 0.10)
.0075 – .0098
(0.19 – 0.25)
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.008 – .012
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.0250
(0.635)
BSC
GN24 (SSOP) 0204
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Rev D
22
For more information www.analog.com
LTC4007
REVISION HISTORY
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
B
7/10
Changed ±5% to ±4% in Description text
1
Updated Figure 6
13
C
8/10
“Charge Termination” text added
D
4/18
Lowered θJA value
PAGE NUMBER
1, 4, 6, 9, 10, 17
2
Rev D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
23
LTC4007
TYPICAL APPLICATION
12.6V/4A Li-Ion Battery Charger
Q3
INPUT SWITCH
DCIN
0V TO 20V
3A
VLOGIC
LOBAT
C1
0.1µF
R10
100k
R11
100k
R12
100k
*
3C4C
DCIN
CHEM
INFET
LOBAT
CLP
ICL
ACP
TGATE
SHDN
BGATE
FAULT
FAULT
CHG
R9 32.4k 1%
THERMISTOR
10k
NTC
C7
0.47µF
RRT
309k
1%
Q2
BAT
ITH
GND
TIMING RESISTOR
(~2 HOURS)
RSENSE
L1
0.025Ω
10µH 4A
1%
D1
R5 3.01k 1%
R7
6.04k
1%
C6
0.12µF
C5
0.0047µF
RPROG
26.7k
1%
BAT
C3
20µF
R4
3.01k 1%
PROG
RT
SYSTEM
LOAD
Q1
CSP
FLAG
NTC
RCL
0.033Ω
1%
C2
20µF
PGND
CHG
FLAG
C4
15nF
LTC4007 CLN
ICL
ACP
SHDN
R1
4.99k
1%
CHARGING
CURRENT
MONITOR
*PIN OPEN
D1: MBRS130T3
Q1: Si4431ADY
Q2: FDC645N
4007 TA02
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DESCRIPTION
COMMENTS
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Charges Any Number of Cells Up to 20V, 500kHz Switching Frequency
LT1571
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LTC1709
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LT1769
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LTC4006
Small, High Efficiency, Fixed Voltage, Lithium-Ion
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Constant-Current/Constant-Voltage Switching Regulator with Termination Timer,
AC Adapter Current Limit and Thermistor Sensor in a Small 16-Pin Package
LTC4008
High Efficiency, Programmable Voltage/Current
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Programming, AC Adapter Current Limit and Thermistor Sensor
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No RSENSE is a trademark of Linear Technology Corporation.
Rev D
24
D16840-0-4/18(D)
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