LTC4010
High Efficiency Standalone
Nickel Battery Charger
Features
Description
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The LTC®4010 provides a complete, cost-effective nickel
battery fast charge solution in a small package using few
external components. A 550kHz PWM current source
controller and all necessary charge initiation, monitoring
and termination control circuitry are included.
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Complete NiMH/NiCd Charger for 1 to 16 Cells
No Microcontroller or Firmware Required
550kHz PWM Current Source Controller
No Audible Noise with Ceramic Capacitors
Wide Input Voltage Range: 5.5V to 34V
Programmable Charge Current: 5% Accuracy
Automatic Trickle Precharge
–∆V Fast Charge Termination
Optional ∆T/∆t Fast Charge Termination
Optional Temperature Qualification
Automatic NiMH Top-Off Charge
Programmable Timer
Automatic Recharge
Multiple Status Outputs
Micropower Shutdown
16-Lead Thermally Enhanced TSSOP Package
The LTC4010 automatically senses the presence of a DC
adapter and battery insertion or removal. When an external
DC source is not present, the LTC4010 enters shutdown
and supply current drawn from an installed battery drops
to the lowest possible level. Heavily discharged batteries
are precharged with a trickle current. The LTC4010 can
simultaneously use both –∆V and ∆T/∆t fast charge termination techniques and can detect various battery faults.
If necessary, a top-off charge is automatically applied to
NiMH batteries after fast charging is completed. The IC
will also resume charging if the battery self-discharges
after a full charge cycle.
Applications
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All LTC4010 charging operations are qualified by actual
charge time and maximum average cell voltage. Charging
may also be gated by minimum and maximum temperature
limits. NiMH or NiCd fast charge termination parameters
are pin selectable.
Integrated or Standalone Battery Charger
Portable Instruments or Consumer Products
Battery-Powered Diagnostics and Control
Back-Up Battery Management
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
2A NiMH Battery Charger
3k
10µF
LTC4010
TIMER
49.9k
VCC
TGATE
BGATE
47µH
PGND
SENSE
GND
CHEM
2A NiMH Charge Cycle at 1C
0.05Ω
BAT
VCDIV
VCELL
INTVDD VTEMP
10k
10µF
10k
1.60
42
1.55
40
38
1.50
SINGLE CELL
VOLTAGE
1.45
1.35
CHARGE
CURRRENT
1.30
33nF
2-CELL
NiMH PACK
WITH 10k NTC
1.25
36
BATTERY
TEMPERATURE
1.40
0
20
60
40
TIME (MINUTES)
34
2A
32
1A
TOP OFF
30
80
BATTERY TEMPERATURE (°C)
FAULT
CHRG
READY
0.1µF
TO
SYSTEM
LOAD
SINGLE CELL VOLTAGE (V)
FROM
ADAPTER
9V
28
100
4010 TA01b
68nF
4010 TA01a
4010fb
LTC4010
Absolute Maximum Ratings
Pin Configuration
(Note 1)
TOP VIEW
VCC (Input Supply) to GND.......................... –0.3V to 36V
FAULT, CHRG, VCELL, VCDIV, SENSE,
BAT or READY to GND...................... –0.3V to VCC + 0.3V
SENSE to BAT........................................................ ±0.3V
CHEM, V TEMP or TIMER to GND................ –0.3V to 3.5V
PGND to GND......................................................... ±0.3V
Operating Ambient Temperature Range
(Note 2)......................................................... 0°C to 85°C
Operating Junction Temperature (Note 3).............. 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
FAULT
1
16 READY
CHRG
2
15 VCC
CHEM
3
14 TGATE
GND
4
VTEMP
5
VCELL
6
11 INTVDD
VCDIV
7
10 BAT
TIMER
8
9
17
13 PGND
12 BGATE
SENSE
FE PACKAGE
16-LEAD PLASTIC TSSOP
TJMAX = 125°C, qJA = 38°C/W
EXPOSED PAD (PIN 17) IS GND. MUST BE SOLDERED TO
PCB TO OBTAIN SPECIFIED THERMAL RESISTANCE
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4010CFE#PBF
LTC4010CFE#TRPBF
4010CFE
16-Lead Plastic TSSOP
0°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4010CFE
LTC4010CFE#TR
4010CFE
16-Lead Plastic TSSOP
0°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Electrical Characteristics
(Note 4) The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC Supply
VCC
Input Voltage Range
ISHDN
Shutdown Quiescent Current (Note 8)
VCC = BAT = 4.8V
IQ
Quiescent Current
Waiting to Charge (Pause)
l
ICC
Operating Current
Fast Charge State, No Gate Load
l
VUVLO
Undervoltage Threshold Voltage
VCC Increasing
l
VUV(HYST)
Undervoltage Hysteresis Voltage
VSHDNI
Shutdown Threshold Voltage
VCC – BAT, VCC Increasing
l
45
65
90
mV
VSHDND
Shutdown Threshold Voltage
VCC – BAT, VCC Decreasing
l
15
35
60
mV
VCE
Charge Enable Threshold Voltage
VCC – BAT, VCC Increasing
l
400
510
600
mV
VDD
Output Voltage
No Load
l
4.5
5
5.5
V
IDD
Short-Circuit Current (Note 5)
INTVDD = 0V
l
–100
–50
–10
mA
INTVDD(MIN)
Output Voltage
VCC = 4.5V, IDD = –10mA
l
3.85
l
4.5
3.85
34
V
5
10
µA
3
5
mA
5
9
mA
4.2
4.45
170
V
mV
INTVDD Regulator
V
4010fb
LTC4010
Electrical
Characteristics
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
BAT – SENSE Full-Scale Regulation
Voltage (Fast Charge)
0.3V < BAT < VCC – 0.3V (Note 8)
BAT = 4.8V
l
95
95
100
100
105
105
mV
mV
BAT – SENSE Precharge Regulation
Voltage
0.3V < BAT < VCC – 0.3V (Note 8)
BAT = 4.8V
l
16
16
20
20
24
24
mV
mV
BAT – SENSE Top-Off Charge
Regulation Voltage
0.3V < BAT < VCC – 0.3V (Note 8)
BAT = 4.8V
l
6.5
6.5
10
10
13.5
13.5
mV
mV
∆VLI
BAT – SENSE Line Regulation
5.5V < VCC < 25V, Fast Charge
IBAT
BAT Input Bias Current
0.3V < BAT < VCC – 0.1V
ISENSE
SENSE Input Bias Current
SENSE = BAT
IOFF
Input Bias Current, (VCELL = 0V)
SENSE
BAT
fTYP
PWM Current Source
VFS
VPC
VTC
mV
±0.3
–2
2
mA
50
150
µA
l
l
–1
0
0
2
1
6
µA
µA
Typical Switching Frequency
l
460
550
640
kHz
l
fMIN
Minimum Switching Frequency
DCMAX
Maximum Duty Cycle
20
30
kHz
98
99
%
VOL(TG)
TGATE Output Voltage Low
(VCC – TGATE) (Note 6)
VCC > 9V, No Load
VCC < 7V, No Load
l
l
5
VCC – 0.5
5.6
VCC
8.75
VOH(TG)
TGATE Output Voltage High
VCC – TGATE, No Load
l
0
50
mV
tR(TG)
TGATE Rise Time
tF(TG)
TGATE Fall Time
CLOAD = 3nF, 10% to 90%
35
100
ns
CLOAD = 3nF, 10% to 90%
45
100
ns
VOL(BG)
BGATE Output Voltage Low
No Load
l
0
50
mV
VOH(BG)
BGATE Output Voltage High
No Load
l
tR(BG)
BGATE Rise Time
CLOAD = 1.6nF, 10% to 90%
30
80
ns
tF(BG)
BGATE Fall Time
CLOAD = 1.6nF, 10% to 90%
15
80
ns
Analog Channel Leakage
0V < VCELL < 2V
INTVDD
– 0.075
INTVDD
V
V
V
ADC Inputs
ILEAK
nA
±100
Charger Thresholds
VBP
Battery Present Threshold Voltage
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320
350
370
VBOV
Battery Overvoltage
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1.815
1.95
2.085
VMFC
Minimum Fast Charge Voltage
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850
900
950
mV
V
mV
VFCBF
Fast Charge Battery Fault Voltage
l
1.17
1.22
1.27
∆VTERM
–∆V Termination
CHEM OPEN (NiCd)
CHEM = 0V (NiMH)
l
l
16
6
20
10
25
14
V
VAR
Automatic Recharge Voltage
VCELL Decreasing
l
1.260
1.325
1.390
∆TTERM
∆T Termination (Note 7)
CHEM = 3.3V (NiCd)
CHEM = 0V (NiMH)
l
l
1.3
0.5
2
1
2.7
1.5
TMIN
Minimum Charging Temperature
(Note 7)
VTEMP Increasing
l
0
5
9
°C
TMAXI
Maximum Charge Initiation
Temperature (Note 7)
VTEMP Decreasing, Not Charging
l
41.5
45
47
°C
TMAXC
Maximum Charging Temperature
(Note 7)
VTEMP Decreasing, Charging
l
57
60
63
°C
VTEMP(D)
VTEMP Disable Threshold Voltage
l
2.8
3.3
V
VTEMP(P)
Pause Threshold Voltage
l
130
280
mV
mV
mV
V
°C/min
°C/min
4010fb
LTC4010
Electrical
Characteristics
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Charger Timing
∆tTIMER
Internal Time Base Error
∆tMAX
Programmable Timer Error
l
–10
10
%
RTIMER = 49.9k
l
–20
20
%
700
600
mV
mV
Status and Chemistry Select
VOL
Output Voltage Low (ILOAD = 10mA)
VCDIV
All Other Status Outputs
l
l
ILKG
Output Leakage Current
All Status Outputs Inactive, VOUT = VCC
l
–10
10
µA
IIH(VCDIV)
Input Current High
VCDIV = VBAT (Shutdown)
l
–1
1
µA
VIL
Input Voltage Low
CHEM (NiMH)
l
900
mV
VIH
Input Voltage High
CHEM (NiCd)
l
2.85
IIL
Input Current Low
CHEM = GND
l
–20
–5
µA
IIH
Input Current High
CHEM = 3.3V
l
–20
20
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4010E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the 0°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Operating junction temperature TJ (in °C) is calculated from
the ambient temperature TA and the total continuous package power
dissipation PD (in watts) by the formula:
TJ = TA + qJA • PD
Refer to the Applications Information section for details. This IC includes
overtemperature protection that is intended to protect the device during
momentary overload conditions. Junction temperature will exceed 125°C
435
300
V
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may result in
device degradation or failure.
Note 4: All current into device pins are positive. All current out of device
pins are negative. All voltages are referenced to GND, unless otherwise
specified.
Note 5: Output current may be limited by internal power dissipation. Refer
to the Applications Information section for details.
Note 6: Either TGATE VOH may apply for 7.5V < VCC < 9V.
Note 7: These limits apply specifically to the thermistor network shown in
Figure 5 in the Applications Information section with a b of 3750 and are
guaranteed by specific VTEMP voltage measurements during test.
Note 8: These limits are guaranteed by correlation to wafer level
measurements.
Typical Performance Characteristics
NiCd Charge Cycle at 2C
1.75
1.60
34
1.70
32
SINGLE CELL
VOLTAGE
1.50
1.45
30
28
BATTERY
TEMPERATURE
1.40
26
1A
1.35
1.30
0
20
40
60
40
1.55
BATTERY
TEMPERATURE
1.50
1.45
22
80
1.35
4010 G01
45
1.60
1.40
TIME (MINUTES)
50
SINGLE CELL
VOLTAGE
1.65
24
CHARGE CURRENT
55
4 SERIES NiCd 1300mAhr
SC CELLS CHARGED AT 2C
CHARGE CURRENT
0
10
20
30
TIME (MINUTES)
35
3A
30
2A
25
1A
20
40
BATTERY TEMPERATURE (°C)
1.55
SINGLE CELL VOLTAGE (V)
36
BATTERY TEMPERATURE (°C)
SINGLE CELL VOLTAGE (V)
NiCd Charge Cycle at 1C
1.65
15
4010 G02
4010fb
LTC4010
Typical Performance Characteristics
Battery Present Threshold
Voltage (per Cell)
NiMH Charge Cycle at 0.5C
1.45
35
30
BATTERY
TEMPERATURE
1A
1.40
25
CHARGE CURRENT
1.45
20
0.5A
360
930
920
VOLTAGE (mV)
SINGLE CELL
VOLTAGE
1.50
950
940
40
BATTERY TEMPEATURE (°C)
SINGLE CELL VOLTAGE (V)
1.55
370
45
4 SERIES NiMH 2100mAhr
AA CELLS CHARGED AT 0.5C
VOLTAGE (mV)
1.60
Minimum Fast Charge Threshold
Voltage (per Cell)
350
340
890
870
860
320
–50
15
20 40 60 80 100 120 140 160 180 200
TIME (MINUTES)
0
900
880
330
TOP OFF
1.30
910
–30
30
–10 10
50
TEMPERATURE (°C)
850
–50
90
70
–30
30
–10 10
50
TEMPERATURE (°C)
4010 G04
4010 G03
–∆V Termination Voltage
(per Cell)
0
2.05
1.375
90
4010 G05
Battery Overvoltage Threshold
Voltage (per Cell)
Automatic Recharge Threshold
Voltage (per Cell)
70
2.03
–5
2.01
1.355
1.335
1.315
VOLTAGE (mV)
VOLTAGE (V)
VOLTAGE (V)
1.99
1.97
1.95
1.93
–10
NiMH
–15
1.91
–20
1.89
1.295
NiCd
1.87
1.275
–50
–30
30
–10 10
50
TEMPERATURE (°C)
70
1.85
–50
90
–30
30
–10 10
50
TEMPERATURE (°C)
–25
–50
90
Programmable Timer Accuracy
30
–10 10
50
TEMPERATURE (°C)
Charge Current Accuracy
PWM Switching Frequency
5
RTIMER = 49.9k
90
70
4010 G08
1000
BAT = 4.8V
15
3
5
0
–5
–10
TOP-OFF CHARGE
FREQUENCY (kHz)
10
CURRENT ERROR(%)
TIMING ERROR (%, p30s)
–30
4010 G07
4010 G06
20
70
1
FAST CHARGE
–1
PRECHARGE
100
MINIMUM (LOW DROPOUT)
–3
–15
–20
–50
–30
50
30
10
TEMPERATURE (°C)
–10
70
90
4010 G09
–5
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
4010 G10
VCC = 12V
10
–50 –30 –10 10
30
50
TEMPERATURE (°C)
70
90
4010 G11
4010fb
LTC4010
Typical Performance Characteristics
Charger Efficiency
Charger Efficiency
100
DCIN = 5.5V
IOUT = 2A
10
EFFICIENCY (%)
90
80
75
1
1.5
3
2
3.5
2.5
BATTERY VOLTAGE (V)
60
4.5
4
1
3
BAT = 4.8V
2
0
4
200µs/DIV
6 8 10 12 14 16 18 20
BATTERY VOLTAGE (V)
Shutdown Quiescent Current
VCC = 20V
25°C
–1
0°C
8
1
CURRENT (µA)
CURRENT ERROR (%)
50°C
0
50°C
0
25°C
–1
10
14
18
VCC (V)
22
26
–3
30
6
4
0°C
2
–2
6
4
0
12
8
BATTERY VOLTAGE (V)
0
–50
16
4010 G15
–30
6
5
4.45
100
4.35
80
1
–1
–50
–30
–10 10
30
50
TEMPERATURE (°C)
VOLTAGE (mV)
VOLTAGE (V)
4.15
4.05
SENSE
0
4.25
70
90
4010 G18
3.95
–50
VCC INCREASING
60
40
VCC DECREASING
20
–30
30
–10 10
50
TEMPERATURE (°C)
70
90
4010 G19
90
Shutdown Threshold Voltage
(VCC – BAT)
4
BAT
70
4010 G17
Undervoltage Lockout Threshold
Voltage
2
30
–10 10
50
TEMPERATURE (°C)
4010 G16
PWM Input Bias Current (OFF)
3
4010 G14
10
2
1
0
PRECHARGE
CURRENT
Fast Charge Current Output
Regulation
–2
CURRENT (µA)
2
4010 G13
2
CURRENT ERROR (%)
BGATE
70
Fast Charge Current Line
Regulation
–3
TGATE
5
FAST CHARGE CURRENT
4010 G12
3
SWITCHING
5
0
80
70
65
DCIN = 20V
IOUT = 2A
0
–50
–30
30
–10 10
50
TEMPERATURE (°C)
70
90
4010 G20
4010fb
AMPS (A)
EFFICIENCY (%)
85
Charger Soft-Start
VOLTAGE (V)
90
LTC4010
Typical Performance Characteristics
Thermistor Disable Threshold
Voltage
Charge Enable Threshold
Voltage (VCC – BAT)
250
500
VOLTAGE (mV)
230
VOLTAGE (V)
VOLTAGE (mV)
270
3.2
550
3.1
3.0
210
190
170
450
400
–50
Pause Threshold Voltage
3.3
600
2.9
–30
50
–10 10
30
TEMPERATURE (°C)
70
2.8
–50
90
150
–30
30
–10 10
50
TEMPERATURE (°C)
INTVDD Voltage
–30
30
50
–10 10
TEMPERATURE (°C)
70
90
4010 G23
INTVDD Short-Circuit Current
–35
CURRENT (mA)
5.3
VOLTAGE (V)
130
–50
–30
NO LOAD
5.1
4.9
4.7
4.5
–50
90
4010 G22
4010 G21
5.5
70
–40
–45
–50
–55
–30
30
–10 10
50
TEMPERATURE (°C)
70
90
4010 G24
–60
–50 –30
30
50
–10 10
TEMPERATURE (°C)
70
90
4010 G25
Pin Functions
FAULT (Pin 1): Active-Low Fault Indicator Output. The
LTC4010 indicates various battery and internal fault conditions by connecting this pin to GND. Refer to the Operation
and Applications Information sections for further details.
This output is capable of driving an LED and should be
left floating if not used. FAULT is an open-drain output to
GND with an operating voltage range of GND to VCC.
CHRG (Pin 2): Active-Low Charge Indicator Output. The
LTC4010 indicates it is providing charge to the battery by
connecting this pin to GND. Refer to the Operation and
Applications Information sections for further details. This
output is capable of driving an LED and should be left
floating if not used. CHRG is an open-drain output to GND
with an operating voltage range of GND to VCC.
CHEM (Pin 3): Battery Chemistry Selection Input. This
pin should be wired to GND to select NiMH fast charge
termination parameters. If a voltage greater than 2.85V is
applied to this pin, or it is left floating, NiCd parameters
are used. Refer to the Applications Information section for
further details. Operating voltage range is GND to 3.3V.
4010fb
LTC4010
Pin Functions
GND (Pin 4): Ground. This pin provides a single-point
ground for internal references and other critical analog
circuits.
VTEMP (Pin 5): Battery Temperature Input. An external 10k
NTC thermistor may be connected between VTEMP and
GND to provide temperature-based charge qualification
and additional fast charge termination control. Charging
may also be paused by connecting the VTEMP pin to GND.
Refer to the Operation and Applications Information sections for complete details on external thermistor networks
and charge control. If this pin is not used it should be
wired to GND through 10k. Operating voltage range is
GND to 3.3V.
VCELL (Pin 6): Average Single-Cell Voltage Input. An external
voltage divider between BAT and VCDIV is attached to this
pin to monitor the average single-cell voltage of the battery pack. The LTC4010 uses this information to protect
against catastrophic battery overvoltage and to control
the charging state. Refer to the Applications Information
section for further details on the external divider network.
Operating voltage range is GND to BAT.
VCDIV (Pin 7): Average Cell Voltage Resistor Divider Termination. The LTC4010 connects this pin to GND provided the
charger is not in shutdown. VCDIV is an open-drain output
to GND with an operating voltage range of GND to BAT.
TIMER (Pin 8): Charge Timer Input. A resistor connected
between TIMER and GND programs charge cycle timing
limits. Refer to the Applications Information section for
complete details. Operating voltage range is GND to 1V.
SENSE (Pin 9): Charge Current Sense Input. An external
resistor between this input and BAT is used to program
charge current. Refer to the Applications Information
section for complete details on programming charge
current. Operating voltage ranges from (BAT – 50mV) to
(BAT + 200mV).
BAT (Pin 10): Battery Pack Connection. The LTC4010 uses
the voltage on this pin to control current sourced from
VCC to the battery during charging. Allowable operating
voltage range is GND to VCC.
INTVDD (Pin 11): Internal 5V Regulator Output. This pin
provides a means of bypassing the internal 5V regulator
used to power the BGATE output driver. Typically, power
should not be drawn from this pin by the application
circuit. Refer to the Application Information section for
additional details.
BGATE (Pin 12): External Synchronous N-channel MOSFET
Gate Control Output. This output provides gate drive to
an optional external NMOS power transistor switch used
for synchronous rectification to increase efficiency in the
step-down DC/DC converter. Operating voltage is GND to
INTVDD. BGATE should be left floating if not used.
PGND (Pin 13): Power Ground. This pin provides a return
for switching currents generated by internal LTC4010 circuits. Externally, PGND and GND should be wired together
using a very low impedance connection. Refer to PCB
Layout Considerations in the Applications Information
section for additional grounding details.
TGATE (Pin 14): External P-channel MOSFET Gate Control
Output. This output provides gate drive to an external PMOS
power transistor switch used in the DC/DC converter. Operating voltage range varies as a function of VCC. Refer to
the Electrical Characteristics table for specific voltages.
VCC (Pin 15): Power Input. External diodes normally
connect either the DC input power supply or the battery
to this pin. Refer to the Applications Information section
for further details. Suggested applied voltage range is
GND to 34V.
READY (Pin 16): Active-Low Ready-to-Charge Output.
The LTC4010 connects this pin to GND if proper operating
voltages for charging are present. Refer to the Operation
section for complete details on charge qualification. This
output is capable of driving an LED and should be left
floating if not used. READY is an open-drain output to
GND with an operating voltage range of GND to VCC.
Exposed Pad (Pin 17): This pin provides enhanced thermal
properties for the TSSOP. It must be soldered to the PCB
copper ground to obtain optimum thermal performance.
4010fb
LTC4010
Block Diagram
1
2
FAULT
READY
VCC
UVLO AND
SHUTDOWN
4 GND
3
6
15
CHEM
TGATE
THERMISTOR
INTERFACE
5
16
CHRG
BGATE
CHARGER
STATE
CONTROL
LOGIC
VTEMP
A/D
CONVERTER
VCELL
PGND
PWM
SENSE
BAT
14
12
13
9
10
BATTERY
DETECTOR
INTVDD
VOLTAGE
REGULATOR
8
7
TIMER
CHARGE
TIMER
INTERNAL
VOLTAGE
REGULATOR
VCDIV
VOLTAGE
REFERENCE
Operation
11
4010 BD
(Refer to Figure 1)
SHUTDOWN
NO DC ADAPTER
DC ADAPTER PRESENT
NO BATTERY
OR
VCC < 4.25V
CHARGE
QUALIFICATION
VCELL > 350mV, ADEQUATE VCC,
CHARGER ENABLED AND
TEMPERATURE OK (OPTIONAL)
CHECK
BATTERY
VCELL < 900mV
V CELL
VCELL > 900mV
NiMH
∆T/∆t
TOP-OFF
CHARGE**
(C/10)
FAST CHARGE**
(1C)
0mV
> 90
VCELL < 900mV
VCELL < 1.22V AT tMAX*/12
OR TIME = tMAX
NiCd OR
NiMH – ∆V
tMAX/3
PRECHARGE**
(C/5 FOR
tMAX/12)
VCELL < 1.325V
AUTOMATIC
RECHARGE
FAULT
VCELL > 1.95V
OR PWM FAULTS
4010 F01
*tMAX IS PROGRAMMED MAXIMUM FAST CHARGE DURATION
**OPTIONAL TEMPERATURE LIMITS APPLY
Figure 1. LTC4010 State Diagram
4010fb
LTC4010
Operation
(Refer to Figure 1)
Shutdown State
The LTC4010 remains in micropower shutdown until VCC
(Pin 15) is driven above BAT (Pin 10). In shutdown all
status and PWM outputs and internally generated supply
voltages are inactive. Current consumption from VCC and
BAT is reduced to a very low level.
Charge Qualification State
Once VCC is greater than BAT, the LTC4010 exits micropower
shutdown, enables its own internal supplies and switches
VCDIV to GND to allow measurement of the average singlecell voltage. The IC also verifies that VCC is at or above 4.2V,
VCC is 510mV above BAT and VCELL is between 350mV and
1.95V. If VCELL is below 350mV, no charging will occur, and
if VCELL is above 1.95V, the fault state is entered, which
is described in more detail below. Once adequate voltage
conditions exist for charging, READY is asserted.
If the voltage between VTEMP and GND is below 200mV, the
LTC4010 is paused. If VTEMP is above 200mV but below
2.85V, the LTC4010 verifies that the sensed temperature
is between 5°C and 45°C. If these temperature limits
are not met or if its own die temperature is too high, the
LTC4010 will indicate a fault and not allow charging to
begin. If VTEMP is greater than 2.85V, battery temperature
related charge qualification, monitoring and termination
are disabled.
Once charging is fully qualified, precharge begins (unless
the LTC4010 is paused). In that case, the VTEMP pin is
monitored for further control. The charge status indicators
and PWM outputs remain inactive until charging begins.
Charge Monitoring
The LTC4010 continues to monitor important voltage and
temperature parameters during all charging states. If VCC
drops to the BAT voltage or lower, charging stops and the
shutdown state is entered. If VCC drops below 4.25V or
VCELL drops below 350mV, charging stops and the LTC4010
returns to the charge qualification state. If VCELL exceeds
1.95V, charging stops and the IC enters the fault state. If an
external thermistor indicates sensed temperature is beyond
a range of 5°C to 60°C, or the internal die temperature
exceeds a resonable value, charging is suspended, the
charge timer is paused and the LTC4010 indicates a fault
condition. Normal charging resumes from the previous
state when the sensed temperature returns to a satisfactory
range. In addition, other battery faults are detected during
specific charging states as described below.
Precharge State
If the initial voltage on VCELL is below 900mV, the LTC4010
enters the precharge state and enables the PWM current
source to trickle charge using one-fifth the programmed
charge current. The CHRG status output is active during
precharge. The precharge state duration is limited to
tMAX/12 minutes, where tMAX is the maximum fast charge
period programmed with the TIMER pin. If sufficient VCELL
voltage cannot be developed in this length of time, the fault
state is entered, otherwise fast charge begins.
Fast Charge State
If adequate average single-cell voltage exists, the LTC4010
enters the fast charge state and begins charging at the
programmed current set by the external current sense
resistor connected between the SENSE and BAT pins.
The CHRG status output is active during fast charge. If
VCELL is initially above 1.325V, voltage-based termination
processing begins immediately. Otherwise –∆V termination
is disabled for a stabilization period of tMAX/12. In that
case, the LTC4010 makes another fault check at tMAX/12,
requiring the average cell voltage to be above 1.22V. This
ensures the battery pack is accepting a fast charge. If
VCELL is not above this voltage threshold, the fault state is
entered. Fast charge state duration is limited to tMAX and
the fault state is entered if this limit is exceeded.
4010fb
10
LTC4010
Operation
(Refer to Figure 1)
Charge Termination
Fast charge termination parameters are dependent upon
the battery chemistry selected with the CHEM pin. Voltage-based termination (–∆V) is always active after the
initial voltage stabilization period. If an external thermistor
network is present, chemistry-specific limits for ∆T/∆t (rate
of temperature rise) are also used in the termination algorithm. Temperature-based termination, if enabled, becomes
active as soon as the fast charge state is entered.
Successful charge termination requires a charge rate
between C/2 and 2C. Lower rates may not produce the
battery voltage and temperature profile required for charge
termination.
Top-Off Charge State
If NiMH fast charge termination occurs because the
∆T/∆t limit is exceeded after an initial period of tMAX/12
has expired, the LTC4010 enters the top-off charge state.
Top-off charge is implemented by sourcing one-tenth the
programmed charge current for tMAX/3 minutes to ensure
that 100% charge has been delivered to the battery. The
CHRG status output is active during the top-off state. If
NiCd cells have been selected with the CHEM pin, the
LTC4010 never enters the top-off state.
Automatic Recharge State
Once charging is complete, the automatic recharge state
is entered to address the self-discharge characteristics of
nickel chemistry cells. The charge status output is inactive
during automatic recharge, but VCDIV remains switched
to GND to monitor the average cell voltage. If the VCELL
voltage drops below 1.325V without falling below 350mV,
the charge timer is reset and a new fast charge cycle is
initiated.
The internal termination algorithms of the LTC4010 are
adjusted when a fast charge cycle is initiated from automatic recharge, because the battery should be almost fully
charged. Voltage-based termination is enabled immediately
and the NiMH ∆T/∆t limit is fixed at a battery temperature
rise of 1°C/minute.
Fault State
As discussed previously, the LTC4010 enters the fault state
based on detection of invalid battery voltages during various charging phases. The IC also monitors the regulation
of the PWM control loop and will enter the fault state if
this is not within acceptable limits. Once in the fault state,
the battery must be removed or DC input power must be
cycled in order to initiate further charging. In the fault
state, the FAULT output is active, the READY output is
inactive, charging stops and the charge indicator output
is inactive. The VCDIV output remains connected to GND
to allow detection of battery removal.
Note that the LTC4010 also uses the FAULT output to indicate that charging is suspended due to invalid battery or
internal die temperatures. However, the IC does not enter
the fault state in these cases and normal operation will
resume when all temperatures return to acceptable levels.
Refer to the Status Outputs section for more detail.
Insertion and Removal of Batteries
The LTC4010 automatically senses the insertion or removal
of a battery by monitoring the VCELL pin voltage. Should
this voltage fall below 350mV, the IC considers the battery to be absent. Removing and then inserting a battery
causes the LTC4010 to initiate a completely new charge
cycle beginning with charge qualification.
External Pause Control
After charging is initiated, the VTEMP pin may be used to
pause operation at any time. When the voltage between
VTEMP and GND drops below 200mV, the charge timer
pauses, fast charge termination algorithms are inhibited
and the PWM outputs are disabled. The status and VCDIV
outputs all remain active. Normal function is fully restored
from the previous state when pause ends.
4010fb
11
LTC4010
Operation
(Refer to Figure 1)
Status Outputs
PWM Current Source Controller
The LTC4010 open-drain status outputs provide valuable
information about the IC’s operating state and can be
used for a variety of purposes in applications. Table 1
summarizes the state of the three status outputs and the
VCDIV pin as a function of LTC4010 operation. The status
outputs can directly drive current-limited LEDs terminated
to the DC input. The VCDIV column in Table 1 is strictly
informational. VCDIV should only be used to terminate the
VCELL resistor divider, as previously discussed.
An integral part of the LTC4010 is the PWM current source
controller. The charger uses a synchronous step-down
architecture to produce high efficiency and limited thermal
dissipation. The nominal operating frequency of 550kHz
allows use of a smaller external inductor. The TGATE and
BGATE outputs have internally clamped voltage swings.
They source peak currents tailored to smaller surfacemount power FETs likely to appear in applications providing
an average charge current of 3A or less. During the various
charging states, the LTC4010 uses the PWM controller to
regulate an average voltage between SENSE and BAT that
ranges from 10mV to 100mV.
Table 1. LTC4010 Status Pins
READY
FAULT
CHRG
VCDIV
CHARGER STATE
Off
Off
Off
Off
Off
On
Off
Off
On
Ready to Charge
(VTEMP Held Low)
or Automatic Recharge
On
Off
On
On
Precharge, Fast or Top Off
Charge (May be Paused)
On
On
On or Off
On
Temperature Limits
Exceeded
Off
On
Off
On
Fault State (Latched)
A conceptual diagram of the LTC4010 PWM control loop
is shown in Figure 2.
The voltage across the external current programming
resistor RSENSE is averaged by integrating error amplifier
EA. An internal programming current is also pulled from
input resistor R1. The IPROG • R1 product establishes the
desired average voltage drop across RSENSE, and hence,
LTC4010
VCC
14
12
9
RSENSE
10
TGATE
Q
PWM CLOCK
S
R
BGATE
SENSE
R3
BAT
R4
R1
R2
CC
–
+
EA
ITH
IPROG
4010 F02
Figure 2. LTC4010 PWM Control Loop
4010fb
12
LTC4010
Operation
(Refer to Figure 1)
the average current through RSENSE. The ITH output of
the error amplifier is a scaled control current for the input
of the PWM comparator CC. The ITH • R3 product sets a
peak current threshold for CC such that the desired average current through RSENSE is maintained. The current
comparator output does this by switching the state of the
SR latch at the appropriate time.
At the beginning of each oscillator cycle, the PWM clock
sets the SR latch and the external P-channel MOSFET is
switched on (N-channel MOSFET switched off) to refresh
the current carried by the external inductor. The inductor
current and voltage drop across RSENSE begin to rise
linearly. During normal operation, the PFET is turned
off (NFET on) during the cycle by CC when the voltage
difference across RSENSE reaches the peak value set by
the output of EA. The inductor current then ramps down
linearly until the next rising PWM clock edge. This closes
the loop and maintains the desired average charge current
in the external inductor.
Low Dropout Charging
After charging is initiated, the LTC4010 does not require
that VCC remain at least 500mV above BAT because situations exist where low dropout charging might occur. In
one instance, parasitic series resistance may limit PWM
headroom (between VCC and BAT) as 100% charge is
reached. A second case can arise when the DC adapter
selected by the end user is not capable of delivering the
current programmed by RSENSE, causing the output voltage of the adapter to collapse. While in low dropout, the
LTC4010 PWM runs near 100% duty cycle with a frequency
that may not be constant and can be less than 550kHz.
The charge current will drop below the programmed value
to avoid generating audible noise, so the actual charge
delivered to the battery may depend primarily on the
LTC4010 charge timer.
Internal Die Temperature
The LTC4010 provides internal overtemperature detection
to protect against electrical overstress, primarily at the
FET driver outputs. If the die temperature rises above this
thermal limit, the LTC4010 stops switching and indicates
a fault as previously discussed.
4010fb
13
LTC4010
Applications Information
External DC Source
The external DC power source should be connected to the
charging system and the VCC pin through a power diode
acting as an input rectifier. This prevents catastrophic
system damage in the event of an input short to ground
or reverse-voltage polarity at the DC input. The LTC4010
automatically senses when this input drives the VCC pin
above BAT. The open-circuit voltage of the DC source
should be between 5.5V and 34V, depending on the number of cells being charged. In order to avoid low dropout
operation, ensure 100% capacity at charge termination,
and allow reliable detection of battery insertion, removal
or overvoltage, the following equation can be used to
determine the minimum full-load voltage that should be
produced at VCC when the external DC power source is
connected.
cells is selected. When CHEM is left floating, charging is
optimized for NiCd cells. The various charging parameters
are detailed in Table 2.
Programming Charge Current
Charge current is programmed using the following
equation:
RSENSE =
100mV
IPROG
RSENSE is an external resistor connected between the
SENSE and BAT pins. A 1% resistor with a low temperature
coefficient and sufficient power dissipation capability to
avoid self-heating effects is recommended. Charge rate
should be between approximately C/2 and 2C.
VCC(MIN) = (n • 2V) + 0.3V
Inductor Value Selection
where n is the number of series cells in the battery pack.
For many applications, 10µH represents an optimum value
for the inductor the PWM uses to generate charge current.
For applications with IPROG of 1.5A or greater running
from an external DC source of 15V or less, values between
5µH and 7.5µH can often be selected. For wider operating
conditions the following equation can be used as a guide
for selecting the minimum inductor value.
The LTC4010 will properly charge over a wide range of VCC
and BAT voltage combinations. Operating the LTC4010 in
low dropout or with VCC much greater than BAT will force
the PWM frequency to be much less than 550kHz. The
LTC4010 disables charging and sets a fault if a large VCC to
BAT differential would cause generation of audible noise.
Load Control
Proper load current control is an important consideration
when fast charging nickel cells. This control ensures that
the system load remains powered at all times, but that
normal system operation and associated load transients
do not adversely affect fast charge termination. The input
protecton detailed in the previous paragraph is an integral
part of the necessary load control.
L > 6.5 • 10–6 • VDCIN • RSENSE, L ≥ 4.7µH
Actual part selection should account for both manufacturing
tolerance and temperature coefficient to ensure this minimum. A good initial selection can be made by multiplying
the calculated minimum by 1.4 and rounding up or down
to the nearest standard inductance value.
The battery should also be connected to the raw system
supply by some rectifying means, thus forming a switch
that selects the battery for system power only if an external
DC source is not present.
Ultimately, there is no substitute for bench evaluation of
the selected inductor in the target application, which can
also be affected by other environmental factors such as
ambient operating temperature. Using inductor values
lower than recommended by the equation shown above
can result in a fault condition at the start of precharge or
top-off charge.
Battery Chemistry Selection
Programming Maximum Charge Times
The desired battery chemistry is selected by programming the CHEM pin to the proper voltage. If it is wired
to GND, a set of parameters specific to charging NiMH
Connecting the appropriate resistor between the TIMER
pin and GND programs the maximum duration of various
4010fb
14
LTC4010
Applications Information
Table 2. LTC4010 Charging Parameters
CHEM
PIN
STATE
BAT
CHEMISTRY
TIMER
TMIN
TMAX
ICHRG
Both
tMAX/12
5°C
45°C
IPROG/5
Open
NiCd
tMAX
5°C
60°C
IPROG
–20mV per Cell or 2°C/Minute
GND
NiMH
tMAX
5°C
60°C
IPROG
1.5°C/Minute for First tMAX/12 Minutes if Initial
VCELL < 1.325V
PC
FC
TERMINATION CONDITION
Timer Expires
–10mV per Cell or 1°C/Minute After tMAX/12 Minutes
or if Initial VCELL > 1.325V
TOC
GND
NiMH
AR
tMAX/3
Both
5°C
60°C
5°C
45°C
IPROG/10 Timer Expires
0
VCELL < 1.325V
PC: Precharge
FC: Fast Charge (Initial –∆V Termination Hold Off of tMAX/12 Minutes May Apply)
TOC: Top-Off Charge (Only for NiMH ∆T/∆t FC Termination After Initial tMAX/12 Period)
AR: Automatic Recharge (Temperature Limits Apply to State Termination Only)
Table 3. LTC4010 Time Limit Programming Examples
RTIMER
TYPICAL FAST
CHARGE RATE
PRECHARGE LIMIT
(MINUTES)
FAST CHARGE
VOLTAGE STABILIZATION
(MINUTES)
FAST CHARGE LIMIT
(HOURS)
TOP-OFF
CHARGE
(MINUTES)
24.9k
2C
3.8
3.8
0.75
15
33.2k
1.5C
5
5
1
20
49.9k
1C
7.5
7.5
1.5
30
66.5k
0.75C
10
10
2
40
100k
C/2
15
15
3
60
charging states. To some degree, the value should reflect
how closely the programmed charge current matches the
1C rate of targeted battery packs. The maximum fast charge
period is determined by the following equation:
R TIMER =
tMAX (Hours)
30 • 10 –6
(Ω)
Some typical timing values are detailed in Table 3. RTIMER
should not be less than 15k. The actual time limits used
by the LTC4010 have a resolution of approximately ±30
seconds in addition to the tolerances given the Electrical
Characteristics table. If the timer ends without a valid
–∆V or ∆T/∆t charge termination, the charger enters the
fault state. The maximum time period is approximately
4.3 hours.
Cell Voltage Network Design
An external resistor network is required to provide the
average single-cell voltage to the VCELL pin of the LTC4010.
The proper circuit for multicell packs is shown in Figure 3.
The ratio of R2 to R1 should be a factor of (n – 1), where
n is the number of series cells in the battery pack. The
value of R1 should be between 1k and 100k. This range
limits the sensing error caused by VCELL leakage current
and prevents the ON resistance of the internal NFET between VCDIV and GND from causing a significant error in
the VCELL voltage. The external resistor network is also
used to detect battery insertion and removal. The filter
FOR TWO OR
MORE SERIES CELLS
BAT 10
LTC4010
VCELL
VCDIV
R2
+
6
R1
C1
7
R2 = R1(n – 1)
GND
4
4010 F03
Figure 3. Multiple Cell Voltage Divider
4010fb
15
LTC4010
Applications Information
formed by C1 and the parallel combination of R1 and R2
is recommended for rejecting PWM switching noise. The
value of C1 should be chosen to yield a 1st order lowpass
frequency of less than 500Hz. In the case of a single cell,
the external application circuit shown in Figure 4 is recommended to provide the necessary noise filtering and
missing battery detection.
External Thermistor
The network for proper temperature sensing using a
thermistor with a negative temperature coefficient (NTC) is
shown in Figure 5. The LTC4010 is designed to work best
with a 1% 10k NTC thermistor with a b of 3750. However,
the LTC4010 will operate satisfactorily with other 10k NTC
thermistors having slightly different nominal exponential
temperature coefficients. For these thermistors, the temperature related limits given in the Electrical Characteristics
table may not strictly apply. The filter formed by C1 in
Figure 5 is optional but recommended for rejecting PWM
switching noise.
10
7
6
BAT
1 CELL
VCDIV
10k
10k
VCELL
33nF
4010 F04
on voltage inflection may not be adequate to protect the
battery from a severe overcharge.
INTVDD Regulator Output
If BGATE is left open, the INTVDD pin of the LTC4010 can be
used as an additional source of regulated voltage in the host
system any time READY is active. Switching loads on INTVDD
may reduce the accuracy of internal analog circuits used to
monitor and terminate fast charging. In addition, DC current
drawn from the INTVDD pin can greatly increase internal
power dissipation at elevated VCC voltages. A minimum
ceramic bypass capacitor of 0.1µF is recommended.
Calculating Average Power Dissipation
The user should ensure that the maximum rated IC junction
temperature is not exceeded under all operating conditions.
The thermal resistance of the LTC4010 package (qJA)
is 38°C/W, provided the exposed metal pad is properly
soldered to the PCB. The actual thermal resistance in the
application will depend on the amount of PCB copper to
which the package is soldered. Feedthrough vias directly
below the package that connect to inner copper layers
are helpful in lowering thermal resistance. The following
formula may be used to estimate the maximum average
power dissipation PD (in watts) of the LTC4010 under
normal operating conditions.
PD = VCC ( 9mA + IDD + 615k(Q TGATE + QBGATE ))
Figure 4. Single-Cell Monitor Network
VTEMP
C1
68nF
5
RT
10k NTC
4010 F05
Figure 5. External NTC Thermistor Network
Disabling Thermistor Functions
Temperature sensing is optional in LTC4010 applications.
For low cost systems where temperature sensing may
not be required, the VTEMP pin may simply be wired to
GND through 10k to disable temperature qualification
of all charging operations. However, this practice is not
recommended for NiMH cells charged well above or below
their 1C rate, because fast charge termination based solely
V –V
– 3.85IDD + 60n CC LED
R + 30
2
LED
where:
IDD = Average external INTVDD load current, if any
QTGATE = Gate charge of external P-channel MOSFET
in coulombs
QBGATE = Gate charge of external N-channel MOSFET
(if used) in coulombs
VLED = Maximum external LED forward voltage
RLED = External LED current-limiting resistor used in
the application
n = Number of LEDs driven by the LTC4010
4010fb
16
LTC4010
Applications Information
Sample Applications
Figures 6 through 8 detail sample charger applications of
various complexities. Combined with the Typical Application
on the first page of this data sheet, these figures demonstrate some of the proper configurations of the LTC4010.
MOSFET body diodes are shown in these figures strictly
for reference only.
Figure 6 shows a minimum application, which might be
encountered in low cost NiCd fast charge applications.
The LTC4010 uses –∆V to terminate the fast charge state,
as no external temperature information is available.
Nonsynchronous PWM switching is employed to reduce
external component cost. A single LED indicates charging
status.
A full-featured 2A LTC4010 application is shown in Figure 7.
The inherent voltage ratings of the VCELL, VCDIV, SENSE
and BAT pins allow charging of one to sixteen series nickel
cells in this application, governed only by the VCC overhead
limits previously discussed. The application includes all
average cell voltage and battery temperature sensing
circuitry required for the LTC4010 to utilize its full range
of charge qualification, safety monitoring and fast charge
termination features. The VTEMP thermister network allows
the LTC4010 to accurately terminate fast charge under a
FROM
ADAPTER
12V
10µF
3k
variety of applied charge rates. Use of a synchronous PWM
topology improves efficiency and reduces excess heat
generation. LED D1 indicates valid DC input voltage and
installed battery, while LED D2 indicates charging. Fault
conditions are indicated by LED D3. The grounded CHEM
pin selects the NiMH charge termination parameter set.
P-channel MOSFET Q1 functions as a switch to connect the
battery to the system load whenever the DC input adapter
is removed. If the maximum battery voltage is less than
the maximum rated VGS of Q1, diode D4 and resistor R1
are not required. Otherwise choose the Zener voltage
of D4 to be less than the maximum rated VGS of Q1. R1
provides a bias current of (VBAT – VZENER)/(R1 + 20k) for
D4 when the input adapter is removed. Choose R1 to make
this current, which is drawn from the battery, just large
enough to develop the desired VGS across D4.
While the LTC4010 is a complete, standalone solution,
Figure 8 shows that it can also be interfaced to a host
microprocessor. The host MCU can control the charger
directly with an open-drain I/O port connected to the VTEMP
pin, if that port is low leakage and can tolerate at least
2V. The charger state is monitored on the three LTC4010
status outputs. Charging of NiMH batteries is selected in
this example. However, NiCd parameters could be chosen
as well.
TO
SYSTEM
LOAD
LTC4010
FAULT
CHRG
READY
TIMER
49.9k
VCC
TGATE
BGATE
10µH
PGND
SENSE
GND
0.1Ω
BAT
0.1µF
VCDIV
CHEM
VCELL
INTVDD VTEMP
10k
R2
NiCd
PACK
(1AHr)
10µF
4010 F06
33nF
8.66k
Figure 6. Minimum 1 Amp LTC4010 Application
4010fb
17
LTC4010
Applications Information
R1 10k
FROM
ADAPTER
12V
D1
D2
D3
20µF
20k
D4
6V
LTC4010
VCC
TGATE
FAULT
CHRG
READY
TO
SYSTEM
LOAD
Q1
BGATE
6.8µH
PGND
TIMER
49.9k
SENSE
GND
CHEM
0.05Ω
BAT
VCDIV
VCELL
0.1µF
10k
R2
20µF
NiMH PACK
WITH 10k NTC
(2AHr)
INTVDD VTEMP
33nF
68nF
4010 F07
Figure 7. Full-Featured 2 Amp LTC4010 Application
FROM
ADAPTER
28V
V+
10µF
LTC4010
FAULT
CHRG
READY
VCC
TGATE
BGATE
TIMER
49.9k
SENSE
GND
CHEM
0.1Ω
BAT
VCDIV
VCELL
0.1µF
15µH
PGND
10k
R2
TO
SYSTEM
LOAD
10µF
33nF
INTVDD VTEMP
68nF
PAUSE
FROM MCU
NiMH PACK
WITH 10k NTC
(2AHr)
4010 F08
Figure 8. LTC4010 with MCU Interface
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18
LTC4010
Applications Information
Unlike all of the other applications discussed so far, the
battery continues to power the system during charging.
The MCU could be powered directly from the battery or
from any type of post regulator operating from the battery. In this configuration, the LTC4010 relies expressly
on the ability of the host MCU to know when load transients will be encountered. The MCU should then pause
charging (and thus –∆V processing) during those events
to avoid premature fast charge termination. If the MPU
cannot reliably perform this function, the battery should
be disconnected from the load with a rectifier or switch
when charging. In most applications, there should not be
an external load on the battery during charge. Excessive
battery load current variations, such as those generated
by a post-regulating PWM, can generate sufficient voltage
noise to cause the LTC4010 to prematurely terminate a
charge cycle and/or prematurely restart a fast charge. In
this case, it may be necessary to inhibit the LTC4010 after
charging is complete until external gas gauge circuitry
indicates that recharging is necessary. Shutdown power
is applied to the LTC4010 through the body diode of the
P-channel MOSFET in this application.
SHDN
VCC
PRECHARGE
Waveforms
Sample waveforms for a standalone application during
a typical charge cycle are shown in Figure 9. Note that
these waveforms are not to scale and do not represent the
complete range of possible activity. The figure is simply
intended to allow better conceptual understanding and to
highlight the relative behavior of certain signals generated
by the LTC4010 during a typical charge cycle.
Initially, the LTC4010 is in low power shutdown as the
system operates from a heavily discharged battery. A DC
adapter is then connected such that VCC rises above 4.25V
and is 500mV above BAT. The READY output is asserted
when the LTC4010 completes charge qualification.
When the LTC4010 determines charging should begin, it
starts a precharge cycle because VCELL is less than 900mV.
As long as the temperature remains within prescribed
limits, the LTC4010 charges (TGATE switching), applying
limited current to the battery with the PWM in order to
bring the average cell voltage to 900mV.
FAST CHARGE
TOP-OFF
VCC ≥ BAT + 500mV
AUTO
RECHARGE
SHDN
VCC < BAT + 25mV
READY
VCDIV
TGATE
VCELL
VTEMP
(PAUSE)
0.9V
200mV
CHRG
EXTERNAL
PAUSE
4010 F09
Figure 9. Charging Waveforms Example
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19
LTC4010
Applications Information
When the precharge state timer expires, the LTC4010
begins fast charge if VCELL is greater than 900mV. The
PWM, charge timer and internal termination control are
suspended if pause is asserted (VTEMP < 200mV), but all
status outputs continue to indicate charging is in progress.
The fast charge state continues until the selected voltage
or temperature termination criteria are met. Figure 9 suggests termination based on ∆T/∆t, which for NiMH would
be an increase greater than 1°C per minute.
Because NiMH charging terminated due to ∆T/∆t and the
fast charge cycle had lasted more than tMAX/12 minutes,
the LTC4010 begins a top-off charge with a current of
IPROG/10. Top-off is an internally timed charge of tMAX/3
minutes with the CHRG output continuously asserted.
Finally, the LTC4010 enters the automatic recharge state
where the CHRG output is deasserted. The PWM is disabled
but VCDIV remains asserted to monitor VCELL. The charge
timer will be reset and fast charging will resume if VCELL
drops below 1.325V. The LTC4010 enters shutdown when
the DC adapter is removed, minimizing current draw from
the battery in the absence of an input power source.
While not a part of the sample waveforms of Figure 9,
temperature qualification is an ongoing part of the charging process, if an external thermistor network is detected
by the LTC4010. Should prescribed temperature limits be
exceeded during any particular charging state, charging
would be suspended until the sensed temperature returned
to an acceptable range.
A second possibility is to configure an LTC4010-based
charger to accept battery packs with varying numbers of
cells. By including R2 of the average cell voltage divider
network shown in Figure 3, battery-based programming
of the number of series-stacked cells could be realized
without defeating LTC4010 detection of battery insertion
or removal. Figure 11 shows a 2-cell NiMH battery pack
that programs the correct number of series cells when it is
connected to the charger, along with indicating chemistry
and providing temperature information.
Any of these battery pack charge control concepts could be
combined in a variety of ways to service custom application
needs. Charging parallel cells is not recommended.
TIMER
CHEM
VTEMP
8
3
5
NC
10k
NTC
66.5k
1200mAhr
NiCd CELLS
–
4010 F10
Figure 10. NiCd Battery Pack with Time Limit Control
CHEM
VTEMP
VCELL
3
5
6
10k
NTC
Battery-Controlled Charging
Because of the programming arrangement of the LTC4010,
it may be possible to configure it for battery-controlled
charging. In this case, the battery pack is designed to
provide customized information to an LTC4010-based
charger, allowing a single design to service a wide range
of application batteries. Assume the charger is designed
to provide a maximum charge current of 800mA (RSENSE =
125mΩ). Figure 10 shows a 4-cell NiCd battery pack for
which 800mA represents a 0.75C rate. When connected
to the charger, this pack would provide battery temperature information and correctly configure both fast charge
termination parameters and time limits for the internal
NiCd cells.
+
BATTERY
PACK
+
R2
BATTERY
PACK
1500mAhr
NiMH CELLS
–
4010 F11
Figure 11. NiMH Battery Pack Indicating Number of Cells
PCB Layout Considerations
To prevent magnetic and electrical field radiation and
high frequency resonant problems, proper layout of the
components connected to the LTC4010 is essential. Refer
to Figure 12. For maximum efficiency, the switch node
rise and fall times should be minimized. The following
PCB design priority list will help ensure proper topology.
Layout the PCB using this specific order.
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20
LTC4010
Applications Information
1. Input capacitors should be placed as close as possible
to switching FET supply and ground connections with
the shortest copper traces possible. The switching
FETs must be on the same layer of copper as the input
capacitors. Vias should not be used to make these
connections.
2. Place the LTC4010 close to the switching FET gate
terminals, keeping the connecting traces short to
produce clean drive signals. This rule also applies to IC
supply and ground pins that connect to the switching
FET source pins. The IC can be placed on the opposite
side of the PCB from the switching FETs.
3. Place the inductor input as close as possible to the
drain of the switching FETs. Minimize the surface area
of the switch node. Make the trace width the minimum
needed to support the programmed charge current.
Use no copper fills or pours. Avoid running the connection on multiple copper layers in parallel. Minimize
capacitance from the switch node to any other trace
or plane.
6. Output capacitor ground connections must feed into
the same copper that connects to the input capacitor
ground before tying back into system ground.
7. Connection of switching ground to system ground,
or any internal ground plane should be single-point.
If the system has an internal system ground plane, a
good way to do this is to cluster vias into a single star
point to make the connection.
8. Route analog ground as a trace tied back to the LTC4010
GND pin before connecting to any other ground. Avoid
using the system ground plane. A useful CAD technique
is to make analog ground a separate ground net and
use a 0Ω resistor to connect analog ground to system
ground.
9. A good rule of thumb for via count in a given high
current path is to use 0.5A per via. Be consistent when
applying this rule.
10. If possible, place all the parts listed above on the same
PCB layer.
4. Place the charge current sense resistor immediately
adjacent to the inductor output, and orient it such
that current sense traces to the LTC4010 are not long.
These feedback traces need to be run together as a
single pair with the smallest spacing possible on any
given layer on which they are routed. Locate any filter
component on these traces next to the LTC4010, and
not at the sense resistor location.
11. Copper fills or pours are good for all power connections except as noted above in Rule 3. Copper planes
on multiple layers can also be used in parallel. This
helps with thermal management and lowers trace inductance, which further improves EMI performance.
5. Place output capacitors next to the sense resisitor
output and ground.
13. It is important to minimize parasitic capacitance on the
TIMER, SENSE and BAT pins. The traces connecting
these pins to their respective resistors should be as
short as possible.
SWITCH NODE
12. For best current programming accuracy, provide a
Kelvin connection from RSENSE to SENSE and BAT.
See Figure 13 for an example.
L1
VBAT
VIN
CIN
HIGH
FREQUENCY
CIRCULATING
PATH
D1
COUT
DIRECTION OF CHARGING CURRENT
RSENSE
BAT
4010 F13
SWITCHING GROUND
Figure 12. High Speed Switching Path
4010 F12
SENSE
BAT
Figure 13. Kelvin Sensing of Charge Current
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21
LTC4010
Package Description
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BC
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
6.60 p0.10
4.50 p0.10
9
2.94
(.116)
6.40
2.94
(.252)
(.116)
BSC
SEE NOTE 4
0.45 p0.05
1.05 p0.10
0.65 BSC
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
0.25
REF
1.10
(.0433)
MAX
0o – 8o
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE16 (BC) TSSOP 0204
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
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22
LTC4010
Revision History
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
01/10
Changes to Typical Application
1
Updated Order Information Section
2
Changes to Electrical Characteristics
2, 3
Changes to Pin Functions (VTEMP, Pin 5)
Changes to Operation Section
Changes to Applications Information
Changes to Figures 6, 7, 8
8
10, 11
14, 15, 16, 17,
19, 20
17, 18
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4010
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Dual, 2.6A Ideal Diode in 3mm × 3mm DFN
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PowerPath is a trademark of Linear Technology Corporation.
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24 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LT 0110 REV B • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2005
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