LTC5588-1
200MHz to 6000MHz
Quadrature Modulator
with Ultrahigh OIP3
DESCRIPTION
FEATURES
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Frequency Range: 200MHz to 6000MHz
Output IP3: +31dBm Typical at 2140MHz (Uncalibrated)
+35dBm Typical (User Optimized)
Single Pin Calibration to Optimize OIP3
Low Output Noise Floor at 6MHz Offset:
No RF: –160.6dBm/Hz
POUT = 5dBm: –155.5dBm/Hz
Integrated LO Buffer and LO Quadrature Phase
Generator
High Impedance DC Interface to Baseband Inputs
with 0.5V Common Mode Voltage*
50Ω Single-Ended LO and RF Ports
3.3V Operation
Fast Turn-Off/On: 10ns/17ns
Temperature Sensor (Thermistor)
24-Lead UTQFN 4mm × 4mm Package
APPLICATIONS
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LTE, GSM/EDGE, W-CDMA, TD-SCDMA, CDMA2K,
WiMax Basestations
Image Reject Upconverters
Point-to-Point Microwave Links
Broadcast Modulator
Military Radio
The LTC®5588-1 is a direct conversion I/Q modulator
designed for high performance wireless applications. It
allows direct modulation of an RF signal using differential
baseband I and Q signals. It supports LTE, GSM, EDGE,
TD-SCDMA, CDMA, CDMA2000, W-CDMA, WiMax and
other communication standards. It can also be configured as an image reject upconverting mixer, by applying
90° phase-shifted signals to the I and Q inputs. The I/Q
baseband inputs drive double-balanced mixers. An onchip balun converts the differential mixer signals to a 50Ω
single-ended RF output. Four balanced I and Q baseband
input ports are DC-coupled with a common mode voltage level of 0.5V. The LO path consists of an LO buffer
with single-ended or differential inputs and precision
quadrature generators to drive the mixers. The supply
voltage range is 3.15V to 3.45V. An external voltage can
be applied to the LINOPT pin to further improve 3rd-order
linearity performance. Accurate temperature dependent
calibrations can be performed using the on-chip thermistor.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
*Contact LTC Marketing for other common mode voltage versions.
ACPR, AltCPR and ACPR, AltCPR
with Optimized LINOPT Voltage vs RF
Output Power at 2.14GHz for
W-CDMA 1, 2 and 4 Carriers
TYPICAL APPLICATION
200MHz to 6000MHz Direct Conversion Transmitter Application
I-DAC
LTC5588-1
VmI
6.8pF
I-CHANNEL
PA
0o
EN
0.2pF
90o
Q-CHANNEL
Q-DAC
VmI
1nF
1nF
VCO/SYNTHESIZER
4C
2C
1C
–70
LTC2630
55881 TA01a
50Ω
ACPR
ACPR (OPT)
AltCPR
–50
AltCPR (OPT)
DOWNLINK TEST
MODEL 64 DPCH
–60
fBB = 140MHz,
fLO = 2280MHz
–80
LINOPT
BASEBAND
GENERATOR
ACPR, AltCPR (dBc)
VCC
–40
3.3V
1nF + 4.7μF
s2
RF = 200MHz
TO 6000MHz
–90
–20
–15
–5
0
5
–10
RF OUTPUT POWER PER CARRIER (dBm) 55881 TA01b
55881fb
1
LTC5588-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Supply Voltage .........................................................3.8V
Common Mode Level of BBPI, BBMI,
and BBPQ, BBMQ...................................................0.55V
Voltage on Any Pin...........................–0.3V to VCC + 0.3V
TJMAX .................................................................... 150°C
Operating Temperature Range .................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
GNDRF
GND
BBPI
BBMI
GND
VCC1
TOP VIEW
24 23 22 21 20 19
EN 1
18 VCC2
G
N
D
R
F
26
GND 2
LOP 3
GND
25
LOM 4
GND 5
17 GNDRF
16 RF
15 NC
14 GNDRF
13 NC
9 10 11 12
GND
BBMQ
GND
GNDRF
8
BBPQ
7
LINOPT
NC 6
PF24 PACKAGE
VARIATION: PF24MA
24-LEAD (4mm s 4mm) PLASTIC UTQFN
TJMAX = 150°C, θJA = 43°C/W, θJC = 7°C/W (AT EXPOSED PAD)
EXPOSED PADS (PINS 25, 26) ARE GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC5588IPF-1#PBF
LTC5588IPF-1#TRPBF
5881T
24-Lead (4mm × 4mm) Plastic UTQFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, LOP AC-terminated with 50Ω to ground,
BBPI, BBMI, BBPQ, BBMQ common mode DC voltage VCMBB = 0.5VDC, I and Q baseband input signal = 100kHz CW, 1VP-P(DIFF) each, I
and Q 90° shifted, lower sideband selection, LINOPT pin floating, unless otherwise noted. Test circuit is shown in Figure 8.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fLO = 240MHz, fRF = 239.9MHz, PLO = 10dBm, C7 = 4.7nH, C8 = 33pF, Using U2 = Anaren P/N B0310J50100A00 Balun
fRF(MATCH)
RF Match Frequency Range
S22 < –10dB (Note 10)
200 to 244
MHz
fLO(MATCH)
LO Match Frequency Range
S11 < –10dB
200 to 1500
MHz
GV
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
–5.9
dB
1VP-P(DIFF) CW Signal, I and Q
–1.9
dBm
5.1
dBm
77.3
dBm
POUT
Absolute Output Power
OP1dB
Output 1dB Compression
OIP2
Output 2nd-Order Intercept
OIP3
Output 3rd-Order Intercept
(Notes 4, 6)
NFloor
RF Output Noise Floor
No Baseband AC Input Signal (Note 3)
IR
Image Rejection
(Note 7)
–27
dBc
LOFT
Carrier Leakage (LO Feedthrough)
(Note 7)
–53
dBm
(Notes 4, 5)
28
–168.3
dBm
dBm/Hz
55881fb
2
LTC5588-1
ELECTRICAL CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, LOP AC-terminated with 50Ω to ground,
BBPI, BBMI, BBPQ, BBMQ common mode DC voltage VCMBB = 0.5VDC, I and Q baseband input signal = 100kHz CW, 1VP-P(DIFF) each, I
and Q 90° shifted, lower sideband selection, LINOPT pin floating, unless otherwise noted. Test circuit is shown in Figure 8.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fLO = 450MHz, fRF = 449.9MHz, PLO = 10dBm, C7 = 2.7nH, C8 = 10pF, U2 = Anaren P/N B0310J50100A00 Balun
fRF(MATCH)
RF Match Frequency Range
S22 < –10dB (Note 10)
350 to 468
MHz
fLO(MATCH)
LO Match Frequency Range
S11 < –10dB
200 to 1500
MHz
GV
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
–2.6
dB
POUT
Absolute Output Power
1VP-P(DIFF) CW Signal, I and Q
1.4
dBm
OP1dB
Output 1dB Compression
8.6
dBm
OIP2
Output 2nd-Order Intercept
(Notes 4, 5)
72
dBm
OIP3
Output 3rd-Order Intercept
(Notes 4, 6)
30
dBm
NFloor
RF Output Noise Floor
No Baseband AC Input Signal (Note 3)
POUT = 1dBm (Note 3)
IR
Image Rejection
(Note 7)
–53
dBc
LOFT
Carrier Leakage (LO Feedthrough)
(Note 7)
–45
dBm
–165.2
–159.8
dBm/Hz
dBm/Hz
fLO = 900MHz, fRF = 899.9MHz, PLOM = 0dBm, C7 = 6.8pF, C8 = 0.2pF
fRF(MATCH)
RF Match Frequency Range
S22 < –10dB
700 to 5000
MHz
fLO(MATCH)
LO Match Frequency Range
S11 < –10dB
600 to 6000
MHz
GV
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
1VP-P(DIFF) CW Signal, I and Q
0
dB
POUT
Absolute Output Power
OP1dB
Output 1dB Compression
4.0
dBm
12.1
dBm
OIP2
Output 2nd-Order Intercept
OIP3
Output 3rd-Order Intercept
(Notes 4, 5)
73.6
dBm
(Notes 4, 6)
Optimized (Notes 4, 6, 11)
31.3
35.1
dBm
dBm
NFloor
RF Output Noise Floor
No Baseband AC Input Signal (Note 3)
POUT = 5dBm (Note 3) PLOM = 10dBm
–161.6
–155.1
IR
Image Rejection
(Note 7)
–45.5
dBc
LOFT
Carrier Leakage (LO Feedthrough)
(Note 7)
EN = Low (Note 7)
–43.1
–68.9
dBm
dBm
S22 < –10dB
700 to 5000
MHz
600 to 6000
MHz
dBm/Hz
dBm/Hz
fLO = 1900MHz, fRF = 1899.9MHz, PLOM = 0dBm, C7 = 6.8pF, C8 = 0.2pF
fRF(MATCH)
RF Match Frequency Range
fLO(MATCH)
LO Match Frequency Range
S11 < –10dB
GV
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
1VP-P(DIFF) CW Signal, I and Q
POUT
Absolute Output Power
OP1dB
Output 1dB Compression
OIP2
Output 2nd-Order Intercept
OIP3
Output 3rd-Order Intercept
0.4
dB
4.4
dBm
12.4
dBm
(Notes 4, 5)
58.8
dBm
(Notes 4, 6)
Optimized (Notes 4, 6, 11)
30.3
32.7
dBm
dBm
NFloor
RF Output Noise Floor
No Baseband AC Input Signal (Note 3)
–160.6
dBm/Hz
IR
Image Rejection
(Note 7)
–54.4
dBc
LOFT
Carrier Leakage (LO Feedthrough)
(Note 7)
–40.9
dBm
55881fb
3
LTC5588-1
ELECTRICAL CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, LOP AC-terminated with 50Ω to ground,
BBPI, BBMI, BBPQ, BBMQ common mode DC voltage VCMBB = 0.5VDC, I and Q baseband input signal = 100kHz CW, 1VP-P(DIFF) each, I
and Q 90° shifted, lower sideband selection, LINOPT pin floating, unless otherwise noted. Test circuit is shown in Figure 8.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fLO = 2140MHz, fRF = 2139.9MHz, PLOM = 0dBm, C7 = 6.8pF, C8 = 0.2pF
fRF(MATCH)
RF Match Frequency Range
S22 < –10dB
700 to 5000
MHz
fLO(MATCH)
LO Match Frequency Range
S11 < –10dB
600 to 6000
MHz
GV
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
0.2
dB
POUT
Absolute Output Power
1VP-P(DIFF) CW Signal, I and Q
4.2
dBm
OP1dB
Output 1dB Compression
12.0
dBm
OIP2
Output 2nd Order Intercept
(Notes 4, 5)
58.5
dBm
OIP3
Output 3rd Order Intercept
(Notes 4, 6)
Optimized (Notes 4, 6, 11)
30.9
35.1
dBm
dBm
NFloor
RF Output Noise Floor
No Baseband AC Input Signal (Note 3)
POUT = 5dBm (Note 3) PLOM = 10dBm
–160.6
–155.5
dBm/Hz
dBm/Hz
IR
Image Rejection
(Note 7)
–56.6
dBc
LOFT
Carrier Leakage (LO Feedthrough)
(Note 7)
–39.6
dBm
S22 < –10dB
700 to 5000
MHz
600 to 6000
MHz
fLO = 2600MHz, fRF = 2599.9MHz, PLOM = 0dBm, C7 = 6.8pF, C8 = 0.2pF
fRF(MATCH)
RF Match Frequency Range
fLO(MATCH)
LO Match Frequency Range
S11 < –10dB
GV
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
–0.2
dB
POUT
Absolute Output Power
1VP-P(DIFF) CW Signal, I and Q
3.8
dBm
OP1dB
Output 1dB Compression
11.4
dBm
OIP2
Output 2nd-Order Intercept
(Notes 4, 5)
61.1
dBm
OIP3
Output 3rd-Order Intercept
(Notes 4, 6)
Optimized (Notes 4, 6, 11)
29.2
39.5
dBm
dBm
NFloor
RF Output Noise Floor
No Baseband AC Input Signal (Note 3)
IR
Image Rejection
(Note 7)
–48.8
dBc
LOFT
Carrier Leakage (LO Feedthrough)
(Note 7)
–35.5
dBm
–160.5
dBm/Hz
fLO = 3500MHz, fRF = 3499.9MHz, PLOM = 0dBm, C7 = 6.8pF, C8 = 0.2pF
fRF(MATCH)
RF Match Frequency Range
S22 < –10dB
700 to 5000
MHz
fLO(MATCH)
LO Match Frequency Range
S11 < –10dB
600 to 6000
MHz
GV
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
–1.0
dB
POUT
Absolute Output Power
1VP-P(DIFF) CW Signal, I and Q
3.0
dBm
OP1dB
Output 1dB Compression
10.5
dBm
OIP2
Output 2nd-Order Intercept
(Notes 4, 5)
67.6
dBm
OIP3
Output 3rd-Order Intercept
(Notes 4, 6)
Optimized (Notes 4, 6, 11)
23.5
27.5
dBm
dBm
NFloor
RF Output Noise Floor
No Baseband AC Input Signal (Note 3)
–160.1
IR
Image Rejection
(Note 7)
–36.8
dBc
LOFT
Carrier Leakage (LO Feedthrough)
(Note 7)
–37.5
dBm
700 to 5000
600 to 6000
–9.1
–5.1
MHz
MHz
dB
dBm
fLO = 5800MHz, fRF = 5799.9MHz, PLOM = 0dBm, C7 = 6.8pF, C8 = 0.2pF
S22, < –10dB
fRF(MATCH) RF Match Frequency Range
S11, < –10dB
fLO(MATCH) LO Match Frequency Range
Conversion Voltage Gain
20 • Log (VRF(OUT)(50Ω)/VIN(DIFF)(I or Q))
GV
Absolute Output Power
1VP-P(DIFF) CW Signal, I and Q
POUT
dBm/Hz
55881fb
4
LTC5588-1
ELECTRICAL CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, LOP AC-terminated with 50Ω to ground,
BBPI, BBMI, BBPQ, BBMQ common mode DC voltage VCMBB = 0.5VDC, I and Q baseband input signal = 100kHz CW, 1VP-P(DIFF) each, I
and Q 90° shifted, lower sideband selection, LINOPT pin floating, unless otherwise noted. Test circuit is shown in Figure 8.
SYMBOL
PARAMETER
OP1dB
Output 1dB Compression
OIP2
Output 2nd-Order Intercept
OIP3
Output 3rd-Order Intercept
NFloor
RF Output Noise Floor
IR
Image Rejection
LOFT
Carrier Leakage (LO Feedthrough)
Baseband Inputs (BBPI, BBMI, BBPQ, BBMQ)
Baseband Bandwidth
BWBB
Baseband Input Current
Ib(BB)
Input Resistance
RIN(SE)
DC Common Mode Voltage
VCMBB
Amplitude Swing
VSWING
Power Supply (VCC1, VCC2)
Supply Voltage
VCC
Supply Current
ICC(ON)
Supply Current, Sleep Mode
ICC(OFF)
Turn-On Time
tON
Turn-Off Time
tOFF
Image Rejection Settling
tON(IR)
LO Suppression Settling
tON(LO)
tON(PHASE) Phase Settling
VLINOPT(ON) LINOPT Voltage
VLINOPT(OFF) LINOPT Voltage, Sleep Mode
Enable Pin
Enable
Input High Voltage
Input High Current
Sleep
Input Low Voltage
Input Low Current
Temperature Sensor (Thermistor) (Note 14)
Thermistor Resistance
RT
Temperature Slope
CONDITIONS
MIN
(Notes 4, 5)
(Notes 4, 6)
No Baseband AC Input Signal (Note 3)
(Note 7)
(Note 7)
–1dB Bandwidth, RSOURCE = 25Ω, Single Ended
Single Ended
Single Ended
Externally Applied
No Hard Clipping, Single Ended
EN = High
EN = 0V
EN = Low to High (Notes 8, 13)
EN = High to Low (Notes 9, 13)
EN = Low to High, VGND
2.5
2.0
1.5
1.0
VCC = 3.45V
VCC = 3.3V
VCC = 3.15V
VCC = 0V
0.5
0
–40
60
40
55881 G78
3.0
fLO = fRF – fBB1
fIM2 = fRF + fBB2
50
3.3V, 85°C
3.3V, 25°C
3.15V, 25°C
3.45V, 25°C
3.3V, –40°C
RESISTANCE (kΩ)
30
60
50
3.3V, 85°C
3.3V, 25°C
3.15V, 25°C
3.45V, 25°C
3.3V, –40°C
40
OIP2 (dBm)
80
OIP2 (dBm)
80
RESISTANCE (kΩ)
OIP2 (dBm)
90
Output IP2 vs RF Frequency for Low
Side LO Injection (fBB1 = 140MHz,
fBB2 = 141MHz, PLOM = 10dBm
0
40
80
TEMPERATURE (°C)
120
55881 G81
2.0
1.5
1.0
VCC = 3.45V
VCC = 3.3V
VCC = 3.15V
VCC = 0V
0.5
0
–40
0
40
80
TEMPERATURE (°C)
120
55881 G82
55881fb
15
LTC5588-1
PIN FUNCTIONS
EN (Pin 1): Enable Input. When the enable pin voltage is
higher than 2V, the IC is on. When the input voltage is less
than 1V, the IC is off.
LINOPT (Pin 7): Linearity Optimization Input. An external
voltage can be applied to this pin to optimize the linearity
(OIP3) under a specific application condition. Its optimum
voltage depends on the LO frequency, temperature, supply
voltage, baseband frequency and signal bandwidth. The
typical input voltage range is from 2V to 3.7V. The pin can
be left floating for good overall linearity performance.
GND (Pins 2, 5, 8, 11, 12, 14, 17, 19, 20, 23, Exposed
Pad Pins 25 and 26): Ground. Pins 2, 5, 8, 11, 20, 23
and exposed pad Pin 25 (group 1) are connected together
internally while Pins 12, 14, 17, 19 and exposed pad Pin 26
(group 2) are tied together and serve as the ground return
for the RF balun. For best overall performance all ground
pins should be connected to RF ground. For best OIP2
performance it is recommended to connect group 1 and
group 2 only at second and lower level ground layers
of the PCB, not the top layer. A thermistor (temperature
variable resistor) of 1.4kΩ at 25°C and VCC = 3.3V with
temperature coefficient of 11Ω/°C is connected between
group 1 and group 2.
BBMQ, BBPQ (Pins 9, 10): Baseband Inputs of the Q Channel. The input impedance of each input is about –3kΩ. It
should be externally biased to a 0.5V common mode level.
Do not apply common mode voltage beyond 0.55VDC.
RF (Pin 16): RF Output. The RF output is a DC-coupled
single-ended output with 50Ω output impedance at RF
frequencies. An AC-coupling capacitor of 6.2pF (C7), should
be used at this pin for 0.7GHz to 3.5GHz operation.
VCC1, VCC2 (Pins 24, 18): Power Supply. It is recommended
to use 2 × 1nF and 2 × 4.7μF capacitors for decoupling to
ground on these pins.
LOP (Pin 3): Positive LO Input. An AC-coupling capacitor
(1nF) in series with 50Ω to ground provides the best OIP2
performance.
BBPI, BBMI (Pins 21, 22): Baseband Inputs of the
I Channel. The input impedance of each input is about
–3kΩ. It should be externally biased to a 0.5V common
mode level. Do not apply common mode voltage beyond
0.55VDC.
LOM (Pin 4): Negative LO Input. An AC-coupled 50Ω LO
signal source can be applied to this pin.
NC (Pins 6, 13, 15): No Electrical Connection.
BLOCK DIAGRAM
VCC1 VCC2
GND
20
BBPI 21
23
24
25
NC
18
13
15
VqI
BBMI 22
I CHANNEL
16 RF
0°
90°
GND
BBPQ 10
1 EN
VqI
BBMQ 9
Q CHANNEL
2
5
8
GND
11
3
4
LOP LOM
6
7
NC LINOPT
12
14
17
19
26
GNDRF
55881 BD
55881fb
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LTC5588-1
APPLICATIONS INFORMATION
The LTC5588-1 consists of I and Q input differential voltage-to-current converters, I and Q upconverting mixers,
an RF output balun, an LO quadrature phase generator
and LO buffers.
External I and Q baseband signals are applied to the differential baseband input pins, BBPI, BBMI and BBPQ,
BBMQ. These voltage signals are converted to currents and
translated to RF frequency by means of double-balanced
upconverting mixers. The mixer outputs are combined at
the inputs of the RF output balun, which also transforms
the output impedance to 50Ω. The center frequency of
the resulting RF signal is equal to the LO signal frequency.
The LO input drives a phase shifter which splits the LO
signal into in-phase and quadrature signals. These LO
signals are then applied to on-chip buffers which drive the
upconverting mixers. In most applications, the LOM input
is driven by the LO source via a 1nF coupling capacitor,
while the LOP input is terminated with 50Ω to RF ground
via a 1nF coupling capacitor. The RF output is single ended
and internally 50Ω matched across a wide RF frequency
range from 700MHz to 5GHz with better than 10dB return
loss using C7 = 6.8pF and C8 = 0.2pF (S22 < –10dB). See
Figure 8.
For 240MHz operation, C7 = 4.7nH and C8 = 33pF is recommended. For 450MHz, C7 = 2.7nH and C8 = 10pF is
recommended. Note that the frequency of the best match
is set lower than the band center frequency to compensate
the gain roll-off of the on-chip RF output balun at lower
frequency. At 240MHz and 450MHz operations, the image
rejection and the large-signal noise performance is better
using higher LO drive levels. However, if the drive level
causes internal clipping, the LO leakage degrades. Using
a balun such as Anaren P/N B0310J50100A00 increases
the LO drive level without internal clipping and provides
a relatively broadband LO port impedance match.
Baseband Interface
The baseband inputs (BBPI, BBMI, BBPQ, BBMQ) present
a single-ended input impedance of about –3kΩ. Because
of the negative input impedance, it is important to keep the
source resistance at each baseband input low enough such
that the total input impedance remains positive across the
baseband frequency. Each of the four baseband inputs has
a capacitor of 4pF in series with 14Ω connected to ground
and a PNP emitter follower in parallel (see Figure 1). The
baseband bandwidth depends on the source impedance. For
a 25Ω source impedance (50Ω terminated with 50Ω), the
baseband bandwidth (–1dB) is about 430MHz. If a 2.7nH
series inductor is inserted at each of the four baseband
inputs, the –1dB baseband bandwidth can be increased
to about 650MHz.
LTC5588-1
VCC2 = 3.3V
RF
BALUN
VCC1 = 3.3V
FROM
Q CHANNEL
LOMI
LOPI
GNDRF
BBPI
14Ω
4pF
VCM = 0.5V
4pF
14Ω
BBMI
55881 F01
GND
Figure 1. Simplified Circuit Schematic of the LTC5588-1 (Only I Channel is Shown)
55881fb
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LTC5588-1
APPLICATIONS INFORMATION
It is recommended to compensate the baseband input
impedance in the baseband lowpass filter design in order
to achieve best gain flatness vs baseband frequency. The
S-parameters for (each of) the baseband inputs is given
in Table 1.
Table 1. Single-Ended BB Input Impedance vs Frequency for
EN = High and VDC = 0.5V
FREQUENCY
(MHz)
0.1
1
2
4
8
16
30
60
100
140
200
250
300
350
400
450
500
600
700
800
900
1000
REFLECTION COEFFICIENT
MAG
ANGLE
1.03
–0.13
1.03
–0.13
1.03
–0.37
1.03
–0.68
1.03
–1.38
1.03
–2.79
1.03
–5.3
1.03
–10.6
1.04
–18.2
1.03
–24.8
1.02
–36
1.01
–45
0.99
–52
0.96
–59
0.94
–67
0.90
–73
0.87
–80
0.82
–92
0.77
–102
0.74
–113
0.71
–122
0.69
–129
BB INPUT
IMPEDANCE
–3700
–3900-j340
–3700-j950
–3200-j1500
–2100-j1900
–860-j1600
–300-j990
–87-j520
–35-j308
–16-j226
–6-j154
–1.4-j120
1.4-j102
4.4-j87
5.4-j74
7-j66
8.3-j58
9.4-j47
10-j38
10-j32
10.5-j27
10.5-j23
L1A
250nH
10mA ±10mA
The circuit is optimized for a common mode voltage of
0.5V which should be externally applied. The baseband
pins should not be left floating to cause the internal PNP’s
base current to pull the common mode voltage higher
than the 0.55V limit, generating excessive current flow. If
it occurs for an extended period, damage to the IC may
result. In shutdown mode it is recommended to terminate
to ground or to a 0.5V source with a value lower than
200Ω. The PNP’s base current is about –136μA ranging
from –250μA to –50μA.
It is recommended to drive the baseband inputs differentially to reduce even-order distortion products. When a DAC
is used as the signal source, a reconstruction filter should
be placed between the DAC output and the LTC5588-1
baseband inputs to avoid aliasing.
Figure 2 shows a typical baseband interface for zero-IF
repeater application. A 5th-order lowpass ladder filter is
used with –0.3dB cut-off of 60MHz. C1A, C1B, C3A and
C3B are configured in a single-ended fashion in order to
suppress common mode noise. L3A and L3B (0402 size)
are used to compensate for passband droop due to the
finite quality factor of the inductors L1A, L1B, L2A and
L2B (0603 size). R3A and R3B improves the out-of-band
noise performance. R3A = R3B = 0Ω (L3A and L3B omitted) provides best out-of-band noise performance but no
passband droop compensation. In that case, L1A, L1B,
L2A and L2B may have to be increased in size (higher
quality factor) to limit passband droop.
L2A
250nH
0.5VDC
L3A
100nH
BBPI
R3A
71.57
R1A
71.57
C1A
47pF
R1B
71.57
C1B
47pF
L1B
250nH
DAC
C2
39pF
C3A
47pF
R2A
1657
C3B
47pF
R2B
1657
L2B
250nH
R2C
2497
R3B
71.57
L3B
100nH
BBMI
10mA ±10mA
0.5VDC
55881 F02
GND
Figure 2: Baseband Interface with 5th-Order Filter and 0.5VCM DAC (Only I Channel is Shown)
55881fb
18
LTC5588-1
APPLICATIONS INFORMATION
At each baseband pin, a 0.146V to 0.854V swing is developed corresponding to a DAC output current of 0mA
to 20mA. A 3dB lower gain can be achieved using R1A =
R1B = 49.9Ω; R2A = R2B = Open; R2C = 100Ω; R3A =
R3B = 51Ω; L1A = L1B = L2A = L2B = 180nH; C1A = C1B
= C3A = C3B = 68pF; C2 = 56pF.
LO Section
The internal LO chain consists of a quadrature phase
shifter followed by LO buffers. The LOM input can be
driven single ended with 50Ω input impedance, while the
LOP input should be terminated with 50Ω through a DC
blocking capacitor.
The LOP and LOM inputs can also be driven differentially
when an exceptionally low large-signal output noise floor
is required.
A simplified circuit schematic for the LOP and LOM inputs
is given in Figure 3. Table 2 lists LOM port input impedance vs frequency at EN = High and PLOM = 0dBm. For EN
= Low and PLOM = 0dBm the input impedance is given in
Table 3. The LOM port input impedance is shown for EN
= High and Low at PLOM = 10dBm in Table 4 and Table 5,
respectively. The circuit schematic of the demo board is
shown in Figure 8. A 50Ω termination can be connected
to the LOP port (J1).
The LOM port (J2) can also be terminated with a 50Ω
while the LO power is applied to the LOP (J1) port. In that
case, the image rejection may be degraded. At 2.14GHz,
the large-signal noise figure is about 2dB better for difVCC1
LOP
LOM
+
–
2.35V
(3.3V IN
SHUTDOWN)
55881 F03
Figure 3: Simplified Circuit Schematic
for the LOP and LOM inputs
ferential LO drive (using BD1631J50100A00) with a LO
power below 10dBm. The balun (U2) can be installed
by removing C5 and C6 (see Figure 8). Using Anaren
P/N B0310J50100A00 improves image, LO leakage and
large-signal noise performance at 240MHz and 450MHz.
For this particular balun, an external blocking capacitor
is required.
Figure 4 shows the return loss vs RF frequency for the
240MHz and 450MHz frequency bands. Figure 5 shows
the corresponding gain vs RF frequency where the gain
curve peaks at a higher frequency compared to the frequency with best match. Note that the overall bandwidth
degrades tuning the matching frequency lower. A similar
technique can be used for 700MHz and 900MHz if gain
flatness is important.
Table 2. LOM Port Input Impedance vs Frequency for EN = High
and PLOM = 0dBm (LOP Terminated with 50Ω AC to Ground)
FREQUENCY
(GHz)
LOM INPUT
IMPEDANCE
0.2
REFLECTION COEFFICIENT
MAG
ANGLE
98-j65
0.499
–29.8
0.25
87-j58
0.462
–34.3
0.3
79-j51
0.421
–38.8
0.4
69-j40
0.354
–45.8
0.5
63-j32
0.296
–52.4
0.6
59-j27
0.256
–58.4
0.7
55-j24
0.225
–64.9
0.8
52-j21
0.203
–72.5
0.9
50-j19
0.188
–79.6
1.0
48-j18
0.18
–86.9
1.2
44-j16
0.178
–101
1.4
41-j15
0.185
–111
1.6
39-j14
0.194
–118
1.8
38-j13
0.2
–123
2.0
37-j12
0.199
–128
2.5
36-j7.8
0.189
–146
3.0
32-j2.4
0.225
–171
3.5
28+j1.0
0.288
176
4.0
25+j2.4
0.35
173
4.5
23+j4.1
0.372
168
5.0
21+j6.2
0.417
162
5.5
19+j7.9
0.472
159
6.0
17+j8.7
0.519
157
55881fb
19
LTC5588-1
APPLICATIONS INFORMATION
Table 3. LOM Port Input Impedance vs Frequency for EN = Low
and PLOM = 0dBm (LOP Terminated with 50Ω AC to Ground)
FREQUENCY
(GHz)
LOM INPUT
IMPEDANCE
0.2
REFLECTION COEFFICIENT
Table 4. LOM Port Input Impedance vs Frequency for EN = High
and PLOM = 10dBm (LOP Terminated with 50Ω AC to Ground)
MAG
ANGLE
FREQUENCY
(GHz)
LOM INPUT
IMPEDANCE
95-j69
0.511
–31.4
0.2
0.25
84-j61
0.472
–36.2
0.3
76-j53
0.43
–41
0.4
67-j41
0.36
0.5
61-j33
0.3
0.6
57-j28
0.259
0.7
54-j24
0.8
51-j21
0.9
1.0
REFLECTION COEFFICIENT
MAG
ANGLE
96-j64
0.494
–30.6
0.25
86-j57
0.455
–35.1
0.3
77-j51
0.42
–40.2
–48.5
0.4
69-j41
0.356
–46.6
–55.6
0.5
62-j33
0.3
–54.1
–61.9
0.6
58-j28
0.258
–59.1
0.228
–68.7
0.7
55-j24
0.229
–66.6
0.205
–76.5
0.8
52-j21
0.203
–73.1
48-j19
0.191
–83.6
0.9
50-j19
0.192
–80.6
47-j18
0.183
–90.9
1.0
48-j18
0.179
–87.5
1.2
43-j16
0.182
–105
1.2
44-j16
0.176
–102
1.4
40-j15
0.19
–114
1.4
41-j15
0.185
–112
1.6
39-j14
0.2
–121
1.6
39-j14
0.196
–119
1.8
38-j13
0.207
–125
1.8
38-j14
0.202
–123
2.0
37-j12
0.205
–131
2.0
37-j12
0.201
–128
2.5
35-j7.6
0.2
–149
2.5
36-j7.9
0.188
–146
3.0
31-j2.2
0.238
–172
3.0
32-j2.7
0.225
–170
3.5
27+j1.3
0.303
175
3.5
28+j0.8
0.292
176
4.0
24+j2.9
0.363
171
4.0
24+j2.0
0.348
172
4.5
22+j4.7
0.387
166
4.5
23+j3.6
0.373
168
5.0
21+j7.0
0.427
160
5.0
21+j5.9
0.42
162
5.5
18+j8.7
0.481
157
5.5
19+j7.5
0.468
159
6.0
16+j9.7
0.524
154
6.0
16+j8.5
0.518
157
55881fb
20
LTC5588-1
APPLICATIONS INFORMATION
0
Table 5. LOM Port Input Impedance vs Frequency for EN = Low
and PLOM = 10dBm (LOP Terminated with 50Ω AC to Ground)
LOM INPUT
IMPEDANCE
0.2
REFLECTION COEFFICIENT
MAG
ANGLE
92-j61
0.48
–32.1
0.25
83-j55
0.444
–36.9
0.3
75-j50
0.414
–42
0.4
66-j39
0.345
–49.3
0.5
60-j32
0.293
–57.4
0.6
56-j27
0.251
–63.2
0.7
53-j23
0.225
–71.2
0.8
50-j20
0.199
–78.8
0.9
48-j19
0.191
–86.6
1.0
46-j17
0.18
–93.6
1.2
42-j15
0.181
–108
1.4
40-j14
0.192
–117
1.6
38-j14
0.205
–123
1.8
37-j13
0.211
–127
2.0
36-j12
0.212
–132
2.5
35-j7.5
0.202
–150
3.0
31-j2.2
0.244
–172
3.5
27+j1.3
0.31
175
4.0
24+j2.7
0.363
171
4.5
22+j4.4
0.389
166
5.0
20+j6.8
0.433
160
5.5
18+j8.5
0.479
157
6.0
16+j9.5
0.525
154
0
RF PORT, EN = HIGH,
C7 = 4.7nH, C8 = 33pF
RF PORT, EN = LOW,
C7 = 4.7nH, C8 = 33pF
RF PORT, EN = HIGH,
C7 = 2.7nH, C8 = 10pF
RF PORT, EN = LOW,
C7 = 2.7nH, C8 = 10pF
LO PORT, EN = HIGH,
USING B0310J50100A00
LO PORT, EN = LOW,
USING B0310J50100A00
RETURN LOSS (dB)
–10
–20
–30
–40
200
300
400
500
–2
VOLTAGE GAIN (dB)
FREQUENCY
(GHz)
–4
–6
–8
–10
200
3.3V, 85°C
3.3V, 25°C
3.15V, 25°C
3.45V, 25°C
3.3V, –40°C
400
300
500
RF FREQUENCY (MHz)
600
55881 F05
Figure 5. Low Band Voltage Gain vs RF Frequency
Using Figure 4 Matching
The third harmonic content of the LO can degrade image
rejection severely, it is recommended to keep the 3rd-order
harmonic of the LO signal lower than the desirable image
rejection minus 6dB. Although the second harmonic content
of the LO is less sensitive, it can still be significant. The
large-signal noise figure can be improved with higher LO
input power. However, if the LO input power is too large to
cause the internal LO signal clipping in the phase-shifter
section, the image rejection can be degraded rapidly.
This clipping point depends on the supply voltage, LO
frequency, temperature and single ended vs differential LO
drive. At fLO = 2140MHz, VCC = 3.3V, T = 25°C and singleended LO drive, this clipping point is at about 16.7dBm.
For 3.15V it lowers to 16.1dBm. For differential drive it is
about 21.6dBm.
The differential LO port input impedance for EN = High
and PLO = 10dBm is given in Table 6.
600
FREQUENCY (MHz)
55881 F04
Figure 4. RF and LO Port Return Loss vs Frequency for Low Band
Match (See Figure 8)
55881fb
21
LTC5588-1
APPLICATIONS INFORMATION
Table 6: Differential LO Input Impedance vs Frequency for
EN = High and PLO = 10dBm
FREQUENCY
(MHz)
LO
DIFFERENTIAL
INPUT
IMPEDANCE
Table 7: Differential LO Input Impedance vs Frequency for
EN = Low and PLO = 10dBm
REFLECTION COEFFICIENT
MAG
ANGLE
FREQUENCY
(MHz)
LO
DIFFERENTIAL
INPUT
IMPEDANCE
REFLECTION COEFFICIENT
MAG
ANGLE
0.2
134-j48
0.247
–43
0.2
131-j48
0.243
–45
0.25
126-j51
0.247
–50
0.25
125-j52
0.250
–52
0.3
119-j46
0.223
–55
0.3
117-j46
0.221
–58
0.4
109-j45
0.215
–66
0.4
107-j45
0.215
–69
0.5
100-j40
0.194
–79
0.5
98-j40
0.197
–81
0.6
97-j36
0.181
–84
0.6
95-j36
0.183
–87
0.7
94-j36
0.184
–90
0.7
92-j35
0.186
–93
0.8
90-j35
0.186
–96
0.8
88-j34
0.188
–99
0.9
84-j34
0.198
–104
0.9
83-j33
0.200
–107
1.0
83-j33
0.198
–107
1.0
82-j32
0.199
–110
1.2
77-j36
0.237
–111
1.2
75-j35
0.237
–114
1.4
76-j37
0.243
–111
1.4
76-j35
0.240
–113
1.6
73-j38
0.262
–113
1.6
72-j36
0.259
–115
1.8
74-j37
0.254
–113
1.8
74-j35
0.248
–115
2.0
74-j35
0.251
–115
2.0
73-j33
0.245
–118
2.5
78-j28
0.199
–120
2.5
77-j25
0.191
–125
3.0
74-j15
0.173
–145
3.0
73-j12
0.172
–152
3.5
67-j2.9
0.197
–174
3.5
66-j0.2
0.206
180
4.0
58+j7.3
0.275
168
4.0
56+j10
0.293
164
4.5
51+j15
0.338
158
4.5
49+j18
0.362
154
5.0
42+j18
0.433
156
5.0
39+j21
0.459
153
5.5
34+j20
0.515
156
5.5
32+j22
0.538
153
6.0
27+j16
0.596
160
6.0
25+j18
0.619
158
55881fb
22
LTC5588-1
APPLICATIONS INFORMATION
RF Section
After upconversion, the RF outputs of the I and Q mixers
are combined. An on-chip balun performs internal differential to single-ended conversion, while transforming
the output signal to 50Ω as shown in Figure 1.
Table 8 shows the RF port output impedance vs frequency
for EN = High.
Table 8. RF Output Impedance vs Frequency for EN = High
FREQUENCY
(MHz)
RF OUTPUT
IMPEDANCE
0.2
REFLECTION COEFFICIENT
MAG
ANGLE
7.8+j11
0.742
154
0.25
8.7+j13
0.723
149
0.3
9.7+j16
0.702
143
0.4
12+j21
0.660
133
0.5
16+j25
0.609
123
0.6
19+j29
0.560
114
0.7
24+j32
0.509
106
0.8
30+j34
0.457
98
0.9
35+j35
0.409
91
1.0
41+j34
0.359
85
1.2
52+j28
0.266
70
1.4
58+j18
0.180
57
1.6
58+j7.1
0.098
39
1.8
55+j0.2
0.042
3.4
1.9
52-j2.7
0.032
–52
2.0
50-j4.3
0.043
–92
2.5
39-j5.9
0.142
–149
3.0
32-j1.9
0.227
–173
3.2
30-j0.2
0.255
–180
3.5
27+j2.2
0.298
172
4.0
23+j4.5
0.365
167
4.5
22+j6.8
0.406
161
5.0
19+j11
0.475
151
5.5
17+j20
0.541
133
6.0
15+j27
0.613
120
The RF port output impedance for EN = Low is given in
Table 9.
Table 9. RF Output Impedance vs Frequency for EN = Low
FREQUENCY
(MHz)
RF OUTPUT
IMPEDANCE
0.2
7.2+j11
REFLECTION COEFFICIENT
MAG
ANGLE
0.761
155
0.25
8.0+j13
0.742
149
0.3
9.0+j16
0.720
144
0.4
12+j21
0.675
133
0.5
15+j25
0.622
123
0.6
19+j29
0.571
115
0.7
23+j32
0.518
107
0.8
29+j34
0.464
99
0.9
35+j35
0.414
92
1.0
40+j34
0.363
86
1.2
51+j28
0.266
72
1.4
57+j18
0.175
60
1.6
57+j7.0
0.090
43
1.8
53+j0.4
0.030
7.0
1.9
51-j2.4
0.025
–74
2.0
48-j4.0
0.044
–111
2.5
38-j4.9
0.153
–155
3.0
31-j0.7
0.240
–177
3.2
29+1.0
0.266
–177
3.5
27+j3.6
0.308
169
4.0
24+j5.6
0.365
164
4.5
22+j6.9
0.405
161
5.0
19+j11
0.478
151
5.5
17+j20
0.563
132
6.0
15+j28
0.628
118
55881fb
23
LTC5588-1
APPLICATIONS INFORMATION
Linearity Optimization
The LINOPT pin (Pin 7) can be used to optimize the linearity of the RF circuitry. Figure 6 shows the simplified
schematic of the LINOPT pin interface. The nominal DC
bias voltage of the LINOPT pin is 2.56V and the typical
voltage window to drive the LINOPT pin for optimum
linearity is 2V to 3.7V. Since its input impedance for EN =
High is about 150Ω, an external buffer may be required to
output a current in the range of –2mA to 8mA. The LINOPT
voltage for optimum linearity is a function of LO frequency,
temperature, supply voltage, baseband frequency, high
side or low side LO injection, process, signal bandwidth
and RF output level.
For zero-IF systems the spectral regrowth is typically
limited by the OIP2 performance. In that case, optimizing the LINOPT pin voltage may not improve the spectral
regrowth. The spectral regrowth for systems with an IF
(for example 140MHz) will be set by the OIP3 performance
and optimizing LINOPT voltage can improve the spectral
regrowth significantly (see Figure 13).
Enable Interface
Figure 7 shows a simplified schematic of the EN pin interface. The voltage necessary to turn on the LTC5588-1
is 2V. To disable (shut down) the chip, the enable voltage
must be below 1V. If the EN pin is not connected, the chip
is enabled. This EN = High condition is assured by the
100k on-chip pull-up resistor.
VCC1
75Ω
100Ω
250Ω
LINOPT
INTERNAL
ENABLE SIGNAL
55881 F06
Figure 6. LINOPT Pin Interface
VCC1
100k
EN
INTERNAL
ENABLE
CIRCUIT
55881 F07
Figure 7. EN Pin Interface
55881fb
24
LTC5588-1
APPLICATIONS INFORMATION
Evaluation Board
voltage drop over R1 and R2 is about 0.15V. The supply
voltages applied directly to the chip can be monitored
by measuring at the test points TP1 and TP2. If a power
supply is used that ramps up slower than 7V/μs and limits
the overshoot on the supply below 3.8V, R1 and R2 can be
omitted. To facilitate turn-on and turn-off time measurements, the microstrip between J5 and J7 can be used
connecting J5 to a pulse generator, J7 to an oscilloscope
with 50Ω input impedance, removing R5 and inserting a
0Ω resistor for R3.
Figure 8 shows the evaluation board schematic. A good
ground connection is required for the exposed pad. If this
is not done properly, the RF performance will degrade.
Additionally, the exposed pad provides heat sinking for the
part and minimizes the possibility of the chip overheating. Resistors R1 and R2 reduce the charging current in
capacitors C1 and C2 (see Figure 8) and will reduce supply
ringing during a fast power supply ramp-up with inductive wiring connecting VCC and GND. For EN = High, the
J9
BBMI
R6
OPT
C12
OPT R11
OPT
J7
EN
J8
BBPI
C11
R10 OPT
OPT
R4
OPT
TP1
C1
4.7μF
J5
EN
GND
C6
1nF
LINOPT
LOM
GND
GNDRF
BBPI
GND
NC
NC
25
R13
OPT
GNDRF
GND
R12
OPT
R14
1Ω
NC
7
8
9
C2
4.7μF
TP2
18
17
C7
6.8pF
J6
RF OUT
16
15
14
C8
0.2pF
13
GNDRF
6
RF
U1
LTC5588-1
GND
C14
1nF
2
LOP
BBPQ
3
5
GNDRF
GND
BBMQ
4
BBMI
VCC1
3
VCC2
GND
4
EN
LINOPT
5
2
NC GND BP
BALUN
UNBP GND BP
1
J2
LOM
C4
1nF
24 23 22 21 20 19
1
U2
OPT
R2
1.3Ω
EN
C5
1nF
6
R1
1Ω
R5
0Ω
R3
OPT
J1
LOP
VCC
C3
1nF
10 11 12
26
BOARD NUMBER: DC1524A
C13
100nF
J3
BBMQ
J4
BBPQ
C9
OPT
R8
OPT
R7
OPT
C10
R9 OPT
OPT
55881 F08
Figure 8. Evaluation Circuit Schematic
55881fb
25
LTC5588-1
APPLICATIONS INFORMATION
Figures 9 and 10 show the component side and the bottom side of the evaluation board. An enlarged view of the
component side around the IC placement shows all pins
related to GND (group 1) and all pins related to GNDRF
(group 2) are not connected via the top layer of the component side in Figure 11. It is possible to use the part
without a split-paddle PCB island, but this may degrade
OIP2 by a few dB at some frequencies and reduce LO
leakage slightly.
Due to self heating, the board temperature on the bottom
side underneath the exposed die paddle for EN = high
and VCC = 3.3V is –29.5°C at –40°C, 37.8°C at 25°C and
98.1°C at 85°C ambient temperatures.
The on-chip temperature can be obtained using the built-in
thermistor. The on-chip thermistor is internally connected
between GNDRF and GND, requiring AC grounding Pins
12, 14, 17, 19 and the exposed pad pin 26. The thermistor
is 1.4kΩ at 25°C and VCC = 3.3V, and has a temperature
coefficient of 11Ω/°C. Switching from EN = Low to EN
= High causes a 1.5mV DC voltage increase on the (AC
grounded) GNDRF due to the internal IR drop.
Figure 9. Component Side of Evaluation Board
Figure 10. Bottom Side of Evaluation Board
Figure 11. Enlarged View of the Component Side
of the Evaluation Board
55881fb
26
LTC5588-1
APPLICATIONS INFORMATION
The LTC5588-1 is recommended for basestation applications using various modulation formats. Figure 14 shows
a typical application. The LTC2630 can be used to drive
the LINOPT pin via a SPI interface. At 3.3V supply, the
maximum LINOPT voltage is about 3.125V. Using an extra
buffer like the LTC6246 in unity-gain configuration can
increase the maximum LINOPT voltage to about 3.17V.
An LTC2630 with a 5V supply can drive the full 2V to 3.7V
range for the LINOPT pin.
Figure 12 shows the ACPR, AltCPR and ACPR, AltCPR with
Optimized LINOPT voltage vs RF Output Power at 2.14GHz
for W-CDMA 1, 2 and 4 Carriers. A 4-Carriers W-CDMA
spectrum is shown in Figure 13 with and without LINOPT
voltage optimization.
–40
ACPR, AltCPR (dBc)
ACPR
ACPR (OPT)
AltCPR
–50
AltCPR (OPT)
DOWNLINK TEST
MODEL 64 DPCH
–60
fBB = 140MHz,
fLO = 2280MHz
4C
2C
1C
–70
–80
–90
–20
–15
–5
0
5
–10
RF OUTPUT POWER PER CARRIER (dBm) 55881 TA
Figure 12. ACPR, AltCPR and ACPR, AltCPR with Optimized LINOPT
Voltage vs RF Output Power at 2.14GHz for W-CDMA 1, 2 and 4 Carriers
POWER IN 30kHz BW (dBm)
–20
DOWNLINK TEST MODEL 64 DPCH
–40
–60
–80
fBB = 140MHz
fLO = 2280MHz
OPTIMIZED
NOT OPTIMIZED
–100
–120
2.115
2.125
2.145
2.155
2.135
RF FREQUENCY (GHz)
2.165
55881 F13
Figure 13. 4-Carrier W-CDMA Spectrum with and without LINOPT
Voltage Optimization
55881fb
27
LTC5588-1
PACKAGE DESCRIPTION
PF Package
Variation: PF24MA
24-Lead Plastic UTQFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1834 Rev Ø)
2.50 REF
0.70 p0.05
4.50 p 0.05 2.45 p 0.05
3.10 p 0.05
0.41
p0.05
0.41 p0.05
1.24 p0.05
0.41
p0.05
PACKAGE OUTLINE
0.25 p0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.20 TYP
OR 0.25 s 45o
CHAMFER
BOTTOM VIEW—EXPOSED PAD
0.55 p 0.05
4.00 p 0.10
R = 0.05
TYP
2.50 REF
23
PIN 1
TOP MARK
(NOTE 6)
24
0.40 p 0.10
1
2
4.00 p 0.10
2.45 p0.10
0.41 p 0.10
0.41
p 0.10
1.24 p 0.10
R = 0.125
TYP
(PF24MA) UTQFN 0908 REV Ø
0.125 REF
0.00 – 0.05
0.41 p 0.10
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 p 0.05
0.50 BSC
55881fb
28
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC5588-1
REVISION HISTORY
REV
DATE
DESCRIPTION
A
2/11
Updated Features and Description sections
1
Add θJC value to Pin Configuration
2
Additional information added to Electrical Characteristics section
5
B
3/11
PAGE NUMBER
Added Typical Performance Characteristics curves
14, 15
Revised Applications Information to replace Figure 1 and text.
17, 26
Added Note 14 to Electrical Characteristics section.
5
55881fb
29
LTC5588-1
TYPICAL APPLICATION
24
VCC
21
I-DAC
18
1nF + 4.7μF
s2
LTC5588-1
VmI
22
3.3V
6.8pF
I-CHANNEL
PA
1
0o
EN
0.2pF
Q-CHANNEL
10
VmI
9
BASEBAND
GENERATOR
12,14,17,
19, 26
90o
Q-DAC
RF = 200MHz
TO 6000MHz
2, 5, 8, 11, 20
23, 25
3.3V
3
1nF
LINOPT
7
4
1nF
50Ω
4
6
DAC
LTC2630
1
2
3
LD
SCK
SDI
5
VCO/SYNTHESIZER
55881 F14
Figure 14. 200MHz to 6000MHz Direct Conversion Transmitter Application
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