LTC6363 Family
Precision, Low Power Differential
Amplifier/ADC Driver Family
FEATURES
DESCRIPTION
Available with User Settable Gain or Fixed-Gain
of 0.5V/V, 1V/V, or 2V/V
nn 2.9nV/√Hz Input-Referred Noise
nn 2mA Maximum Supply Current
nn 45ppm Max Gain Error
nn 0.5ppm/°C Max Gain Error Drift
nn 94dB Min CMRR
nn 100µV Max Offset Voltage
nn 50nA Max Input Offset Current
nn Fast Settling: 720ns to 18-Bit, 8V
P-P Output
nn 2.8V (±1.4V) to 11V (±5.5V) Supply Voltage Range
nn Differential Rail-to-Rail Outputs
nn Input Common Mode Range Includes Ground
nn Low Distortion: 118dB SFDR at 2kHz, 18V
P-P
nn 500MHz Gain-Bandwidth Product
nn 35MHz –3dB Bandwidth
nn Low Power Shutdown: 20µA (V = 3V)
S
nn 8-Lead MSOP, 2mm × 3mm 8-Lead DFN and 3mm x
3mm 16-lead LFCSP Packages
The LTC®6363 family consists of four fully differential,
low power, low noise amplifiers with rail-to-rail outputs
optimized to drive SAR ADCs. The LTC6363 is a standalone
differential amplifier, where the gain is typically set using
four external resistors. The LTC6363-0.5, LTC6363-1, and
LTC6363-2 each have internal matched resistors to create
fixed gain blocks with gains of 0.5V/V, 1V/V, and 2V/V
respectively. Each of the fixed-gain amplifiers features
precision laser trimmed on-chip resistors for accurate,
ultrastable gain and excellent CMRR.
nn
Family Selection Table
PART NUMBER
GAIN
LTC6363
User Set
LTC6363-0.5
0.5V/V
APPLICATIONS
LTC6363-1
n
n
n
n
n
LTC6363-2
n
20-Bit, 18-Bit and 16-Bit SAR ADC Drivers
Single-Ended-to-Differential Conversion
Low Power ADC Drivers
Level Shifter
Differential Line Drivers
Battery-Powered Instrumentation
CONFIGURATION
+
–
+IN
–IN
–OUT
+OUT
RF
+IN
1V/V
–IN
2V/V
RI
RI
+
–
–OUT
+OUT
RF
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
DC-Coupled Interface from a Ground-Referenced
Single-Ended Input to an LTC2378-20 SAR ADC
LTC6363-1 Driving LTC2378-20
fIN = 2kHz, –1dBFS,131k-Point FFT
6V
0
+IN 1050Ω
LTC6363-1
–OUT
1050Ω
30.1Ω
3.3nF
V+
VIN
+
VOCM
AIN+
3.3nF
–
0.1µF
–IN 1050Ω
1050Ω
V–
SHDN
6V
+OUT
30.1Ω
5V
2.5V
VREF
VDD
–40
20-BIT
LTC2378-20
SAR ADC
AIN–
V–
VS = 6V, –1V
VOUTDIFF = 8.9VP-P
HD2 = –119.5dBc
HD3 = –128.3dBc
SFDR = 118.3dB
THD = –115.3dB
SNR = 102dB
SINAD = 101.8dB
–20
1Msps
GND
6363 TA01a
3.3nF
–1V
For more information www.analog.com
AMPLITUDE (dBFS)
V+
–60
–80
–100
–120
–140
–160
0
50 100 150 200 250 300 350 400 450 500
FREQUENCY (kHz)
6363 TA01b
Rev. C
1
LTC6363 Family
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ – V–)...................................12V
Input Voltage (+IN, –IN) (Note 2)
LTC6363-0.5.................... (V–) – 14.9V to (V+) + 14.9V
LTC6363-1.........................(V–) – 11.1V to (V+) + 11.1V
LTC6363-2....................... (V–) – 7.45V to (V+) + 7.45V
Input Current (+IN, –IN) LTC6363 (Note 3)........... ±10mA
Input Current (VOCM, SHDN) (Note 3)................... ±10mA
Output Short-Circuit Duration
(Note 4)...........................................Thermally Limited
Operating Temperature Range (Note 5)
LTC6363I/LTC6363I-0.5/LTC6363I-1/
LTC6363I-2...........................................–40°C to 85°C
LTC6363H/LTC6363H-0.5/LTC6363H-1/
LTC6363H-2....................................... –40°C to 125°C
Specified Temperature Range (Note 6)
LTC6363I/LTC6363I-0.5/LTC6363I-1/
LTC6363I-2...........................................–40°C to 85°C
LTC6363H/LTC6363H-0.5/LTC6363H-1/
LTC6363H-2....................................... –40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range................... –65°C to 150°C
MSOP Lead Temperature (Soldering, 10 sec)......... 300°C
PIN CONFIGURATION
LTC6363
LTC6363
TOP VIEW
TOP VIEW
–IN 1
VOCM 2
V+ 3
+OUT 4
– +
+–
8 +IN
–IN 1
8
7
6
5
+IN
SHDN
V–
–OUT
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 273°C/W
VOCM 2
9
V–
V+ 3
+OUT 4
7 SHDN
– +
+–
6 V–
5 –OUT
DCB PACKAGE
8-LEAD (2mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 64°C/W, θJC = 10.6°C/W
EXPOSED PAD (PIN 9) MUST BE CONNECTED TO V–
LTC6363-0.5/LTC6363-1/LTC6363-2
TOP VIEW
V– V– V– V–
16 15 14 13
TOP VIEW
–IN 1
VOCM 2
V+ 3
+OUT 4
– +
+–
8
7
6
5
+IN
SHDN
V–
–OUT
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 273°C/W
–FB 1
12 SHDN
+–
–+
+IN 2
–IN 3
+FB 4
5
6
11 –OUT
10 +OUT
17
7
9 VOCM
8
V+ V + V + V+
LFCSP PACKAGE
16-LEAD (3mm × 3mm) PLASTIC LFCSP
TJMAX = 150°C, θJA = 81.2°C/W, θJC = 39.7°C/W
EXPOSED PAD (PIN 17) MUST BE CONNECTED TO V– OR GROUND
Rev. C
2
For more information www.analog.com
LTC6363 Family
ORDER INFORMATION
TUBE
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC6363IMS8#PBF
LTC6363IMS8#TRPBF
LTGSQ
8-Lead Plastic MSOP
–40°C to 85°C
LTC6363HMS8#PBF
LTC6363HMS8#TRPBF
LTGSQ
8-Lead Plastic MSOP
–40°C to 125°C
LTC6363IMS8-0.5#PBF
LTC6363IMS8-0.5#TRPBF
LTGST
8-Lead Plastic MSOP
–40°C to 85°C
LTC6363HMS8-0.5#PBF
LTC6363HMS8-0.5#TRPBF LTGST
8-Lead Plastic MSOP
–40°C to 125°C
LTC6363IMS8-1#PBF
LTC6363IMS8-1#TRPBF
LTGSR
8-Lead Plastic MSOP
–40°C to 85°C
LTC6363HMS8-1#PBF
LTC6363HMS8-1#TRPBF
LTGSR
8-Lead Plastic MSOP
–40°C to 125°C
LTC6363IMS8-2#PBF
LTC6363IMS8-2#TRPBF
LTGSS
8-Lead Plastic MSOP
–40°C to 85°C
LTC6363HMS8-2#PBF
LTC6363HMS8-2#TRPBF
LTGSS
8-Lead Plastic MSOP
–40°C to 125°C
TAPE AND REEL (MINI)
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC6363IDCB#TRMPBF
LTC6363IDCB#TRPBF
LGVG
8-Lead (2mm × 3mm) Plastic DFN
–40°C to 85°C
LTC6363HDCB#TRMPBF
LTC6363HDCB#TRPBF
LGVG
8-Lead (2mm × 3mm) Plastic DFN
–40°C to 125°C
LTC6363IRD#PBF
LTC6363IRD#TRPBF
LHJW
16-Lead (3mm × 3mm) Plastic LFCSP –40°C to 85°C
LTC6363HRD#PBF
LTC6363HRD#TRPBF
LHJW
16-Lead (3mm × 3mm) Plastic LFCSP –40°C to 125°C
Lead Free Finish
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Contact the factory for parts specified with wider operating temperature ranges.
Contact the factory for information on lead based finish parts.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS
Complete LTC6363 Family. The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM =
VOCM = VICM = 5V, VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2.
VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
PSRR (Note 7)
Differential Power Supply Rejection
(∆VS/∆VOSDIFF)
VS = 2.8V to 11V
PSRRCM (Note 7)
l
90
125
dB
Output Common Mode Power Supply Rejection VS = 2.8V to 11V
(∆VS/∆VOSCM)
l
70
90
dB
GCM
Common Mode Gain (∆VOUTCM/∆VOCM)
VS = 3V, VOCM from 0.5V to 2.5V
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
l
l
l
1
1
1
V/V
V/V
V/V
∆GCM
Common Mode Gain Error 100 • (GCM – 1)
VS = 3V, VOCM from 0.5V to 2.5V
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
l
l
l
0.2
0.1
0.07
1
0.5
0.4
%
%
%
BAL
Output Balance (∆VOUTCM/∆VOUTDIFF)
∆VOUTDIFF = 2V
Single-Ended Input
Differential Input
l
l
–58
–58
–35
–35
dB
dB
VS = 3V
VS = 5V
VS = 10V
l
l
l
±1
±1
±1
±6
±6
±6
mV
mV
mV
VOSCM
Common Mode Offset Voltage
(VOUTCM – VOCM)
∆VOSCM/∆T
Common Mode Offset Voltage Drift
VOUTCMR (Note 9)
Output Signal Common Mode Range
(Voltage Range for the VOCM Pin)
10
l
VOCM Driven Externally, VS = 3V
VOCM Driven Externally, VS = 5V
VOCM Driven Externally, VS = 10V
l
l
l
MAX
0.5
0.5
0.5
UNITS
μV/°C
2.5
4.5
9.5
V
V
V
Rev. C
For more information www.analog.com
3
LTC6363 Family
ELECTRICAL
CHARACTERISTICS
Complete LTC6363 Family. The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM =
VOCM = VICM = 5V, VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2.
VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
VOCM
Self-Biased Voltage at the VOCM Pin
VOCM Not Connected, VS = 3V
VOCM Not Connected, VS = 5V
VOCM Not Connected, VS = 10V
RINVOCM
Input Resistance, VOCM Pin
MIN
TYP
MAX
UNITS
l
l
l
1.38
2.33
4.79
1.5
2.5
5
1.82
2.82
5.21
V
V
V
l
1.3
1.8
2.3
VOCM Bandwidth
15
VS
Supply Voltage Range
Guaranteed by PSRR
IS
Supply Current
VS = 3V, Active
2.8
l
11
l
VS = 5V, Active
1.8
1.95
mA
mA
20
40
µA
1.75
1.85
2
mA
mA
30
65
µA
1.9
2
2.2
mA
mA
l
VS = 5V, Shutdown
l
VS = 10V, Active
l
VS = 10V, Shutdown
70
130
+
–
(V + V )/2 + 0.4
l
V
1.7
l
VS = 3V, Shutdown
MΩ
MHz
µA
VIL
SHDN Input Logic Low
l
VIH
SHDN Input Logic High
l
tON
Turn-On Time
4
μs
tOFF
Turn-Off Time
2
μs
RSHDN
Input Resistance, SHDN Pin
(V+ + V–)/2 + 1.2
300
l
500
V
V
700
kΩ
LTC6363 Only. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications
and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V, VSHDN = open. VS is defined as (V+ – V–). VOUTCM is
defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT). Typical specifications apply to
the internal amplifier inside all versions.
SYMBOL
PARAMETER
CONDITIONS
VOSDIFF (Note 7)
Differential Offset Voltage
VS = 3V
VICM =1.5V
l
VS = 5V
VICM = 2.5V
l
VS = 10V
VICM = 5V
l
VS = 3V
VS = 5V
VS = 10V
l
l
l
∆VOSDIFF/∆T
Differential Offset Voltage Drift
(Notes 7, 8)
AVOL
Open-Loop Voltage Gain
IB (Note 10)
Input Bias Current
VS = 3V
VS = 5V
VS = 10V
IOS (Note 10)
Input Offset Current
VS = 3V
MIN
TYP
MAX
UNITS
25
100
200
µV
µV
25
100
200
µV
µV
25
100
200
µV
µV
0.45
0.45
0.45
1.25
1.25
1.25
µV/°C
µV/°C
µV/°C
125
l
l
l
–1
–1
–1
–0.5
–0.5
–0.5
–0.1
–0.1
–0.1
µA
µA
µA
±5
±50
±75
nA
nA
±5
±50
±75
nA
nA
±5
±50
±75
nA
nA
l
VS = 5V
l
VS = 10V
l
dB
Rev. C
4
For more information www.analog.com
LTC6363 Family
ELECTRICAL CHARACTERISTICS
LTC6363 Only. The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM =
5V, VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is
defined as (V+OUT – V–OUT). Typical specifications apply to the internal amplifier inside all versions.
SYMBOL
PARAMETER
CONDITIONS
∆IOS/∆T (Note 8)
Input Offset Current Drift
VS = 3V
VS = 5V
VS = 10V
MIN
RIN
Input Resistance
Common Mode
Differential Mode
50
40
MΩ
kΩ
CIN
Input Capacitance
Differential Mode
2
pF
en (Note 7)
Differential Input Noise Voltage
Differential Input Noise Voltage Density
0.1Hz to 10Hz
f = 100kHz (Not Including RI/RF)
l
l
l
TYP
MAX
UNITS
±30
±30
±30
±150
±150
±150
pA/°C
pA/°C
pA/°C
2.5
2.9
µVP-P
nV/√Hz
20
nV/√Hz
0.55
pA/√Hz
envocm
Common Mode Noise Voltage Density
f = 100kHz
in
Input Noise Current Density
f = 100kHz (Not Including RI/RF)
VICMR (Note 9)
Input Common Mode Range
VS = 3V
VS = 5V
VS = 10V
l
l
l
0
0
0
CMRRI (Note 7)
Input Common Mode Rejection Ratio
(Input Referred) ∆VICM/∆VOSDIFF
VS = 3V, VICM from 0V to 1.8V
VS = 5V, VICM from 0V to 3.8V
VS = 10V, VICM from 0V to 8.8V
l
l
l
78
85
90
110
115
120
dB
dB
dB
CMRRIO (Note 7)
Output Common Mode Rejection Ratio
(Input Referred) ∆VOCM/∆VOSDIFF
VS = 3V, VOCM from 0.5V to 2.5V
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
l
l
l
70
80
90
120
120
120
dB
dB
dB
VOUT
Output Voltage, High, Either Output Pin
IL= 0mA, VS = 3V
IL = –5mA, VS = 3V
l
l
2.8
2.75
2.88
2.83
V
V
IL= 0mA, VS = 5V
IL = –5mA, VS = 5V
l
l
4.8
4.75
4.88
4.83
V
V
IL= 0mA, VS = 10V
IL = –5mA, VS = 10V
l
l
9.8
9.7
9.88
9.83
V
V
IL= 0mA, VS = 3V
IL = 5mA, VS = 3V
l
l
0.1
0.15
0.15
0.25
V
V
IL= 0mA, VS = 5V
IL = 5mA, VS = 5V
l
l
0.1
0.15
0.15
0.25
V
V
IL= 0mA, VS = 10V
IL = 5mA, VS = 10V
l
l
0.1
0.15
0.2
0.3
V
V
Output Short-Circuit Current, Either
Output Pin, Sinking
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
12
13
14
25
35
40
mA
mA
mA
Output Short-Circuit Current, Either
Output Pin, Sourcing
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
25
27
30
55
75
90
mA
mA
mA
Gain-Bandwidth Product
fTEST = 200kHz
390
230
500
l
MHz
MHz
35
MHz
Output Voltage, Low, Either Output Pin
ISC
GBW
1.8
3.8
8.8
V
V
V
f–3dB
–3dB Bandwidth
RI = RF =1k
SR
Slew Rate
Differential 18VP-P Output
75
V/μs
FPBW (Note 11)
Full Power Bandwidth
10VP-P Output
18VP-P Output
2.4
1.3
MHz
MHz
HD2/HD3
2nd/3rd Order Harmonic Distortion
Single-Ended Input
f = 1kHz, VOUT = 18VP-P
f = 10kHz, VOUT = 18VP-P
f = 100kHz, VOUT = 18VP-P
–123/–128
–120/–108
–92/–85
dBc
dBc
dBc
Rev. C
For more information www.analog.com
5
LTC6363 Family
ELECTRICAL
CHARACTERISTICS
LTC6363-0.5 Only. The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V,
VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined
as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
tS
Settling Time to a 8VP-P Output Step
0.1%
0.01%
0.0015% (16-Bit)
4ppm (18-Bit)
VOSDIFF (Note 7)
Differential Offset Voltage
VS = 3V
VICM =1.5V
l
VS = 5V
VICM = 2.5V
l
VS = 10V
VICM = 5V
l
Differential Offset Voltage Drift
VS = 3V
VS = 5V
VS = 10V
l
l
l
Differential Gain
VOUT = 16VP-P
∆VOSDIFF/∆T
(Notes 7, 8)
GDIFF
MIN
TYP
MAX
290
330
370
720
ns
ns
ns
ns
25
125
250
µV
µV
25
125
250
µV
µV
25
125
250
µV
µV
0.45
0.45
0.45
1.25
1.25
1.25
µV/°C
µV/°C
µV/°C
0.5
Differential Gain Error
±0.002
l
Differential Gain Nonlinearity
V/V
±0.0045
±0.0075
0.5
Differential Gain Drift vs Temperature (Note 8)
±0.2
l
UNITS
%
%
ppm
±0.5
ppm/°C
en (Note 7)
Differential Input Referred Noise Voltage
Density
f = 100kHz,
(Includes Internal Resistor Noise)
envocm
Common Mode Noise Voltage Density
f = 100kHz
RIN
Input Resistance
Common Mode
Differential Mode
1050
2800
Ω
Ω
CIN
Input Capacitance
Differential Mode
Common Mode
2.5
13.5
pF
pF
VICMR (Note 9)
Input Common Mode Range
VS = 3V, VOCM = 1.5V
VS = 5V,VOCM = 2.5V
VS = 10V, VOCM = 5V
CMRRI (Note 7)
Input Common Mode Rejection Ratio (Input
Referred) ∆VICM/∆VOSDIFF
VS = 3V, VICM from –3V to 2.4V
20
nV/√Hz
–3
–5
–10
90
80
106
l
dB
dB
94
85
106
l
dB
dB
94
85
106
l
dB
dB
85
80
100
l
dB
dB
90
85
106
l
dB
dB
90
85
106
l
dB
dB
VS = 10V, VICM from –10V to 16.4V
Output Common Mode Rejection Ratio (Input VS = 3V, VOCM from 0.5V to 2.5V
Referred) ∆VOCM/∆VOSDIFF
nV/√Hz
l
l
l
VS = 5V, VICM from –5V to 6.4V
CMRRIO (Note 7)
15.1
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
2.4
6.4
16.4
V
V
V
Rev. C
6
For more information www.analog.com
LTC6363 Family
ELECTRICAL CHARACTERISTICS
LTC6363-0.5 Only. The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V,
VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined
as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
VOUT
Output Voltage, High, Either Output Pin
IL= 0mA, VS = 3V
IL = –5mA, VS = 3V
l
l
2.77
2.74
2.88
2.83
V
V
IL= 0mA, VS = 5V
IL = –5mA, VS = 5V
l
l
4.75
4.72
4.86
4.81
V
V
IL= 0mA, VS = 10V
IL = –5mA, VS = 10V
l
l
9.72
9.64
9.83
9.78
V
V
IL= 0mA, VS = 3V
IL = 5mA, VS = 3V
l
l
0.11
0.19
0.19
0.27
V
V
IL= 0mA, VS = 5V
IL = 5mA, VS = 5V
l
l
0.13
0.19
0.2
0.28
V
V
IL= 0mA, VS = 10V
IL = 5mA, VS = 10V
l
l
0.17
0.23
0.28
0.38
V
V
Output Short-Circuit Current, Either Output
Pin, Sinking
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
12
13
14
25
35
40
mA
mA
mA
Output Short-Circuit Current, Either Output
Pin, Sourcing
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
25
27
30
55
75
90
mA
mA
mA
35
MHz
Output Voltage, Low, Either Output Pin
ISC
MAX
UNITS
f–3dB
–3dB Bandwidth
SR
Slew Rate
Differential 18VP-P Output
44
V/µs
FPBW (Note 11)
Full Power Bandwidth
10VP-P Output
18VP-P Output
1.4
0.8
MHz
MHz
HD2/HD3
2nd/3rd order Harmonic Distortion
Single-Ended Input
f = 1kHz, VOUT = 10VP-P
f = 10kHz, VOUT = 10VP-P
f = 100kHz, VOUT = 10VP-P
–125/–122
–108/–111
–87/–78
dBc
dBc
dBc
tS
Settling Time to a 8VP-P Output Step
0.1%
0.01%
0.0015% (16-Bit)
4ppm (18-Bit)
420
440
550
740
ns
ns
ns
ns
LTC6363-1 Only. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications and
typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V, VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined
as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
VOSDIFF (Note 7)
Differential Offset Voltage
VS = 3V
VICM =1.5V
l
VS = 5V
VICM = 2.5V
l
VS = 10V
VICM = 5V
l
Differential Offset Voltage Drift
VS = 3V
VS = 5V
VS = 10V
l
l
l
Differential Gain
VOUT = 16VP-P
∆VOSDIFF/∆T
(Notes 7, 8)
GDIFF
MIN
TYP
MAX
UNITS
25
125
250
µV
µV
25
125
250
µV
µV
25
125
250
µV
µV
0.45
0.45
0.45
1.25
1.25
1.25
µV/°C
µV/°C
µV/°C
1
±0.002
Differential Gain Error
l
Differential Gain Nonlinearity
V/V
±0.0045
±0.0075
0.5
Differential Gain Drift vs Temperature (Note 8)
l
±0.2
%
%
ppm
±0.5
ppm/°C
Rev. C
For more information www.analog.com
7
LTC6363 Family
ELECTRICAL CHARACTERISTICS
LTC6363-1 Only. The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V,
VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined
as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
en (Note 7)
Differential Input Referred Noise Voltage
Density
f = 100kHz,
(Includes Internal Resistor Noise)
MIN
TYP
MAX
UNITS
10.5
nV/√Hz
20
nV/√Hz
envocm
Common Mode Noise Voltage Density
f = 100kHz
RIN
Input Resistance
Common Mode
Differential Mode
1050
2100
Ω
Ω
CIN
Input Capacitance
Differential Mode
Common Mode
1.5
13.5
pF
pF
VICMR (Note 9)
Input Common Mode Range
VS = 3V, VOCM = 1.5V
VS = 5V,VOCM = 2.5V
VS = 10V, VOCM = 5V
CMRRI (Note 7)
Input Common Mode Rejection Ratio (Input
Referred) ∆VICM/∆VOSDIFF
VS = 3V, VICM from –1.5V to 2.1V
l
l
l
–1.5
–2.5
–5
90
80
100
l
dB
dB
94
85
100
l
dB
dB
94
85
100
l
dB
dB
90
85
100
l
dB
dB
90
85
100
l
dB
dB
94
90
100
l
dB
dB
IL= 0mA, VS = 3V
IL = –5mA, VS = 3V
l
l
2.78
2.74
2.89
2.85
V
V
IL= 0mA, VS = 5V
IL = –5mA, VS = 5V
l
l
4.77
4.73
4.87
4.83
V
V
IL= 0mA, VS = 10V
IL = –5mA, VS = 10V
l
l
9.74
9.66
9.85
9.81
V
V
IL= 0mA, VS = 3V
IL = 5mA, VS = 3V
l
l
0.1
0.17
0.18
0.26
V
V
IL= 0mA, VS = 5V
IL = 5mA, VS = 5V
l
l
0.11
0.15
0.19
0.27
V
V
IL= 0mA, VS = 10V
IL = 5mA, VS = 10V
l
l
0.15
0.2
0.26
0.33
V
V
Output Short-Circuit Current, Either Output
Pin, Sinking
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
12
13
14
25
35
40
mA
mA
mA
Output Short-Circuit Current, Either Output
Pin, Sourcing
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
25
27
30
55
75
90
mA
mA
mA
VS = 5V, VICM from –2.5V to 5.1V
VS = 10V, VICM from –5V to 12.6V
CMRRIO (Note 7)
Output Common Mode Rejection Ratio (Input VS = 3V, VOCM from 0.5V to 2.5V
Referred) ∆VOCM/∆VOSDIFF
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
VOUT
Output Voltage, High, Either Output Pin
Output Voltage, Low, Either Output Pin
ISC
2.1
5.1
12.6
V
V
V
f–3dB
–3dB Bandwidth
25
MHz
SR
Slew Rate
Differential 18VP-P Output
45
V/µs
FPBW (Note 11)
Full Power Bandwidth
10VP-P Output
18VP-P Output
1.4
0.8
MHz
MHz
HD2/HD3
2nd/3rd order Harmonic Distortion
Single-Ended Input
f = 1kHz, VOUT = 10VP-P
f = 10kHz, VOUT = 10VP-P
f = 100kHz, VOUT = 10VP-P
–122/–125
–114/–105
–90/–82
dBc
dBc
dBc
Rev. C
8
For more information www.analog.com
LTC6363 Family
ELECTRICAL CHARACTERISTICS
LTC6363-2 Only. The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM
= 5V, VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is
defined as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
tS
Settling Time to a 8VP-P Output Step
0.1%
0.01%
0.0015% (16-Bit)
4ppm (18-Bit)
VOSDIFF (Note 7)
Differential Offset Voltage
VS = 3V
VICM =1.5V
l
VS = 5V
VICM = 2.5V
l
VS = 10V
VICM = 5V
l
Differential Offset Voltage Drift
VS = 3V
VS = 5V
VS = 10V
l
l
l
Differential Gain
VOUT = 16VP-P
∆VOSDIFF/∆T
(Notes 7, 8)
GDIFF
MIN
TYP
MAX
420
470
500
810
ns
ns
ns
ns
25
125
250
µV
µV
25
125
250
µV
µV
25
125
250
µV
µV
0.45
0.45
0.45
1.25
1.25
1.25
µV/°C
µV/°C
µV/°C
2
Differential Gain Error
±0.002
l
Differential Gain Nonlinearity
V/V
±0.0045
±0.0075
0.5
Differential Gain Drift vs Temperature (Note 8)
±0.2
l
UNITS
%
%
ppm
±0.5
ppm/°C
en (Note 7)
Differential Input Referred Noise Voltage
Density
f = 100kHz,
(Includes Internal Resistor Noise)
envocm
Common Mode Noise Voltage Density
f = 100kHz
RIN
Input Resistance
Common Mode
Differential Mode
1050
1400
Ω
Ω
CIN
Input Capacitance
Differential Mode
Common Mode
0.6
13.5
pF
pF
VICMR (Note 9)
Input Common Mode Range
VS = 3V, VOCM = 1.5V
VS = 5V,VOCM = 2.5V
VS = 10V, VOCM = 5V
CMRRI (Note 7)
Input Common Mode Rejection Ratio (Input
Referred) ∆VICM/∆VOSDIFF
VS = 3V, VICM from –0.75V to 1.95V
20
nV/√Hz
–0.75
–1.25
–2.5
90
80
106
l
dB
dB
94
85
112
l
dB
dB
94
85
112
l
dB
dB
90
85
106
l
dB
dB
94
90
106
l
dB
dB
94
90
106
l
dB
dB
VS = 10V, VICM from –2.5V to 10.7V
Output Common Mode Rejection Ratio (Input VS = 3V, VOCM from 0.5V to 2.5V
Referred) ∆VOCM/∆VOSDIFF
nV/√Hz
l
l
l
VS = 5V, VICM from –1.25V to 4.45V
CMRRIO (Note 7)
7.55
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
1.95
4.45
10.7
V
V
V
Rev. C
For more information www.analog.com
9
LTC6363 Family
ELECTRICAL CHARACTERISTICS
LTC6363-2 Only. The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications and typical values are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM
= 5V, VSHDN = open. VS is defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is
defined as (V+OUT – V–OUT).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
VOUT
Output Voltage, High, Either Output Pin
IL= 0mA, VS = 3V
IL = –5mA, VS = 3V
l
l
2.79
2.74
2.89
2.84
V
V
IL= 0mA, VS = 5V
IL = –5mA, VS = 5V
l
l
4.78
4.73
4.88
4.83
V
V
IL= 0mA, VS = 10V
IL = –5mA, VS = 10V
l
l
9.76
9.67
9.85
9.81
V
V
IL= 0mA, VS = 3V
IL = 5mA, VS = 3V
l
l
0.09
0.17
0.18
0.26
V
V
IL= 0mA, VS = 5V
IL = 5mA, VS = 5V
l
l
0.1
0.17
0.17
0.26
V
V
IL= 0mA, VS = 10V
IL = 5mA, VS = 10V
l
l
0.13
0.19
0.25
0.33
V
V
Output Short-Circuit Current, Either Output
Pin, Sinking
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
12
13
14
25
35
40
mA
mA
mA
Output Short-Circuit Current, Either Output
Pin, Sourcing
VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
l
l
l
25
27
30
55
75
90
mA
mA
mA
15
MHz
Output Voltage, Low, Either Output Pin
ISC
MAX
UNITS
f–3dB
–3dB Bandwidth
SR
Slew Rate
Differential 18VP-P Output
46
V/µs
FPBW (Note 11)
Full Power Bandwidth
10VP-P Output
18VP-P Output
1.4
0.8
MHz
MHz
HD2/HD3
2nd/3rd order Harmonic Distortion
Single-Ended Input
f = 1kHz, VOUT = 10VP-P
f = 10kHz, VOUT = 10VP-P
f = 100kHz, VOUT = 10VP-P
–116/–123
–114/–103
–92/–81
dBc
dBc
dBc
tS
Settling Time to a 8VP-P Output Step
0.1%
0.01%
0.0015% (16-Bit)
4ppm (18-Bit)
430
470
480
830
ns
ns
ns
ns
Rev. C
10
For more information www.analog.com
LTC6363 Family
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to any Absolute Maximum
Rating condition for extended periods may affect device reliability and lifetime.
Note 2: Absolute Maximum input voltage for the LTC6363-0.5/LTC6363-1/
LTC6363-2 is conservatively calculated assuming the worst case output
voltage. For details on this calculation refer to the Input Pin Protection section.
Note 3: In the LTC6363, if input pins (+IN, –IN, VOCM and SHDN) must
exceed either supply voltage, the input current must be limited to less than
10mA. Additionally, if the differential input voltage exceeds 1.4V, the input
current must be limited to less than 10mA. In the LTC6363-0.5/LTC6363-1/
LTC6363-2 versions, the same limits apply to VOCM, SHDN and the internal
amplifier’s inputs. Please see the Input Common Mode Voltage Range and
Input Pin Protection sections for additional details on calculating the input
voltages on the internal amplifier’s inputs while in a feedback configuration.
Note 4: A heat sink may be required to keep the junction temperature below
the absolute maximum rating when the output is shorted indefinitely.
Note 5: The LTC6363I and LTC6363I-0.5/LTC6363I-1/LTC6363I-2 are
guaranteed functional over the operating temperature range of –40°C
to 85°C. The LTC6363H and LTC6363H-0.5/LTC6363H-1/LTC6363H-2
are guaranteed functional over the operating temperature range of
–40°C to 125°C.
Note 6: The LTC6363I and LTC6363I-0.5/LTC6363I-1/LTC6363I-2 are
guaranteed to meet specified performance from –40°C to 85°C. The
LTC6363H and LTC6363H-0.5/LTC6363H-1/LTC6363H-2 are guaranteed
to meet specified performance from –40°C to 125°C.
Note 7: Differential offset voltage, differential offset voltage drift, and
PSRR are referred to the internal amplifier’s input (summing junction)
to allow for direct comparison of gain blocks with discrete amplifiers.
CMRRI, CMRRIO and voltage noise are referenced to the LTC6363-0.5,
LTC6363-1 and LTC6363-2's input pins. Refer to the Test Circuits section
for more details.
Note 8: Maximum differential offset voltage drift, input offset current drift
and differential gain drift are determined by sampling typical parts. Drift is
not guaranteed by test or QA sampled at this value.
Note 9: Input common mode range is tested by verifying that at the limits
stated in the Electrical Characteristics table, the differential offset (VOSDIFF)
and common mode offset (VOSCM) have not deviated by more than
±200µV and ±10mV respectively compared to the VICM = 5V (at VS = 10V),
VICM = 2.5V (at VS = 5V) and VICM = 1.5V (at VS = 3V) cases.
Output common mode range is tested by verifying that at the limits stated
in the Electrical Characteristics table, the common mode offset (VOSCM) has
not deviated by more than ±15mV compared to the VOCM = 5V (at VS = 10V),
VOCM = 2.5V (at VS = 5V) and VOCM = 1.5V (at VS = 3V) cases.
Note 10: Input bias current is defined as the average of the input currents
flowing into the input pins (–IN and +IN). Input Offset current is defined as
the difference between the input bias currents (IOS = IB+ – IB–).
Note 11: Full power bandwidth is calculated from the slew rate.
FPBW = SR/(2 • π • VP)
Rev. C
For more information www.analog.com
11
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Typical Distribution of Differential
Input Offset Voltage Drift
50
0
–50
–100
–150
–200
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
20
15
10
5
2.0
0
–4
–8
–12
Supply Current
vs Supply Voltage
2.1
1.7
1.6
VS = 10V
VS = 3V
–25
0
25
50
75
TEMPERATURE (°C)
100
1.4
1.2
1.0
0.8
0.6
0.4
TA = –40°C
TA = 25°C
TA = 125°C
0.2
0
125
0
1
6363 G03
2
3 4 5 6 7
SUPPLY VOLTAGE (V)
8
9
5.0
VSHDN = V–
0.6
–4.7
4.7
–4.8
+SWING (V)
4.8
8
9
4.6
10
6363 G06
TA = –40°C
TA = 25°C
TA = 125°C
0
1
2
3 4 5 6 7
SHDN VOLTAGE (V)
8
4.5
–15
–4.9
TA = –40°C
TA = 25°C
TA = 125°C
–10
–5
0
5
LOAD CURRENT (mA)
10
9
10
6363 G05
150
15
6363 G08
–5.0
–SWING (V)
45
3 4 5 6 7
SUPPLY VOLTAGE (V)
0.9
0
–4.5
VS = ±5V
–4.6
2
1.2
Differential Power Supply
Rejection Ratio vs Frequency
4.9
1
V+ = 10V
V– = 0V
0.3
10
60
TA = –40°C
TA = 25°C
TA = 125°C
125
1.5
Output Voltage Swing vs Load
Current
75
15
100
6363 G04
Shutdown Supply Current
vs Supply Voltage
30
0
25
50
75
TEMPERATURE (°C)
Supply Current vs SHDN Voltage
1.8
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
1.8
1.4
–50
–25
6363 G02
1.6
1.9
0
4
1.8
2.0
0
8
6363 G29
2.1
1.5
VS = ±5V
VICM = VOCM = 0V
FIVE TYPICAL UNITS
12
–16
–50
–2 –1.5 –1 –0.5 0 0.5 1 1.5 2
DIFFERENTIAL INPUT OFFSET VOLTAGE DRIFT (µV/°C)
Supply Current vs Temperature
SUPPLY CURRENT (mA)
25
0
125
6363 G01
SUPPLY CURRENT (µA)
COMMON MODE OFFSET VOLTAGE (mV)
100
VS = ±5V
POWER SUPPLY REJECTION RATIO (dB)
150
Common Mode Offset Voltage
vs Temperature
16
30
VS = ±5V
VICM = VOCM = 0V
FIVE TYPICAL UNITS
PERCENTAGE OF PARTS (%)
DIFFERENTIAL INPUT OFFSET VOLTAGE (µV)
Differential Input Offset Voltage
vs Temperature
200
Applicable to all parts in the LTC6363 family.
VS = ±5V
125
100
75
50
25
0
PSRR+
PSRR–
1
10
100
1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
6363 G11
Rev. C
12
For more information www.analog.com
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Output Impedance
vs Frequency
Turn-On and Turn-Off
Transient Response
Output Overdrive Recovery
VSHDN
VS = ±5V
RI = RF = 1k
VINDIFF
4V/DIV
100
1V/DIV
OUTPUT IMPEDANCE (Ω)
1k
Applicable to the LTC6363 only.
10
VOUTDIFF
1
0.1
100k
RI = RF = 1k
RLOAD = 1k DIFF
1M
10M
100M
FREQUENCY (Hz)
1G
VOUTDIFF
5μs/DIV
VS = ±5V
VINDIFF = 24VP-P
RLOAD = 2k DIFF
6363 G07
6363 G10
VS = ±5V
150
0
VICM = 3.8V
0
–50
–100
TA = –40°C
TA = 25°C
TA = 125°C
–150
–200
–300
–400
–500
–600
–5 –4 –3 –2 –1 0 1 2 3 4
INPUT COMMON MODE VOLTAGE (V)
–700
5
6363 G12
0
–12.5
–25.0
–37.5
VICM = 3.8V
–5 –4 –3 –2 –1 0 1 2 3 4
INPUT COMMON MODE VOLTAGE (V)
–50.0
–50
5
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
80
70
60
50
40
30
20
10
–90
–30
30
90
150
INPUT OFFSET CURRENT DRIFT (pA/°C)
6363 G30
0
25
50
75
TEMPERATURE (°C)
100
VS = ±5V
VICM = VOCM = 0V
10
10
en
1
0.1
1
in
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
0.1
30M
6363 G15
125
Slew Rate vs Temperature
90
100
100
VS = ±5V
–25
6363 G14
INPUT CURRENT NOISE DENSITY (pA/√Hz)
PERCENTAGE OF PARTS (%)
12.5
Input Noise Density vs Frequency
100
0
–150
25.0
6363 G13
Typical Distribution of Input
Offset Current Drift
90
VS = ±5V
VICM = VOCM = 0V
FIVE TYPICAL UNITS
37.5
INPUT OFFSET CURRENT (nA)
50
–200
50.0
VS = ±5V
–100
100
6363 G09
Input Offset Current vs
Temperature
85
SLEW RATE (V/µs)
200
Input Bias Current vs Input
Common Mode Voltage
INPUT BIAS CURRENT (nA)
DIFFERENTIAL INPUT OFFSET VOLTAGE (µV)
Differential Input Offset Voltage
vs Input Common Mode Voltage
1μs/DIV
VS = ±5V
SINGLE-ENDED INPUT
VOUTDIFF = 18VP-P
VICM = VOCM = 0V
80
75
70
SLEW MEASURED 10% TO 90%
65
60
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
6363 G16
Rev. C
For more information www.analog.com
13
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Input Common Mode Rejection
Ratio vs Frequency
Frequency Response
vs Closed-Loop Gain
80
VS = ±5V
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
70
100
60
50
80
GAIN (dB)
COMMON MODE REJECTION RATIO (dB)
120
Applicable to the LTC6363 only.
60
40
40
AV = 0.1, RI = 2k, RF = 200
AV = 0.25, RI = 1.4k, RF = 350
AV = 0.5, RI = 1.4k, RF = 700
AV = 1, RI = 1k, RF = 1k
AV = 2, RI = 700, RF = 1.4k
AV = 5, RI = 400, RF = 2k
AV = 10, RI = 200, RF = 2k
AV = 20, RI = 100, RF = 2k
AV = 100, RI = 20, RF = 2k
AV = 1000, RI = 2, RF = 2k
30
20
10
0
–10
20
–20
0
1k
10k
100k
1M
FREQUENCY (Hz)
10M
–30
100k
100M
1M
10M
FREQUENCY (Hz)
100M 300M
6363 G18
6363 G17
Open-Loop Gain and Phase vs
Frequency
Frequency Peaking vs Load
Capacitance
10
8 OUTPUTS MEASURED
AFTER SERIES RESISTORS
7
5
VS = ±5V
VICM = VOCM = 0V
RI = RF = 1k
4
3
2
1
10
100
1000
10000
CAPACITIVE LOAD (pF)
50000
180
160
120
140
100
120
80
100
60
80
40
60
20
40
V = ±5V
0 S
VICM = VOCM = 0V
–20 RI = RF = 1k
NO LOAD
–40
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
PHASE (DEG)
6
0
GAIN
PHASE
140
GAIN (dB)
9
FREQUENCY PEAKING (dB)
160
RSER = 30Ω
RSER = 10Ω
20
0
–20
10M 100M
6363 G20
6363 G19
Small Signal Step Response
Large Signal Step Response
V–OUT
1V/DIV
20mV/DIV
V–OUT
VS = ±5V
VICM = VOCM = 0V
RI = RF = 1k
RLOAD = 2k DIFF
VINDIFF = 250mVP-P
SINGLE-ENDED INPUT
V+OUT
200ns/DIV
6363 G21
VS = ±5V
VICM = VOCM = 0V
RI = RF = 1k
RLOAD = 2k DIFF
VINDIFF = 18VP-P
SINGLE-ENDED INPUT
V+OUT
500ns/DIV
6363 G22
Rev. C
14
For more information www.analog.com
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
DC Linearity
60
40
DISTORTION (dBc)
20
0
–20
VS = ±5V
VICM = VOCM = 0V
RI = RF = 1k
NO LOAD
LINEAR FIT FOR –8V ≤ VOUTDIFF ≤ 8V
–80
–100
–10 –8 –6 –4 –2 0 2
VOUTDIFF (V)
4
6
8
–90
–110
–120
–140
SETTLING TIME (ns)
800
HD2
2
4
8 10 12 14
VOUTDIFF (VP-P )
16
18
20
6363 G26
HD3
HD2
–5 –4 –3 –2 –1 0 1 2 3 4
INPUT COMMON MODE VOLTAGE (V)
6363 G25
5
BIT NUMBERS ARE REFERENCED
TO AN 8VP-P INPUT ADC
700
600
500
18-BIT
400
300
0
16-BIT
2
5
Settling Time to 8VP-P
Output Step
100
6
–150
100k
VS = 10V, 0V
RI = RF = 1k
900
200
–130
–120
6363 G24
1000
HD3
–120
1k
10k
FREQUENCY (Hz)
Settling Time vs Output Step
–110
–110
–140
6363 G23
–100
–100
–130
HD3
–140
100
10
VS = ±5V
RI = RF = 1k
VOUTDIFF = 18VP-P
fIN = 2kHz
DIFFERENTIAL INPUTS
3
4
5
6
7
DIFFERENTIAL OUTPUT STEP (VP-P)
8
VS = 10V, 0V
RI = RF = 1k
4
3
2
1 DIV = 18-BIT ERROR OF AN
8VP-P INPUT ADC
120
90
60
30
1
0
150
ERROR
0
–1
–30
–2
–60
–3
ERROR (µV)
DISTORTION (dBc)
–90
HD2
–130
VS = ±5V
VOCM = 0V
RI = RF = 1k
fIN = 2kHz
SINGLE-ENDED INPUT
GROUND REFERENCED
–80
–90
–100
Harmonic Distortion vs Output
Amplitude
–70
–80
DIFFERENTIAL OUTPUT VOLTAGE (V)
DIFFERENTIAL OUTPUT ERROR
FROM LINEAR FIT (µV)
–80
–70
VS = ±5V
VOCM = 0V
RI = RF = 1k
VOUTDIFF = 18VP-P
SINGLE-ENDED INPUT
GROUND REFERENCED
DISTORTION (dBc)
–70
80
–60
Harmonic Distortion vs Input
Common Mode Voltage
Harmonic Distortion vs Frequency
100
–40
Applicable to the LTC6363 only.
–90
VOUTDIFF
–120
–4
–150
–5
TIME (0.5µs/DIV)
6363 G28
6363 G27
Rev. C
For more information www.analog.com
15
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Peaking vs Load
Capacitance
10
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
GAIN (dB)
–6
–9
–12
–15
30
label2RSER = 30Ω
label3
RSER = 10Ω
9
FREQUENCY PEAKING (dB)
–3
Typical Distribution of Differential
Gain Error
8
25
OUTPUTS MEASURED
AFTER SERIES RESISTORS
7
6
VS = ±5V
VICM = VOCM = 0V
5
4
3
2
PERCENTAGE OF UNITS (%)
Gain vs Frequency
0
Applicable to the LTC6363-0.5 only.
VS = ±5V
72 UNITS
20
15
10
5
1
–18
100k
1M
10M
FREQUENCY(Hz)
0
100M
10
100
1000
10000
CAPACITIVE LOAD (pF)
6363 G31
6363 G32
Typical Distribution of Differential
Gain Drift
55
40
SLEW RATE (V/µS)
PERCENTAGE OF UNITS (%)
60
35
30
25
20
15
10
Differential Input Offset Voltage
vs Input Common Mode Voltage
Slew Rate vs Temperature
VS = ±5V
70 UNITS
45
50
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VOUTDIFF = 18VP-P
SINGLE-ENDED INPUT
45
40
35
5
0
–0.5 –0.4 –0.3 –0.2 –0.1 0.0 0.1 0.2 0.3 0.4 0.5
DIFFERENTIAL GAIN DRIFT (ppm/°C)
SLEW MEASURED 10% to 90%
30
–50 –25
0
25
50
75
TEMPERATURE (°C)
100
6363 G34
COMMON MODE REJECTION RATIO (dB)
125
500
400
300
200
100
0
–100
–200
–300
–400
100
90
TA = 125°C
TA = 85°C
TA = 25°C
TA = –40°C
–500
–20 –16 –12 –8 –4 0
4
8 12
INPUT COMMON MODE VOLTAGE (V)
16
6363 G36
Large Signal Step Response
Small Signal Step Response
VS = ±5V
LTC6363-0.5
VS = ±5V
VOCM = 0V
6363 G35
Input Common Mode Rejection
Ratio vs Frequency
110
6363 G33
DIFFERENTIAL INPUT OFFSET VOLTAGE (µV)
50
0
–50 –40 –30 –20 –10 0 10 20 30 40 50
DIFFERENTIAL GAIN ERROR (ppm)
50000
V+OUT
V+OUT
20mV/DIV
20mV/DIV
80
70
60
50
V–OUT
V–OUT
200ns/DIV
1k
10k
100k
1M
FREQUENCY(Hz)
10M
100M
6363 G37
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VINDIFF = 500mVP-P
SINGLE-ENDED
6363 G38
400ns/DIV
6363 G39
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VINDIFF = 36VP-P
SINGLE-ENDED INPUT
Rev. C
16
For more information www.analog.com
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Applicable to the LTC6363-0.5 only.
Input Noise Voltage Density vs
Frequency
Harmonic Distortion vs Frequency
–70
VS = ±5V
VOCM = 0V
VOUTDIFF = 18VP-P
SINGLE-ENDED INPUT
GROUND REFERENCED
–80
100
DISTORTION (dBc)
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
1000
10
–90
–100
–110
–120 HD3
–130 HD2
1
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
–140
100
10M 30M
1k
10k
FREQUENCY (Hz)
6363 G40
6363 G41
Harmonic Distortion vs Output
Amplitude
–70
–90
HD3
–120
2
4
700
600
400
100
6
8 10 12 14
VOUTDIFF (VP-P)
16
18
0
20
0
1 DIV = 18-BIT ERROR OF AN
8VP-P INPUT ADC
150
100
120
80
90
60
60
30
ERROR
0
–1
–30
–2
–60
–3
–90
–4
8
6363 G43
VOUTDIFF
–120
–150
–5
TIME (0.5µs/DIV)
6363 G44
DIFFERENTIAL OUTPUT ERROR
FROM LINEAR FIT (µV)
1
3
4
5
6
7
DIFFERENTIAL OUTPUT STEP (VP-P)
DC Linearity
G = 0.5
VS = 10V, 0V
4
2
6363 G42
ERROR (µV)
DIFFERENTIAL OUTPUT VOLTAGE (V)
5
2
16-BIT
300
Settling Time to 8VP-P Output
Step
3
18-BIT
500
200
–130 HD2
–140
G = 0.5
BIT NUMBERS ARE REFERENCED
TO AN 8VP-P INPUT ADC
800
–100
–110
VS = 10V, 0V
900
SETTLING TIME (ns)
DISTORTION (dBc)
Settling Time vs Output Step
1000
VS = ±5V
VOCM = 0V
fIN = 2kHz
SINGLE-ENDED INPUT
GROUND REFERENCED
–80
100k
40
20
0
–20
–40
VS = ±5V
–60 V
ICM = VOCM = 0V
–80 NO LOAD
LINEAR FIT FOR –8V ≤ VOUTDIFF ≤ +8V
–100
–8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8
VOUTDIFF (V)
6363 G45
Rev. C
For more information www.analog.com
17
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Peaking vs Load
Capacitance
Gain vs Frequency
10
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
GAIN (dB)
0
–3
–6
–9
25
label2RSER = 30Ω
label3
RSER = 10Ω
9
FREQUENCY PEAKING (dB)
3
Typical Distribution of Differential
Gain Error
8
OUTPUTS MEASURED
AFTER SERIES RESISTORS
7
6
VS = ±5V
VICM = VOCM = 0V
5
4
3
2
PERCENTAGE OF UNITS (%)
6
Applicable to the LTC6363-1 only.
VS = ±5V
72 UNITS
20
15
10
5
1
–12
100k
1M
10M
FREQUENCY(Hz)
0
100M
10
100
1000
10000
CAPACITIVE LOAD (pF)
6363 G46
6363 G47
Typical Distribution of Differential
Gain Drift
55
20
10
Differential Input Offset Voltage
vs Input Common Mode Voltage
50
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VOUTDIFF = 18VP-P
SINGLE-ENDED INPUT
DIFFERENTIAL INPUT OFFSET VOLTAGE (µV)
60
VS = ±5V
71 UNITS
15
45
40
5
35
0
–0.5 –0.4 –0.3 –0.2 –0.1 0.1 0.2 0.3 0.4 0.5
DIFFERENTIAL GAIN DRIFT (ppm/°C)
SLEW MEASURED 10% TO 90%
30
–50 –25
0
25
50
75
TEMPERATURE (°C)
100
Input Common Mode Rejection
Ratio vs Frequency
COMMON MODE REJECTION RATIO (dB)
125
6363 G50
6363 G49
110
6363 G48
Slew Rate vs Temperature
SLEW RATE (V/µS)
PERCENTAGE OF UNITS (%)
25
0
–50 –40 –30 –20 –10 0 10 20 30 40 50
DIFFERENTIAL GAIN ERROR (ppm)
50000
500
LTC6363-1
400 VS = ±5V
300 VOCM = 0V
200
100
0
–100
–200
–300
–400
–500
–12 –10 –8 –6 –4 –2 0 2 4 6 8 10
INPUT COMMON MODE VOLTAGE (V)
6363 G51
Large Signal Step Response
Small Signal Step Response
VS = ±5V
V+OUT
V+OUT
100
2V/DIV
20mV/DIV
90
TA = 125°C
TA = 85°C
TA = 25°C
TA = –40°C
80
V–OUT
V–OUT
70
60
1k
10k
100k
1M
FREQUENCY(Hz)
10M
100M
6363 G52
200ns/DIV
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VINDIFF = 250mVP-P
SINGLE-ENDED INPUT
6363 G53
400ns/DIV
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VINDIFF = 18VP-P
SINGLE-ENDED INPUT
6363 G54
Rev. C
18
For more information www.analog.com
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Applicable to the LTC6363-1 only.
Input Noise Voltage Density vs
Frequency
Harmonic Distortion vs Frequency
–70
DISTORTION (dBc)
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
1000
100
10
VS = ±5V
V
= 0V
–80 VOCM
OUTDIFF = 18VP-P
SINGLE-ENDED INPUT
–90 GROUND REFERENCED
–100
–110
HD2
–120
–130
1
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
HD3
–140
100
10M 30M
1k
10k
FREQUENCY (Hz)
100k
6363 G55
6363 G56
Harmonic Distortion vs Output
Amplitude
–70
VS = ±5V
VOCM = 0V
fIN = 2kHz
SINGLE-ENDED INPUT
GROUND REFERENCED
–90
800
–100
–110
HD3
–120
2
4
600
400
6
8 10 12 14
VOUTDIFF (VP-P)
16
18
0
20
120
80
90
60
60
–1
–30
–2
–60
–3
–90
–5
TIME (0.5µs/DIV)
6363 G59
DIFFERENTIAL OUTPUT ERROR
FROM LINEAR FIT (µV)
100
0
VOUTDIFF
8
DC Linearity
150
30
ERROR
3
4
5
6
7
DIFFERENTIAL OUTPUT STEP (VP-P)
6363 G58
ERROR (µV)
DIFFERENTIAL OUTPUT VOLTAGE (V)
1 DIV = 18-BIT ERROR OF AN
8VP-P INPUT ADC
1
–4
2
6363 G57
G=1
VS = 10V, 0V
4
0
16-BIT
300
100
5
2
18-BIT
500
Settling Time to 8VP-P vs Output
Step
3
BIT NUMBERS ARE REFERENCED
TO AN 8VP-P INPUT ADC
700
200
–130 HD2
–140
VS = 10V, 0V
G=1
900
SETTLING TIME (ns)
–80
DISTORTION (dBc)
Settling Time vs Output Step
1000
40
20
0
–20
–40
VS = ±5V
VICM = VOCM = 0V
NO LOAD
LINEAR FIT FOR –8V ≤ VOUTDIFF ≤ +8V
–60
–120
–80
–150
–100
–8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8
VOUTDIFF (V)
6363 G60
Rev. C
For more information www.analog.com
19
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Peaking vs Load
Capacitance
Gain vs Frequency
10
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
GAIN (dB)
6
3
0
–3
25
label2RSER = 30Ω
label3
RSER = 10Ω
9
FREQUENCY PEAKING (dB)
9
Typical Distribution of Differential
Gain Error
8
OUTPUTS MEASURED
AFTER SERIES RESISTORS
7
6
VS = ±5V
VICM = VOCM = 0V
5
4
3
2
PERCENTAGE OF UNITS (%)
12
Applicable to the LTC6363-2 only.
VS = ±5V
72 UNITS
20
15
10
5
1
–6
100k
1M
10M
FREQUENCY(Hz)
0
100M
10
100
1000
10000
CAPACITIVE LOAD (pF)
6363 G61
6363 G62
Typical Distribution of Differential
Gain Drift
55
24
SLEW RATE (V/µS)
PERCENTAGE OF UNITS (%)
60
21
18
15
12
9
6
Differential Input Offset Voltage
vs Input Common Mode Voltage
Slew Rate vs Temperature
VS = ±5V
72 UNITS
27
50
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VOUTDIFF = 18VP-P
SINGLE-ENDED INPUT
45
40
35
3
0
–0.5 –0.4 –0.3 –0.2 –0.1 0.0 0.1 0.2 0.3 0.4 0.5
DIFFERENTIAL GAIN DRIFT (ppm/°C)
SLEW MEASURED 10% to 90%
30
–50 –25
0
25
50
75
TEMPERATURE (°C)
100
6363 G64
COMMON MODE REJECTION RATIO (dB)
125
VS = ±5V
V+OUT
70
0
–100
–200
–300
–400
100M
6363 G67
TA = 125°C
TA = 85°C
TA = 25°C
TA = –40°C
–500
–10 –8 –6 –4 –2 0
2
4
6
INPUT COMMON MODE VOLTAGE (V)
8
6363 G66
V–OUT
200ns/DIV
10M
100
2V/DIV
V–OUT
100k
1M
FREQUENCY(Hz)
200
V+OUT
80
10k
300
LTC6363-2
VS = ±5V
VOCM = 0V
Large Signal Step Response
20mV/DIV
90
1k
400
Small Signal Step Response
100
60
500
6363 G65
Input Common Mode Rejection
Ratio vs Frequency
110
6363 G63
DIFFERENTIAL INPUT OFFSET VOLTAGE (µV)
30
0
–50 –40 –30 –20 –10 0 10 20 30 40 50
DIFFERENTIAL GAIN ERROR (ppm)
50000
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VINDIFF = 125mVP-P
SINGLE-ENDED INPUT
6363 G68
400ns/DIV
LTC6363 G69
VS = ±5V
VICM = VOCM = 0V
RLOAD = 2k DIFF
VINDIFF = 9VP-P
SINGLE-ENDED INPUT
Rev. C
20
For more information www.analog.com
LTC6363 Family
TYPICAL PERFORMANCE CHARACTERISTICS
Applicable to the LTC6363-2 only.
Input Noise Voltage Density vs
Frequency
Harmonic Distortion vs Frequency
–70
VS = ±5V
VOCM = 0V
VOUTDIFF = 18VP-P
SINGLE-ENDED INPUT
GROUND REFERENCED
–80
DISTORTION (dBc)
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
1000
100
10
–90
–100
–110
HD2
–120
–130
1
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
HD3
–140
100
10M 30M
1k
10k
FREQUENCY (Hz)
6363 G71
6363 G70
Harmonic Distortion vs Output
Amplitude
–70
–90
800
–100
–110
HD3
–120
–140
700
600
400
100
2
4
6
8 10 12 14
VOUTDIFF (VP-P)
16
18
0
20
1
0
1 DIV = 18-BIT ERROR OF AN
7VP-P INPUT ADC
120
80
90
60
60
–30
–60
–2
–3
100
0
–1
VOUTDIFF
–90
40
20
0
–20
–40
–120
–80
–5
–150
–100
6363 G74
VS = ±5V
VICM = VOCM = 0V
NO LOAD
LINEAR FIT FOR –8V ≤ VOUTDIFF ≤ +8V
–60
–4
TIME (0.5µs/DIV)
8
DC Linearity
150
30
ERROR
3
4
5
6
7
DIFFERENTIAL OUTPUT STEP (VP-P)
6363 G73
DIFFERENTIAL OUTPUT ERROR
FROM LINEAR FIT (µV)
G=2
VS = 10V, 0V
4
2
6363 G72
ERROR (µV)
DIFFERENTIAL OUTPUT VOLTAGE (V)
5
2
16-BIT
300
Settling Time to 7VP-P vs Output
Step
3
18-BIT
500
200
HD2
–130
VS = 10V, 0V
G=2
BIT NUMBERS ARE REFERENCED
TO AN 8VP-P INPUT ADC
900
SETTLING TIME (ns)
DISTORTION (dBc)
Settling Time vs Output Step
1000
VS = ±5V
VOCM = 0V
fIN = 2kHz
SINGLE-ENDED INPUT
GROUND REFERENCED
–80
100k
–8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8
VOUTDIFF (V)
6363 G75
Rev. C
For more information www.analog.com
21
LTC6363 Family
PIN FUNCTIONS
(MS8,DCB)
–IN (Pin 1): Inverting Input of Amplifier. In the fixed-gain
LTC6363-0.5/LTC6363-1/LTC6363-2 versions, this pin
connects to a precision, on-chip resistor RI.
VOCM (Pin 2): Output Common Mode Reference Voltage.
Voltage applied to this pin sets the output common mode
voltage level. If left floating, an internal resistor divider
creates a default voltage approximately halfway between
V+ and V–. The VOCM pin should be decoupled to ground
with a minimum of 0.1µF.
V+ (Pin 3): Positive Power Supply. Operational supply
range is 2.8V to 11V when V– = 0V.
+OUT (Pin 4): Positive Output Pin. Output capable of
swinging rail-to-rail.
PIN FUNCTIONS
–OUT (Pin 5): Negative Output Pin. Output capable of
swinging rail-to-rail.
V– (Pin 6/Exposed Pad Pin 9): Negative Power Supply.
Negative supply can be 0V, or taken negative as long as
2.8V ≤ (V+ – V–) ≤ 11V.
SHDN (Pin 7): When the SHDN pin is floating or driven
high, the LTC6363 family is in the normal (active) operating mode. When SHDN pin is connected to V– or driven
low, the part is disabled and draws approximately 20µA
of supply current (VS = 3V).
+IN (Pin 8): Noninverting Input of Amplifier. In the fixed
LTC6363-0.5/LTC6363-1/LTC6363-2 versions, this pin
connects to a precision,on-chip resistor RI.
(LFCSP)
–FB (Pin 1): Inverting Feedback Pin. The –FB pin is internally
shorted out to –OUT for feedback component connection
and simplified board layout.
+IN (Pin 2): Noninverting Input of Amplifier.
–IN (Pin 3): Inverting Input of Amplifier.
+FB (Pin 4): Noninverting Feedback Pin. The +FB pin is
internally shorted out to +OUT for feedback component
connection and simplified board layout.
V+ (Pins 5, 6, 7, 8): Positive Power Supply. Operational
supply range is 2.8V to 11V when V– = 0V.
VOCM (Pin 9): Output Common Mode Reference Voltage.
Voltage applied to this pin sets the output common mode
voltage level. If left floating, an internal resistor divider
creates a default voltage approximately halfway between
V+ and V–. The VOCM pin should be decoupled to ground
with a minimum of 0.1µF.
+OUT (Pin 10): Positive Output Pin. Output capable of
swinging rail-to-rail.
–OUT (Pin 11): Negative Output Pin. Output capable of
swinging rail-to-rail.
SHDN (Pin 12): When the SHDN pin is floating or driven
high, the LTC6363 family is in the normal (active) operating mode. When SHDN pin is connected to V– or driven
low, the part is disabled and draws approximately 20µA
of supply current (VS = 3V).
V– (Pins 13, 14, 15, 16): Negative Power Supply. Negative supply can be 0V, or taken negative as long as 2.8V
≤ (V+ – V–) ≤ 11V.
Exposed Pad (Pin 17): Connect the exposed pad to V– or
ground.
Rev. C
22
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LTC6363 Family
BLOCK DIAGRAMS
LTC6363 MSOP and DFN
8
7
+IN
6
V–
V+
5
V–
SHDN
–OUT
V+
V+
V–
V+
V+
V+
V–
V–
3.6M
+
3.6M
–
VOCM
V+
V–
V–
V–
V–
V–
V+
–IN
+
VOCM
1
+OUT
V
2
3
4
6363 BD01
LTC6363 LFCSP
16
1
2
15
–FB
V+
SHDN
V+
V–
+IN
3.6M
+
V–
3.6M
–
V+
VOCM
V–
–IN
–OUT
V+
V+
V+
4
13
V–
V+
V–
3
14
V–
+OUT
V+
V–
+FB V–
V+
V–
V+
V+
7
6
5
V+
12
11
10
VOCM
9
V–
8
6363 BD02
LTC6363-0.5/ LTC6363-1/ LTC6363-2
8
7
+IN
V–
RI
V
PART
RI (Ω)
RF (Ω)
1400
1050
700
700
1050
1400
–
V
5
V–
+
+
RF
–OUT
V–
V+
V–
V+
V+
V+
V–
LTC6363-0.5
LTC6363-1
LTC6363-2
V
6
SHDN
3.6M
+
3.6M
–
VOCM
V
+
V–
V–
RI
V–
1
–IN
RF
V–
V–
V–
V+
2
VOCM
3
V+
4
+OUT
6363 BD03
Rev. C
For more information www.analog.com
23
LTC6363 Family
APPLICATIONS INFORMATION
Functional Description
G=
The LTC6363 family consists of four fully differential, low
power, low noise, precision amplifiers. The LTC6363 is an
unconstrained, fully differential amplifier, typically used
with four external resistors. The LTC6363-0.5, LTC6363-1,
and LTC6363-2 (gains of 0.5, 1, and 2 respectively) are
fully-differential fixed gain blocks featuring precision, laser
trimmed, matched internal resistors for accurate, stable
gain and excellent CMRR. The entire LT6363 family is
optimized to convert a fully differential or single-ended
signal to a low impedance, balanced differential output
suitable for driving high performance, low power differential sigma-delta or SAR ADCs. The balanced differential
nature of the amplifier also provides even-order harmonic
distortion cancellation, and low susceptibility to common
mode noise (e.g. power supply noise).
The outputs of the LTC6363 family are capable of swinging rail-to-rail and can source up to 90mA or sink up to
40mA of current. The LTC6363 family is optimized for high
bandwidth and low power applications. Load capacitances
above 50pF to ground or 25pF differentially should be
decoupled with 10Ω to 50Ω of series resistance from
each output to prevent oscillation or ringing.
SHDN Pin
The LTC6363 family has a SHDN pin which, when tied to V– or
driven to below VIL, will shut down amplifier operation such
that only 20µA (at VS = 3V) to 70µA (at VS = 10V) is drawn
from the supplies. Pull-down circuitry should be capable of
sinking at least 12µA to guarantee complete shutdown over
all conditions. For normal amplifier operation, the SHDN pin
should be left floating or tied to V+ or driven to above VIH.
General Amplifier Applications
In Figure 1, the gain to VOUTDIFF from VINP and VINM is
given by:
⎛R ⎞
VOUTDIFF = V+OUT − V–OUT ≈ ⎜⎜ F ⎟⎟ • ( VINP – VINM )
⎜ R ⎟
⎝ I⎠
Note from the previous equation, the differential output
voltage (V+OUT – V–OUT) is independent of input and output
common mode voltages, or the voltage at the common
mode pin. This makes the LTC6363 family ideally suited
RI
VINP
VCM
+
–
V+IN
RF
V–OUT
V+
+
–
+
VOCM
VINM
RF
RI
VOCM
–
+
–
RI
V–IN
RF
V–
6363 F01
V+OUT
Figure 1. Definitions and Terminology
for pre-amplification, pre-attenuation, level shifting and
conversion of single-ended signals to differential output
signals for driving differential input ADCs or other devices.
Output Common Mode and VOCM Pin
The output common mode voltage is defined as the average of the two outputs:
⎛ V
+ V–OUT ⎟⎞
VOUTCM = ⎜⎜ +OUT
⎟ = VOCM
2
⎝
⎠
As the equation shows, the output common mode voltage
is independent of the input common mode voltage, and
is instead determined by the voltage on the VOCM pin, by
means of an internal common mode feedback loop.
The VOCM input connects to the base of a PNP transistor
and an internal resistor divider network. If the VOCM pin
is left open, the resistor divider creates a default voltage
approximately halfway between V+ and V–. The VOCM pin
can be overdriven to another voltage if desired for greater
accuracy or flexibility. For example, when driving an ADC,
if the ADC makes a reference available for setting the
common mode voltage, it can be directly tied to the VOCM
pin, as long as the ADC is capable of driving the 1.8M
input resistance presented by the VOCM pin. The Electrical
Characteristics table specifies the valid range that can be
applied to the VOCM pin (VOUTCMR).
Input Common Mode Voltage Range
For all versions of the LTC6363, the input common mode
voltage range, VICMR, specification refers to the voltage at
the input pins of the part. The input common mode voltage
range of the LTC6363-0.5, LTC6363-1 and LTC6363-2 are
extended beyond that of the LTC6363 due to the resistor
divider action of the on-chip resistors.
Rev. C
24
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LTC6363 Family
APPLICATIONS INFORMATION
For LTC6363-0.5, LTC6363-1 and LTC6363-2 applications
where the input is fully differential, the common mode voltage at the amplifier summing junction can be calculated
using the following equation:
⎛ G ⎞
⎛ 1 ⎞
VICM _ AMP = VICM • ⎜
⎟
⎟ + VOCM • ⎜
⎝ G+ 1⎠
⎝ G+ 1⎠
Where G is the gain, VICM_AMP is the common mode
voltage at the amplifier’s summing junction, VOCM is the
voltage applied to the VOCM pin and VICM is the common
mode voltage applied to the input pins of the LTC6363-0.5,
LTC6363-1 or LTC6363-2. This equation is more useful
when solved for VICM:
Table 1. Valid Input Common Mode Voltage Range for FixedGain Versions (Differential Inputs)
GAIN
SUPPLY (V)
VOCM (V)
VICM (V)
LTC6363-0.5
0.5
3
0.5
–1 to 4.4
LTC6363-0.5
0.5
3
1.5
–3 to 2.4
LTC6363-0.5
0.5
3
2.5
–5 to 0.4
LTC6363-0.5
0.5
5
0.5
–1 to 10.4
LTC6363-0.5
0.5
5
2.5
–5 to 6.4
LTC6363-0.5
0.5
5
4.5
–9 to 2.4
LTC6363-0.5
0.5
10
0.5
–1 to 25.4
LTC6363-0.5
0.5
10
5
–10 to 16.4
LTC6363-0.5
0.5
10
9.5
–19 to 7.4
LTC6363-1
1
3
0.5
–0.5 to 3.1
LTC6363-1
1
3
1.5
–1.5 to 2.1
LTC6363-1
1
3
2.5
–2.5 to 1.1
LTC6363-1
1
5
0.5
–0.5 to 7.1
LTC6363-1
1
5
2.5
–2.5 to 5.1
LTC6363-1
1
5
4.5
–4.5 to 3.1
LTC6363-1
1
10
0.5
–0.5 to 17.1
LTC6363-1
1
10
5
–5 to 12.6
LTC6363-1
1
10
9.5
–9.5 to 8.1
LTC6363-2
2
3
0.5
–0.25 to 2.45
LTC6363-2
2
3
1.5
–0.75 to 1.95
LTC6363-2
2
3
2.5
–1.25 to 1.45
LTC6363-2
2
5
0.5
–0.25 to 5.45
LTC6363-2
2
5
2.5
–1.25 to 4.45
LTC6363-2
2
5
4.5
–2.25 to 3.45
LTC6363-2
2
10
0.5
–0.25 to 12.95
LTC6363-2
2
10
5
–2.5 to 10.7
LTC6363-2
2
10
9.5
–4.75 to 8.45
PART VERSION
• (G+ 1) – VOCM
V
VICM = ICM _ AMP
G
The minimum and maximum valid input common mode
voltage can be computed using this equation by substituting for VICM_AMP the minimum and maximum VICMR
specification of the LTC6363: V– and V+ –1.2V respectively.
Table 1 lists various solutions to this equation.
The equation changes slightly if the LTC6363-0.5, LTC6363-1
or LTC6363-2 input is single ended since now the input
common mode voltage at the amplifiers’s summing junction
is also a function of the input signal VINP (where VINM = 0):
• (G+ 1) – VOCM VINP
V
VICM = ICM _ AMP
–
G
2
In summary, the common mode voltage at the input pins
of the LTC6363-0.5/LTC6363-1/LTC6363-2 (VICM) is valid
if it lies within the following range:
V − (G + 1) − VOCM
≤ VICM ≤
G
For Differential Inputs
V − (G + 1) − VOCM
(V + − 1.2)(G + 1) − VOCM
G
V
– INP ≤ VICM
2
G
+
(V − 1.2)(G + 1) − VOCM
V
– INP
G
2
For Single-Ended Inputs (VINM = 0)
≤
Input Pin Protection
The absolute maximum input current of the LTC6363
amplifier input pins is ±10mA, as specified in the Absolute
Maximum Ratings. The amplifier inside the LTC6363-0.5/
LTC6363-1/LTC6363-2 also has this same limitation but
cannot be directly observed. Absolute maximum input
voltage is specified for the LTC6363-0.5/LTC6363-1/
LTC6363-2 using the following equations:
V – – 10mA • RI –
V + + 10mA • RI +
(VOUT – V – + 0.3)
G
(V + + 0.3 – VOUT )
G
– 0.3 to
+ 0.3
Rev. C
For more information www.analog.com
25
LTC6363 Family
APPLICATIONS INFORMATION
The output voltage is a variable in these equations because
it affects how much current is flowing in RF. This current
also flows in RI and increases the voltage which can be
applied to the input without exceeding the 10mA limit on
the amplifier’s inputs. The absolute maximum input voltage
is specified conservatively, assuming the output voltage
is at V+ for the positive limit and V– for the negative limit.
This simplifies the equations:
RINM
RS
RI
RF
R1
VS
0.1µF
R1 CHOSEN SO THAT R1 || RINM = RS
R2 CHOSEN TO BALANCE R1 || RS
VOCM
RI
–
+
+
–
RF
6405 F04
⎛ 1⎞
V – – 10mA • RI – 0.3 • ⎜ 1+ ⎟ to
⎝ G⎠
R2 = RS || R1
Figure 2. Optimal Compensation for Signal Source Impedance
⎛ 1⎞
V + + 10mA • RI + 0.3 • ⎜ 1+ ⎟
⎝ G⎠
According to Figure 2, the input impedance looking into
the differential amp (RINM) reflects the single-ended source
case, given above. Also, R2 is chosen as:
Input Impedance and Loading Effects
The low frequency input impedance looking into the VINP
or VINM input of Figure 1 depends on how the inputs are
driven. For fully differential input sources (VINP = –VINM),
the input impedance seen at either input is simply:
RINP = RINM = RI
For single-ended inputs, due to the signal imbalance at the
input, the input impedance increases over the balanced
differential case. The input impedance looking into either
input is:
RINP =RINM =
1
1–
2
RI
R
F
•
R
+R
I F
R1=
RINM – R S
R1• R S
R1+ R S
Effects of Resistor Pair Mismatch
Figure 3 shows a circuit diagram which takes into consideration resistor mismatch. Often, resistor mismatch
limits CMRR well below amplifier specifications. Assuming infinite open-loop gain, the differential output
relationship is given by the equation:
VOUT(DIFF) = V+OUT – V–OUT
Input signal sources with non-zero impedances can also
cause feedback imbalance between the pair of feedback
networks. For the best performance, it is recommended
that the input source impedance be compensated. If impedance matching is required at the source, a termination
resistor R1 should be chosen (see Figure 2) such that:
RINM • R S
R2 = R1||R S =
R
Δβ
Δβ
≈ VINDIFF • F + VCM •
– VOCM •
RI
β AVG
β AVG
where RF is the average of RF1 and RF2, and RI is the
average of RI1 and RI2.
RI2
VINP
VCM
+
–
VVOCM
+
–
VINM
V+IN
–
+
VOCM
0.1µF
RI1
RF2
V–OUT
+
–
V–IN
RF1
6362 F03
V+OUT
Figure 3. Real-World Application with
Feedback Resistor Pair Mismatch
Rev. C
26
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LTC6363 Family
APPLICATIONS INFORMATION
βAVG is defined as the average feedback factor from the
outputs to their respective inputs:
β AVG =
1 ⎛⎜ RI1
RI2 ⎟⎞
•⎜
+
⎟
2 ⎜⎝ RI1 + R F1 RI2 + R F2 ⎟⎠
Noise
∆β is defined as the difference in the feedback factors:
Δβ =
RI2
RI2 + R F2
–
RI1
RI1 + R F1
Here, VCM and VINDIFF are defined as the average and
the difference of the two input voltages VINP and VINM,
respectively:
A low impedance ground plane should be used as a reference for both the input signal source and the VOCM pin.
The LTC6363’s differential input referred voltage and
current noise densities are 2.9nV/√Hz and 0.55pA/√Hz,
respectively. In addition to the noise generated by the
amplifier, the surrounding feedback resistors also contribute noise. A simplified noise model is shown in Figure 4.
The output noise generated by both the amplifier and the
feedback components is given by the equation:
V +V
VCM = INP INM
2
e no =
VINDIFF = VINP – VINM
When the feedback ratios mismatch (Δβ), common mode
to differential conversion occurs. Setting the differential
input to zero (VINDIFF = 0), the degree of common mode
to differential conversion is given by the equation:
VOUTDIFF ≈ (VCM – VOCM) • ∆β/βAVG
In general, the degree of feedback pair mismatch is a source
of common mode to differential conversion of both signals
and noise. For instance, Table 2 shows the worst-case,
resistor limited CMRR of the LTC6363 amplifier configured
in a gain of 1 using external resistors.
⎡
⎞⎤2
⎛
⎢ e • ⎜ 1+ R F ⎟ ⎥ + 2 • i • R 2
( n F)
⎢ ni ⎜⎜
⎟⎥
RI ⎟⎠ ⎥⎦
⎢⎣
⎝
2
⎡
R F ⎤⎥
2
⎢
+ 2 • ⎢ e nRI • ⎥ + 2 • e nRF
RI ⎥⎦
⎢⎣
For example, if RF = RI = 1k, the output noise of the circuit
eno = 10nV/√Hz.
If the circuits surrounding the amplifier are well balanced,
common mode noise (envocm) does not appear in the differential output noise equation given above.
The LTC6363’s input referred voltage noise contributes the
equivalent noise of a 510Ω resistor. When the feedback
network is comprised of resistors whose values are larger
than this, the output noise is resistor noise and amplifier
current noise dominant. For feedback networks consisting
Table 2.
Tolerance
CMRR
5%
20dB
1%
34dB
0.1%
54dB
0.01%
74dB
LT5400
86dB
0.001%
94dB
enRI2
RI
RF
enRF2
in+2
+
The LTC6363-0.5/LTC6363-1/LTC6363-2 versions exhibit
superior DC CMRR due to precise on-chip resistors to
realize their intended gains. For example, the LTC6363-1
exhibits a DC CMRR of 100dB, which is equivalent to using
resistors of 0.0005% tolerance and eliminates the additional cost and area associated with discrete components.
in–2
enRI2
–
eni2
RI
eno2
RF
enRF2
6363 F04
Figure 4. Simplified Noise Model
Rev. C
For more information www.analog.com
27
LTC6363 Family
APPLICATIONS INFORMATION
of resistors with values smaller than 510Ω, the output
noise is voltage noise dominant.
larger. This further linearizes the amplifier and improves
distortion at those frequencies.
Lower resistor values always result in lower noise at the
penalty of increased distortion due to increased loading of
the feedback network on the output. Higher resistor values
will result in higher output noise, but typically improved
distortion due to less loading on the output.
Feedback Capacitors
Keep in mind that in the Electrical Characteristics table the
voltage noise specification for the LTC6363-0.5/LTC63631/LTC6363-2 includes the contributions of the on chip RF
and RI resistances. These resistance values were chosen
to optimize noise and distortion performance while interfacing with SAR ADCs.
GBW vs f–3dB
Gain-bandwidth product (GBW) and –3dB frequency
(f–3dB) have been specified in the Electrical Characteristics
table as two different metrics for the speed of the LTC6363
family. GBW is obtained by measuring the open-loop gain of
the amplifier at a specific frequency (fTEST), then calculating
gain • fTEST. GBW is a parameter that depends only on the
internal design and compensation of the amplifier and is a
suitable metric to specify the inherent speed capability of
the internal amplifier. For this reason, GBW is specified in
the Electrical Characteristics table only for the LTC6363.
Of more practical interest, f–3dB is the frequency at which
the closed-loop gain is 3dB lower than its low frequency
value. The value of f–3dB depends on the speed of the
internal amplifier as well as the feedback factor. Thus the
f–3dB frequency has been specified in the Electrical Characteristics table for the LTC6363 as well as LTC6363-0.5/
LTC6363-1/LTC6363-2 versions.
In most amplifiers, the open-loop gain response exhibits
a conventional single-pole roll-off for most of the frequencies before the unity-gain crossover frequency, and the
GBW and unity-gain frequency are close to each other.
However, the LTC6363 family is intentionally compensated
in such a way that its GBW is significantly larger than its
f–3dB in a closed loop gain of 1. This means that at lower
frequencies where the amplifier inputs generally operate,
the amplifier’s gain and thus the feedback loop gain is
When the combination of parasitic capacitances (device +
PCB) at the LTC6363’s inputs form a pole whose frequency
lies within the closed-loop bandwidth of the amplifier, a
capacitor (CF) can be added in parallel with the external
feedback resistors (RF) to cancel the degradation on stability. CF will typically be at least equal to CIN,CM. CF should
be chosen such that it generates a zero at a frequency
close to the frequency of the pole. The LTC6363-0.5/
LTC6363-1/LTC6363-2 versions are internally stable so
no CF is needed.
Board Layout and Bypass Capacitors
For single supply applications, it is recommended that high
quality 0.1µF ceramic bypass capacitors be placed directly
between the V+ and the V– pin with short connections. The
V– pin should be tied directly to a low impedance ground
plane with minimal routing. For dual (split) power supplies, it is recommended that additional high quality 0.1µF
ceramic capacitors be used to bypass V+ to ground and
V– to ground, again with minimal routing. Small geometry
(e.g., 0603) surface mount ceramic capacitors have a much
higher self-resonant frequency than leaded capacitors, and
perform best with the LTC6363 family.
To prevent degradation in stability response, it is highly
recommended that any stray capacitance at the LTC6363’s
input pins, +IN and –IN, be kept to an absolute minimum
by keeping printed circuit connections as short as possible.
At the inputs of the LTC6363-0.5/LTC6363-1/LTC6363-2
versions, any source impedance effectively sums with
the RI. Any parasitic resistance should be minimized and
balanced to preserve gain accuracy and common mode
rejection performance.
At the output, always keep in mind the differential nature
of the LTC6363 family, because it is critical that the load
impedances seen by both outputs and feedback pins
(stray or intended), be as balanced and symmetric as
possible. This will help preserve the balanced operation
of the LTC6363 family that minimizes the generation of
Rev. C
28
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LTC6363 Family
APPLICATIONS INFORMATION
even-order harmonics and maximizes the rejection of
common mode signals and noise.
In this example, the maximum ambient temperature that
the part is allowed to operate is:
The VOCM pin should be bypassed to the ground plane with
a high quality 0.1µF ceramic capacitor. This will prevent
common mode signals and noise on this pin from being
inadvertently converted to differential signals and noise
by impedance mismatches both externally and internally
to the IC.
TA = TJ – (PD(MAX) • 273°C/W)
Power Dissipation
Interfacing to ADCs
Due to the wide supply voltage range, it is possible for
the LTC6363 family to exceed the maximum junction
temperature under certain conditions. Maximum junction
temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) as follows: TJ= TA+
(PD • θJA). The power dissipation in the IC is a function of
the supply voltage, output voltage and the load, input and
feedback resistances. For a given supply voltage, the worstcase power dissipation, PD(MAX), occurs at the maximum
quiescent supply current and at an output voltage which is
half of either supply voltage (or the maximum swing if it
is less than half the supply voltage). In this condition, the
LTC6363 will supply current to the load resistors and the
input and feedback resistors, RI and RF. PD(MAX)is given by:
When driving an ADC, an additional passive filter should be
used between the outputs of the LTC6363 family and the
inputs of the ADC. Depending on the application, a singlepole RC filter will often be sufficient. The sampling process
of ADCs creates a charge transient due to the switching in
of the ADC sampling capacitor. This momentarily creates
high frequency current pulses at the output of the amplifier
as charge is transferred between amplifier and sampling
capacitor. The amplifier must recover and settle from this
load transient before the acquisition period has ended for
a valid representation of the input signal. The RC network
between the outputs of the driver and the inputs of the
ADC decouples this sampling transient (see Figure 5).
The capacitance serves to provide the bulk of the charge
during the sampling process, and the two resistors at the
outputs of the LTC6363 family are used to dampen and
attenuate any charge injected by the ADC. Additionally, the
RC filter band limits broadband output noise.
(
)(
PD(MAX) = V + − V – IS(MAX)
)
⎛ V + ⎞2
⎜⎜ ⎟⎟
⎝ 2 ⎠
+2 •
RL
⎛ V + ⎛ R ⎞⎞2
⎜⎜ ⎜1+ I ⎟⎟⎟
⎝ 2 ⎝ RF ⎠⎠
+2 •
RI +RF
Example: An LTC6363HMS8 in the 8-Lead MSOP package
has a thermal resistance of θJA = 273°C/W. Operating on
±5V supplies, with RI = RF = 500Ω, and driving a 500Ω
load to ground at each output, the worst-case power dissipation is given by:
PD(MAX) = (10V ) ( 2.2mA )
= 97mW
( 2.5V )
+2•
2
500Ω
+2•
( 5V )
2
1000Ω
TA = 150°C – (97mW)(273°C/W) = 123.5°C
To operate the device at a higher ambient temperature
for the same conditions, use the LTC6363 in the 8-Lead
DFN package.
The selection of an appropriate filter depends on the specific ADC, and the following procedure is suggested for
choosing filter component values. Begin by selecting an
appropriate RC time constant for the input signal. Generally, longer time constants improve SNR at the expense of
settling time. Output transient settling to 20-bit accuracy
will require nearly 14 RC time constants to completely
settle. To select the resistor value, remember the resistors
in the decoupling network should be at least 10Ω. Keep
in mind that these resistors also serve to decouple the
LTC6363 family outputs from load capacitance. Too large
of a resistor will leave insufficient settling time. Too small
of a resistor will not properly dampen the load transient
of the sampling process, prolonging the time required for
Rev. C
For more information www.analog.com
29
LTC6363 Family
APPLICATIONS INFORMATION
0.1µF
–1V
VIN
8
7
+IN
6
SHDN
1050Ω
V–
1050Ω
–OUT
V+
V+
CDIFF
3.3nF
LTC6363-1
VOCM
–
3.6M
V– 1050Ω
–IN
2
2.5V
RFILT
30.1Ω
V– 1050Ω
VOCM
6V
0.1µF
CCM
3.3nF
RFILT
30.1Ω
+
3.6M
1
5
+
3
V
4
CCM
3.3nF
AIN+
AIN–
5V
2.5V
VREF
VDD
20-BIT
LTC2378-20
SAR ADC
1Msps
GND
6363 F05
+OUT
0.1µF
Figure 5. Recommended Interface Solution for Driving the LTC2378-20 SAR ADC
settling. For lowest distortion, choose capacitors with low
dielectric absorption (such as a C0G multilayer ceramic
capacitor). In general, large capacitor values attenuate
the fixed nonlinear charge kickback; however very large
capacitor values will detrimentally load the driver at the
desired input frequency and cause driver distortion. Smaller
input swings will allow for larger filter capacitor values
due to decreased loading demands on the driver. This
property may be limited by the particular input amplitude
dependence of differential nonlinear charge kickback for
the specific ADC.
In some applications, placing series resistors at the inputs
of the ADC may further improve distortion performance.
These series resistors function with the ADC sampling
capacitor to filter potential ground bounce or other high
speed sampling disturbances. Additionally, the resistors
limit the rise time of residual filter glitches that manage to
propagate to the driver outputs. Restricting possible glitch
propagation rise time to within the small signal bandwidth
of the driver enables less disturbed output settling.
For the specific application of LTC6363 driving the
LTC2378-20 SAR ADC, the recommended component
values of the RC filter are provided in Figure 5. These
component values are chosen for optimal distortion and
noise performance.
Rev. C
30
For more information www.analog.com
LTC6363 Family
TEST CIRCUITS
Noise gain = GN = 1+
RI
RF
RI
, closed loop gain = G =
RF
RI
RF
LTC6363
VOS
+
–
+
VOUT
–
–
VOS
+
–
RI
+
VOCM
+
+
VOUT
–
VOCM
–
RI
6363 TC01
RI
LTC6363
RF
RF
RF
6363 TC02
V
VOS = OUT
GN
V
VOS = OUT
GN
Figure 6. Specified LTC6363 VOS Is Referred to
the Summing Junction
Figure 7. Specified LTC6363-0.5, LTC6363-1 and LTC6363-2
VOS Is Referred to the Summing Junction
RI
RF
+
–
LTC6363
∆VOS
+
+
–
+
∆VICM
–
∆VOS
+
∆VOUT
–
VOCM
+
–
∆VCM
–
RF
LTC6363
+
+
∆VOUT
–
VOCM
+
∆VICM
–
–
6363 TC03
RI
RI
RI
RF
RF
6363 TC04
∆V
ICM
CMRRI= 20log
∆VOUT / GN
∆V
ICM
CMRRI= 20log
∆VOUT / G
Figure 8. Specified LTC6363 CMRRI Is Referred to
the Summing Junction
Figure 9. Specified LTC6363-0.5, LTC6363-1 and LTC6363-2
CMRRI Is Referred to the Input Pins of the Part
RI
RF
∆VOS
+
–
+
–
∆VOCM
–
RF
LTC6363
+
+
∆VOUT
–
VOCM
+
+
–
LTC6363
∆VOS
RI
+
∆VOUT
–
VOCM
+
–
∆VOCM
–
6363 TC05
RI
RI
RF
RF
6363 TC06
∆V
OCM
CMRRIO= 20log
∆VOUT / G
∆V
OCM
CMRRIO= 20log
∆VOUT / GN
Figure 10. Specified LTC6363 CMRRIO Is Referred
to the Summing Junction
Figure 11. Specified LTC6363-0.5, LTC6363-1 and LTC6363-2
CMRRIO Is Referred to the Input Pins of the Part
Rev. C
For more information www.analog.com
31
LTC6363 Family
TEST CIRCUITS
Noise gain = GN = 1+
RF
RI
, closed loop gain = G =
RF
RI
+
∆VS
–
RI
+
∆VS
–
RF
LTC6363
RF
LTC6363
∆VOS
∆VOS
RI
+
+
–
+
–
+
∆VOUT
–
VOCM
–
+
∆VOUT
–
VOCM
–
RI
6363 TC07
RI
+
RF
RF
6363 TC08
+
∆VS
–
+
∆VS
–
2 • ∆V
S
PSRR = 20log
∆VOUT / GN
2 • ∆V
S
PSRR = 20log
∆VOUT / GN
Figure 12. Specified LTC6363 PSRR Is Referred to
the Summing Junction
Figure 13. Specified LTC6363-0.5, LTC6363-1 and
LTC6363-2 PSRR Is Referred to the Summing Junction
+
∆VS
–
RI
+
∆VS
–
RF
LTC6363
RF
LTC6363
∆VOSCM
RI
+
∆VOSCM
+
VOCM
+
–
+
–
VOCM
–
RI
–
6363 TC09
RI
RF
RF
6363 TC10
+
∆VS
–
+
∆VS
–
2 • ∆V
S
PSRRCM= 20log
∆VOSCM
2 • ∆V
S
PSRRCM= 20log
∆VOSCM
Figure 14. Specified LTC6363 PSRRCM Is Defined as the
Ratio of the Change in Supply Voltage to the Change in
Common Mode Offset Voltage
Figure 15. Specified LTC6363-0.5, LTC6363-1 and LTC6363-2
PSRRCM Is Defined as the Ratio of the Change in Supply Voltage
to the Change in Common Mode Offset Voltage
Rev. C
32
For more information www.analog.com
LTC6363 Family
TEST CIRCUITS
Noise gain = GN = 1+
RI
RF
RI
, closed loop gain = G =
RF
RI
RF
RF
LTC6363
en
+
–
+
en
+
–
+
VOUT
–
VOCM
–
RI
+
–
6363 TC15
RF
RF
en =
+
VOUT
–
VOCM
RI
RI
LTC6363
6363 TC16
VOUT,rms
GN
en =
Figure 16. Specified LTC6363 en Is Referred to the
Summing Junction
VOUT,rms
G
Figure 17. Specified LTC6363-0.5, LTC6363-1 and LTC6363-2
en Is Referred to the Input Pins of the Part
Rev. C
For more information www.analog.com
33
LTC6363 Family
TYPICAL APPLICATIONS
Single-Ended-to-Differential Conversion of a 5VP-P, 2.5V Referenced Input with Gain of AV = 2 to Drive an ADC
5V
5V
VIN
0.1µF
0V
0V
–1V
8
VIN
V–OUT
7
+IN
6
SHDN
700Ω
5
V–
1400Ω
3.3nF
V+
V+
30.1Ω
+
3.6M
AIN+
LTC6363-2
VOCM
V–
2
2.5V
VOCM
3
6V
0.1µF
2.5V
AIN–
30.1Ω
3.3nF
V– 1400Ω
700Ω
–IN
3.3nF
–
3.6M
1
–OUT
5V
2.5V
VREF
VDD
20-BIT
LTC2378-20
SAR ADC
1Msps
GND
6363 TA02
V+
4
+OUT
MEASURED PERFORMANCE:
INPUT: fIN = 2kHz, –1dBFS
SNR: 101.3dB
THD: –113dB
5V
0.1µF
V+OUT
0V
Differentially Driving an ADC with ∆VIN = 10VP-P and Gain of AV = 1
5V
5V
VINP
0.1µF
0V
0V
–1V
8
VINP
7
+IN
6
SHDN
1050Ω
V–
1050Ω
3.3nF
30.1Ω
V– 1050Ω
5V
–IN
2
2.5V
3.3nF
–
3.6M
VINM
AIN+
LTC6363-1
VOCM
1
–OUT
+
3.6M
0V
5
V+
V+
VINM
V–OUT
AIN–
30.1Ω
3.3nF
V– 1050Ω
VOCM
6V
0.1µF
V
2.5V
VREF
VDD
20-BIT
LTC2378-20
SAR ADC
1Msps
GND
6363 TA03
+
3
5V
4
+OUT
5V
0.1µF
V+OUT
MEASURED PERFORMANCE:
INPUT: fIN = 2kHz, –1dBFS
SNR: 102dB
THD: –115dB
0V
Rev. C
34
For more information www.analog.com
LTC6363 Family
TYPICAL APPLICATIONS
Differentially Driving a Pipeline ADC with AV = 1
100Ω
VCM = 0.9V
V+OUT
0.4V
3.3V
1k
VOCM
SHDN
0.1µF
INPUT BW = 1.2MHz
FULL SCALE = 2VP-P
LTC6363
1.8V
1.5nF
5Ω
30.1Ω
– +
1.5nF
30.1Ω
+ –
1k
1V
0.1µF
1.4V
1k
5Ω
1.5nF
AIN+
AIN–
VDD
VCM
16 BIT
LTC2160
PIPELINE ADC
25Msps
GND
6363 TA04
1k
1.4V
VIN
V–OUT
–1V
0.4V
MEASURED PERFORMANCE FOR LTC6363 DRIVING LTC2160:
INPUT: fIN = 2kHz, –1dBFS
SNR: 77dB
HD2: –100.0dBc
HD3: –100.2dBc
THD: –96.5dB
Differential Line Driver Connected in Gain of AV = 2
1V
VIN
0.1µF
–1V
VIN
–5V
8
7
+IN
6
SHDN
700Ω
1V
V–
1400Ω
–OUT
3.6M
+
–1V
3.6M
–
49.9Ω
LTC6363-2
VOCM
V–
V–OUT
V+
V+
1
5
2
2.5V
6363 TA05
V– 1400Ω
700Ω
–IN
100Ω
49.9Ω
VOCM
5V
0.1µF
3
V+
0.1µF
4
+OUT
1V
V+OUT
–1V
Rev. C
For more information www.analog.com
35
LTC6363 Family
TYPICAL APPLICATIONS
LTC6363 Used as Lowpass Filter/Driver with 10VP-P Single-Ended Input, Driving a SAR ADC
3.3nF
*3-POLE LOWPASS FILTER
f–3dB = 40kHz, CIN = 3.3nF
f–3dB = 60kHz, CIN REMOVED
3.3nF
49.9Ω
5V
6V
VIN
VCM
1.4k
0.1µF
5V
–5V
VIN
536Ω
324Ω
3.3nF
536Ω
+ –
*CIN
3.3nF
5V
2.5V
VREF
VDD
3.3nF
30.1Ω
– +
LTC6363
2.5V
0.1µF
VCM
0V
AIN+
3.3nF
30.1Ω
AIN–
0.1µF
18 BIT
LTC2378-18
SAR ADC
3.3nF
1Msps
GND
6363 TA06
536Ω
324Ω
536Ω
–1V
1.4k
3.3nF
3.3nF
3.3nF
5V
MEASURED PERFORMANCE:
INPUT: fIN = 2kHz, –1dBFS, f–3dB = 40kHz
SNR: 100.5dB
THD: –111.2dB
0V
49.9Ω
Differential AV = 1/9 Configuration Using an LT®5400 Quad-Matched Resistor Network
72V
–72V
VIN
1
2
3
4
LT5400-8 9k
1k
1k
9k
15pF
8
VOCM
7
6
5
0.1µF
SHDN
10V
9V
– +
V+OUT
LTC6363
+ –
V–OUT
15pF
1V
9V
1V
6363 TA07
Rev. C
36
For more information www.analog.com
LTC6363 Family
TYPICAL APPLICATIONS
LTC6363 Low Power, Low Noise, I and Q Signal Amplifier/Filter and LTC5599 Modulator
1k
220pF
49.9Ω
2.8V
0.1µF
249Ω
I CHANNEL
DIFFERENTIAL INPUT
VIN,CM = 1.4V
220pF
499Ω
249Ω
VOCM
LTC6363
49.9Ω
220pF
499Ω
249Ω
220pF
1.4V
1.4V
1.4V
1.4V
1k
220pF
Q CHANNEL
DIFFERENTIAL INPUT
VIN,CM = 1.4V
220pF
VOCM
220pF
249Ω
499Ω
249Ω
CSB
BBPQ
BBMQ
GNDRF
MODULATOR
OUTPUT
49.9Ω
– +
GND
SPI
FROM
MCU
2.2nF
LTC6363
220pF
SCLK
BBMI
1.5nF
49.9Ω
+ –
0.1µF
SDI
LTC5599
RF
0.1µF
249Ω
LOL
SDO
BBPI
49.9Ω
2.8V
499Ω
LOC
TEMP
220pF
220pF
39nH
TTCK
49.9Ω
1k
249Ω
15pF
1nF
2.2nF
VCC VCTRL EN
220pF
249Ω
2.2nF
+ –
0.1µF
2.8V
49.9Ω
– +
450MHz
LO INPUT
0dB
SPI BUS
220pF
220pF
2.2nF
49.9Ω
1k
220pF
6363 TA09
Rev. C
For more information www.analog.com
37
LTC6363 Family
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev G)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ±.0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS8) 0213 REV G
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Rev. C
38
For more information www.analog.com
LTC6363 Family
PACKAGE DESCRIPTION
DCB Package
8-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
0.70 ±0.05
1.35 ±0.05
3.50 ±0.05
1.65 ±0.05
2.10 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.45 BSC
1.35 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
R = 0.05
5
TYP
2.00 ±0.10
(2 SIDES)
0.40 ±0.10
8
1.35 ±0.10
1.65 ±0.10
3.00 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR 0.25
× 45° CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DCB8) DFN 0106 REV A
4
0.200 REF
1
0.23 ±0.05
0.45 BSC
0.75 ±0.05
1.35 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
Rev. C
For more information www.analog.com
39
LTC6363 Family
PACKAGE DESCRIPTION
RD Package
16-Lead Plastic LFCSP (3mm × 3mm)
(Reference LTC DWG # 05-08-1648 Rev B)
BOTTOM VIEW—EXPOSED PAD
3.00 ±0.05
(4 SIDES)
R = 0.115
TYP
0.75 ±0.05
PIN 1 R = 0.10 TYP
15
0.45 REF
PIN 1
TOP MARK
(NOTE 6)
16
0.40 ±0.10
1
2
1.30 ± 0.10
(4-SIDES)
(RD16) LFCSP 1218 REV B
0.23 ±0.05
0.10 REF
0.00 – 0.05
0.50 BSC
NOTE:
1. DRAWING NOT TO SCALE
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. EXPOSED PAD SHALL BE SOLDER PLATED
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.70 ±0.05
3.50 ±0.05
1.30 ±0.05
2.10 ±0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
Rev. C
40
For more information www.analog.com
LTC6363 Family
REVISION HISTORY
REV
DATE
DESCRIPTION
A
11/16
Common Mode Noise Voltage Density updated from 14nv√Hz to 20nv√Hz.
Erroneous notes removed from Supply Current vs Supply Voltage graph.
SHDN pin description updated.
PAGE NUMBER
3
6
10, 11
Web links updated.
All
Revision History added.
21
B
01/18
Family of parts added.
All
C
02/19
Added LFCSP Package
All
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
moreby
information
www.analog.com
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
41
LTC6363 Family
TYPICAL APPLICATION
Single-Ended-to-Differential Conversion of a 20VP-P Ground-Referenced Input with Gain of AV = 0.5 to Drive an ADC
10V
5V
VIN
0.1µF
–10V
VIN
V–OUT
0V
–1V
8
7
+IN
6
SHDN
1400Ω
V–
700Ω
5
3.3nF
V+
V+
30.1Ω
+
3.6M
VOCM
LTC6363-0.5
–IN
2
2.5V
30.1Ω
V–
VOCM
6V
0.1µF
700Ω
V
AIN–
3.3nF
5V
2.5V
VREF
VDD
20-BIT
LTC2378-20
SAR ADC
1Msps
GND
6363 TA08
+
3
AIN+
3.3nF
–
3.6M
V– 1400Ω
1
–OUT
4
+OUT
MEASURED PERFORMANCE:
INPUT: fIN = 2kHz, –1dBFS
SNR: 102.3dB
THD: –114.1dB
5V
0.1µF
V+OUT
0V
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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13mA, –94dBc Distortion at 1MHz, 2VP-P Output
AD8475
Precision, Selectable Gain Funnel Amplifier
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AD8476
Low Power, Unity Gain ADC Driver/Amplifier
330µA, –126dBc Distortion at 10kHz, 1ppm/°C Gain Drift
LT6350
Low Noise, Single-Ended to Differential Converter/
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4.8mA, –97dBc Distortion at 100kHz, 4VP-P Output
LTC6246/LTC6247/
LTC6248
Single/Dual/Quad 180MHz Rail-to-Rail Low Power Op 1mA/Amplifier, 4.2nV/√Hz
Amps
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LT5400
Precision Quad Matched Resistor Networks
Ratios = 1:1, 1:4, 1:5, 1:9, 1:10
ADCs
LTC2378-20
20-Bit, 1Msps, Low Power SAR ADC with 0.5ppm INL 2.5V Supply, Differential Input, 104dB SNR, ±5V Input Range, DGC,
Pin Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages
LTC2379-18/LTC2378-18 18-Bit, 1.6Msps/1Msps/500ksps/250ksps Serial,
LTC2377-18/LTC2376-18 Low Power ADC
2.5V Supply, Differential Input, 101.2dB SNR, ±5V Input Range, DGC,
Pin Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages
AD4020
1.8V Supply, Differential Input, 100.5dB SNR, ±5V Input Range,
3mm × 3mm LFCSP and MSOP-10 Packages
20-Bit, 1.8Msps, Low Power, Precision SAR ADC
AD4003/AD4007/AD4011 18-Bit, 2Msps/1Msps/500ksps Precision,
Differential SAR ADCs
1.8V Supply, Differential Input, 100.5dB SNR, ±5V Input Range,
3mm × 3mm LFCSP and MSOP-10 Packages
AD7691
18-Bit, 1.5LSB INL, 250ksps PulSAR Differential ADC
2.3V to 5V Supply, Differential Input, 101.5dB SNR, ±5V Input Range,
3mm × 3mm LFCSP and MSOP-10 Packages
AD7984
18-Bit, 1.33Msps PulSAR 10.5mW ADC in
MSOP/LFCSP
2.5V Supply, Differential Input, 98.5dB SNR, ±5V Input Range,
3mm × 3mm LFCSP and MSOP-10 Packages
Rev. C
42
02/19
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