LTC6430-20
High Linearity Differential
RF/IF Amplifier/ADC Driver
DESCRIPTION
FEATURES
51.0dBm OIP3 at 240MHz into a 100Ω Diff Load
n NF = 2.9dB at 240MHz
n 20MHz to 2060MHz –3dB Bandwidth
n 20.8dB Gain
n A-Grade 100% OIP3 Tested at 380MHz
n 0.6nV/√Hz Total Input Noise
n S11 < –10dB Up to 1.4GHz
n S22 < –10dB Up to 1.4GHz
n >2.75V
P-P Linear Output Swing
n P1dB = 24.0dBm
n Insensitive to V
CC Variation
n 100Ω Differential Gain-Block Operation
n Input/Output Internally Matched to 100Ω Diff
n Single 5V Supply
n DC Power = 850mW
n 4mm × 4mm, 24-Lead QFN Package
n
The LTC®6430-20 is a differential gain block amplifier
designed to drive high resolution, high speed ADCs with
excellent linearity beyond 1000MHz and with low associated output noise. The LTC6430-20 operates from a single
5V power supply and consumes only 850mW.
In its differential configuration, the LTC6430-20 can directly
drive the differential inputs of an ADC. Using 1:2 baluns,
the device makes an excellent 50Ω wideband balanced
amplifier. While using 1:1.33 baluns, the device creates
a high fidelity 40MHz to 1000MHz 75Ω CATV amplifier.
The LTC6430-20 is designed for ease of use, requiring a
minimum of support components. The device is internally
matched to 100Ω differential source/load impedance. Onchip bias and temperature compensation ensure consistent
performance over environmental changes.
The LTC6430-20 uses a high performance SiGe BiCMOS
process for excellent repeatability compared with similar
GaAs amplifiers. All A-grade LTC6430-20 devices are tested
and guaranteed for OIP3 at 380MHz. The LTC6430-20 is
housed in a 4mm × 4mm, 24-lead, QFN package with an
exposed pad for thermal management and low inductance.
A single-ended 50Ω IF gain block with similar performance
is also available, see the related LTC6431-20.
APPLICATIONS
Differential ADC Driver
Differential IF Amplifier
n OFDM Signal Chain Amplifier
n 50Ω Balanced IF Amplifier
n 75Ω CATV Amplifier
n 700MHz to 800MHz LTE Amplifier
n Low Phase Noise Clock or LO Amplifier
n
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
OIP3 vs Frequency
55
Differential 16-Bit ADC Driver
5V
VCM
1:2
BALUN
OIP3 (dBm)
RF
CHOKES
VCC = 5V
ADC
LTC6430-20
50Ω
RSOURCE = 100Ω
DIFFERENTIAL
RLOAD = 100Ω
DIFFERENTIAL
50
FILTER
643020 TA01a
45
40
V = 5V
35 PCC = 3dBm/TONE
OUT
ZIN = ZOUT = 100Ω DIFF.
TA = 25°C
30
200
400
600
0
FREQUENCY (MHz)
800
1000
643020 TA01b
643020f
For more information www.linear.com/LTC6430-20
1
LTC6430-20
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Total Supply Voltage (VCC to GND)...........................5.5V
Amplifier Output Current (+OUT)..........................120mA
Amplifier Output Current (–OUT)..........................120mA
RF Input Power, Continuous, 50Ω (Note 2)........ +15dBm
RF Input Power, 100µs Pulse, 50Ω (Note 2).......+20dBm
Operating Temperature Range (TCASE) ....–40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Junction Temperature (TJ)..................................... 150°C
DNC
DNC
DNC
VCC
GND
+IN
TOP VIEW
24 23 22 21 20 19
DNC 1
18 +OUT
DNC 2
17 GND
DNC 3
16 T_DIODE
25
GND
DNC 4
15 DNC
13 –OUT
DNC
DNC
9 10 11 12
VCC
8
DNC
7
–IN
14 GND
DNC 6
GND
DNC 5
UF PACKAGE
24-LEAD (4mm × 4mm) PLASTIC QFN
TJMAX = 150°C, θJC = 40°C/W*
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
*Measured from Junction to the back of a PCB with natural convection.
ORDER INFORMATION
The LTC6430-20 is available in two grades. The A-grade guarantees a minimum OIP3 at 380MHz while the B-grade does not.
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC6430AIUF-20#PBF
LTC6430AIUF-20#TRPBF
43020
24-Lead (4mm × 4mm) Plastic QFN
–40°C to 85°C
LTC6430BIUF-20#PBF
LTC6430BIUF-20#TRPBF
43020
24-Lead (4mm × 4mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
DC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω. Typical measured DC electrical
performance using Test Circuit A (Note 3).
SYMBOL PARAMETER
VS
Operating Supply Range
IS,TOT
Total Supply Current
IS,OUT
ICC
Total Supply Current to OUT Pins
Current to VCC Pin
CONDITIONS
MIN
TYP
MAX
UNITS
4.75
5.0
5.25
V
117
113
170
l
213
220
mA
mA
102.9
99
152
l
199
206
mA
mA
14.1
14.0
18
l
22.5
22.5
mA
mA
All VCC Pins Plus +OUT and –OUT
Current to +OUT and –OUT
Either VCC Pin May Be Used
643020f
2
For more information www.linear.com/LTC6430-20
LTC6430-20
AC
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω, unless otherwise noted (Note 3).
Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Small Signal
BW
–3dB Bandwidth
De-Embedded to Package (Low Frequency Cut-Off,
20MHz)
2060
MHz
S11
Differential Input Match
De-Embedded to Package, 25MHz to 2200MHz
–10
dB
S21
Forward Differential Power Gain
De-Embedded to Package, 100MHz to 400MHz
20.8
dB
S12
Reverse Differential Isolation
De-Embedded to Package, 25MHz to 4000MHz
–23
dB
S22
Differential Output Match
De-Embedded to Package, 25MHz to 1400MHz
–10
dB
Frequency = 50MHz
S21
Differential Power Gain
De-Embedded to Package
21.1
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
47.9
45.9
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–91.8
–87.8
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–82.6
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–93.1
dBc
P1dB
Output 1dB Compression Point
23.0
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
2.9
dB
Frequency = 140MHz
S21
Differential Power Gain
De-Embedded to Package
20.9
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
48.0
46.0
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–92.0
–88.0
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–82.1
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–94.9
dBc
P1dB
Output 1dB Compression Point
23.3
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
2.9
dB
Frequency = 240MHz
S21
Differential Power Gain
De-Embedded to Package
20.8
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 8MHz, ZO = 100Ω A-Grade
B-Grade
51.0
47.0
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 8MHz, ZO = 100Ω A-Grade
B-Grade
–98.0
–90.0
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–79.8
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–80.9
dBc
P1dB
Output 1dB Compression Point
23.9
dBm
NF
Noise Figure
2.9
dB
De-Embedded to Package for Balun Input Loss
643020f
For more information www.linear.com/LTC6430-20
3
LTC6430-20
AC
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω, unless otherwise noted (Note 3).
Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Frequency = 300MHz
S21
Differential Power Gain
De-Embedded to Package
20.8
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
50.1
47.1
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–96.2
–90.2
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–75.5
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–77.2
dBc
P1dB
Output 1dB Compression Point
24.7
dBm
NF
Noise Figure
3.0
dB
De-Embedded to Package for Balun Input Loss
Frequency = 380MHz
19.6
20.8
POUT = 3dBm/Tone, Δf = 8MHz, ZO = 100Ω A-Grade
B-Grade
44.8
48.3
46.3
dBm
dBm
Third-Order Intermodulation
POUT = 3dBm/Tone, Δf = 8MHz, ZO = 100Ω A-Grade
B-Grade
–83.6
–90.6
–86.6
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–70.3
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–74.3
dBc
P1dB
Output 1dB Compression Point
24.7
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
3.05
dB
S21
Differential Power Gain
De-Embedded to Package
OIP3
Output Third-Order Intercept Point
IM3
l
22.1
dB
Frequency = 500MHz
S21
Differential Power Gain
De-Embedded to Package
20.7
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
48.9
46.9
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–93.8
–89.8
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–68.9
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–82.8
dBc
P1dB
Output 1dB Compression Point
24.3
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
3.30
dB
Frequency = 600MHz
S21
Differential Power Gain
De-Embedded to Package
20.7
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
48.7
45.7
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–93.4
–87.4
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–65.9
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–73.1
dBc
P1dB
Output 1dB Compression Point
24.0
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
3.44
dB
De-Embedded to Package
20.7
dB
Frequency = 700MHz
S21
Differential Power Gain
643020f
4
For more information www.linear.com/LTC6430-20
LTC6430-20
AC
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω, unless otherwise noted (Note 3).
Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).
SYMBOL PARAMETER
CONDITIONS
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
MIN
48.6
45.6
TYP
MAX
UNITS
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–93.2
–87.2
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–58.0
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–74.5
dBc
P1dB
Output 1dB Compression Point
23.6
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
3.68
dB
Frequency = 800MHz
S21
Differential Power Gain
De-Embedded to Package
20.7
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
46.5
43.5
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–89.0
–83.0
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–51.4
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–71.2
dBc
P1dB
Output 1dB Compression Point
22.9
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
3.93
dB
Frequency = 900MHz
S21
Differential Power Gain
De-Embedded to Package
20.7
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
45.1
43.1
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–86.2
–82.2
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–48.9
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–68.4
dBc
P1dB
Output 1dB Compression Point
22.3
dBm
NF
Noise Figure
De-Embedded to Package for Balun Input Loss
4.0
dB
Frequency = 1000MHz
S21
Differential Power Gain
De-Embedded to Package
20.6
dB
OIP3
Output Third-Order Intercept Point
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
43.7
41.7
dBm
dBm
IM3
Third-Order Intermodulation
POUT = 2dBm/Tone, Δf = 1MHz, ZO = 100Ω A-Grade
B-Grade
–83.4
–79.4
dBc
dBc
HD2
Second Harmonic Distortion
POUT = 8dBm
–55.2
dBc
HD3
Third Harmonic Distortion
POUT = 8dBm
–65.8
dBc
P1dB
Output 1dB Compression Point
22.5
dBm
NF
Noise Figure
4.27
dB
De-Embedded to Package for Balun Input Loss
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Guaranteed by design and characterization. This parameter is not tested.
Note 3: The LTC6430-20 is guaranteed functional over the case operating
temperature range of –40°C to 85°C.
Note 4: Small signal parameters S and noise are de-embedded to the
package pins, while large signal parameters are measured directly from the
test circuit.
643020f
For more information www.linear.com/LTC6430-20
5
LTC6430-20
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω,
unless otherwise noted (Note 3). Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without
de-embedding (Note 4).
10
7
6
5
0
500
1000 1500 2000
FREQUENCY (MHz)
2500
4
3
643020 G01
0
1000
3000
4000
2000
FREQUENCY (MHz)
0
5000
50
450
850
650
FREQUENCY (MHz)
250
643020 G02
1050
1250
643020 G03
Differential Reverse Isolation
(S12DD) vs Frequency Over
Temperature
0
TCASE =
100°C
85°C
50°C
–10
30°C
0°C
–20°C
–15
–40°C
–5
–20
500
3
1
25
–15
0
4
Differential Gain (S21DD)
vs Frequency Over Temperature
MAG S21DD (dB)
–10
5
2
2
0
3000
TCASE =
100°C
85°C
50°C
30°C
0°C
–20°C
–40°C
–5
MAG S11DD (dB)
6
1
0
TCASE =
–40°C
30°C
85°C
7
NOISE FIGURE (dB)
8
Differential Input Match (S11DD)
vs Frequency Over Temperature
–25
8
TCASE =
100°C
85°C
50°C
30°C
0°C
–20°C
–40°C
9
S11
S21
S12
S22
Noise Figure vs Frequency
Over Temperature
1000
1500
FREQUENCY (MHz)
2000
643020 G04
20
TCASE =
100°C
85°C
15
50°C
30°C
0°C
–20°C
–40°C
10
1000
1500
0
500
FREQUENCY (MHz)
Differential Output Match (S22DD)
vs Frequency Over Temperature
MAG S12DD (dB)
35
30
25
20
15
10
5
0
–5
–10
–15
–20
–25
–30
Differential Stability Factor K
vs Frequency Over Temperature
STABILITY FACTOR K (UNITLESS)
MAG (dB)
Differential S Parameters
vs Frequency
–20
–25
–30
–35
2000
Common Mode Gain (S21CC)
vs Frequency Over Temperature
0
0
643020 G05
500
1000
1500
FREQUENCY (MHz)
2000
643020 G06
CM-DM Gain (S21DC)
vs Frequency Over Temperature
22
5
21
–15
–20
0
500
1000
1500
FREQUENCY (MHz)
2000
643020 G07
18
MAG S21DC (dB)
TCASE =
100°C
85°C
50°C
30°C
0°C
–20°C
–40°C
MAG S21CC (dB)
MAG S22DD (dB)
19
–10
–25
0
20
–5
17
16
TCASE =
15
100°C
85°C
14
50°C
13
30°C
12
0°C
–20°C
11
–40°C
10
1000
1500
0
500
FREQUENCY (MHz)
–5
–10
TCASE =
100°C
85°C
50°C
30°C
0°C
–20°C
–40°C
–15
–20
–25
2000
643020 G08
–30
0
500
1500
1000
FREQUENCY (MHz)
2000
643020 G09
643020f
6
For more information www.linear.com/LTC6430-20
LTC6430-20
TYPICAL
PERFORMANCE CHARACTERISTICS
TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω,
unless otherwise noted (Note 3). Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without
de-embedding (Note 4).
OIP3 vs Frequency
OIP3 vs RF Power Out/Tone
Over Frequency
52
55
54
VCC = 5V
50 ZIN = ZOUT = 100Ω
TA = 25°C
48
50
52
50
48
40
46
OIP3 (dBm)
OIP3 (dBm)
OIP3 (dBm)
46
45
44
42
40
V = 5V
35 PCC = 3dBm/ TONE
OUT
ZIN = ZOUT = 100Ω DIFF.
TA = 25°C
30
200
400
600
0
FREQUENCY (MHz)
50MHz
100MHz
200MHz
300MHz
36
643020 G10
OIP3 vs Tone Spacing Over
Frequency
OIP3 (dBm)
43
41
50MHz
140MHz
200MHz
240MHz
37
0
30
40
20
TONE SPACING (MHz)
VCC = 5V
ZIN = ZOUT = 100Ω
POUT = 2dBm/TONE TA = 25°C
400
600
FREQUENCY (MHz)
1000
800
643020 G12
40
TCASE =
85°C
70°C
50°C
30°C
0°C
–20°C
–40°C
35
50
20
0
200
643020 G13
POUT = 2dBm/TONE
ZIN = ZOUT = 100Ω
TA = 25°C
400
600
FREQUENCY (MHz)
OIP2 vs Frequency
0
100
–50
–60
60
–40
50
40
30
20
–80
10
–90
0
1200
643020 G15
HD3 vs Frequency Over POUT
70
–70
400
200
600
800 1000
2ND HARMONIC FREQUENCY (MHz)
1000
643020 G14
POUT = 6dBm
POUT = 8dBm
–20 VCC = 5V
ZIN = ZOUT = 100Ω
–30 TA = 25°C
80
–40
800
–10
90
OIP2 (dBm)
HD2 (dBc)
200
OIP3 vs Frequency Over
Temperature
25
10
POUT = 6dBm
POUT = 8dBm
VCC = 5V
ZIN = ZOUT = 100Ω
TA = 25°C
0
0
643020 G11
30
400MHz
600MHz
800MHz
1000MHz
HD2 vs Frequency Over POUT
–30
30
10
HD3 (dBc)
OIP3 (dBm)
45
39
–20
8
45
47
–10
32
50
49
0
POUT = 2dBm/TONE
ZIN = ZOUT = 100Ω
TA = 25°C
34
6
55
51
35
VCC = 4.5V
VCC = 4.75V
VCC = 5V
VCC = 5.25V
VCC = 5.5V
42
40
36
400MHz
600MHz
800MHz
1000MHz
34
–10 –8 –6 –4 –2 0 2 4
RF POUT (dBm/TONE)
1000
44
38
38
800
OIP3 vs Frequency Over
VCC Voltage
–60
–70
VCC = 5V
ZIN = ZOUT = 100Ω
POUT = 8dBm
TA = 25°C
0
–50
–80
–90
400
200
600
800 1000
FUNDAMENTAL FREQUENCY (MHz)
1200
643020 G22
–100
0
1000
1500
500
3RD HARMONIC FREQUENCY (MHz)
643020 G16
643020f
For more information www.linear.com/LTC6430-20
7
LTC6430-20
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω,
unless otherwise noted (Note 3). Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without
de-embedding (Note 4).
26
Output P1dB vs Frequency
180
25
24
22
21
20
19
8
16
10
200
0
643020 G17
150
140
130
120
VCC = 5V
ZIN = ZOUT = 100Ω
TA = 25°C
17
6
–2
0
2
4
INPUT POWER (dBm)
TCASE = 25°C
160
23
18
–4
Total Current (ITOT) vs VCC
170
ITOT (mA)
25
24
23
22
21
20
19
18
17
16
15
14
13
12
–6
OUTPUT P1dB (dBm)
OUTPUT POWER (dBm)
Output Power vs Input Power
Over Frequency
110
400
600
FREQUENCY (MHz)
800
1000
100
3
643020 G18
3.5
4
4.5
VCC (V)
5
5.5
6
643020 G19
100MHz, P1dB = 23.2dBm
200MHz, P1dB = 23.7dBm
400MHz, P1dB = 24.7dBm
600MHz, P1dB = 23.9dBm
800MHz, P1dB = 22.9dBm
1000MHz, P1dB = 22.4dBm
Total Current (ITOT)
vs Case Temperature
Total Current vs RF Input Power
190
200
180
160
150
140
ITOT (mA)
TOTAL CURRENT (mA)
170
130
110
120
100
80
60
90
70 VCC = 5V
TA = 25°C
50
0
5
10
–20 –15 –10 –5
RF INPUT POWER (dBm)
40
20
15
20
643020 G20
VCC = 5V
0
–60 –40 –20 0 20 40 60 80 100 120
CASE TEMPERATURE (°C)
643020 G21
643020f
8
For more information www.linear.com/LTC6430-20
LTC6430-20
PIN FUNCTIONS
GND (Pins 8, 14, 17, 23, Exposed Pad Pin 25): Ground.
For best RF performance, all ground pins should be connected to the printed circuit board ground plane. The
exposed pad (Pin 25) should have multiple via holes to
an underlying ground plane for low inductance and good
thermal dissipation.
+OUT (Pin 18): Positive Amplifier Output Pin. A transformer
with a center tap tied to VCC or a choke inductor tied to 5V
supply is required to provide DC current and RF isolation.
For best performance select a choke with low loss and
high self resonant frequency (SRF). See the Applications
Information section for more information.
+IN (Pin 24): Positive Signal Input Pin. This pin has an
internally generated 1.8V DC bias. A DC-blocking capacitor
is required. See the Applications Information section for
specific recommendations.
–OUT (Pin 13): Negative Amplifier Output Pin. A transformer with a center tap tied to VCC or a choke inductor is
required to provide DC current and RF isolation. For best
performance select a choke with low loss and high SRF.
–IN (Pin 7): Negative Signal Input Pin. This pin has an
internally generated 1.8V DC bias. A DC-blocking capacitor
is required. See the Applications Information section for
specific recommendations.
DNC (Pins 1 to 6, 10 to 12, 15, 19 to 21): Do Not Connect.
Do not connect these pins, allow them to float. Failure
to float these pins may impair the performance of the
LTC6430-20.
VCC (Pins 9, 22): Positive Power Supply. Either or both
VCC pins should be connected to the 5V supply. Both VCC
pins are internally connected within the package. Bypass
the VCC pin with 1000pF and 0.1µF capacitors. The 1000pF
capacitor should be physically close to a VCC pin.
T_DIODE (Pin 16): Optional. A diode which can be forward
biased to ground with up to 1mA of current. The measured
voltage will be an indicator of the chip temperature.
BLOCK DIAGRAM
VCC
9, 22
BIAS AND TEMPERATURE
COMPENSATION
24
+IN
20dB
GAIN
+OUT
T_DIODE
7
–IN
20dB
GAIN
–OUT
18
16
13
GND
8, 14, 17, 23 AND PADDLE 25
643020 BD
643020f
For more information www.linear.com/LTC6430-20
9
LTC6430-20
Differential Application Test Circuit A (Balanced Amp)
RFIN
50Ω, SMA
+OUT
DNC
GND
DNC
–OUT
DNC
DNC
VCC
GND
R2
350Ω
T2
2:1
DNC
DNC
–IN
C2
1000pF
C3
1000pF
T_DIODE
LTC6430-20
DNC
C8
60pF
DNC
DNC
DNC
DNC
BALUN_A
L1
560nH
DNC
T1
1:2
GND
PORT
INPUT
+IN
R1
350Ω
VCC
C7
60pF
DNC
C1
1000pF
GND
TEST CIRCUIT A
C5
1nF
C4
1000pF
•
•
BALUN_A
PORT
OUTPUT
RFOUT
50Ω, SMA
L2
560nH
C6
0.1µF
VCC = 5V
BALUN_A = ADT2-IT FOR 50MHz TO 300MHz
BALUN_A = ADT2-1P FOR 300MHz TO 400MHz
BALUN_A = ADTL2-18 FOR 400MHz TO 1000MHz
ALL ARE MINI-CIRCUITS CD542 FOOTPRINT
643020 F01
Figure 1. Test Circuit A
OPERATION
The LTC6430-20 is a highly linear, fixed-gain amplifier
for differential signals. It can be considered a pair of 50Ω
single-ended devices operating 180 degrees apart. Its core
signal path consists of a single amplifier stage minimizing stability issues. The input is a Darlington pair for high
input impedance and high current gain. Additional circuit
enhancements increase the output impedance commensurate with the input impedance and minimize the effects
of internal Miller capacitance.
The LTC6430-20 uses a classic RF gain block topology,
with enhancements to achieve excellent linearity. Shunt
and series feedback elements are added to lower the input/
output impedance and match them simultaneously to the
source and load. An internal bias controller optimizes the
bias point for peak linearity over environmental changes.
This circuit architecture provides low noise, good RF power
handling capability and wide bandwidth; characteristics
that are desirable for IF signal-chain applications.
643020f
10
For more information www.linear.com/LTC6430-20
LTC6430-20
APPLICATIONS INFORMATION
The LTC6430-20 is a highly linear fixed-gain amplifier
which is designed for ease of use. Both the input and
output are internally matched to 100Ω differential source
and load impedance from 20MHz to 1400MHz. Biasing and
temperature compensation are also handled internally to
deliver optimized performance. The designer need only
supply input/output blocking capacitors, RF chokes and
decoupling capacitors for the 5V supply. However, because
the device is capable of such wideband operation, a single
application circuit will probably not result in optimized
performance across the full frequency band.
will drop the available voltage to the device. Also look for an
inductor with high self resonant frequency (SRF) as this will
limit the upper frequency where the choke is useful. Above
the SRF, the parasitic capacitance dominates and the choke’s
impedance will drop. For these reasons, wire-wound inductors are preferred, while multilayer ceramic chip inductors
should be avoided for an RF choke if possible. Since the
LTC6430-20 is capable of such wideband operation, a single
choke value will not result in optimized performance across
its full frequency band. Table 1 lists common frequency bands
and suggested corresponding inductor values.
Differential circuits minimize the common mode noise
and 2nd harmonic distortion issues that plague many
designs. Additionally, the LTC6430’s differential topology matches well with the differential inputs of an ADC.
However, evaluation of these differential circuits is difficult, as high resolution, high frequency, differential test
equipment is lacking.
Table 1. Target Frequency and Suggested Inductor Value
Our test circuit is designed for evaluation with standard
single ended 50Ω test equipment. Therefore, 1:2 balun
transformers have been added to the input and output to
transform the LTC6430-20’s 100Ω differential source/load
impedance to 50Ω single-ended impedance compatible
with most test equipment.
Other than the balun, the evaluation circuit requires a
minimum of external components. Input and output DCblocking capacitors are required as this device is internally
biased for optimal operation. A frequency appropriate
choke and de-coupling capacitors provide DC bias to the
RF ±OUT nodes. Only a single 5V supply is necessary to
either of the VCC pins on the device. Both VCC pins are
connected inside the package. Two VCC pins are provided
for the convenience of supply routing on the PCB. An optional parallel 60pF, 350Ω input network has been added
to ensure low frequency stability.
The particular element values shown in Test Circuit A are
chosen for wide bandwidth operation. Depending on the
desired frequency, performance may be improved by
custom selection of these supporting components.
Choosing the Right RF Choke
Not all choke inductors are created equal. It is always important to select an inductor with low RLOSS as resistance
FREQUENCY
BAND
(MHz)
INDUCTOR
VALUE
(nH)
SRF
(MHz)
MODEL
NUMBER
20 to 100
1500
100
0603LS
100 to 500
560
525
0603LS
500 t o 1000
100
1150
0603LS
1000 to 2000
51
1400
0603LS
MANUFACTURER
Coilcraft
www.coilcraft.com
DC-Blocking Capacitor
The role of a DC-blocking capacitor is straightforward:
block the path of DC current and allow a low series impedance path for the AC signal. Lower frequencies require a
higher value of DC-blocking capacitance. Generally, 1000pF
to 10,000pF will suffice for operation down to 20MHz.
The LTC6430-20 linearity is insensitive to the choice of
blocking capacitor.
RF Bypass Capacitor
RF bypass capacitors act to shunt the AC signals to
ground with a low impedance path. They prevent the AC
signal from getting into the DC bias supply. It is best to
place the bypass capacitor as close as possible to the DC
supply pins of the amplifier. Any extra distance translates
into additional series inductance which lowers the effectiveness of the bypass capacitor network. The suggested
bypass capacitor network consists of two capacitors:
a low value 1000pF capacitor to shunt high frequencies
and a larger 0.1µF capacitor to handle lower frequencies.
Use ceramic capacitors of appropriate physical size for
each capacitance value (e.g., 0402 for the 1000pF, 0805
for the 0.1µF) to minimize the equivalent series resistance
(ESR) of the capacitor.
643020f
For more information www.linear.com/LTC6430-20
11
LTC6430-20
APPLICATIONS INFORMATION
Low Frequency Stability
Most RF gain blocks suffer from low frequency instability. To avoid stability issues, the LTC6430-20, contains
an internal feedback network that lowers the gain and
matches the input and output impedance of the intrinsic
amplifier. This feedback network contains a series capacitor, whose value is limited by physical size. So, at some
low frequencies, this feedback capacitor looks like an open
circuit; the feedback fails, gain increases and gross impedance mismatches occur which can create instability. This
situation is easily resolved with a parallel capacitor and a
resistor network on the input. This is shown in Figure 1.
This network provides resistive loss at low frequencies
and is bypassed by the capacitor at the desired band of
operation. However, if the LTC6430-20 is preceded by
a low frequency termination, such as a choke or balun
transformer, the input stability network is not required.
A choke at the output can also terminate low frequencies
out-of-band and stabilize the device.
Exposed Pad and Ground Plane Considerations
As with any RF device, minimizing the ground inductance is
critical. Care should be taken with PC board layouts using
exposed pad packages, as the exposed pad provides the
lowest inductive path to ground. The maximum allowable
number of minimum diameter via holes should be placed
underneath the exposed pad and connected to as many
ground plane layers as possible. This will provide good RF
ground and low thermal impedance. Maximizing the copper
ground plane at the signal and microstrip ground will also
improve the heat spreading and lower inductance. It is a
good idea to cover the via holes with solder mask on the
backside of the PCB to prevent the solder from wicking
away from the critical PCB to exposed pad interface. One
to two ounces of copper plating is suggested to improve
heat spreading from the device.
Frequency Limitations
The LTC6430-20 is a wide bandwidth amplifier but it is not
intended for operation down to DC. The lower frequency
cutoff is limited by on-chip matching elements. The cutoff
may be arbitrarily pushed lower with off chip elements;
however, the translation between the low fixed DC common mode input voltage and the higher open collector
12
DC common mode output bias point make DC-coupled
operation impractical.
Using the On-Chip Diode to Sense Temperature
An on-chip temperature diode is accessible through the
T_DIODE pin. This is an optional feature to determine the
on-chip temperature. Forward bias this pin with 0.01mA
to 1mA of current and the voltage drop will indicate the
temperature on the die. With this temperature, the user can
determine the thermal impedance of the chip to PCB and
get an indicator of the exposed pad solder attach quality.
For best accuracy the user needs to perform a temperature
calibration at their desired current to accurately determine
the absolute temperature. At 1mA the diode voltage slope
is –1.2mV/°C.
Test Circuit A
Test Circuit A, shown in Figure 1, is designed to allow for
the evaluation of the LTC6430-20 with standard singleended 50Ω test equipment. This allows the designer to
verify the performance when the device is operated differentially. This evaluation circuit requires a minimum of
external components. Since the LTC6430-20 operates over
a very wide band, the evaluation test circuit is optimized for
wideband operation. Obviously, for narrowband operation,
the circuit can be further optimized.
Input and output DC-blocking capacitors are required, as
this device is internally DC biased for optimal performance.
A frequency appropriate choke and decoupling capacitors
are required to provide DC bias to the RF output nodes
(+OUT and –OUT). A 5V supply should also be applied to
one of the VCC pins on the device.
Components for a suggested parallel 60pF, 350Ω stability network have been added to ensure low frequency
stability. The 60pF capacitance can be increased to improve
low frequency ( 89dB at 140MHz, 2.25VP-P Input
LTC2259-16
16-Bit, 80Msps ADC, Ultralow Power
72dBFS Noise Floor, SFDR > 82dB at 140MHz, 2.00VP-P Input
LTC2160-14/LTC2161-14/ 14-bit, 25Msps/40Msps/60Msps ADC Low Power
LTC2162-14
76.2 dBFS Noise Floor, SFDR > 84dB at 140MHz, 2.00VP-P Input
LTC2155-14/LTC2156-14/ 14-bit, 170Msps/210Msps/250Msps/310Msps
LTC2157-14/LTC2158-14 ADC 2-Channel
69dBFS Noise Floor, SFDR > 80dB at 140MHz, 1.50VP-P Input,
>1GHz Input BW
LTC2216
79dBFS Noise Floor, SFDR > 91dB at 140MHz, 75VP-P Input
16-Bit, 80Msps ADC
643020f
28
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC6430-20
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC6430-20
LT 1014 • PRINTED IN USA
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