LTM2882
Dual Isolated RS232
µModule Transceiver + Power
DESCRIPTION
FEATURES
RS232 Transceiver: 2500VRMS for 1 Minute
n UL-CSA Recognized
File #E151738
n CSA Component Acceptance Notice 5A
n Isolated DC Power: 5V at Up to 200mA
n No External Components Required
n 1.62V to 5.5V Logic Supply for Flexible Digital
Interfacing
n High Speed Operation
1Mbps for 250pF/3kΩ Load
250kbps for 1nF/3kΩ Load
100kbps for 2.5nF/3kΩ TIA/EIA-232-F Load
n 3.3V (LTM2882-3) or 5V (LTM2882-5) Operation
n No Damage or Latchup to ±10kV HBM ESD on
Isolated RS232 Interface or Across Isolation Barrier
n High Common Mode Transient Immunity: 30kV/μs
n Maximum Continuous Working Voltage: 560V
PEAK
n True RS232 Compliant Output Levels
n 15mm × 11.25mm BGA and LGA Packages
n
The LTM®2882 is a complete galvanically isolated dual
RS232 µModule® (micromodule) transceiver. No external
components are required. A single 3.3V or 5V supply
powers both sides of the interface through an integrated,
isolated DC/DC converter. A logic supply pin allows easy
interfacing with different logic levels from 1.62V to 5.5V,
independent of the main supply.
Coupled inductors and an isolation power transformer
provide 2500VRMS of isolation between the line transceiver
and the logic interface. This device is ideal for systems
with different grounds, allowing for large common mode
voltages. Uninterrupted communication is guaranteed for
common mode transients greater than 30kV/μs.
APPLICATIONS
This part is compatible with the TIA/EIA-232-F standard.
Driver outputs are protected from overload and can be
shorted to ground or up to ±15V without damage. An
auxiliary isolated digital channel is available. This channel
allows configuration for half-duplex operation by controlling the DE pin.
Isolated RS232 Interface
Industrial Communication
n Test and Measurement Equipment
n Breaking RS232 Ground Loops
Enhanced ESD protection allows this part to withstand up
to ±10kV (human body model) on the transceiver interface
pins to isolated supplies and across the isolation barrier
to logic supplies without latchup or damage.
n
n
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
Isolated Dual RS232 µModule Transceiver
1Mbps Operation
3.3V (LTM2882-3)
5V (LTM2882-5)
VL
VCC
LTM2882
VCC2
ON
DE
DIN
DOUT
T1IN
R1OUT
T2IN
ISOLATION BARRIER
OFF ON
TIN
5V/DIV
T1OUT/R1IN
10V/DIV
T2OUT/R2IN
T1OUT
R1OUT
5V/DIV
R2OUT
R1IN
T2OUT
R2OUT
GND
5V
AVAILABLE CURRENT:
150mA (LTM2882-5)
100mA (LTM2882-3)
R2IN
GND2
2882 TA01b
400ns/DIV
DRIVER OUTPUTS TIED TO RECEIVER INPUTS
TOUT LOAD = 250pF + RIN
ROUT LOAD = 150pF
2882 TA01a
2882fh
For more information www.linear.com/LTM2882
1
LTM2882
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
VCC to GND................................................... –0.3V to 6V
VL to GND..................................................... –0.3V to 6V
VCC2 to GND2................................................ –0.3V to 6V
Logic Inputs
T1IN, T2IN, ON, DIN to GND.........–0.3V to (VL + 0.3V)
DE to GND2............................. –0.3V to (VCC2 + 0.3V)
Logic Outputs
R1OUT, R2OUT to GND................–0.3V to (VL + 0.3V)
DOUT to GND2......................... –0.3V to (VCC2 + 0.3V)
Driver Output Voltage
T1OUT, T2OUT to GND2............................–15V to 15V
Receiver Input Voltage
R1IN, R2IN to GND2................................ –25V to 25V
Operating Temperature Range (Note 4)
LTM2882C..........................................0°C ≤ TA ≤ 70°C
LTM2882I...................................... –40°C ≤ TA ≤ 85°C
LTM2882H................................... –40°C ≤ TA ≤ 105°C
Maximum Internal Operating Temperature............. 125°C
Storage Temperature Range................... –40°C to 125°C
Peak Package Body Reflow Temperature............... 245°C
TOP VIEW
1
2
3
4
R2OUT T2IN R1OUT T1IN
5
6
7
8
DIN
ON
VL
VCC
A
B
GND
C
D
E
F
G
H
I
J
GND2
K
L
R2IN T2OUT R1IN T1OUT DOUT
BGA PACKAGE
32-PIN (15mm × 11.25mm × 3.42mm)
TJMAX = 125°C,
θJA = 30°C/W, θJCtop = 27.8°C/W,
θJCbottom = 19.3°C/W, θJB = 24°C/W,
WEIGHT = 1.1g
DE
VCC2
LGA PACKAGE
32-PIN (15mm × 11.25mm × 2.8mm)
TJMAX = 125°C,
θJA = 29°C/W, θJCtop = 27.9°C/W,
θJCbottom = 18°C/W, θJB = 22.7°C/W,
WEIGHT = 1.1g
2882fh
2
For more information www.linear.com/LTM2882
LTM2882
ORDER INFORMATION
PART NUMBER
LTM2882CY-3#PBF
LTM2882IY-3#PBF
LTM2882HY-3#PBF
LTM2882CY-5#PBF
LTM2882IY-5#PBF
LTM2882HY-5#PBF
LTM2882CV-3#PBF
LTM2882IV-3#PBF
LTM2882CV-5#PBF
LTM2882IV-5#PBF
INPUT
VOLTAGE
http://www.linear.com/product/LTM2882#orderinfo
PART MARKING
DEVICE
FINISH CODE
PAD OR BALL
FINISH
3V to 3.6V
PACKAGE
TYPE
MSL
RATING
LTM2882Y-3
SAC305
(RoHS)
4.5V to 5.5V
e1
BGA
LTM2882Y-5
3V to 3.6V
3
LTM2882V-3
Au (RoHS)
4.5V to 5.5V
e4
LGA
LTM2882V-5
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 105°C
0°C to 70°C
–40°C to 85°C
–40°C to 105°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
• Device temperature grade is indicated by a label on the shipping
container.
• Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended BGA and LGA PCB Assembly and Manufacturing
Procedures: www.linear.com/umodule/pcbassembly
• Terminal Finish Part Marking: www.linear.com/leadfree
• This product is moisture sensitive. For more information, go to:
www.linear.com/umodule/pcbassembly
• This product is not recommended for second side reflow. For more
information, go to: www.linear.com/BGA-assy
• LGA and BGA Package and Tray Drawings: www.linear.com/packaging
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
Input Supply Range
LTM2882-3
LTM2882-5
MIN
TYP
MAX
UNITS
l
3.0
3.3
3.6
V
l
4.5
5.0
5.5
V
l
1.62
Supplies
VCC
VL
Logic Supply Range
ICC
Input Supply Current
VCC2
Regulated Output Voltage, Loaded
VCC2(NOLOAD) Regulated Output Voltage, No Load
Efficiency
ICC2
5.5
V
ON = 0V
l
0
10
µA
LTM2882-3, No Load
l
24
30
mA
LTM2882-5, No Load
l
17
25
mA
LTM2882-3 DE = 0V, ILOAD = 100mA
l
4.7
5.0
LTM2882-5 DE = 0V, ILOAD = 150mA
l
4.7
5.0
4.8
5.0
DE = 0, No Load
ICC2 = 100mA, LTM2882-5 (Note 2)
Output Supply Short-Circuit Current
V
V
5.35
V
65
%
200
mA
Driver
VOLD
Driver Output Voltage Low
RL = 3kΩ
l
–5
–5.7
V
VOHD
Driver Output Voltage High
RL = 3kΩ
l
5
6.2
V
IOSD
Driver Short-Circuit Current
VT1OUT, VT2OUT = 0V, VCC2 = 5.5V
l
±35
±70
mA
IOZD
Driver Three-State (High Impedance)
Output Current
DE = 0V, VT1OUT, VT2OUT = ±15V
l
±0.1
±10
µA
2882fh
For more information www.linear.com/LTM2882
3
LTM2882
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
VIR
Receiver Input Threshold
Input Low
l
Input High
l
VHYSR
Receiver Input Hysteresis
RIN
Receiver Input Resistance
Logic Input Threshold Voltage
MAX
UNITS
0.8
1.3
1.7
2.5
V
l
0.1
0.4
1.0
V
–15V ≤ (VR1IN, VR2IN) ≤ 15V
l
3
5
7
ON, T1IN, T2IN, DIN = 1.62V ≤ VL < 2.35V
l
0.25•VL
0.75•VL
V
ON, T1IN, T2IN, DIN = 2.35V ≤ VL ≤ 5.5V
l
0.4
0.67•VL
V
DE
l
0.4
0.67•VCC2
V
±1
µA
Receiver
V
kΩ
Logic
VITH
IINL
Logic Input Current
VHYS
Logic Input Hysteresis
T1IN, T2IN, DIN (Note 2)
VOH
Logic Output High Voltage
R1OUT, R2OUT
ILOAD = –1mA (Sourcing), 1.62V ≤ VL < 3.0V
ILOAD = –4mA (Sourcing), 3.0V ≤ VL ≤ 5.5V
l
l
VL – 0.4
VL – 0.4
V
V
DOUT, ILOAD = –4mA (Sourcing)
l
VCC2 – 0.4
V
R1OUT, R2OUT
ILOAD = 1mA (Sinking), 1.62V ≤ VL < 3.0V
ILOAD = 4mA (Sinking), 3.0V ≤ VL ≤ 5.5V
l
l
0.4
0.4
V
V
DOUT, ILOAD = 4mA (Sinking)
l
0.4
V
VOL
Logic Output Low Voltage
l
150
mV
ESD (HBM) (Note 2)
RS232 Driver and Receiver Protection
Isolation Boundary
(T1OUT, T2OUT, R1IN, R2IN) to (VCC2, GND2)
±10
kV
(T1OUT, T2OUT, R1IN, R2IN) to (VCC, VL, GND)
±10
kV
(VCC2, GND2) to (VCC, VL, GND)
±10
kV
SWITCHING
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
Maximum Data Rate
(T1IN to T1OUT, T2IN to T2OUT)
RL = 3kΩ, CL = 2.5nF (Note 3)
l
MIN
100
TYP
MAX
UNITS
kbps
RL = 3kΩ, CL = 1nF (Note 3)
l
250
kbps
RL = 3kΩ, CL = 250pF (Note 3)
l
1000
kbps
Maximum Data Rate (DIN to DOUT)
CL = 15pF (Note 3)
l
10
Mbps
Driver Slew Rate (6V/tTHL or tTLH)
RL = 3kΩ, CL = 50pF (Figure 1)
l
tPHLD, tPLHD
Driver Propagation Delay
RL = 3kΩ, CL = 50pF (Figure 1)
l
tSKEWD
Driver Skew |tPHLD – tPLHD|
RL = 3kΩ, CL = 50pF (Figure 1)
Driver
0.2
150
V/µs
0.5
µs
40
ns
tPZHD, tPZLD
Driver Output Enable Time
DE = ↑ , RL = 3kΩ, CL = 50pF (Figure 2)
l
0.6
2
µs
tPHZD, tPLZD
Driver Output Disable Time
DE = ↓ , RL = 3kΩ, CL = 50pF (Figure 2)
l
0.3
2
µs
2882fh
4
For more information www.linear.com/LTM2882
LTM2882
SWITCHING
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
0.2
0.4
UNITS
tPHLR, tPLHR
Receiver Propagation Delay
CL = 150pF (Figure 3)
tSKEWR
Receiver Skew |tPHLR – tPLHR|
CL = 150pF (Figure 3)
tRR, tFR
Receiver Rise or Fall Time
CL = 150pF (Figure 3)
l
60
200
ns
tPHLL, tPLHL
Propagation Delay
CL = 15pF, tR and tF < 4ns (Figure 4)
l
60
100
ns
tRL, tFL
Rise or Fall Time
CL = 150pF (Figure 4)
l
60
200
ns
Power-Up Time
ON = ↑ to VCC2(MIN)
l
0.2
2
ms
Receiver
l
µs
40
ns
Auxiliary Channel
Power Supply
ISOLATION
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
PARAMETER
VISO
Rated Dielectric Insulation Voltage
VIORM
CTI
DTI
CONDITIONS
MIN
TYP
MAX
UNITS
1 Minute, Derived from 1 Second Test
2500
VRMS
1 Second (Notes 5, 6)
±4400
V
Common Mode Transient Immunity
VL = ON = 3.3V, VCM = 1kV, ∆t = 33ns (Note 2)
30
kV/µs
Maximum Working Insulation Voltage
(Notes 2, 5)
560
400
VPEAK
VRMS
Partial Discharge
VPR = 1050 VPEAK (Notes 2, 5)
Comparative Tracking Index
Depth of Erosion
Distance Through Insulation
IEC 60112 (Note 2)
IEC 60112 (Note 2)
(Note 2)
600
Input to Output Resistance
(Notes 2, 5)
109
Input to Output Capacitance
(Notes 2, 5)
6
pF
Creepage Distance
(Notes 2, 5)
9.48
mm
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Guaranteed by design and not subject to production test.
Note 3: Maximum Data Rate is guaranteed by other measured parameters
and is not tested directly.
5
0.017
0.06
pC
VRMS
mm
mm
Ω
Note 4: This device includes over-temperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above specified maximum operating junction
temperature may result in device degradation or failure.
Note 5: Tests performed from GND to GND2, all pins shorted each side of
isolation barrier.
Note 6: The rated dielectric insulation voltage should not be interpreted as
a continuous voltage rating.
2882fh
For more information www.linear.com/LTM2882
5
LTM2882
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, LTM2882-3 VCC = 3.3V, LTM2882-5
VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted.
VCC Supply Current
vs Temperature
VCC = 3.3V
LTM2882-3
20
100
65
90
VCC = 3.3V
LTM2882-3
60
VCC CURRENT (mA)
VCC CURRENT (mA)
25
70
VCC = 5.0V
LTM2882-5
55
50
45
VCC = 5.0V
LTM2882-5
40
15
10
–50
0
50
25
75
TEMPERATURE (°C)
–25
100
T1OUT AND T2OUT
35 BAUD = 100kbps
RL = 3k, CL = 2.5nF
30
–50 –25
25
75
0
50
TEMPERATURE (°C)
125
VCC CURRENT (mA)
3.3V CL = 250pF
60
5.0V CL = 1nF
40
20
THRESHOLD VOLTAGE (V)
140
100
200
600
400
DATA RATE (kbps)
100
60
INPUT HIGH
2.0
1.5
INPUT LOW
1.0
1000
45
25
75
0
50
TEMPERATURE (°C)
100
SOURCING
25
20
–25
25
0
50
75
TEMPERATURE (°C)
40
30
100
125
2882 G07
FALLING
20
RISING
0
1
5
6
VTOUT = ±15V
5
10
1
0.1
0.001
–50
3
2
4
LOAD CAPACITANCE (nF)
Receiver Output Voltage
vs Load Current
0.01
15
2.5
2882 G06
OUTPUT VOLTAGE (V)
LEAKAGE CURRENT (nA)
30
1
2
0.5
1.5
LOAD CAPACITANCE (nF)
50
0
125
100
SINKING
0
2882 G05
50
35
19.2kbps, LTM2882-5
10
–25
100kbps, LTM2882-5
Driver Slew Rate
vs Load Capacitance
Driver Disabled Leakage Current
vs Temperature at ±15V
40
250kbps, LTM2882-5
2882 G03
2.5
Driver Short-Circuit Current
vs Temperature
SHORT-CIRCUIT CURRENT (mA)
125
70
2882 G04
10
–50
20
3.0
0
–50
1000
800
40
0.5
5.0V CL = 250pF
0
19.2kbps, LTM2882-3
50
Receiver Input Threshold
vs Temperature
3.3V CL = 1nF
100kbps, LTM2882-3
60
2882 G02
VCC Supply Current vs Data Rate
(Dual Transceiver)
80
70
30
2882 G01
120
250kbps, LTM2882-3
80
VCC CURRENT (mA)
NO LOAD
SLEW RATE (V/µs)
30
VCC Supply Current vs Load
Capacitance (Dual Transceiver)
VCC Supply Current
vs Temperature
VL = 5.5V
VL = 3.3V
VL = 1.62V
4
3
2
1
–25
25
0
50
75
TEMPERATURE (°C)
100
125
2882 G08
0
0
2
6
4
LOAD CURRENT(mA)
8
10
2882 G09
2882fh
6
For more information www.linear.com/LTM2882
LTM2882
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, LTM2882-3 VCC = 3.3V, LTM2882-5
VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted.
VCC2 Output Voltage
vs Load Current
3.5
5.2
3.0
5.1
2.5
VCC2 VOLTAGE (V)
THRESHOLD VOLTAGE (V)
Logic Input Threshold
vs VL Supply Voltage
INPUT HIGH
2.0
INPUT LOW
1.5
1.0
0.5
0
VCC = 3.0V TO 3.6V, LTM2882-3
VCC = 4.5V TO 5.5V, LTM2882-5
5.0
5.5V
4.9
3.0V
4.7
1
3
2
4
VL SUPPLY VOLTAGE (V)
4.5
6
5
3.6V
4.5V
4.6
0
5.0V
3.3V
4.8
0
50
100
200
150
LOAD CURRENT (mA)
250
2882 G10
300
2882 G11
Driver Outputs Exiting Shutdown
Driver Outputs Enable/Disable
ON
T1OUT
DE = DOUT,
DIN = VL
5V/DIV
2V/DIV
DE
T1OUT
T2OUT
T1OUT
5V/DIV
DE = VCC2
T2OUT
T2OUT
2882 G12
100µs/DIV
2µs/DIV
2882 G13
Operating Through 35kV/µs
Common Mode Transients
T1IN
2V/DIV
2V/DIV
T1OUT = R1IN
R1OUT
*
500V/DIV
50ns/DIV
* MULTIPLE SWEEPS OF
COMMON MODE TRANSIENTS
2882 G14
2882fh
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7
LTM2882
TYPICAL
PERFORMANCE CHARACTERISTICS
VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted.
VCC2 Surplus Current
vs Temperature
300
70
EFFICIENCY (%)
150
60
VCC = 5.0V
LTM2882-5
200
VCC = 3.3V
LTM2882-3
100
T1OUT AND T2OUT
50 BAUD = 100kbps
RL = 3k, CL = 2.5nF
VCC2 = 4.8V
0
–50 –25
25
75
0
50
TEMPERATURE (°C)
VCC2 Power Efficiency
1.2
1.0
LTM2882-5
50
0.8
LTM2882-3
40
0.6
30
0.4
20
100
125
10
POWER LOSS (W)
VCC2 CURRENT (mA)
250
TA = 25°C, LTM2882-3 VCC = 3.3V, LTM2882-5
0.2
TA = 25°C
0
50
150
100
200
LOAD CURRENT (mA)
2882 G15
250
0
300
2882 G16
VCC2 Load Step Response
VCC2 Ripple and Noise
200mV/DIV
100mV/DIV
50mA/DIV
T1IN = 250kbps
T1OUT, T2OUT, RL = 3k
10µs/DIV
2882 G17
100µs/DIV
2882 G18
2882fh
8
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LTM2882
TEST CIRCUITS
VL
TIN
TIN
CL
RL
½VL
0V
TOUT
TOUT
tPLHD
VOHD
0V
–3V
VOLD
tr, tf ≤ 40ns
tPHLD
3V
tTHL
tTLH
2882 F01
Figure 1. Driver Slew Rate and Timing Measurement
VCC2
DE
0V
0 OR VL
TOUT
DE
CL
RL
TOUT
tPZHD
VOHD
tPHZD
5V
VOHD – 0.5V
0V
0V
TOUT
tr, tf ≤ 40ns
½VCC2
tPZLD
tPLZD
VOLD – 0.5V
–5V
VOLD
2882 F02
Figure 2. Driver Enable/Disable Times
3V
RIN
ROUT
–3V
CL
RIN
tr, tf ≤ 40ns
ROUT
1.5V
tPHLR
VOH
tPLHR
10%
90%
90%
VOL
½VL
10%
tFR
tRR
2882 F03
Figure 3. Receiver Timing Measurement
DIN
0V
DOUT
DIN
VL
CL
DOUT
VOH
VOL
½VL
tPLHL
90%
10%
½VCC2
tRL
tPHLL
10%
90%
tFL
2882 F04
Figure 4. Auxiliary Channel Timing Measurement
2882fh
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9
LTM2882
PIN FUNCTIONS
LOGIC SIDE
ISOLATED SIDE
R2OUT (Pin A1): Channel 2 RS232 Inverting Receiver
Output. Controlled through isolation barrier from receiver
input R2IN. Under the condition of an isolation communication failure R2OUT is in a high impedance state.
GND2 (Pins K1-K7): Isolated Side Circuit Ground. These
pads should be connected to the isolated ground and/or
cable shield.
T2IN (Pin A2): Channel 2 RS232 Inverting Driver Input.
A logic low on this input generates a high on isolated
output T2OUT. A logic high on this input generates a low
on isolated output T2OUT. Do not float.
VCC2 (Pins K8, L7-L8): Isolated Supply Voltage Output. Internally generated from VCC by an isolated DC/DC converter
and regulated to 5V. Supply voltage for pins R1IN, R2IN,
DE, and DOUT. Internally bypassed to GND2 with 2.2µF.
R1OUT (Pin A3): Channel 1 RS232 Inverting Receiver
Output. Controlled through isolation barrier from receiver
input R1IN. Under the condition of an isolation communication failure R1OUT is in a high impedance state.
R2IN (Pin L1): Channel 2 RS232 Inverting Receiver Input.
A low on isolated input R2IN generates a logic high on
R2OUT. A high on isolated input R2IN generates a logic
low on R2OUT. Impedance is nominally 5kΩ in receive
mode or unpowered.
T1IN (Pin A4): Channel 1 RS232 Inverting Driver Input.
A logic low on this input generates a high on isolated
output T1OUT. A logic high on this input generates a low
on isolated output T1OUT. Do not float.
T2OUT (Pin L2): Channel 2 RS232 Inverting Driver
Output. Controlled through isolation barrier from driver
input T2IN. High impedance when the driver is disabled
(DE pin is low).
DIN (Pin A5): General Purpose Non-Inverting Logic Input.
A logic high on DIN generates a logic high on isolated
output DOUT. A logic low on DIN generates a logic low
on isolated output DOUT. Do not float.
R1IN (Pin L3): Channel 1 RS232 Inverting Receiver Input.
A low on isolated input R1IN generates a logic high on
R1OUT. A high on isolated input R1IN generates a logic
low on R1OUT. Impedance is nominally 5kΩ in receive
mode or unpowered.
ON (Pin A6): Enable. Enables power and data communication through the isolation barrier. If ON is high the part is
enabled and power and communications are functional to
the isolated side. If ON is low the logic side is held in reset
and the isolated side is unpowered. Do not float.
T1OUT (Pin L4): Channel 1 RS232 Inverting Driver
Output. Controlled through isolation barrier from driver
input T1IN. High impedance when the driver is disabled
(DE pin is low).
VL (Pin A7): Logic Supply. Interface supply voltage for pins
DIN, R2OUT, T2IN, R1OUT, T1IN, and ON. Operating voltage
is 1.62V to 5.5V. Internally bypassed to GND with 2.2µF.
DOUT (Pin L5): General Purpose Non-Inverting Logic
Output. Logic output connected through isolation barrier
to DIN.
VCC (Pins A8, B7-B8): Supply Voltage. Operating voltage is 3.0V to 3.6V for LTM2882-3, and 4.5V to 5.5V for
LTM2882-5. Internally bypassed to GND with 2.2µF.
DE (Pin L6): Driver Output Enable. A low input forces
both RS232 driver outputs, T1OUT and T2OUT, into a high
impedance state. A high input enables both RS232 driver
outputs. Do not float.
GND (Pins B1-B6): Circuit Ground.
2882fh
10
For more information www.linear.com/LTM2882
LTM2882
BLOCK DIAGRAM
5V
REG
VCC
VCC2
2.2µF
2.2µF
VL
GND2
2.2µF
DE
GND
DOUT
VDD
DC/DC
CONVERTER
VEE
ON
DIN
VDD
T1IN
R1OUT
T1OUT
ISOLATED
COMMUNICATIONS
INTERFACE
ISOLATED
COMMUNICATIONS
INTERFACE
VEE
VDD
R1IN
5k
T2IN
T2OUT
VEE
R2OUT
R2IN
5k
2882 BD
2882fh
For more information www.linear.com/LTM2882
11
LTM2882
APPLICATIONS INFORMATION
Overview
ANY VOLTAGE FROM
1.62V TO 5.5V
VL
ON
VCC
DIN
EXTERNAL
DEVICE
T1IN
R1OUT
T2IN
LTM2882
GND
VCC2
DE
DOUT
T1OUT
R1IN
T2OUT
R2IN
R2OUT
µModule Technology
GND2
2882 F05
The LTM2882 utilizes isolator µModule technology to
translate signals and power across an isolation barrier.
Signals on either side of the barrier are encoded into pulses
and translated across the isolation boundary using coreless transformers formed in the µModule substrate. This
system, complete with data refresh, error checking, safe
shutdown on fail, and extremely high common mode immunity, provides a robust solution for bidirectional signal
isolation. The µModule technology provides the means
to combine the isolated signaling with our advanced dual
RS232 transceiver and powerful isolated DC/DC converter
in one small package.
DC/DC Converter
The LTM2882 contains a fully integrated isolated DC/DC
converter, including the transformer, so that no external
components are necessary. The logic side contains a fullbridge driver, running at about 2MHz, and is AC-coupled
to a single transformer primary. A series DC blocking
capacitor prevents transformer saturation due to driver
duty cycle imbalance. The transformer scales the primary
voltage, and is rectified by a full-wave voltage doubler.
This topology eliminates transformer saturation caused
by secondary imbalances.
The DC/DC converter is connected to a low dropout regulator
(LDO) to provide a regulated low noise 5V output, VCC2.
An integrated boost converter generates a 7V VDD supply
and a charge pumped –6.3V VEE supply. VDD and VEE power
the output stage of the RS232 drivers and are regulated
to levels that guarantee greater than ±5V output swing.
12
3.0V TO 3.6V LTM2882-3
4.5V TO 5.5V LTM2882-5
ISOLATION BARRIER
The LTM2882 µModule transceiver provides a galvanicallyisolated robust RS232 interface, powered by an integrated,
regulated DC/DC converter, complete with decoupling
capacitors. The LTM2882 is ideal for use in networks
where grounds can take on different voltages. Isolation in
the LTM2882 blocks high voltage differences, eliminates
ground loops and is extremely tolerant of common mode
transients between grounds. Error-free operation is maintained through common mode events greater than 30kV/
μs providing excellent noise isolation.
Figure 5. VCC and VL Are Independent
The internal power solution is sufficient to support the
transceiver interface at its maximum specified load and
data rate, and has the capacity to provide additional 5V
power on the isolated side VCC2 and GND2 pins. VCC and
VCC2 are each bypassed internally with 2.2µF ceramic
capacitors.
VL Logic Supply
A separate logic supply pin VL allows the LTM2882 to interface with any logic signal from 1.62V to 5.5V as shown
in Figure 5. Simply connect the desired logic supply to VL.
There is no interdependency between VCC and VL; they
may simultaneously operate at any voltage within their
specified operating ranges and sequence in any order. VL
is bypassed internally by a 2.2µF capacitor.
Hot Plugging Safely
Caution must be exercised in applications where power is
plugged into the LTM2882’s power supplies, VCC or VL,
due to the integrated ceramic decoupling capacitors. The
parasitic cable inductance along with the high Q characteristics of ceramic capacitors can cause substantial
ringing which could exceed the maximum voltage ratings
and damage the LTM2882. Refer to Analog Devices Application Note 88, entitled “Ceramic Input Capacitors Can
Cause Overvoltage Transients” for a detailed discussion
and mitigation of this phenomenon.
For more information www.linear.com/LTM2882
2882fh
LTM2882
APPLICATIONS INFORMATION
Channel Timing Uncertainty
Driver Overvoltage and Overcurrent Protection
Multiple channels are supported across the isolation boundary by encoding and decoding of the inputs and outputs.
The technique used assigns T1IN/R1IN the highest priority
such that there is no jitter on the associated output channels T1OUT/R1OUT, only delay. This preemptive scheme
will produce a certain amount of uncertainty on T2IN/
R2IN to T2OUT/R2OUT and DIN to DOUT. The resulting
pulse width uncertainty on these low priority channels is
typically ±6ns, but may vary up to about 40ns.
The driver outputs are protected from short-circuits to
any voltage within the absolute maximum range of ±15V
relative to GND2. The maximum current is limited to no
more than 70mA to maintain a safe power dissipation and
prevent damaging the LTM2882.
Half-Duplex Operation
Each receiver input has a nominal input impedance of 5kΩ
relative to GND2. An open circuit condition will generate a
logic high on each receiver’s respective output pin.
The DE pin serves as a low-latency driver enable for halfduplex operation. The DE pin can be easily driven from
the logic side by using the uncommitted auxiliary digital
channel, DIN to DOUT. Each driver is enabled and disabled
in less than 2µs, while each receiver remains continuously
active. This mode of operation is illustrated in Figure 6.
3.3V (LTM2882-3)
5V (LTM2882-5)
RX TX
VCC
DIN
T1IN
R1OUT
T2IN
LTM2882
T1OUT
R1IN
T2OUT
R2IN
R2OUT
GND
VCC2
DE
DOUT
ISOLATION BARRIER
VL
ON
GND2
2882 F06
Figure 6. Half-Duplex Configuration Using DOUT to Drive DE
Receiver Overvoltage and Open Circuit
The receiver inputs are protected from common mode
voltages of ±25V relative to GND2.
RF, Magnetic Field Immunity
The LTM2882 has been independently evaluated and has
successfully passed the RF and magnetic field immunity
testing requirements per European Standard EN 55024,
in accordance with the following test standards:
EN 61000-4-3
Radiated, Radio-Frequency,
Electromagnetic Field Immunity
EN 61000-4-8
Power Frequency
Magnetic Field Immunity
EN 61000-4-9
Pulsed Magnetic Field Immunity
Tests were performed using an unshielded test card designed per the data sheet PCB layout recommendations.
Specific limits per test are detailed in Table 1.
Table 1
TEST
EN 61000-4-3, Annex D
FREQUENCY
FIELD STRENGTH
80MHz to 1GHz
10V/m
1.4MHz to 2GHz
3V/m
2GHz to 2.7GHz
1V/m
EN 61000-4-8, Level 4
50Hz and 60Hz
30A/m
EN 61000-4-8, Level 5
60Hz
100A/m*
EN 61000-4-9, Level 5
Pulse
1000A/m
*Non IEC Method
2882fh
For more information www.linear.com/LTM2882
13
LTM2882
APPLICATIONS INFORMATION
PCB Layout
The high integration of the LTM2882 makes PCB layout
very simple. However, to optimize its electrical isolation
characteristics, EMI, and thermal performance, some
layout considerations are necessary.
• Under heavily loaded conditions VCC and GND current
can exceed 300mA. Sufficient copper must be used
on the PCB to insure resistive losses do not cause the
supply voltage to drop below the minimum allowed
level. Similarly, the VCC2 and GND2 conductors must
be sized to support any external load current. These
heavy copper traces will also help to reduce thermal
stress and improve the thermal conductivity.
• Input and Output decoupling is not required, since these
components are integrated within the package. An additional bulk capacitor with a value of 6.8µF to 22µF is
recommended. The high ESR of this capacitor reduces
board resonances and minimizes voltage spikes caused
by hot plugging of the supply voltage. For EMI sensitive
applications, an additional low ESL ceramic capacitor of
1µF to 4.7µF, placed as close to the power and ground
terminals as possible, is recommended. Alternatively, a
number of smaller value parallel capacitors may be used
to reduce ESL and achieve the same net capacitance.
• Do not place copper on the PCB between the inner columns of pads. This area must remain open to withstand
the rated isolation voltage.
• The use of solid ground planes for GND and GND2
is recommended for non-EMI critical applications to
optimize signal fidelity, thermal performance, and to
minimize RF emissions due to uncoupled PCB trace
conduction. The drawback of using ground planes,
where EMI is of concern, is the creation of a dipole
antenna structure which can radiate differential voltages
formed between GND and GND2. If ground planes are
used it is recommended to minimize their area, and
use contiguous planes as any openings or splits can
exacerbate RF emissions.
• For large ground planes a small capacitance (≤ 330pF)
from GND to GND2, either discrete or embedded within
the substrate, provides a low impedance current return
path for the module parasitic capacitance, minimizing
any high frequency differential voltages and substantially
reducing radiated emissions. Discrete capacitance will
not be as effective due to parasitic ESL. In addition, voltage rating, leakage, and clearance must be considered
for component selection. Embedding the capacitance
within the PCB substrate provides a near ideal capacitor
and eliminates component selection issues; however,
the PCB must be 4 layers. Care must be exercised in
applying either technique to insure the voltage rating
of the barrier is not compromised.
The PCB layout in Figures 7a to 7e show the low EMI
demo board for the LTM2882. The demo board uses a
combination of EMI mitigation techniques, including both
embedded PCB bridge capacitance and discrete GND to
GND2 capacitors. Two safety rated type Y2 capacitors
are used in series, manufactured by Murata, part number
GA342QR7GF471KW01L. The embedded capacitor effectively suppresses emissions above 400MHz, whereas
the discrete capacitors are more effective below 400MHz.
EMI performance is shown in Figure 8, measured using
a Gigahertz Transverse Electromagnetic (GTEM) cell and
method detailed in IEC 61000-4-20, “Testing and Measurement Techniques – Emission and Immunity Testing
in Transverse Electromagnetic Waveguides.”
2882fh
14
For more information www.linear.com/LTM2882
LTM2882
APPLICATIONS INFORMATION
TECHNOLOGY
Figure 7a. Low EMI Demo Board Layout
Figure 7b. Low EMI Demo Board Layout (DC1747A), Top Layer
Figure 7c. Low EMI Demo Board Layout (DC1747A), Inner Layer 1
2882fh
For more information www.linear.com/LTM2882
15
LTM2882
APPLICATIONS INFORMATION
Figure 7d. Low EMI Demo Board Layout (DC1747A), Inner Layer 2
Figure 7e. Low EMI Demo Board Layout (DC1747A), Bottom Layer
60
DETECTOR = QuasiPeak
50 RBW = 120kHz
VBW = 300kHz
40 SWEEP TIME = 17sec
dBµV/m
30
20
10
0
–10
–20
–30
DC1747A-A
DC1747A-B
CISPR 22 CLASS 8 LIMIT
0 100 200 300 400 500 600 700 800 900 1000
FREQUENCY (MHz)
2882 F08
Figure 8. Low EMI Demo Board Emissions
2882fh
16
For more information www.linear.com/LTM2882
LTM2882
TYPICAL APPLICATIONS
VL
ON
VCC
DE
DIN
RX TX
T1IN
3.3k
R1OUT
T2IN
3.3k
LTM2882
DOUT
ISOLATION BARRIER
3.3V (LTM2882-3)
5V (LTM2882-5)
T1OUT
R1IN
T2OUT
R2IN
R2OUT
GND
GND2
2882 F09
Figure 9. Single Line Dual Half-Duplex
Isolated Transceiver
VL
VCC
LTM2882
ON
DE
DIN
DOUT
T1IN
R1OUT
T2IN
ISOLATION BARRIER
3.3V (LTM2882-3)
5V (LTM2882-5)
T1OUT
R1IN
CL
R2IN
R2OUT
GND
3k
T2OUT
DATA RATE
CL (nF)
(kbps)
GND2
2882 F10
100
250
1000
5
2
0.5
Figure 10. Driving Larger Capacitive Loads
2882fh
For more information www.linear.com/LTM2882
17
LTM2882
TYPICAL APPLICATIONS
3.3V (LTM2882-3)
5V (LTM2882-5)
VL
ON
VCC
LTM2882
ISOLATION BARRIER
T1IN
R1OUT
T2IN
VL
ON
OFF ON
DE
DIN
µP
3.3V (LTM2882-3)
5V (LTM2882-5)
DOUT
DIN
T1OUT
T1IN
R1IN
R1OUT
T2OUT
T2IN
R2IN
R2OUT
GND
VCC
LTM2882
R1IN
T2OUT
R2IN
GND
2882 F11
GND2
2882 F12
Figure 12. Isolated 5V Power Supply
Figure 11. 1.8V Microprocessor Interface
5V
REGULATED
3.3V (LTM2882-3)
5V (LTM2882-5)
VL
VCC
LTM2882
VCC2
ON
DE
DIN
DOUT
T1IN
R1OUT
T2IN
R2OUT
GND
ISOLATION BARRIER
OFF ON
5V
REGULATED
150mA (LTM2882-5)
100mA (LTM2882-3)
T1OUT
R2OUT
GND2
VCC2
DE
DOUT
ISOLATION BARRIER
1.8V
T1OUT
R1IN
T2OUT
R2IN
7V
SWITCHED
–6.3V
SWITCHED
GND2
2882 F13
RETURN
Figure 13. Isolated Multirail Power Supply
with Switched Outputs
2882fh
18
For more information www.linear.com/LTM2882
1.905
3.175
SUGGESTED PCB LAYOUT
TOP VIEW
0.000
aaa Z
0.630 ±0.025 Ø 32x
0.635
PACKAGE TOP VIEW
E
0.635
4
1.905
PIN “A1”
CORNER
3.175
4.445
4.445
Y
X
D
For more information www.linear.com/LTM2882
6.350
5.080
0.000
5.080
6.350
aaa Z
// bbb Z
NOM
3.42
0.60
2.82
0.75
0.63
15.0
11.25
1.27
12.70
8.89
0.32
2.50
MAX
3.62
0.70
2.92
0.90
0.66
DIMENSIONS
BALL DIMENSION
PAD DIMENSION
BALL HT
NOTES
DETAIL B
PACKAGE SIDE VIEW
A2
SUBSTRATE THK
0.37
MOLD CAP HT
2.55
0.15
0.10
0.20
0.30
0.15
TOTAL NUMBER OF BALLS: 32
0.27
2.45
MIN
3.22
0.50
2.72
0.60
0.60
H1
SUBSTRATE
ddd M Z X Y
eee M Z
DETAIL A
Øb (32 PLACES)
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
b1
DETAIL B
H2
MOLD
CAP
ccc Z
A1
Z
A
Z
(Reference LTC DWG # 05-08-1851 Rev E)
BGA Package
32-Lead (15mm × 11.25mm × 3.42mm)
e
b
7
5
G
4
e
3
PACKAGE BOTTOM VIEW
6
2
1
L
K
J
H
G
F
E
D
C
B
A
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
BALL DESIGNATION PER JESD MS-028 AND JEP95
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
6
!
3
BGA 32 0517 REV E
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
5. PRIMARY DATUM -Z- IS SEATING PLANE
4
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
6
SEE NOTES
PIN 1
SEE NOTES
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
F
b
8
DETAIL A
LTM2882
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM2882#packaging for the most recent package drawings.
2882fh
19
4
For more information www.linear.com/LTM2882
3.175
1.905
SUGGESTED PCB LAYOUT
TOP VIEW
0.635
PACKAGE TOP VIEW
11.25
BSC
0.635
PAD “A1”
CORNER
1.905
Y
X
6.350
5.080
0.000
5.080
6.350
DETAIL c
15.00
BSC
aaa Z
2.400 – 2.600
eee S X Y
0.290 – 0.350
SUBSTRATE
DETAIL C
0.630 ±0.025 Ø 32x
DETAIL B
eee S X Y
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
7
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
SYMBOL TOLERANCE
aaa
0.10
bbb
0.10
eee
0.05
!
6. THE TOTAL NUMBER OF PADS: 32
5. PRIMARY DATUM -Z- IS SEATING PLANE
LAND DESIGNATION PER JESD MO-222
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
DETAIL A
0.630 ±0.025 Ø 32x
DETAIL B
MOLD
CAP
2.69 – 2.95
(Reference LTC DWG # 05-08-1773 Rev A)
Z
20
bbb Z
LGA Package
32-Lead (15mm × 11.25mm × 2.82mm)
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
12.70
BSC
8
DETAIL A
7
8.89
BSC
5
4
3
1.27
BSC
2
1
L
K
J
H
G
F
E
D
C
B
A
7
LGA 32 0113 REV A
3
PADS
SEE NOTES
PAD 1
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
PACKAGE BOTTOM VIEW
6
SEE NOTES
LTM2882
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM2882#packaging for the most recent package drawings.
2882fh
4.445
3.175
4.445
aaa Z
LTM2882
REVISION HISTORY
REV
DATE
DESCRIPTION
A
3/10
Changes to Features
Add BGA Package to Pin Configuration, Order Information and Package Description Sections
Changes to LGA Package in Pin Configuration Section
PAGE NUMBER
1
2, 15
2
Update to Pin Functions
9
Update to RF, Magnetic Field Immunity Section
12
“PCB Layout Isolation Considerations” Section Replaced
13
B
3/11
H-Grade parts added. Reflected throughout the data sheet.
1-20
C
1/12
MP-Grade parts added. Reflected throughout the data sheet.
1-24
D
11/12
Storage temperature range updated.
E
5/14
Removed H-grade and MP-grade parts throughout the data sheet.
F
9/14
G
4/16
H
2/18
2
1-22
Reduced Maximum Internal Operating Temperature and Storage Temperature Range.
2
Added CTI and DTI parameters.
5
Revised Output Supply Short-Circuit Current (ICC2)
3
Added CSA information
1
Revised ICC (LTM2882-5) limit
3
H-Grade parts added. Reflected throughout the data sheet.
1-22
2882fh
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
For more
information
www.linear.com/LTM2882
subject to change without notice. No license
is granted
by implication
or otherwise under any patent or patent rights of Analog Devices.
21
LTM2882
TYPICAL APPLICATIONS
3.3V (LTM2882-3)
5V (LTM2882-5)
1.62V TO 5.5V
VL
ON
µC
VCC
TXD
R XD
PY
PZ
T1IN
R2OUT
T2IN
PERIPHERAL
VL
ON
OFF ON
T1OUT
TX
T2OUT
R1OUT
VL
T2IN
RTS
R2IN
GND
0V
CTS
0V
LTM2882
DE
T1IN
RX
R1IN
R2OUT
VCC
DIN
DOUT
ISOLATION BARRIER
DIN
VCC2
DE
LTM2882
DOUT
ISOLATION BARRIER
3.3V (LTM2882-3)
5V (LTM2882-5)
T1OUT
R1IN
GND
GND2
R2IN
–25V TO 0V
2882 F15
Figure 14. Isolated RS232 Interface with Handshaking
VCC
DIN
T1IN
PWMA
FAULT
PWMB
R1OUT
T2IN
LTM2882
ISOLATION BARRIER
RESET
VL
ON
3V TO 25V
GND2
2882 F14
3.3V (LTM2882-3)
5V (LTM2882-5)
–25V TO 0V
T2OUT
R2OUT
VL
3V TO 25V
Figure 15. Isolated Dual Inverting Level Translator
+VS
1k
VCC2
DE
DOUT
T1OUT
LOGIC
LEVEL
FETS
R1IN
T2OUT
R2IN
R2OUT
GND
GND2
IRLML6402
CMPT2369-LTV
1k
3k
470pF
3k
IRLML2402
47pF
RILIM = 0.6/MAX CURRENT
2882 F16
Figure 16. Isolated Gate Drive with Overcurrent Detection
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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SPI/Digital or I2C Isolated µModule with Adjustable
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LTM2892
5V and 12V Rails
2882fh
22
LT 0218 REV H • PRINTED IN USA
For more information www.linear.com/LTM2882
www.linear.com/LTM2882
ANALOG DEVICES, INC. 2010