1469

LT1469 Dual 90MHz, 22V/µs 16-Bit Accurate Operational Amplifier FEATURES n n n n n n n n n n n n n n DESCRIPTION The LT®1469 is a dual, precision high speed operational amplifier with 16-bit accuracy and 900ns settling to 150μV for 10V steps. This unique blend of precision and AC performance makes the LT1469 the optimum choice for high accuracy applications such as DAC current-to-voltage conversion and ADC buffers. The initial accuracy and drift characteristics of the input offset voltage and inverting input bias current are tailored for inverting applications. The 90MHz gain bandwidth ensures high open-loop gain at frequency for reducing distortion. In noninverting applications such as an ADC buffer, the low distortion and DC accuracy allow full 16-bit AC and DC performance. The 22V/μs slew rate of the LT1469 improves large signal performance compared to other precision op amps in applications such as active filters and instrumentation amplifiers. The LT1469 is available in a space saving 4mm × 4mm leadless package, as well as in small outline and DIP packages. A single version, the LT1468, is also available. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 90MHz Gain Bandwidth, f = 100kHz Maximum Input Offset Voltage: 125μV Settling Time: 900ns (AV = –1, 150μV, 10V Step) 22V/μs Slew Rate Low Distortion: –96.5dB for 100kHz, 10VP-P Maximum Input Offset Voltage Drift: 3μV/°C Maximum Inverting Input Bias Current: 10nA Minimum DC Gain: 300V/mV Minimum Output Swing into 2k: ±12.8V Unity-Gain Stable Input Noise Voltage: 5nV/√Hz Input Noise Current: 0.6pA/√Hz Total Input Noise Optimized for 1kΩ < RS < 20kΩ Specified at ±5V and ±15V Supplies APPLICATIONS n n n n n n Precision Instrumentation High Accuracy Data Acquisition Systems 16-Bit DAC Current-to-Voltage Converter ADC Buffer Low Distortion Active Filters Photodiode Amplifiers TYPICAL APPLICATION 16-Bit DAC I-to-V Converter and Reference Inverter for Bipolar Output Swing (VOUT = – 10V to 10V) 15V VREF Bipolar Multiplying Mode (LTC1597) Signal-to-(Noise + Distortion) 40 SIGNAL/(NOISE + DISTORTION) (dB) 50 60 70 80 500kHz FILTER 90 100 110 10 –15V 1469 TA01 + 1/2 LT1469 – 15pF 2.4μs SETTLING TIME TO 1LSB ON 20V STEP DAC INPUT CODE = ALL ZEROS VREF = 20VP-P 15pF 12k 16 BITS DAC INPUTS 12k LTC1597 12k 12k + – 1/2 LT1469 RLPF VOUT CLPF 80kHz FILTER 30kHz FILTER 100 1k 10k FREQUENCY (Hz) 100k 1469 TA01a 1469fa 1 LT1469 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V + to V–).................................36V Input Current (Note 2)..........................................±10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4).... –40°C to 85°C Specified Temperature Range (Note 5) .... –40°C to 85°C Maximum Junction Temperature........................... 150°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) S8 and N8 Package ........................................... 300°C PIN CONFIGURATION TOP VIEW OUT A –IN A +IN A V– N/C N/C 1 2 3 4 5 6 A B 13 12 V+ 11 OUT B 10 –IN B 9 +IN B 8 N/C 7 N/C N8 PACKAGE 8-LEAD PDIP S8 PACKAGE 8-LEAD PLASTIC SO OUT A 1 –IN A 2 A +IN A 3 V– B 4 5 6 –IN B +IN B TOP VIEW 8 7 V+ OUT B DF PACKAGE 12-LEAD (4mm × 4mm) PLASTIC DFN TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 13) MUST BE CONNECTED TO V– TJMAX = 150°C, θJA = 130°C/W (N8) TJMAX = 150°C, θJA = 190°C/W (S8) ORDER INFORMATION LEAD FREE FINISH LT1469CN8#PBF LT1469IN8#PBF LT1469CS8#PBF LT1469IS8#PBF LT1469ACDF#PBF LT1469AIDF#PBF LT1469CDF#PBF LT1469IDF#PBF LEAD BASED FINISH LT1469CN8 LT1469IN8 LT1469CS8 LT1469IS8 TAPE AND REEL NA NA LT1469CS8#TRPBF LT1469IS8#TRPBF LT1469ACDF#TRPBF LT1469AIDF#TRPBF LT1469CDF#TRPBF LT1469IDF#TRPBF TAPE AND REEL NA NA LT1469CS8#TR LT1469IS8#TR PART MARKING* LT1469CN8 LT1469IN8 1469 1469I 1469 1469 1469 1469 PART MARKING LT1469CN8 LT1469IN8 1469 1469I PACKAGE DESCRIPTION 8-Lead PDIP 8-Lead PDIP 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 12-Lead (4mm × 4mm) Plastic DFN 12-Lead (4mm × 4mm) Plastic DFN 12-Lead (4mm × 4mm) Plastic DFN 12-Lead (4mm × 4mm) Plastic DFN PACKAGE DESCRIPTION 8-Lead PDIP 8-Lead PDIP 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline TEMPERATURE RANGE 0°C to 70°C –40°C to 85°C 0°C to 70°C –40°C to 85°C 0°C to 70°C –40°C to 85°C 0°C to 70°C –40°C to 85°C TEMPERATURE RANGE 0°C to 70°C –40°C to 85°C 0°C to 70°C –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 1469fa 2 LT1469 ELECTRICAL CHARACTERISTICS SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS N8, S8 Packages LT1469A, DF Package LT1469, DF Package IOS IB – IB + en in RIN CIN VCM Input Offset Current Inverting Input Bias Current Noninverting Input Bias Current Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Input Resistance Input Capacitance Input Voltage Range (Positive) Input Voltage Range (Negative) CMRR Common Mode Rejection Ratio Minimum Supply Voltage PSRR AVOL Power Supply Rejection Ratio Large-Signal Voltage Gain Guaranteed by CMRR Guaranteed by CMRR VCM = ±12.5V VCM = ±2.5V Guaranteed by PSRR VS = ±4.5V to ±15V VOUT = ±12.5V, RL = 10k VOUT = ±12.5V, RL = 2k VOUT = ±2.5V, RL = 10k VOUT = ±2.5V, RL = 2k RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive VOUT = ±12.5V, 1mV Overdrive VOUT = ±2.5V, 1mV Overdrive VOUT = 0V, 0.2V Overdrive (Note 3) AV = –10, RL = 2k (Note 6) 10V Peak, (Note 7) 3V Peak, (Note 7) f = 100kHz, RL = 2k AV = 1, 10% to 90%, 0.1V Step AV = 1, 0.1V Step AV = 1, 50% VIN to 50% VOUT, 0.1V Step ±15V ±15V ±5V ±5V ±15V ±15V ±5V ±5V ±15V ±5V ±15V ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V 60 55 100 300 300 200 200 ±13.0 ±12.8 ±3.0 ±2.8 ±15 ±15 ±25 15 11 0.1Hz to 10Hz f = 10kHz f = 10kHz Common Mode, VCM = ±12.5V Differential TA = 25°C, VCM = 0V unless otherwise noted. VSUPPLY ±15V ±5V ±15V ±5V ±15V ±5V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±15V ±15V ±15V ±15V ±5V ±15V ±5V ±15V ±5V 96 96 12.5 2.5 100 50 MIN TYP 50 50 50 50 100 150 13 3 –10 0.3 5 0.6 240 150 4 13.5 3.6 –14.3 –4.4 110 112 ±2.5 112 2000 2000 8000 8000 ±13.6 ±13.5 ±3.7 ±3.6 ±22 ±22 ±40 22 17 350 900 90 88 11 12 30 35 9 10 ±4.5 –12.5 –2.5 MAX 125 200 125 200 225 300 ±50 ±10 ±40 UNITS μV μV μV μV μV μV nA nA nA μVP-P nV/√Hz pA/√Hz MΩ kΩ pF V V V V dB dB V dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/μs V/μs kHz kHz MHz MHz ns ns % % ns ns VOUT Maximum Output Swing IOUT ISC SR FPBW GBW tr, tf OS tPD Maximum Output Current Output Short-Circuit Current Slew Rate Full-Power Bandwidth Gain Bandwidth Product Rise Time, Fall Time Overshoot Propagation Delay 1469fa 3 LT1469 ELECTRICAL CHARACTERISTICS SYMBOL tS PARAMETER Settling Time CONDITIONS 10V Step, 0.01%, AV = –1 10V Step, 150μV, AV = –1 5V Step, 0.01%, AV = –1 AV = –1, VOUT = 10VP-P, f = 100kHz AV = 1, VOUT = 20VP-P, f = 1kHz AV = 1, f = 100kHz VOUT = ±12.5V, RL = 2k VOUT = ±2.5V, RL = 2k Per Amplifier S8, DF A-Grade TA = 25°C. VCM = 0V unless otherwise noted. VSUPPLY ±15V ±15V ±5V ±15V ±15V ±15V ±15V ±5V ±15V ±5V ±15V ±5V ±5V to ±15V ±5V to ±15V 100 100 MIN TYP 760 900 770 –96.5 –125 0.02 130 130 4.1 3.8 30 50 2 5 93 93 97 113 115 115 5.2 5 225 350 18 78 MAX UNITS ns ns ns dB dB Ω dB dB mA mA μV μV nA nA dB dB dB THD ROUT Total Harmonic Distortion Output Resistance Channel Separation IS ΔVOS ΔIB– ΔIB+ ΔCMRR ΔPSRR Supply Current Input Offset Voltage Match Inverting Input Bias Current Match Noninverting Input Bias Current Match Common Mode Rejection Match Power Supply Rejection Match VCM = ±12.5V (Note 9) VCM = ±2.5V (Note 9) VS = ±4.5V to ±15V (Note 9) ±15V ±5V The l denotes the specifications which apply over the full operating temperature range, 0°C ≤ TA ≤ 70°C. VCM = 0V unless otherwise noted. SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS N8, S8 Packages LT1469A, DF Package LT1469, DF Package ΔVOS/ΔT IOS ΔIOS/ΔT IB – ΔIB–/ΔT IB + VCM Input Offset Voltage Drift Input Offset Current Input Offset Current Drift Inverting Input Bias Current Inverting Input Bias Current Drift Noninverting Input Bias Current Input Voltage Range (Positive) Input Voltage Range (Negative) CMRR Common Mode Rejection Ratio Minimum Supply Voltage PSRR AVOL Power Supply Rejection Ratio Large-Signal Voltage Gain Guaranteed by CMRR Guaranteed by CMRR VCM = ±12.5V VCM = ±2.5V Guaranteed by PSRR VS = ±4.5V to ±15V VOUT = ±12.5V, RL = 10k VOUT = ±12.5V, RL = 2k VOUT = ±2.5V, RL = 10k VOUT = ±2.5V, RL = 2k ±15V ±15V ±5V ±5V (Note 8) (Note 8) (Note 8) VSUPPLY ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±15V ±5V ±15V ±5V ±15V ±5V ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● MIN TYP MAX 350 350 225 275 450 450 UNITS μV μV μV μV μV μV μV/°C μV/°C nA pA/°C nA pA/°C nA V V 1 1 60 5 3 ±80 ±20 40 ±60 12.5 2.5 –12.5 –2.5 94 94 ± 4.5 95 100 100 100 100 V V dB dB V dB V/mV V/mV V/mV V/mV 1469fa 4 LT1469 ELECTRICAL CHARACTERISTICS SYMBOL VOUT PARAMETER Maximum Output Swing The l denotes the specifications which apply over the full operating temperature range, 0°C ≤ TA ≤ 70°C. VCM = 0V unless otherwise noted. CONDITIONS RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive VOUT = ±12.5V, 1mV Overdrive VOUT = ±2.5V, 1mV Overdrive VOUT = 0V, 0.2V Overdrive (Note 3) AV = –10, RL = 2k (Note 6) f = 100kHz, RL = 2k VOUT = ±12.5V, RL = 2k VOUT = ±2.5V, RL = 2k Per Amplifier S8, DF A-Grade VSUPPLY ±15V ±15V ±5V ±5V ±15V ±5V ±15V ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±5V to ±15V ±5V to ±15V VCM = ±12.5V (Note 9) VCM = ±2.5V (Note 9) VS = ±4.5V to ±15V (Note 9) ±15V ±5V ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● MIN ±12.9 ±12.7 ±2.9 ±2.7 ±12.5 ±12.5 ±17 13 9 55 50 98 98 TYP MAX UNITS V V V V mA mA mA V/μs V/μs MHz MHz dB dB IOUT ISC SR GBW Maximum Output Current Output Short-Circuit Current Slew Rate Gain Bandwidth Product Channel Separation IS ΔVOS ΔIB – ΔIB + ΔCMRR ΔPSRR Supply Current Input Offset Voltage Match Inverting Input Bias Current Match Noninverting Input Bias Current Match Common Mode Rejection Match Power Supply Rejection Match 6.5 6.3 600 600 38 118 91 91 92 mA mA μV μV nA nA dB dB dB The l denotes the specifications which apply over the full operating temperature range, –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. (Note 5) SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS N8, S8 Packages LT1469A, DF Package LT1469, DF Package ΔVOS/ΔT IOS ΔIOS/ΔT IB – ΔIB–/ΔT IB + VCM Input Offset Voltage Drift Input Offset Current Input Offset Current Drift Inverting Input Bias Current Inverting Input Bias Current Drift Noninverting Input Bias Current Input Voltage Range (Positive) Input Voltage Range (Negative) Guaranteed by CMRR Guaranteed by CMRR (Note 8) (Note 8) (Note 8) VSUPPLY ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±5V to ±15V ±15V ±5V ±15V ±5V ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● MIN TYP MAX 500 500 300 350 600 600 UNITS μV μV μV μV μV μV μV/°C μV/°C nA pA/°C nA pA/°C nA V V 1 1 120 6 5 ±120 ±40 80 ±80 12.5 2.5 –12.5 –2.5 V V 1469fa 5 LT1469 ELECTRICAL CHARACTERISTICS SYMBOL CMRR PARAMETER Common Mode Rejection Ratio Minimum Supply Voltage PSRR AVOL Power Supply Rejection Ratio Large-Signal Voltage Gain CONDITIONS VCM = ± 12.5V VCM = ±2.5V Guaranteed by PSRR VS = ±4.5V to ±15V VOUT = ±12,5V, RL = 10k VOUT = ±12.5V, RL = 2k VOUT = ±2.5V, RL = 10k VOUT = ±2.5V, RL = 2k RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive VOUT = ±12.5V, 1mV Overdrive VOUT = ±2.5V, 1mV Overdrive VOUT = 0V, 0.2V Overdrive (Note 3) AV = –10, RL = 2k (Note 6) f = 100kHz, RL = 2k VOUT = ±12.5V, RL = 2k VOUT = ±2.5V, RL = 2k Per Amplifier S8, DF A-Grade ±15V ±15V ±5V ±5V ±15V ±15V ±5V ±5V ±15V ±5V ±15V ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±15V ±5V ±5V to ±15V ±5V to ±15V VCM = ±12.5V (Note 9) VCM = ±2.5V (Note 9) VS = ±4.5V to ±15V (Note 9) ±15V ±5V The l denotes the specifications which apply over the full operating temperature range, –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. (Note 5) VSUPPLY ±15V ±5V ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● MIN 92 92 93 75 75 75 75 ±12.8 ±12.6 ±2.8 ±2.6 ±7 ±7 ±12 9 6 45 40 96 96 TYP MAX ±4.5 UNITS dB dB V dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/μs V/μs MHz MHz dB dB VOUT Maximum Output Swing IOUT ISC SR GBW Maximum Output Current Output Short-Circuit Current Slew Rate Gain Bandwidth Product Channel Separation IS ΔVOS ΔIB – ΔIB + ΔCMRR ΔPSRR Supply Current Input Offset Voltage Match Inverting Input Bias Current Match Noninverting Input Bias Current Match Common Mode Rejection Match Power Supply Rejection Match 7 6.8 800 800 78 158 89 89 90 mA mA μV μV nA nA dB dB dB Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes and two 100Ω series resistors. If the differential input voltage exceeds 0.7V, the input current should be limited to less than 10mA. Input voltages outside the supplies will be clamped by ESD protection devices and input currents should also be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 4: The LT1469C and LT1469I are guaranteed functional over the operating temperature range of – 40°C to 85°C. Note 5: The LT1469C is guaranteed to meet specified performance from 0°C to 70°C and is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LT1469I is guaranteed to meet specified performance from –40°C to 85°C. Note 6: Slew rate is measured between ±8V on the output with ±12V swing for ±15V supplies and ±2V on the output with ±3V swing for ±5V supplies. Note 7: Full-power bandwidth is calculated from the slew rate. FPBW = SR/2πVP. Note 8: This parameter is not 100% tested. Note 9: ΔCMRR and ΔPSRR are defined as follows: 1) CMRR and PSRR are measured in μV/V on each amplifier; 2) the difference between the two sides is calculated in μV/V; 3) the result is converted to dB. 1469fa 6 LT1469 TYPICAL PERFORMANCE CHARACTERISTICS Distribution of Input Offset Voltage 50 VS = ±15V TA = 25°C PERCENTAGE OF UNITS (%) PERCENTAGE OF UNITS (%) 40 30 40 VS = ±15V TA = 25°C 5 SUPPLY CURRENT (mA) 25°C 4 Distribution of Inverting Input Bias Current 6 Supply Current vs Supply Voltage and Temperature 85°C 30 20 20 3 –40°C 2 10 10 0 –175 –125 –75 –25 25 75 125 INPUT OFFSET VOLTAGE (μV) 175 0 –10 –7.5 –5 –2.5 0 2.5 5 7.5 INVERTING INPUT BIAS CURRENT (nA) 10 1 0 5 10 15 SUPPLY VOLTAGE (±V) 20 1469 G03 1469 G01 1469 G02 Input Noise Spectral Density 1000 INPUT VOLTAGE NOISE (nV/√Hz) VS = ±15V TA = 25°C AV = 101 RS = 100k FOR in 1 10 INPUT CURRENT NOISE (pA/√Hz) 0.1Hz to 10Hz Voltage Noise VS = ±15V TA = 25°C TOTAL NOISE VOLTAGE (nV/√Hz) VOLTAGE NOISE (100nV/DIV) 100 Total Noise vs Unmatched Source Resistance VS = ±15V TA = 25°C f = 10kHz 10 TOTAL NOISE RESISTOR NOISE ONLY 1 RS 100 in en 10 0.1 + – 1 1 10 100 1k FREQUENCY (Hz) 10k 0.01 100k 1469 G04 0.1 TIME (1s/DIV) 1469 G05 10 100 1k 10k SOURCE RESISTANCE, RS (Ω) 100k 1469 G06 Input Bias Current vs Temperature 30 VS = ±15V 20 INPUT BIAS CURRENT (nA) INPUT BIAS CURRENT (nA) 10 0 –10 –20 –30 –40 –50 –25 IB+ IB– 80 60 40 20 0 –20 –40 –60 50 25 75 0 TEMPERATURE (°C) 100 125 Input Bias Current vs Input Common Mode Voltage V+ VS = ±15V TA = 25°C COMMON MODE RANGE (V) –0.5 –1.0 –1.5 –2.0 Input Common Mode Range vs Supply Voltage TA = 25°C ΔVOS < 100μV IB– IB+ 2.0 1.5 1.0 0.5 V– –80 –15 5 10 0 INPUT COMMON MODE VOLTAGE (V) –10 –5 15 0 3 9 12 6 SUPPLY VOLTAGE (±V) 15 18 1469 G09 1469 G07 1469 G08 1469fa 7 LT1469 TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage Swing vs Supply Voltage V+ –1 OUTPUT VOLTAGE SWING (V) –2 –3 –4 4 3 2 1 V– 0 TA = 25°C RL = 2k RL = 10k 10 15 5 SUPPLY VOLTAGE (±V) 20 1469 G10 Output Voltage Swing vs Load Current V+ –0.5 –1.0 OUTPUT VOLTAGE SWING (V) –1.5 –2.0 –2.5 25°C –40°C OUTPUT SHORT-CIRCUIT CURRENT (mA) VS = ±15V 60 85°C 55 50 45 40 35 30 25 20 15 Output Short-Circuit Current vs Temperature VS = ±15V VIN = ±0.2V SOURCE SINK RL = 10k RL = 2k 2.5 2.0 1.5 1.0 –40°C 25°C 85°C V– 0.5 –20 –15 –10 –5 0 10 5 OUTPUT CURRENT (mA) 15 20 10 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 1469 G11 1469 G12 Settling Time to 0.01% vs Output Step, VS = ± 15V 10 8 6 OUTPUT STEP (V) 4 2 0 –2 –4 –6 –8 –10 0 200 AV = 1 AV = –1 VS = ±15V TA = 25°C RL = 1k 5 AV = –1 AV = 1 OUTPUT STEP (V) 4 3 2 1 0 –1 –2 –3 –4 1000 1469 G13 Settling Time to 0.01% vs Output Step, VS = ± 5V VS = ±5V TA = 25°C RL = 1k 10 AV = 1 AV = –1 OUTPUT STEP (V) 8 6 4 2 0 –2 –4 –6 –8 400 600 700 500 SETTLING TIME (ns) 800 1469 G14 Settling Time to 150μV vs Output Step VS = ±15V TA = 25°C AV = –1 RF = RG = 2k CF = 8pF AV = 1 AV = –1 600 800 400 SETTLING TIME (ns) –5 300 –10 0 200 600 800 400 SETTLING TIME (ns) 1000 1469 G15 Open-Loop Gain vs Resistive Load 140 135 OPEN-LOOP GAIN (dB) OPEN-LOOP GAIN (dB) VS = ±5V 130 125 VS = ±15V 120 115 110 10 100 1k LOAD RESISTANCE (Ω) 10k 1469 G16 Open-Loop Gain vs Temperature 160 150 VS = ±5V 140 130 120 110 100 90 –50 –25 VS = ±15V GAIN (dB) RL = 2k 140 120 100 80 60 Open-Loop Gain vs Frequency TA = 25°C AV = –1 RF = RG = 5.1k CF = 5pF RL = 2k TA = 25°C VS = ±5V 40 20 0 VS = ±15V 50 25 75 0 TEMPERATURE (°C) 100 125 –20 10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 1469 G18 1469 G17 1469fa 8 LT1469 TYPICAL PERFORMANCE CHARACTERISTICS Open-Loop Gain and Phase vs Frequency 70 60 PHASE 50 GAIN (dB) 40 ±5V 30 GAIN 20 10 0 TA = 25°C AV = –1 RF = RG = 5.1k CF = 5pF RL = 2k 100k ±15V –20 ±5V –40 –60 100M 1469 G19 Gain Bandwidth and Phase Margin vs Supply Voltage 100 80 TA = 25°C AV = –1 RF = RG = 5.1k CF = 5pF RL = 2k PHASE (DEG) 92 GAIN BANDWIDTH (MHz) 90 88 GAIN BANDWIDTH 86 84 82 0 10 5 15 SUPPLY VOLTAGE (±V) 20 1469 G20 Gain Bandwidth and Phase Margin vs Temperature 40 38 42 PHASE MARGIN (DEG) PHASE MARGIN 40 VS = ±15V VS = ±5V GAIN BANDWIDTH (MHz) 94 92 90 88 86 84 –55 –25 50 25 0 75 TEMPERATURE (°C) 100 125 VS = ±5V GAIN BANDWIDTH VS = ±15V 38 36 34 32 30 PHASE MARGIN (DEG) ±15V 60 40 20 0 PHASE MARGIN 36 34 32 –10 10k 1M 10M FREQUENCY (Hz) 1469 G21 Gain vs Frequency, AV = 1 5 4 3 2 GAIN (dB) GAIN (dB) 1 0 –1 –2 –3 –4 –5 100k 1M 10M FREQUENCY (Hz) 100M 1469 G22 Gain vs Frequency, AV = – 1 5 14 RF = RG = 2k VS = ±5V VS = ±15V GAIN (dB) 12 10 8 6 4 2 0 TA = 25°C AV = –1 RL = 2k CF = 5pF 1M 10M FREQUENCY (Hz) 100M 1469 G23 Gain vs Frequency, AV = 1 VS = ±15V TA = 25°C AV = 1 NO RL 100pF 50pF 20pF 10pF TA = 25°C AV = 1 RL = 2k VS = ±5V VS = ±15V 4 3 2 1 0 –1 –2 –3 –4 RF = RG = 5.1k VS = ±5V VS = ±15V –2 –4 –6 100k 1M 10M FREQUENCY (Hz) 100M 1469 G24 –5 100k Gain vs Frequency, AV = – 1 14 12 10 8 GAIN (dB) 6 4 2 0 –2 –4 –6 100k 1M 10M FREQUENCY (Hz) 100M 1469 G25 Slew Rate vs Supply Voltage 30 TA = 25°C 28 AV = –1 RL = 2k 45 40 –SR 35 SLEW RATE (V/μs) Slew Rate vs Temperature VS = ±15V AV = –1 RL = 2k –SR 30 25 20 15 10 +SR SLEW RATE (V/μs) VS = ±15V TA = 25°C AV = –1 RF = RG = 5.1k CF = 5pF NO RL 200pF 300pF 26 24 22 20 18 16 14 0 10 5 15 SUPPLY VOLTAGE (±V) 20 1469 G26 +SR 100pF 50pF 5 –50 –25 0 75 50 25 TEMPERATURE (°C) 100 125 1469 G27 1469fa 9 LT1469 TYPICAL PERFORMANCE CHARACTERISTICS Power Supply Rejection Ratio vs Frequency 160 POWER SUPPLY REJECTION RATIO (dB) 140 120 100 80 60 40 20 0 100 1k 10k 1M 100k FREQUENCY (Hz) 10M 100M 1469 G28 Common Mode Rejection Ratio vs Frequency 120 COMMON MODE REJECTION RATIO (dB) 100 80 60 40 20 0 100 VS = ±15V TA = 25°C RL = 2k 140 120 CHANNEL SEPARATION (dB) 100 80 60 40 20 Channel Separation vs Frequency VS = ±15V TA = 25°C RL = 2k VS = ±15V TA = 25°C RL = 2k +PSRR –PSRR 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 0 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 1469 G29 1469 G30 Undistorted Output Swing vs Frequency, VS = ± 5V 10 9 OUTPUT VOLTAGE SWING (VP-P) 8 7 6 5 4 3 2 1 0 1 10 100 FREQUENCY (kHz) 1000 1469 G31 Undistorted Output Swing vs Frequency, VS = ± 15V 30 OUTPUT VOLTAGE SWING (VP-P) 25 20 AV = –1 15 10 5 0 1 10 100 FREQUENCY (kHz) 1000 1469 G32 Output Impedance vs Frequency 100 VS = ±15V TA = 25°C AV = 100 1 AV = 10 0.1 AV = 1 AV = 1 AV = –1 VS = ±15V TA = 25°C RL = 2k THD < 1% OUTPUT IMPEDANCE (Ω) VS = ±5V TA = 25°C RL = 2k THD < 1% AV = 1 10 0.01 0.001 10k 100k 1M 10M FREQUENCY (Hz) 100M 1469 G33 Total Harmonic Distortion vs Frequency –80 TOTAL HARMONIC DISTORTION (dB) VS = ±15V AV = 2 RL = 2k VOUT = 10VP-P THD + NOISE (dB) –50 –60 Total Harmonic Distortion + Noise vs Amplitude 10 0 OFFSET VOLTAGE DRIFT (μV) VS = ±5V –70 VS = ±15V –80 –90 –10 –20 –30 –40 –50 –60 –70 10 1469 G35 Warm-Up Drift vs Time –90 N8 ±5V S0-8 ±5V –100 N8 ±15V –110 –120 –100 –130 100 1k 10k FREQUENCY (Hz) 100k 1469 G34 –110 0.01 TA = 25°C AV = 1 RL = 600Ω f = 10kHz NOISE BW = 80kHz 0.1 1 OUTPUT SIGNAL (VRMS) S0-8 ±15V –80 0 20 40 60 80 100 120 TIME AFTER POWER UP (s) 140 1469 G36 1469fa 10 LT1469 TYPICAL PERFORMANCE CHARACTERISTICS Small-Signal Transient, AV = 1 Small-Signal Transient, AV = – 1 VS = ±15V 1469 G37 VS = ±15V 1469 G38 Large-Signal Transient, AV = 1 Large-Signal Transient, AV = – 1 VS = ±15V 1469 G39 VS = ±15V 1469 G40 APPLICATIONS INFORMATION Layout and Passive Components The LT1469 requires attention to detail in board layout in order to maximize DC and AC performance. For best AC results (for example, fast settling time) use a ground plane, short lead lengths and RF quality bypass capacitors (0.01μF to 0.1μF) in parallel with low ESR bypass capacitors (1μF to 10μF tantalum). For best DC performance, use “star” grounding techniques, equalize input trace lengths and minimize leakage (e.g., 1.5GΩ of leakage between an input and a 15V supply will generate 10nA—equal to the maximum IB – specification). Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs: for inverting configurations tie the ring to ground, in noninverting connections tie the ring to the inverting input (note the input capacitance will increase which may require a compensating capacitor as discussed below). Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the inputs can exceed the inherent drift of 1469fa 11 LT1469 APPLICATIONS INFORMATION the amplifier. Air currents over device leads should be minimized, package leads should be short and the two input leads should be as close together as possible and maintained at the same temperature. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause peaking or even oscillations. For feedback resistors greater than 2k, a feedback capacitor of value CF > RG • CIN/RF should be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is one, and a large feedback resistor is used, CF should be greater than or equal to CIN. An example would be a DAC I-to-V converter as shown on the front page of the data sheet where the DAC can have many tens of picofarads of output capacitance. Another example would be a gain of –1 with 5k resistors; a 5pF to 10pF capacitor should be added across the feedback resistor. Input Considerations Each input of the LT1469 is protected with a 100Ω series resistor and back-to-back diodes across the bases of the input devices. If large differential input voltages are anticipated, limit the input current to less than 10mA with an external series resistor. Each input also has two ESD clamp diodes—one to each supply. If an input is driven beyond the supply, limit the current with an external resistor to less than 10mA. CF The LT1469 employs bias current cancellation at the inputs. The inverting input current is trimmed at zero common mode voltage to minimize errors in inverting applications such as I-to-V converters. The noninverting input current is not trimmed and has a wider variation and therefore a larger maximum value. As the input offset current can be greater than either input current, the use of balanced source resistance is NOT recommended as it actually degrades DC accuracy and also increases noise. The input bias currents vary with common mode voltage. The cancellation circuitry was not designed to track this common mode voltage because the settling time would have been adversely affected. The LT1469 inputs can be driven to the negative supply and to within 0.5V of the positive supply without phase reversal. As the input moves closer than 0.5V to the positive supply, the output reverses phase. Total Input Noise The total input noise of the LT1469 is optimized for a source resistance between 1k and 20k. Within this range, the total input noise is dominated by the noise of the source resistance itself. When the source resistance is below 1k, voltage noise of the amplifier dominates. When the source resistance is above 20k, the input noise current is the dominant contributor. V+ RG CIN VIN RF – 1/2 LT1469 VOUT +IN R1 100Ω Q1 R1 Q2 100Ω –IN + 1469 F01 Figure 1. Nulling Input Capacitance V– 1469 F02 Figure 2. Input Stage Protection 1469fa 12 LT1469 APPLICATIONS INFORMATION Capacitive Loading The LT1469 drives capacitive loads of up to 100pF in unitygain and 300pF in a gain of –1. When there is a need to drive a larger capacitive load, a small series resistor should be inserted between the output and the load. In addition, a capacitor should be added between the output and the inverting input as shown in Figure 3. Settling Time The LT1469 is a single stage amplifier with an optimal thermal layout that leads to outstanding settling performance. Measuring settling even at the 12-bit level is very challenging, and at the 16-bit level requires a great deal of subtlety and expertise. Fortunately, there are two excellent Linear Technology reference sources for settling RF RO ≥ (1 + RF/RG)/(2 • CL • 5MHz) RF ≥ 10RO CF = (2RO/RF)CL RG CF measurements—Application Notes 47 and 74. Appendix B of AN47 is a vital primer on 12-bit settling measurements and AN74 extends the state-of-the-art while concentrating on settling time with a 16-bit current output DAC input. The settling of the DAC I-to-V converter on the front page was measured using the exact methods of AN74. The optimum nulling of the DAC output capacitance requires 15pF across the 12k feedback resistor. The theoretical limit for 16-bit settling is 11.1 times this RC time constant or 2μs. The actual settling time is 2.4μs at the output of the LT1469. The RC output noise filter adds a slight settling time delay but reduces the noise bandwidth to 1.6MHz which increases the output resolution for 16-bit accuracy. – 1/2 LT1469 VIN RO VOUT CL 1469 F03 + Figure 3. Driving Capacitive Loads 1469fa 13 LT1469 TYPICAL APPLICATIONS Ultralow Distortion Balanced Audio Line Driver INPUT 22pF VS = ±15V GAIN = 6dB TOTAL HARMONIC DISTORTION + NOISE 0.00025% 0.0008% 0.0006% *1dBu = 1 milliwatt into 600Ω 14 – 20k – 20k + ZIN = 10kΩ – 10k – 2.1k 22pF 33.2Ω 10k + 1/2 LT1364 + 1/2 LT1469 1k 1/2 LT1469 22.1k 22pF 30.1Ω 820pF 50 FEET SHIELDED TWISTED PAIR CABLE 600Ω 30.1Ω 820pF THD + N MEASURED HERE 33.2Ω PARALLEL COMPOSITE TOPOLOGY: LT1364 PROVIDES OUTPUT CURRENT; LT1469 PRESERVES LINEARITY + 1/2 LT1364 24.3k 22pF VOUT 10VRMS 10VRMS 26dBu FREQUENCY 1kHz 20Hz TO 20kHz 1kHz MEASUREMENT BANDWIDTH 22kHz 80kHz 22kHz 1469 TA02 1469fa LT1469 TYPICAL APPLICATIONS Extending 16-Bit DAC Performance to 200V Output Swing 1μF 125V 510Ω VOUT = 200VP-P IOUT = 25mA THD + N = –90dB at 100Hz 10k VREF 50k 100pF 16 BITS LTC1597 RSELECT*** TYPICAL 19.994k** 6Ω 1M 15V 330pF 330Ω Q1 2N5415 Q3 2N3440* Q5 2N2222 1N4148 1N4148 1k 27Ω OUTPUT 27Ω 1k Q3 2N5415* Q2 2N3440 1/2 LT1469 *HEAT SINK **VISHAY S102 RESISTOR 0.01% ***1% METAL FILM RESISTOR NOTE: FOR FURTHER EXPLANATION, REFER TO APPLICATION NOTE 74, APPENDIX H + 50k –15V 1M 510Ω 1μF – 1/2 LT1469 RFB + – Q6 2N2907 330Ω –125V 50k** 50k** 50k** 50k** 15pF 1469 TA03 1469fa 15 LT1469 SIMPLIFIED SCHEMATIC V+ I1 I2 Q8 +IN Q1 Q2 –IN Q5 Q6 Q7 Q3 Q4 BIAS C Q11 I5 Q10 Q9 OUT I3 V– I4 I6 1469 SS 1469fa 16 LT1469 PACKAGE DESCRIPTION DF Package 12-Lead Plastic DFN (4mm × 4mm) (Reference LTC DWG # 05-08-1773 Rev Ø) 2.50 REF 0.70 ± 0.05 4.50 ± 0.05 3.10 ± 0.05 3.38 ±0.05 2.65 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ± 0.10 (4 SIDES) 2.50 REF 7 12 0.40 ± 0.10 3.38 ±0.10 2.65 ± 0.10 PIN 1 TOP MARK (NOTE 6) 6 R = 0.115 TYP 0.75 ± 0.05 1 0.25 ± 0.05 0.50 BSC PIN 1 NOTCH R = 0.20 TYP OR 0.35 × 45° CHAMFER (DF12) DFN 0806 REV Ø 0.200 REF BOTTOM VIEW—EXPOSED PAD 0.00 – 0.05 NOTE: 1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 1469fa 17 LT1469 PACKAGE DESCRIPTION N8 Package 8-Lead PDIP (Narrow 0.300) (Reference LTC DWG # 05-08-1510) .400* (10.160) MAX 8 7 6 5 .255 ± .015* (6.477 ± 0.381) 1 .300 – .325 (7.620 – 8.255) 2 3 4 .130 ± .005 (3.302 ± 0.127) .045 – .065 (1.143 – 1.651) .008 – .015 (0.203 – 0.381) +.035 .325 –.015 .065 (1.651) TYP .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076) N8 1002 ( 8.255 +0.889 –0.381 ) .100 (2.54) BSC INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) NOTE: 1. DIMENSIONS ARE 1469fa 18 LT1469 PACKAGE DESCRIPTION S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (Reference LTC DWG # 05-08-1610) .050 BSC .045 ±.005 8 .189 – .197 (4.801 – 5.004) NOTE 3 7 6 5 .245 MIN .160 ±.005 .228 – .244 (5.791 – 6.197) .150 – .157 (3.810 – 3.988) NOTE 3 .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN 0°– 8° TYP 1 2 3 4 .053 – .069 (1.346 – 1.752) .004 – .010 (0.101 – 0.254) INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .014 – .019 (0.355 – 0.483) TYP .050 (1.270) BSC SO8 0303 1469fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1469 TYPICAL APPLICATION 16-Bit Accurate Single Ended to Differential ADC Buffer 5V RS VIN 4096 Point FFT of ADC Output + 1/2 LT1469 100Ω 5V 3000pF 10pF +IN LTC1604 –IN 2k 3000pF 1469 TA04 0 –20 –40 –60 –80 –100 –120 –140 fSAMPLE = 333ksps VIN = ±1.25V fIN = 100kHz VS = ±5V – 2k 16 BITS 333ksps ADC OUTPUTS – 1/2 LT1469 100Ω –5V + –5V AMPLITUDE (dB) 0 20 40 60 80 100 120 140 160 FREQUENCY (kHz) 1469 TA04a RELATED PARTS PART NUMBER LT1167 LT1468 LT1468-2 LT1469-2 LTC1597 LTC1604 LTC1605 LT1723 LT1801 LT6221 LTC6244HV DESCRIPTION Precision Instrumentation Amplifier Single 90MHz, 22V/μs, 16-Bit Accurate Op Amp Single 200MHz, 30V/μs, 16-Bit Accurate AV ≥ 2 Op Amp Dual 200MHz, 30V/μs, 16-Bit Accurate AV ≥ 2 Op Amp 16-Bit Parallel Multiplying IOUT DAC 16-Bit, 333ksps Sampling ADC Single 5V, 16-Bit, 100ksps Sampling ADC Dual 200MHz, 70V/μs Low Noise Precision Op Amp Dual 80MHz, 25V/μs Low Power Rail-to-Rail Precision Op Amp Dual 60MHz, 20V/μs Low Power Rail-to-Rail Precision Op Amp Dual 50MHz, Low Noise, Precision CMOS Op Amp COMMENTS Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain Nonlinearity 75μV VOS(MAX), Single Version of LT1469 75μV VOS(MAX) 75μV VOS(MAX) ±1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade ±1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors ± 2.5V Input, SINAD = 90dB, THD = –100dB Low Power, ±10V Inputs, Parallel/Byte Interface VS ≤ ±5V, en = 3.8nV/√Hz, –85dBc at 1MHz VS ≤ ±5V, ICC = 1.6mA, VOS ≤ 350μV VS ≤ ±5V, ICC = 0.9mA, VOS ≤ 350μV VS ≤ ±5V, VOS ≤ 100μV, IB ≤ 75pA LTC1595/LTC1596 16-Bit Serial Multiplying IOUT DAC 1469fa 20 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0808 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2000