LT1113AC

LT1113 Dual Low Noise, Precision, JFET Input Op Amps FEATURES s s s s s s s s s DESCRIPTIO 100% Tested Low Voltage Noise: 6nV/√Hz Max SO-8 Package Standard Pinout Voltage Gain: 1.2 Million Min Offset Voltage: 1.5mV Max Offset Voltage Drift: 15µV/°C Max Input Bias Current, Warmed Up: 450pA Max Gain Bandwidth Product: 5.6MHz Typ Guaranteed Specifications with ± 5V Supplies Guaranteed Matching Specifications The LT®1113 achieves a new standard of excellence in noise performance for a dual JFET op amp. The 4.5nV/√Hz 1kHz noise combined with low current noise and picoampere bias currents makes the LT1113 an ideal choice for amplifying low level signals from high impedance capacitive transducers. The LT1113 is unconditionally stable for gains of 1 or more, even with load capacitances up to 1000pF. Other key features are 0.4mV VOS and a voltage gain of 4 million. Each individual amplifier is 100% tested for voltage noise, slew rate and gain bandwidth. The design of the LT1113 has been optimized to achieve true precision performance with an industry standard pinout in the S0-8 package. A set of specifications are provided for ± 5V supplies and a full set of matching specifications are provided to facilitate the use of the LT1113 in matching dependent applications such as instrumentation amplifier front ends. , LTC and LT are registered trademarks of Linear Technology Corporation. APPLICATIO S s s s s s s Photocurrent Amplifiers Hydrophone Amplifiers High Sensitivity Piezoelectric Accelerometers Low Voltage and Current Noise Instrumentation Amplifier Front Ends Two and Three Op Amp Instrumentation Amplifiers Active Filters TYPICAL APPLICATIO 5V TO 15V Low Noise Hydrophone Amplifier with DC Servo R3 3.9k 1kHz Input Noise Voltage Distribution VS = ±15V TA = 25°C 138 S8 276 OP AMPS TESTED R2 C1* 200Ω –5V TO –15V CT HYDROPHONE R6 100k 7 1/2 LT1113 R7 1M DC OUTPUT ≤ 2.5mV FOR TA < 70°C OUTPUT VOLTAGE NOISE = 128nV/√Hz AT 1kHz (GAIN = 20) C1 ≈ CT ≈ 100pF TO 5000pF; R4C2 > R8CT; *OPTIONAL – R8 100M + + 3 1/2 LT1113 4 1 C2 0.47µF R4 1M R5 1M OUTPUT PERCENT OF UNITS (%) – R1* 100M 40 2 8 30 20 6 10 5 0 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 INPUT VOLTAGE NOISE (nV/√Hz) 1113 TA02 1113 TA01 U U U 1 LT1113 ABSOLUTE AXI U RATI GS (Note 1) Operating Temperature Range LT1113AC/LT1113C (Note 2) .......... – 40°C to 85°C LT1113AM/LT1113M .................... – 55°C to 125°C Specified Temperature Range LT1113AC/LT1113C (Note 3) .......... – 40°C to 85°C LT1113AM/LT1113M .................... – 55°C to 125°C Lead Temperature (Soldering, 10 sec) ................ 300°C Supply Voltage –55°C to 105°C ............................................... ± 20V 105°C to 125°C ............................................... ± 16V Differential Input Voltage ...................................... ± 40V Input Voltage (Equal to Supply Voltage) ............... ± 20V Output Short Circuit Duration .......................... 1 Minute Storage Temperature Range ................ – 65°C to 150°C PACKAGE/ORDER I FOR ATIO TOP VIEW OUT A 1 –IN A 2 +IN A 3 V– 4 J8 PACKAGE 8-LEAD CERDIP A B 8 V+ 7 OUT B 6 –IN B 5 +IN B ORDER PART NUMBER OUT A 1 N8 PACKAGE 8-LEAD PDIP LT1113AMJ8 LT1113MJ8 LT1113ACN8 LT1113CN8 TJMAX = 160°C, θJA = 100°C/W (J8) TJMAX = 150°C, θJA = 130°C/W (N8) Consult factory for Industrial grade parts. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS IOS IB en Input Offset Voltage VS = ± 5V Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density in RIN Input Noise Current Density Input Resistance Differential Mode Common Mode Input Capacitance VS = ± 5V Input Voltage Range (Note 7) Common Mode Rejection Ratio VCM = – 10V to 13V Power Supply Rejection Ratio VS = ± 4.5V to ± 20V Large-Signal Voltage Gain VO = ±12V, RL = 10k VO = ±10V, RL = 1k Warmed Up (Note 5) Warmed Up (Note 5) 0.1Hz to 10Hz fO = 10Hz fO = 1000Hz CONDITIONS (Note 4) VS = ± 15V, VCM = 0V, TA = 25°C, unless otherwise noted. MIN LT1113AM/AC TYP MAX 0.40 0.45 30 300 2.4 17 4.5 10 1011 1011 1010 14 27 13.0 –10.5 85 86 1200 600 13.5 –11.0 98 100 4800 4000 13.0 –10.5 82 83 1000 500 6.0 1.5 1.7 100 450 MIN LT1113M/C TYP MAX 0.50 0.55 35 320 2.4 17 4.5 10 1011 1011 1010 14 27 13.5 –11.0 95 98 4500 3000 6.0 1.8 2.0 150 480 UNITS mV mV pA pA µVP-P nV/√Hz nV/√Hz fA/√Hz Ω Ω Ω pF pF V V dB dB V/mV V/mV fO = 10Hz, fO = 1000Hz (Note 6) VCM = – 10V to 8V VCM = 8V to 11V CIN VCM CMRR PSRR AVOL 2 U U W WW U W TOP VIEW 8 V+ A B ORDER PART NUMBER LT1113CS8 S8 PART MARKING 1113 –IN A 2 +IN A 3 V– 4 7 OUT B 6 –IN B 5 +IN B S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 190°C/W LT1113 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOUT SR GBW tS Output Voltage Swing Slew Rate Gain Bandwidth Product Settling Time Channel Separation IS ∆VOS ∆ IB + VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted. LT1113AM/AC MIN TYP MAX ±13.5 ±12.0 2.3 4.0 ±13.8 ±13.0 3.9 5.6 4.2 130 5.3 5.3 0.8 10 81 82 94 95 6.25 6.20 2.5 80 78 80 MIN ±13.0 ±11.5 2.3 4.0 LT1113M/C TYP MAX ±13.8 ± 13.0 3.9 5.6 4.2 126 5.3 5.3 0.8 10 94 95 6.50 6.45 3.3 120 UNITS V V V/µs MHz µs dB mA mA mV pA dB dB CONDITIONS RL = 10k RL = 1k RL ≥ 2k (Note 9) fO = 100kHz 0.01%, AV = + 1, RL = 1k, CL ≤ 1000pF, 10V Step fO = 10Hz, VO = ±10V, RL = 1k VS = ± 5V Supply Current per Amplifier Offset Voltage Match Noninverting Bias Current Match Power Supply Rejection Match Warmed Up (Note 5) (Note 11) ∆CMRR Common Mode Rejection Match (Note 11) ∆PSRR The q denotes specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Note 12) SYMBOL PARAMETER VOS ∆VOS ∆Temp IOS IB VCM CMRR PSRR AVOL VOUT SR GBW IS ∆VOS ∆I B + CONDITIONS (Note 4) VS = ± 5V (Note 8) q q q q q q q MIN LT1113AC TYP MAX 0.6 0.7 7 50 600 2.1 2.3 15 350 1200 MIN LT1113C TYP MAX 0.7 0.8 8 55 700 2.5 2.7 20 450 1600 UNITS mV mV µV/°C pA pA V V dB dB V/mV V/mV V V V/µs MHz Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain Output Voltage Swing Slew Rate Gain Bandwidth Product Supply Current per Amplifier 12.9 –10.0 81 83 900 500 ±13.2 ±11.7 2.1 3.2 13.4 –10.8 97 99 3600 2600 ±13.5 ±12.7 3.7 4.5 5.3 5.3 0.9 30 6.35 6.30 3.5 300 12.9 –10.0 79 81 800 400 ±12.7 ±11.3 1.7 3.2 13.4 –10.8 94 97 3400 2400 ±13.5 ±12.7 3.7 4.5 5.3 5.3 0.9 35 6.55 6.50 4.5 400 VCM = – 10V to 12.9V VS = ± 4.5V to ± 20V VO = ±12V, RL = 10k VO = ±10V, RL = 1k RL = 10k RL = 1k RL ≥ 2k (Note 9) fO = 100kHz VS = ± 5V q q q q q q q q q q q q q q mA mA mV pA dB dB Offset Voltage Match Noninverting Bias Current Match Power Supply Rejection Match (Note 11) ∆CMRR Common Mode Rejection Match (Note 11) ∆PSRR 76 79 93 93 74 77 93 93 3 LT1113 The q denotes specifications which apply over the temperature range –40°C ≤ TA ≤ 85°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Note 10) SYMBOL PARAMETER VOS ∆VOS ∆Temp IOS IB VCM CMRR PSRR AVOL VOUT SR GBW IS ∆VOS ∆I B + ∆PSRR Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain Output Voltage Swing Slew Rate Gain Bandwidth Product Supply Current per Amplifier VS = ± 5V Offset Voltage Match Noninverting Bias Current Match Power Supply Rejection Match (Note 11) VCM = – 10V to 12.6V VS = ± 4.5V to ± 20V VO = ± 12V, RL = 10k VO = ± 10V, RL = 1k RL = 10k RL = 1k RL ≥ 2 k fO = 100kHz CONDITIONS (Note 4) VS = ± 5V q q q q q q q q q q q q q q q q q q q q q ELECTRICAL CHARACTERISTICS MIN LT1113AC TYP MAX 0.7 0.8 7 80 1750 2.4 2.6 15 700 3000 MIN LT1113C TYP MAX 0.8 0.9 8 90 1800 2.8 3.0 20 1000 5000 UNITS mV mV µV/°C pA pA V V dB dB V/mV V/mV V V V/µs MHz 12.6 –10.0 80 81 850 400 ± 13.0 ± 11.5 2.0 2.9 13.0 –10.5 96 98 3300 2200 ± 12.5 ± 12.0 3.5 4.3 5.30 5.25 1.0 50 6.35 6.30 4.4 600 12.6 –10.0 78 79 750 300 ± 12.5 ± 11.0 1.6 2.9 13.0 –10.5 93 96 3000 2000 ± 12.5 ± 12.0 3.5 4.3 5.30 5.25 1.0 55 6.55 6.50 5.1 900 mA mA mV pA dB dB ∆CMRR Common Mode Rejection Match (Note 11) 76 77 93 92 73 75 93 92 The q denotes specifications which apply over the temperature range –55°C ≤ TA ≤ 125°C. VS = ± 15V, VCM = 0V, unless otherwise noted. (Note 12) SYMBOL PARAMETER VOS ∆VOS ∆Temp IOS IB VCM CMRR PSRR Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio VCM = – 10V to 12.6V VS = ±4.5V to ±20V CONDITIONS (Note 4) VS = ± 5V (Note 8) q q q q q q q q q MIN LT1113AM TYP MAX 0.8 0.8 5 0.8 25 2.7 2.8 12 15 50 MIN LT1113M TYP MAX 0.9 0.9 8 1.0 27 3.3 3.4 15 25 70 UNITS mV mV µV/°C nA nA V V dB dB 12.6 –10.0 79 80 13.0 –10.4 95 97 12.6 –10.0 77 78 13.0 –10.4 92 95 4 LT1113 The q denotes specifications which apply over the temperature range – 55°C ≤ TA ≤ 125°C. VS = ± 15V, VCM = 0V, unless otherwise noted. (Note 12) SYMBOL PARAMETER AVOL VOUT SR GBW IS ∆VOS ∆I B + ELECTRICAL CHARACTERISTICS CONDITIONS (Note 4) VO = ± 12V, RL = 10k VO = ± 10V, RL = 1k RL = 10k RL = 1k RL ≥ 2k (Note 9) fO = 100kHz VS = ± 5V q q q q q q q q q q q q MIN 800 400 ±13.0 ±11.5 1.9 2.2 LT1113AM TYP MAX 2700 1500 ±12.5 ±12.0 3.3 3.4 5.30 5.25 1.0 1.8 6.35 6.30 5.0 12 MIN 700 300 ±12.5 ±11.0 1.6 2.2 LT1113M TYP MAX 2500 1000 ±12.5 ±12.0 3.3 3.4 5.30 5.25 1.0 2.0 6.55 6.50 5.5 20 UNITS V/mV V/mV V V V/µs MHz mA mA mV nA dB dB Large-Signal Voltage Gain Output Voltage Swing Slew Rate Gain Bandwidth Product Supply Current Per Amplifier Offset Voltage Match Noninverting Bias Current Match Power Supply Rejection Match ∆CMRR Common Mode Rejection Match (Note 11) ∆PSRR (Note 11) 75 76 92 91 73 74 92 91 Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The LT1113C is guaranteed functional over the Operating Temperature Range of –40°C to 85°C. The LT1113M is guaranteed functional over the Operating Temperature Range of – 55°C to 125°C. Note 3: The LT1113C is guaranteed to meet specified performance from 0°C to 70°C. The LT1113C is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. For guaranteed I grade parts, consult the factory. The LT1113M is guaranteed to meet specified performance from –55°C to 125°C. Note 4: Typical parameters are defined as the 60% yield of parameter distributions of individual amplifiers, i.e., out of 100 LT1113s (200 op amps) typically 120 op amps will be better than the indicated specification. Note 5: Warmed-up IB and IOS readings are extrapolated to a chip temperature of 50°C from 25°C measurements and 50°C characterization data. Note 6: Current noise is calculated from the formula: in = (2qIB)1/2 where q = 1.6 • 10 –19 coulomb. The noise of source resistors up to 200M swamps the contribution of current noise. Note 7: Input voltage range functionality is assured by testing offset voltage at the input voltage range limits to a maximum of 2.3mV (A grade) to 2.8mV (C grade). Note 8: This parameter is not 100% tested. Note 9: Slew rate is measured in AV = – 1; input signal is ± 7.5V, output measured at ± 2.5V. Note 10: The LT1113 is designed, characterized and expected to meet these extended temperature limits, but is not tested at –40°C and 85°C. Guaranteed I grade parts are available. Consult factory. Note 11: ∆ CMRR and ∆PSRR are defined as follows: (1) CMRR and PSRR are measured in µV/V on the individual amplifiers. (2) The difference is calculated between the matching sides in µV/V. (3) The result is converted to dB. Note 12: The LT1113 is measured in an automated tester in less than one second after application of power. Depending on the package used, power dissipation, heat sinking, and air flow conditions, the fully warmed-up chip temperature can be 10°C to 50°C higher than the ambient temperature. 5 LT1113 TYPICAL PERFOR A CE CHARACTERISTICS 0.1Hz to 10Hz Voltage Noise TOTAL 1kHz VOLTAGE NOISE DENSITY (nV/√Hz) 10k + 1k VN – RSOURCE RMS VOLTAGE NOISE DENSITY (nV/√Hz) VOLTAGE NOISE (1µV/DIV) 0 2 6 4 TIME (SEC) Voltage Noise vs Chip Temperature 10 9 INPUT BIAS AND OFFSET CURRENTS (A) 30n 10n 3n 1n 300p 100p 30p 10p 3p 8 7 6 5 4 3 2 1 0 –75 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 1113 G04 INPUT BIAS AND OFFSET CURRENTS (pA) VS = ±15V VOLTAGE NOISE (AT1kHz)(nV/√Hz) Common-Mode Limit vs Temperature V + –0 –0.5 120 COMMON-MODE REJECTION RATIO (dB) POWER SUPPLY REJECTION RATIO (dB) COMMON-MODE LIMIT (V) REFERRED TO POWER SUPPLY –1.0 –1.5 –2.0 V + = 5V TO 20V 4.0 3.5 3.0 2.5 V = – 5V TO –20V – V – +2.0 –60 –20 60 100 20 TEMPERATURE (°C) 6 UW 8 1kHz Output Voltage Noise Density vs Source Resistance 100 Voltage Noise vs Frequency TA = 25°C VS = ±15V 100 10 TYPICAL 1/f CORNER 120Hz 1 1 10 100 1k FREQUENCY (Hz) 10k 1113 G03 10 VN SOURCE RESISTANCE ONLY 1k TA = 25°C VS = ±15V 10 1113 G01 1 100 10k 100k 1M 10M 100M 1G SOURCE RESISTANCE (Ω) 1113 G02 Input Bias and Offset Currents vs Chip Temperature 100n VS = ±15V Input Bias and Offset Currents Over the Common-Mode Range 400 TA = 25°C VS = ±15V NOT WARMED UP 300 IB, VCM = 0V IB, VCM = 10V 200 BIAS CURRENT 100 OFFSET CURRENT 0 –15 10 –10 –5 0 5 COMMON-MODE RANGE (V) 15 1113 G06 IOS, VCM = 0V IOS, VCM = 10V 100 125 1113 G04 1p –75 –50 –25 0 25 50 75 TEMPERATURE (°C) Common-Mode Rejection Ratio vs Frequency 120 TA = 25°C VS = ±15V Power Supply Rejection Ratio vs Frequency TA = 25°C 100 80 +PSRR 60 –PSRR 40 20 0 100 80 60 40 20 0 140 1113 G07 1k 10k 100k 1M FREQUENCY (Hz) 10M 1113 G08 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 1113 G09 LT1113 TYPICAL PERFOR A CE CHARACTERISTICS Voltage Gain vs Frequency 180 TA = 25°C VS = ± 15V VOLTAGE GAIN (V/µV) 140 VOLTAGE GAIN (dB) VOLTAGE GAIN (dB) 100 60 20 –20 0.01 1 10k 100 FREQUENCY (Hz) Small-Signal Transient Response SUPPLY CURRENT PER AMPLIFIER (mA) 20mV/DIV 5V/DIV 1µs/DIV AV = 1 CL = 10pF VS = ± 15V, ± 5V 1113 G13 Output Voltage Swing vs Load Current V + – 0.8 –1.0 25°C –55°C 125°C 40 50 OUTPUT VOLTAGE SWING (V) –1.2 – 1.4 –1.6 1.4 1.2 1.0 0.8 0.6 SLEW RATE (V/µs) OVERSHOOT (%) VS = ± 5V TO ± 20V –55°C 25°C 125°C V – +0.4 –10 –8 –6 –4 –2 0 2 4 6 8 10 ISINK ISOURCE OUTPUT CURRENT (mA) 1113 G16 UW 1M 1113 G10 Voltage Gain vs Chip Temperature 10 9 8 7 6 5 4 3 2 1 100M Gain and Phase Shift vs Frequency 50 60 TA = 25°C VS = ±15V CL = 10pF 80 PHASE SHIFT (DEG) VS = ±15V VO = ± 10V, RL = 1k VO = ± 12V, RL = 10k 40 30 20 100 120 PHASE 140 GAIN 160 180 100 1113 G12 RL =10k RL = 1k 10 0 –10 0 –75 –50 –25 0 25 50 75 CHIP TEMPERATURE (°C) 100 125 1113 G11 0.1 1 10 FREQUENCY (MHz) Large-Signal Transient Response 6 Supply Current vs Supply Voltage 25°C –55°C 5 125°C 2µs/DIV AV = 1 CL = 10pF VS = ± 15V 1113 G14 4 0 ±10 ± 15 ±5 SUPPLY VOLTAGE (V) ± 20 1113 G15 Capacitive Load Handling 6 VS = ±15V TA = 25°C RL ≥ 10k VO = 100mVP-P AV = +10, RF = 10k, CF = 20pF Slew Rate and Gain-Bandwidth Product vs Temperature GAIN-BANDWIDTH PRODUCT (fO = 100kHz)(MHz) 12 10 SLEW RATE 8 6 GBW 2 1 4 2 0 100 125 1113 G18 5 4 3 30 20 AV = 1 10 AV = 10 0 0.1 1 100 1000 10 CAPACITIVE LOAD (pF) 10000 1113 G17 0 –75 –50 –25 0 25 50 75 TEMPERATURE (°C) 7 LT1113 TYPICAL PERFOR A CE CHARACTERISTICS Distribution of Offset Voltage Drift with Temperature (J8) 40 VS = ±15V 30 PERCENT OF UNITS 75 J8 150 OP AMPS PERCENT OF UNITS 30 78 S8 100 N8 356 OP AMPS CHANGE IN OFFSET VOLTAGE (µV) 20 10 0 –12 –10 –8 –6 –4 –2 0 2 OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) 1113 G19 THD and Noise vs Frequency for Noninverting Gain TOTAL HARMONIC DISTORTION + NOISE (%) ZL = 2k 15pF  VO = 20VP-P AV = +1, +10, +100 MEASUREMENT BANDWIDTH = 10Hz TO 80kHz AV = 100 0.01 TOTAL HARMONIC DISTORTION + NOISE (%) 1 1 CHANNEL SEPARATION (dB) 0.1 0.001 AV = 10 NOISE FLOOR 0.0001 20 100 1k FREQUENCY (Hz) 10k 20k 1113 • G22 THD and Noise vs Output Amplitude for Noninverting Gain TOTAL HARMONIC DISTORTION + NOISE (%) 0.1 ZL = 2k15pF, fO = 1kHz AV = +1, +10, +100 MEASUREMENT BANDWIDTH = 10Hz TO 22kHz INTERMODULATION DISTORTION (AT 1kHz)(%) TOTAL HARMONIC DISTORTION + NOISE (%) 1 AV = 100 0.01 AV = 10 0.001 AV = 1 NOISE FLOOR 1 10 OUTPUT SWING (VP-P) 30 1113 • G25 0.0001 0.3 8 UW 4 6 AV = 1 Distribution of Offset Voltage Drift with Temperature (N8, S8) 40 VS = ±15V Warm-Up Drift 500 VS = ±15V TA = 25°C 400 N8 PACKAGE 300 S8 PACKAGE 20 200 J8 PACKAGE 100 IN STILL AIR (S8 PACKAGE SOLDERED ONTO BOARD) 0 0 1 2 3 5 4 TIME AFTER POWER ON (MINUTES) 6 10 8 0 –25 –20 –15 –10 –5 0 5 10 15 20 25 1113 G20 OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) 1113 G21 THD and Noise vs Frequency for Inverting Gain 160 ZL = 2k15pF VO = 20VP-P AV = –1, –10, –100 MEASUREMENT BANDWIDTH = 10Hz TO 80kHz AV = – 100 0.01 AV = – 10 0.001 NOISE FLOOR 0.0001 20 100 1k FREQUENCY (Hz) 10k 20k 1113 G23 Channel Separation vs Frequency 140 120 100 80 60 40 20 0 10 100 10k 100k 1k FREQUENCY (Hz) 1M 10M VS = ±15V RL = 1k VO = 10VP-P TA = 25°C LIMITED BY PIN-TO-PIN CAPACITANCE LIMITED BY THERMAL INTERACTION 0.1 AV = –1 1113 G24 THD and Noise vs Output Amplitude for Inverting Gain 1 ZL = 2k15pF, fO = 1kHz AV = – 1, –10, –100 MEASUREMENT BANDWIDTH = 10Hz TO 22kHz 0.1 CCIF IMD Test (Equal Amplitude Tones at 13kHz, 14kHz)* VS = ±15V RL = 2k TA = 25°C 0.1 0.01 AV = ±10 0.001 0.01 AV = –100 AV = –10 0.001 AV = –1 NOISE FLOOR 1 10 OUTPUT SWING (VP-P) 30 1113 • G26 0.0001 0.3 0.0001 20m 0.1 1 OUTPUT SWING (VP-P) 10 30 1113 • G27 * See LT1115 data sheet for definition of CCIF testing. LT1113 APPLICATI S I FOR ATIO The LT1113 dual in the plastic and ceramic DIP packages are pin compatible with and directly replace such JFET op amps as the OPA2111 and OPA2604 with improved noise performance. Being the lowest noise dual JFET op amp available to date, the LT1113 can replace many bipolar op amps that are used in amplifying low level signals from high impedance transducers. The best bipolar op amps will eventually loose out to the LT1113 when transducer impedance increases due to higher current noise. The low voltage noise of the LT1113 allows it to surpass every dual and most single JFET op amps available. For the best performance versus area available anywhere, the LT1113 is offered in the narrow SO-8 surface mount package with standard pinout and no degradation in performance. The low voltage and current noise offered by the LT1113 makes it useful in a wide range of applications, especially where high impedance, capacitive transducers are used such as hydrophones, precision accelerometers and photo diodes. The total output noise in such a system is the gain times the RMS sum of the op amp input referred voltage noise, the thermal noise of the transducer, and the op amp bias current noise times the transducer impedance. Figure 1 shows total input voltage noise versus source resistance. In a low source resistance ( R1 OR R2 TRANSDUCER CB RB TRANSDUCER Figure 2. Noninverting and Inverting Gain Configurations The gain therefore is 1 + CF/CS. For unity gain, CF should equal the transducer capacitance plus the input capacitance of the LT1113 and RF should equal RS. In the noninverting mode example, the transducer current is converted to a change in voltage by the transducer capacitance; this voltage is then buffered by the LT1113 with a gain of 1 + R1/R2. A DC path is provided by RS, which is either the transducer impedance or an external resistor. Since RS is usually several orders of magnitude greater than the parallel combination of R1 and R2, RB is added to balance the DC offset caused by the noninverting input bias current and RS. The input bias currents, although small at room temperature, can create significant errors over increasing temperature, especially with transducer resistances of up to 100M or more. The optimum value for RB is determined by equating the thermal noise (4kTRS) to the current noise (2qIB) times RS2. Solving for RS results in RB = RS = 2VT/IB Reduced Power Supply Operation The LT1113 can be operated from ±5V supplies for lower power dissipation resulting in lower IB and noise at the expense of reduced dynamic range. To illustrate this benefit, let’s look at the following example: An LT1113CS8 operates at an ambient temperature of 25°C with ±15V supplies, dissipating 318mW of power (typical supply current = 10.6mA for the dual). The SO-8 package has a θJA of 190°C/W, which results in a die temperature increase of 60.4°C or a room temperature die operating temperature of 85.4°C. At ±5V supplies, the die temperature increases by only one third of the previous amount or 20.1°C resulting in a typical die operating temperature of only 45.1°C. A 40 degree reduction of die temperature is achieved at the expense of a 20V reduction in dynamic range. If no DC correction resistor is used at the input, the input referred offset will be the input bias current at the operating die temperature times the transducer resistance (refer to Input Bias and Offset Currents vs Chip Temperature graph in Typical Performance Characteristics section). A 100mV input VOS is the result of a 1nA IB (at 85°C) dropped across a 100M transducer resistance; at ±5V supplies, the input offset is only 28mV (IB at 45°C is 280pA). Careful selection of a DC correction   kT = 26mV at 25°C .  VT = q   A parallel capacitor, CB, is used to cancel the phase shift caused by the op amp input capacitance and RB. 10 + – + – RB U RF CF OUTPUT CB = CF CS RB = RF RS dQ dV Q = CV; =I=C d t  d t  1113 • F02 W U UO LT1113 APPLICATI S I FOR ATIO INPUT: ± 5.2V Sine Wave Figure 3. Voltage Follower with Input Exceeding the Common-Mode Range ( VS = ± 5V) resistor (RB) will reduce the IR errors due to IB by an order of magnitude. A further reduction of IR errors can be achieved by using a DC servo circuit shown in the applications section of this data sheet. The DC servo has the advantage of reducing a wide range of IR errors to the millivolt level over a wide temperature variation. The preservation of dynamic range is especially important when reduced supplies are used, since input bias currents can exceed the nanoamp level for die temperatures over 85°C. To take full advantage of a wide input common mode range, the LT1113 was designed to eliminate phase reversal. Referring to the photographs shown in Figure 3, the LT1113 is shown operating in the follower mode (AV = +1) at ± 5V supplies with the input swinging ± 5.2V. The output of the LT1113 clips cleanly and recovers with no phase reversal, unlike the competition as shown by the last photograph. This has the benefit of preventing lock-up in servo systems and minimizing distortion components. The effect of input and output overdrive on one amplifier has no effect on the other, as each amplifier is biased independently. U LT1113 Output OPA2111 Output W U UO Advantages of Matched Dual Op Amps In many applications the performance of a system depends on the matching between two operational amplifiers rather than the individual characteristics of the two op amps. Two or three op amp instrumentation amplifiers, tracking voltage references and low drift active filters are some of the circuits requiring matching between two op amps. The well-known triple op amp configuration in Figure 4 illustrates these concepts. Output offset is a function of the difference between the two halves of the LT1113. This error cancellation principle holds for a considerable number of input referred parameters in addition to offset voltage and bias current. Input bias current will be the average of the two noninverting input currents (IB+). The difference between these two currents (∆IB+) is the offset current of the instrumentation amplifier. Common mode and power supply rejections will be dependent only on the match between the two amplifiers (assuming perfect resistor matching). 11 LT1113 APPLICATI 15V IN – 3 8 1/2 LT1113 2 IC1 – 4 S I FOR ATIO R4 1k R6 10k C1 50pF + 1 R1 1k –15V GAIN = 100 BANDWIDTH = 400kHz INPUT REFERRED NOISE = 6.6nV/√Hz AT 1kHz WIDEBAND NOISE DC TO 400kHz = 6.6 µVRMS CL ≤ 0.01µF Figure 4. Three Op Amp Instrumentation Amplifier The concepts of common mode and power supply rejection ratio match (∆CMRR and ∆PSRR) are best demonstrated with a numerical example: Assume CMRRA = +50µV/V or 86dB, and CMRRB = + 39µV/V or 88dB, then ∆CMRR = 11µV/V or 99dB; then ∆CMRR = 89µV/V or 81dB Clearly the LT1113, by specifying and guaranteeing all of these matching parameters, can significantly improve the performance of matching-dependent circuits. RS CS Figure 5. 12 + – if CMRRB = -39µV/V which is still 88dB, + IN + 5 – 6 R3 1k 7 1/2 LT1113 IC1 R5 1k R7 10k + 3 – R2 200Ω 2 1/2 LT1113 IC2 1 U Typical performance of the instrumentation amplifier: Input offset voltage = 0.8mV Input bias current = 320pA Input offset current = 10pA Input resistance = 1011Ω Input noise = 3.4µVP-P OUTPUT CL W U UO High Speed Operation The low noise performance of the LT1113 was achieved by making the input JFET differential pair large to maximize the first stage gain. Increasing the JFET geometry also increases the parasitic gate capacitance, which if left unchecked, can result in increased overshoot and ringing. When the feedback around the op amp is resistive (RF), a pole will be created with RF, the source resistance and capacitance (RS,CS), and the amplifier input capacitance (CIN = 27pF). In closed loop gain configurations and with RS and RF in the kilohm range (Figure 5), this pole can create excess phase shift and even oscillation. A small capacitor (CF) in parallel with RF eliminates this problem. With RS(CS + CIN) = RFCF, the effect of the feedback pole is completely removed. CF 1113 • F04 RF CIN OUTPUT 1113 • F05 LT1113 TYPICAL APPLICATI UO 2 3 S Accelerometer Amplifier with DC Servo C1 1250pF R1 100M R3 2k C2 2µF R4 20M R2 18k 6 7 5V TO 15V 1/2 LT1113 5 R5 20M C3 2µF R4C2 = R5C3 > R1 (1 + R2/R3) C1 OUTPUT = 0.8mV/pC* = 8.0mV/g** DC OUTPUT ≤ 2.7mV OUTPUT NOISE = 6nV/√Hz AT 1kHz *PICOCOULOMBS **g = EARTH’S GRAVITATIONAL CONSTANT 2 51Ω – 1k 15V 5 5 + – 8 7 1k 6 An 1/2 LT1113 4 –15V 1k 51Ω 1. ASSUME VOLTAGE NOISE OF LT1113 AND 51Ω SOURCE RESISTOR = 4.6nV/√Hz 2. GAIN WITH n LT1113s IN PARALLEL = n • 200 3. OUTPUT NOISE = √n • 200 • 4.6nV/√Hz OUTPUT NOISE 4.6 4. INPUT REFERRED NOISE = = nV/√Hz n • 200 √n 5. NOISE CURRENT AT INPUT INCREASES √n TIMES 9µV 6. IF n = 5, GAIN = 1000, BANDWIDTH = 1MHz, RMS NOISE, DC TO 1MHz = = 4µV √5 1113 • TA04 + – + – ACCELEROMETER B & K MODEL 4381 OR EQUIVALENT 8 1/2 LT1113 4 1 –5V TO –15V Paralleling Amplifiers to Reduce Voltage Noise 3 + A1 1/2 LT1113 1 2 51Ω – 1k 10k 3 + A2 1/2 LT1113 1 – + OUTPUT 1113 • TA03 1k 15V 1k 6 8 7 OUTPUT 1/2 LT1113 4 –15V 13 LT1113 TYPICAL APPLICATI D2 1N914 CD D1 1N914 2N3904 R3 1k 7 1/2 LT1113 5 4 –V HAMAMATSU S1336-5BK V– R5 1k R4 1k R2C2 > C1R1 CD = PARASITIC PHOTODIODE CAPACITANCE VO = 100mV/µWATT FOR 200nm WAVE LENGTH 330mV/µWATT FOR 633nm WAVE LENGTH 10Hz Fourth Order Chebyshev Lowpass Filter (0.01dB Ripple) R2 237k C1 33nF 15V VIN C2 100nF 1/2 LT1113 –15V TYPICAL OFFSET ≈ 0.8mV 1% TOLERANCES FOR VIN = 10VP-P, VOUT = –121dB AT f > 330Hz = – 6dB AT f = 16.3Hz LOWER RESISTOR VALUES WILL RESULT IN LOWER THERMAL NOISE AND LARGER CAPACITORS 14 + + 3 4 C4 330nF 5 – – R1 237k R3 249k 2 8 1 R4 154k R6 249k – + + 3 – UO S Low Noise Light Sensor with DC Servo C1 2pF R1 1M 2 1/2 LT1113 1 C2 0.022µF +V 8 6 OUTPUT R2 100k 1113 • TA05 R5 154k C3 10nF 6 1/2 LT1113 7 VOUT 1113 • TA06 LT1113 PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. J8 Package 8-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) CORNER LEADS OPTION (4 PLCS) 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0.300 BSC (0.762 BSC) 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION 0.200 (5.080) MAX 0.015 – 0.060 (0.381 – 1.524) 0.005 (0.127) MIN 0.405 (10.287) MAX 8 7 6 5 0.008 – 0.018 (0.203 – 0.457) 0.025 (0.635) RAD TYP 1 2 3 0.220 – 0.310 (5.588 – 7.874) 0° – 15° 4 J8 1298 0.045 – 0.065 (1.143 – 1.651) 0.014 – 0.026 (0.360 – 0.660) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS 0.100 (2.54) BSC 0.125 3.175 MIN N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.400* (10.160) MAX 8 7 6 5 0.300 – 0.325 (7.620 – 8.255) 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.009 – 0.015 (0.229 – 0.381) 0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076) 0.255 ± 0.015* (6.477 ± 0.381) ( +0.035 0.325 –0.015 +0.889 8.255 –0.381 ) 1 2 3 4 N8 1098 0.100 (2.54) BSC *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 0.053 – 0.069 (1.346 – 1.752) 8 0.004 – 0.010 (0.101 – 0.254) 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 7 6 5 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.016 – 0.050 (0.406 – 1.270) 0.050 (1.270) BSC SO8 1298 1 2 3 4 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1113 TYPICAL APPLICATI I1 PD1 I2 PD2 Unity Gain Buffer with Extended Load Capacitance Drive Capability R2 1k C1 C1 = CL ≤ 0.1µF OUTPUT SHORT-CIRCUIT CURRENT (∼ 30mA) WILL LIMIT THE RATE AT WHICH THE VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS dV (I = C ) dt 1113 • TA08 1/2 LT1113 VIN RELATED PARTS PART NUMBER LT1028 LT1124 LT1169 LT1462 LT1464 LT1792 LT1793 DESCRIPTION Single Low Noise Precision Op Amp Dual Low Noise Precision Op Amp Dual Low Noise Precision JFET Op Amp Dual Picoamp IB C-Load Op Amp Dual Picoamp IB C-Load Op Amp Single Low Noise Precision Op Amp Single Low Noise Precision Op Amp TM C-Load is a trademark of Linear Technology Corporation. 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com + – UO S Light Balance Detection Circuit R1 1M C1 2pF TO 8pF VOUT = 1M • (I1 – I2) PD1,PD2 = HAMAMATSU S1336-5BK WHEN EQUAL LIGHT ENTERS PHOTODIODES, VOUT < 3mV. VOUT 1/2 LT1113 1113 • TA07 + – R1 33Ω VOUT CL COMMENTS VNOISE = 1.1nV/√Hz Max VNOISE = 4.2nV/√Hz Max 10pA IB IB = 2pA Max, 10000pF C-Load, IS = 45µA IB = 2pA Max, 10000pF C-Load, IS = 200µA Single LT1113 Single LT1169 1113fa LT/TP 0100 2K REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1993