LT1116_06

LT1116 12ns, Single Supply Ground-Sensing Comparator FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Ultra Fast (12ns Typ) Operates off Single 5 V Supply or ± 5V Input Common Mode Extends to Negative Supply No Minimum Input Slew Rate Requirement Complementary TTL Output Inputs Can Exceed the Positive Supply Up to 15V without Damaging the Comparator Low Offset Voltage Pin-Compatible with LT1016 Output Latch Capability Available in 8-Lead PDIP and SO Packages The LT®1116 is an ultra fast (12ns) comparator designed for sensing signals near the negative supply. The input common mode range extends from 2.5V below the positive supply down to the negative supply rail. Like the LT1016, this comparator is specifically designed to interface directly to TTL logic with complementary outputs. The comparator may operate from either a single 5V supply or dual ± 5V supplies. Tight offset voltage specifications and high gain allow the LT1116 to be used in precision applications. The LT1116 is designed for improved speed and stability for a wide range of operating conditions. The output stage provides active drive in both directions for maximum speed into TTL logic or passive loads, yet it has minimal cross-conduction current. Unlike other fast comparators, the LT1116 remains stable even for slow transitions through the active region, which eliminates the need to specify a minimum input slew rate. The LT1116 has an internal, TTL compatible latch for retaining data at the outputs. The latch holds data as long as the latch pin is held high. Device parameters such as gain, offset, and negative power supply current are not significantly affected by variations in negative supply voltage. APPLICATIO S ■ ■ ■ ■ ■ ■ ■ ■ High Speed A/D Converters Zero Crossing Detectors Current Sense for Switching Regulators Extended Range V to F Converters Fast Pulse Height/Width Discriminators High Speed Triggers Line Receivers High Speed Sampling Circuits , LTC, LT and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO VIN 100mV STEP 5mV OVERDRIVE Fast Current Comparator for Current Mode Switching Regulator LOGIC 5V DRIVER M1 Comparator Response Time THRESHOLD LT1116 – Q C1 RSENSE – R1 OUTPUT VOLTAGE VOUT 1V/DIV Q + 12ns 0 0 20 TIME (ns) BLANKING CONTROL INPUT LT1116 • TA01 U 12ns 20 LT1116 • TA02 U U 1116fb 1 LT1116 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW V+ 1 8 – Q OUT Q OUT GND LATCH ENABLE V+ 1 TOP VIEW 8 Supply Voltage (V +) to GND ...................................... 7V Negative Supply Voltage (V –) ...................... –7V to GND Voltage Differential Input Voltage ................................... ±15V Inputs Voltage (Either Input) ......... (V –) –0.3V to 15V Latch Pin Voltage ........................... Equal to Supplies Output Current (Continuous) .............................. ± 20mA Operating Temperature Range ..................... 0°C to 70°C Storage Temperature Range ................. –65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C – Q OUT Q OUT GND LATCH ENABLE +IN 2 –IN 3 V– 4 + – 7 6 5 +IN 2 –IN 3 V– 4 + – 7 6 5 N8 PACKAGE 8-LEAD PDIP TJMAX = 100°C, θJA = 130°C/W S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 100°C, θJA = 160°C/W ORDER PART NUMBER LT1116CN8 ORDER PART NUMBER LT1116CS8 S8 PART MARKING 1116 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL VOS ∆VOS ∆T IOS lB PARAMETERS Input Offset Voltage Input Offset Voltage Drift Input Offset Current Input Bias Current, Sourcing Input Voltage Range CMRR PSRR AV I+ I– VOH VOL Common Mode Rejection Ratio Power Supply Rejection Ratio Small Signal Voltage Gain Positive Supply Current Negative Supply Current Output High Voltage Output Low Voltage (Note 2) (Note 3) The ● denotes the specifications which apply over full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V – = 5V, VOUT (Q) = 1.4V, LATCH = 0V. Specifications for VOS, IB, CMRR, and Voltage Gain are valid for single supply operation, V + = 5V, V – = 0V, unless noted. CONDITIONS RS ≤ 100Ω (Note 2) ● ● ● ● ● ● ● ● ● ● ● ● MIN TYP 1.0 5 0.5 10 MAX ± 3.0 3.5 UNITS mV mV µV/°C 2 20 (V+) –2.5 2.5 Arbitrary Supply Range Single 5V Supply –5V ≤ VCM ≤ 2.5V, VS = ± 5V 0V ≤ VCM ≤ 2.5V Positive Supply, 4.6V ≤ V+ ≤ 5.4V Negative Supply, –7 ≤ V – ≤ – 2V 1V ≤ VOUT ≤ 2V V– 0 75 65 60 80 1400 90 90 75 100 3000 27 5 2.7 2.4 3.4 3.0 0.3 0.4 38 7 ISOURCE = 1mA ISOURCE = 10mA lSINK = 4mA ISINK = 10mA ● ● ● 0.5 2 U µA µA V V dB dB dB dB V/V mA mA V V V V 1116fb W U U WW W LT1116 The ● denotes the specifications which apply over full operating temperature range, otherwise specifications are at TA = 25°C. V + = 5V, V + = – 5V, VOUT = (Q) = I .4V, LATCH = 0V, unless noted. SYMBOL VIH VIL IIL tPD tPD ∆tPD tSU tH PARAMETERS + Positive Latch Threshold – Latch Threshold Latch Input Current Propagation Delay Propagation Delay Differential Propagation Delay Latch Set-Up Time Latch Hold Time VLATCH = 0V ∆VIN = 100mV, OD = 5mV (Note 4) ● ELECTRICAL CHARACTERISTICS CONDITIONS ● ● ● MIN 2.0 TYP MAX UNITS V 0.8 –20 12 10 –500 16 18 14 16 3 2 2 V µA ns ns ns ns ns ns ns ∆VIN = 100mV, OD = 20mV (Note 4) ● ∆VIN = 100mV, OD = 5mV (Note 4) (Note 5) (Note 5) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliabilty and lifetime. Note 2: Input offset voltage is defined as the average of two offset voltages measured by forcing first the Q output to 1.4V then forcing the Q output to 1.4V. Note 3: Input bias current is defined as the average of the two input currents. Note 4: tPD and ∆tPD cannot be measured in automatic handling equipment with low values of overdrive. The LT1116 is sample tested with a 1V step and 500mV overdrive. Correlation tests have shown that tPD and ∆tPD can be guaranteed with this test if additional DC tests are performed to verify internal bias conditions are correct. For low overdrive conditions VOS is added to the measured overdrive. Note 5: Input latch set-up time, tSU, is the interval in which the input signal must be stable prior to asserting the latch signal. The hold time, tH, is the interval after the latch is asserted in which the input signal must be stable. TYPICAL PERFOR A CE CHARACTERISTICS Gain CharacteristIcs 5.0 4.5 4.0 OUTPUT VOLTAGE (V) TJ = 125°C 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 –2.5 TJ = –55°C DELAY (ns) DELAY (ns) TJ = 25°C –1.5 1.5 – 0.5 0 0.5 DIFFERENTIAL INPUT VOLTAGE (mV) UW VS = ±5V IOUT = 0 LT1116 • TPC01 Propagation Delay vs Overdrive 25 TJ = 25°C STEP SIZE = 100mV 20 18 16 14 15 tPDLH 12 10 8 6 5 4 2 0 Propagation Delay vs Load Capacitance STEP = 100mV, OVERDRIVE = 5mV 20 tPDHL tPDLH 10 tPDHL 2.5 0 10 30 40 20 OVERDRIVE VOLTAGE (mV) 50 0 0 10 30 40 20 OUTPUT LOAD CAPACITANCE (pF) 50 LT1116 • TPC02 LT1116 • TPC03 1116fb 3 LT1116 TYPICAL PERFOR A CE CHARACTERISTICS Propagation Delay vs Source Resistance 80 70 60 STEP SIZE = 800mV DELAY (ns) 20 tPDHL RISING OUTPUT tPDLH FALLING OUTPUT VS = ±5V, OVERDRIVE = 20mV DELAY (ns) 400mV 40 200mV 30 20 STEP SIZE = 100mV 10 0 0 0.5 2.0 2.5 1.5 SOURCE RESISTANCE (kΩ) 1.0 15 DELAY (ns) 50 Common Mode Rejection 120 110 VIN = 2VP-P VS = ±5V TJ = 25°C REJECTION RATIO (dB) TIME (ns) 90 80 70 60 50 40 10k 100k 1M FREQUENCY (Hz) 10M 2 0 –2 –4 –6 50 100 –50 –25 25 75 0 JUNCTION TEMPERATURE (°C) OUTPUT VOLTAGE (V) 100 Output Low Voltage (VOL) 0.8 0.7 0.6 VOLTAGE (V) VS = ±5V, VIN = 30mV 0.5 0.4 0.3 0.2 0.1 0 0 2 TJ = – 55°C TJ = 25°C TJ = 125°C CURRENT (mA) 20 15 10 NEGATIVE SUPPLY CURRENT 5 0 –60 –40 –20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE (°C) LT1116 • TPC11 CURRENT (mA) 4 6 8 10 12 14 16 18 20 OUTPUT SINK CURRENT (mA) LT1116 • TPC10 4 UW LT1116 • TPC04 LT1116 • TPC07 Propagation Delay vs Positive Supply 25 Propagation Delay vs Temperature 30 STEP = 100mV OVERDRIVE = 5mV 25 CLOAD = 10pF VS = ±5V 20 15 10 tPDHL tPDLH 10 5 5 0 –50 –30 –10 10 30 50 70 90 110 130 JUNCTION TEMPERATURE (°C) LT1116 • TPC06 0 3.0 4.4 4.8 5.0 5.2 5.4 4.6 POWER SUPPLY VOLTAGE (V) 5.6 LT1116 • TPC05 Latch Set-Up Time 6 4 Output High Voltage (VOH) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 125 TJ = 125°C TJ = 25°C TJ = –55°C 0 2 4 6 8 10 12 14 16 18 20 OUTPUT SOURCE CURRENT (mA) LT1116 • TPC09 LT1116 • TPC08 Supply Current vs Temperature 35 30 25 POSITIVE SUPPLY CURRENT 60 50 40 30 20 Positive Supply Current V– = 0 TJ = 125°C 10 TJ = 25°C TJ = –55°C 0 0 6 2 4 POSITIVE SUPPLY VOLTAGE (V) LT1116 • TPC12 8 1116fb LT1116 TYPICAL PERFOR A CE CHARACTERISTICS Positive Supply Current 50 45 40 35 CURRENT (mA) 30 25 20 15 10 5 0 1 10 SWITCHING FREQUENCY (MHz) 100 TJ = – 55°C TJ = 125°C COMMON MODE VOLTAGE (V) INPUT BIAS CURRENT (µA) Negative Common Mode Limit 0 VS = 5V, OV COMMON MODE VOLTAGE (V) –1 –2 –3 –4 –5 VS = ± 5V 1.4 1.0 0.6 0.2 50 100 25 75 –50 –25 0 JUNCTION TEMPERATURE (°C) OUTPUT UNAFFECTED CURRENT (µA) VOLTAGE (V) –6 – 60 –40 –20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE (°C) LT1116 • TPC16 TI I G DIAGRA S VOD LATCH ENABLE tSU tH VIN ∆VIN tPD VOUT LT1116 • TD01 UW TJ = 25°C LT1116 • TPC13 Input Bias Current 10 TJ = 25°C VS = ± 5V 5 Positive Common Mode Limit VS = ± 5V 0 4 –10 3 – 20 2 – 30 1 – 40 –6 –4 0 –2 INPUT VOLTAGE (V) 2 4 0 – 60 – 40 –20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE (°C) LT1116 • TPC15 LT1116 • TPC14 Latch Pin Threshold 2.6 2.2 1.8 OUTPUT LATCHED Latch Pin Current* 300 250 200 150 100 50 0 50 100 –50 –25 25 75 0 JUNCTION TEMPERATURE (°C) *CURRENT COMES OUT OF LATCH PIN BELOW THRESHOLD VS = ± 5V 125 125 LT1116 • TPC17 LT1116 • TPC18 W UW VIN tPD VOUT LT1116 • TD02 1116fb 5 LT1116 APPLICATIO S I FOR ATIO Common Mode Considerations The LT1116 is specified for a common mode range of 0V to 2.5V with a single 5V supply, and –5V to 2.5V with ±5V supplies. The common mode range is defined as the DC input for which the output responds correctly to small changes in the input differential. Input signals can exceed the positive common mode limit up to the 15V absolute maximum rating without damaging the comparator. There will, however, be an increase in propagation delay of up to 10ns when the input signal switches back into the common mode range. When input signals fall below the negative common mode limit, the internal PN diode formed with the substrate can turn on (resulting in significant charge flow throughout the die). A Schottky clamp diode, between the input and the negative rail, speeds up recovery from negative overdrive by preventing the substrate diode from turning on. The zero crossing detector in Figure 1 demonstrates the use of a fast clamp diode. Recovery, from 500mV overdrive below V –, for this circuit is approximately 18ns. Input Characteristics Each input to the LT1116 is buffered with a fast PNP follower—input bias current therefore does not vary significantly throughout the common mode range. When either input exceeds the positive common mode limit, the bias current drops to zero. Inputs that fall more than one diode and drop below V – will forward bias the substrate or clamp diode, causing large input current to flow. Fast Zero Crossing Detector RS 50Ω 5V CABLE VIN + 1N5712 RT 50Ω LT1116 – Figure 1. The Zero Crossing Detector Terminates the Transmission Line At Its 50Ω Characteristic Impedance. Negative Inputs Should Not Fall Below –2V to keep the Signal Current Within the Clamp Diode’s Maximum Forward Rating. Positive Inputs Should not Exceed the Devices Absolute Maximum Ratings nor the Power Rating on the Terminating Resistor 6 U Single ended input resistance is about 5MΩ, and remains roughly constant over the input common mode range. The common mode resistance is about 2.5MΩ with zero differential input voltage, and does not change significantly with the absolute value of differential input. Effective input capacitance, typically 5pF, is determined by measuring the resulting change in propagation delay for a 1kΩ change in source resistance. Latch Pin Dynamics The internal latch uses local regenerative feedback to shorten set-up and hold times. Driving the latch pin high retains the output state. The latch pin floats to a high state when disconnected, so it must be driven low for flow-through operation. The set-up time required to guarantee detecting a given transition of the inputs is 2ns. The inputs must also remain stable for a 2ns hold time after latch is asserted. New data will appear at the output approximately 10ns to 12ns after the latch goes low. The latch pin has no built-in hysteresis, and is designed to be driven from TTL or CMOS logic gates. Additional Information Linear Technology’s Application Note 13 provides an extensive discussion of design techniques for high speed comparators. Single Supply Crystal Oscillator 10MHZ to 15MHz 1kΩ 5V 5V 10 TO 15MHz AT CUT W UU + Q 1kΩ LT1116 Q – Q 24pF – – Q OUTPUT LT1116 • AI01 2kΩ LT1116 • AI02 Figure 2. This Single Supply Crystal Oscillator Utilizes Crystals From 10MHz To 15MHz Without Component Changes 1116fb LT1116 APPLICATIO S I FOR ATIO High Speed Adaptive Trigger Circuit Line receivers often require an adaptive trigger to compensate for variations in signal amplitude and DC offsets. The circuit in Figure 3 triggers on 2mV to 200mV signals from 100Hz to 10MHz from a single 5V rail. The trigger level is the average of the input signal’s positive and negative peaks stored on 0.005µF capacitors. Pairs of NPN and PNP transistors are used instead of diodes to temperature compensate the peak detector. 5pF 1kΩ 5V CABLE VIN 200Ω 5V 1kΩ 4R 200Ω – A1 LT1191 + A2 LT1192 + – 47µF 1000pF R 100Ω 50Ω 1kΩ C1 100µF NPN = 2N3904 PNP = 2N3906 Figure 3. Fast Single Supply Adaptive Trigger Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U To achieve single supply operation, the input signal must be shifted into the pre-amplifier’s common mode range. The input amplifier A1 adds a 1V level shift, while A2 provides a gain of 20 for high frequency signals. Capacitors C1 and C2 insure that low frequency signals see unity gain. Bandwidth limiting in A1 and A2 does not affect triggering because the adaptive trigger threshold varies ratiometrically to maintain circuit output. 5V 3kΩ 1% 5V 0.005µF 500pF 3MΩ 5V W UU + 0.005µF 3MΩ A3 LT1006 – 3kΩ 1% C2 0.1µF 0.1µF 500Ω 5V + LT1116 Q – Q TRIGGER OUT LT1116 • AI03 – 1116fb 7 LT1116 PACKAGE DESCRIPTIO 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) +0.035 0.325 –0.015 +0.889 8.255 –0.381 0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076) ( ) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 0.010 – 0.020 × 4 5° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.016 – 0.050 (0.406 – 1.270) RELATED PARTS PART NUMBER LT1016 LT1394 LT1671 LT1713/LT1714 LT1715 LT1719 LT1720/LT1721 DESCRIPTION 10ns Precision Comparator 7ns Single Supply Comparator 60ns Single Supply Comparator 7ns Single/Dual Comparator 4ns Dual Comparator 4.5ns Single Supply Comparator 4.5ns Dual/Quad Comparator COMMENTS Complementary Outputs with Latch, LT1116 Pinout 6mA, 100MHz Toggle Rate, LT1116 Pinout 450µA, 0.8mV Offset, LT1116 Pinout Rail-to-Rail Input and Output, 2.7V to + 5.5V Operation Independent Input/Output Supplies, 150MHz Toggle Rate Independent Input/Output Supplies, 3V/5V 4mA per Comparator, Input 100mV Below V –, 3V/5V 8 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.400* (10.160) MAX 8 7 6 5 0.255 ± 0.015* (6.477 ± 0.381) 1 2 3 4 N8 1098 0.100 (2.54) BSC S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 0.053 – 0.069 (1.346 – 1.752) 8 0.004 – 0.010 (0.101 – 0.254) 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 7 6 5 0.050 (1.270) BSC SO8 1298 1 2 3 4 1116fb LT 0306 REV B • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006