LT1158

LT1158 Half Bridge N-Channel Power MOSFET Driver FEATURES s s s s s s s s s s s s DESCRIPTION A single input pin on the LT1158 synchronously controls two N-channel power MOSFETs in a totem pole configuration. Unique adaptive protection against shoot-through currents eliminates all matching requirements for the two MOSFETs. This greatly eases the design of high efficiency motor control and switching regulator systems. A continuous current limit loop in the LT1158 regulates short-circuit current in the top power MOSFET. Higher start-up currents are allowed as long as the MOSFET VDS does not exceed 1.2V. By returning the fault output to the enable input, the LT1158 will automatically shut down in the event of a fault and retry when an internal pull-up current has recharged the enable capacitor. An on-chip charge pump is switched in when needed to turn on the top N-channel MOSFET continuously. Special circuitry ensures that the top side gate drive is safely maintained in the transition between PWM and DC operation. The gate-to-source voltages are internally limited to 14.5V when operating at higher supply voltages. Drives Gate of Top Side MOSFET Above V + Operates at Supply Voltages from 5V to 30V 150ns Transition Times Driving 3000pF Over 500mA Peak Driver Current Adaptive Non-Overlap Gate Drives Continuous Current Limit Protection Auto Shutdown and Retry Capability Internal Charge Pump for DC Operation Built-In Gate Voltage Protection Compatible with Current-Sensing MOSFETs TTL/CMOS Input Levels Fault Output Indication APPLICATIONS s s s s s s PWM of High Current Inductive Loads Half Bridge and Full Bridge Motor Control Synchronous Step-Down Switching Regulators Three-Phase Brushless Motor Drive High Current Transducer Drivers Battery-Operated Logic-Level MOSFETs TYPICAL APPLICATION 24V 1N4148 BOOST DR BOOST T GATE DR T GATE FB T SOURCE 0.1µF IRFZ34 10µF + V + + V+ 500µF LOW ESR PWM 0Hz TO 100kHz INPUT LT1158 SENSE + + RSENSE 0.015Ω LOAD 1µF + ENABLE FAULT BIAS SENSE – B GATE DR B GATE FB GND – IRFZ34 0.01µF LT1158 TA01 U U U Top and Bottom Gate Waveforms VIN = 24V RL = 12Ω 1158 TA02 1 LT1158 ABSOLUTE MAXIMUM RATINGS Supply Voltage (Pins 2, 10) .................................... 36V Boost Voltage (Pin 16)............................................ 56V Continuous Output Currents (Pins 1, 9, 15) ....... 100mA Sense Voltages (Pins 11, 12)................... –5V to V ++5V Top Source Voltage (Pin 13).................... –5V to V ++5V Boost to Source Voltage (V16 – V13) ....... –0.3V to 20V Operating Temperature Range LT1158C ................................................ 0°C to 70°C LT1158I ............................................ –40°C to 85°C Junction Temperature (Note 1) LT1158C .......................................................... 125°C LT1158I ........................................................... 150°C Storage Temperature Range ................ –65°C to 150°C Lead Temperature (Soldering, 10 sec.)................ 300°C PACKAGE/ORDER INFORMATION TOP VIEW BOOST DR V+ BIAS ENABLE FAULT INPUT GND B GATE FB 1 2 3 4 5 6 7 8 16 BOOST 15 T GATE DR 14 T GATE FB 13 T SOURCE 12 SENSE + 11 SENSE – 10 V + 9 B GATE DR ORDER PART NUMBER LT1158CN LT1158IN N PACKAGE 16-LEAD PLASTIC DIP θJA = 70° C/W TOP VIEW BOOST DR 1 V+ 2 BIAS 3 ENABLE 4 FAULT 5 INPUT 6 GND 7 B GATE FB 8 16 BOOST 15 T GATE DR 14 T GATE FB 13 T SOURCE 12 SENSE + 11 SENSE – 10 V + 9 S PACKAGE 16-LEAD PLASTIC SOL B GATE DR LT1158CS LT1158IS θJA = 110°C/W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER I2 + I10 DC Supply Current (Note 2) CONDITIONS Test Circuit, TA = 25°C, V + = V16 = 12V, V11 = V12 = V13 = 0V, Pins 1 and 4 open, Gate Feedback pins connected to Gate Drive pins unless otherwise specified. MIN 4.5 8 q LT1158I TYP MAX 2.2 7 13 3 1.4 5 1.15 1.5 25 11 43 14.5 14.5 3 10 18 4.5 2 15 1.4 1.7 35 47 17 17 MIN 4.5 8 0.8 0.85 1.2 15 9 40 12 12 LT1158C TYP MAX 2.2 7 13 3 1.4 5 1.15 1.5 25 11 43 14.5 14.5 3 10 18 4.5 2 15 1.4 1.8 35 47 17 17 UNITS mA mA mA mA V µA V V µA V V V V V = 30V, V16 = 15V, V4 = 0.5V V + = 30V, V16 = 15V, V6 = 0.8V V + = 30V, V16 = 15V, V6 = 2V V + = V13 = 30V, V16 = 45V, V6 = 0.8V + I16 V6 I6 V4 ∆V4 I4 V15 V9 V1 Boost Current Input Threshold Input Current Enable Low Threshold Enable Hysteresis Enable Pullup Current Charge Pump Voltage Bottom Gate “ON” Voltage Boost Drive Voltage 0.8 0.9 1.3 15 9 40 12 12 V6 = 5V V6 = 0.8V, Monitor V9 V6 = 0.8V, Monitor V9 V4 = 0V V + = 5V, V6 = 2V, Pin 16 open, V13 → 5V V + = 30V, V6 = 2V, Pin16 open, V13 → 30V V + = V16 = 18V, V6 = 0.8V V = V16 = 18V, V6 = 0.8V, 100mA Pulsed Load + q q q q q q q q 2 U W U U WW W LT1158 ELECTRICAL CHARACTERISTICS SYMBOL V8 I5 V5 PARAMETER Bottom Turn-Off Threshold Fault Output Leakage Fault Output Saturation CONDITIONS Test Circuit, TA = 25°C, V + = V16 = 12V, V11 = V12 = V13 = 0V, Pins 1 and 4 open, Gate Feedback pins connected to Gate Drive pins unless otherwise specified. MIN 1 1 q LT1158I TYP MAX 1.75 1.5 0.1 0.5 2.5 2 1 1 130 170 180 1.4 250 550 250 250 400 200 LT1158C MIN TYP MAX 1 1 1.75 1.5 0.1 0.5 85 120 120 1.1 110 150 1.25 130 350 120 130 200 100 2.5 2 1 1 135 180 180 1.4 250 550 250 250 400 200 UNITS V V µA V mV mV mV V ns ns ns ns ns ns V14 – V13 Top Turn-Off Threshold V = V16 = 5V, V6 = 0.8V V + = V16 = 5V, V6 = 2V V + = 30V, V16 = 15V, V6 = 2V V = 30V, V16 = 15V, V6 = 2V, I5 = 10mA V + = 30V, V16 = 15V, V6 = 2V, I5 = 100µA V + = 30V, V16 = 15V, V6 = 2V, Closed Loop q + + V12 – V11 Fault Conduction Threshold V12 – V11 Current Limit Threshold V12 – V11 Current Limit Inhibit VDS Threshold tR tD tF tR tD tF Top Gate Rise Time Top Gate Turn-Off Delay Top Gate Fall Time Bottom Gate Rise Time Bottom Gate Turn-Off Delay Bottom Gate Fall Time 90 130 120 1.1 q q q q q q 110 150 1.25 130 350 120 130 200 100 V + = V12 = 12V, V6 = 2V, Decrease V11 until V15 goes low Pin 6 (+) Transition, Meas. V15 – V13 (Note 3) Pin 6 (–) Transition, Meas. V15 – V13 (Note 3) Pin 6 (–) Transition, Meas. V15 – V13 (Note 3) Pin 6 (–) Transition, Meas. V9 (Note 3) Pin 6 (+) Transition, Meas. V9 (Note 3) Pin 6 (+) Transition, Meas. V9 (Note 3) The q denotes specifications that apply over the full operating temperature range. Note 1: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LT1158IN, LT1158CN: TJ = TA + (PD × 70°C/W) LT1158IS, LT1158CS: TJ = TA + (PD × 110°C/W) Note 2: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See typical performance characteristics and applications information. Note 3: Gate rise times are measured from 2V to 10V, delay times are measured from the input transition to when the gate voltage has decreased to 10V, and fall times are measured from 10V to 2V. TYPICAL PERFORMANCE CHARACTERISTICS DC Supply Current 14 I2 + I10 + I16 12 INPUT HIGH SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) V13 = 0V 12 V13 = V + 10 8 10 INPUT LOW 8 6 4 2 0 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 ENABLE LOW SUPPLY CURRENT (mA) UW LT1158 G01 DC Supply Current 14 I2 + I10 + I16 V + = 12V INPUT HIGH 30 25 20 15 10 5 0 Dynamic Supply Current (V +) 50% DUTY CYCLE CGATE = 3000pF V + = 24V V + = 12V V + = 6V INPUT LOW 6 4 2 0 –50 –25 ENABLE LOW 50 25 75 0 TEMPERATURE (°C) 100 125 1 10 INPUT FREQUENCY (kHz) 100 LT1158 G03 LT1158 G02 3 LT1158 TYPICAL PERFORMANCE CHARACTERISTICS Dynamic Supply Current 40 35 50% DUTY CYCLE V + = 12V TOP GATE VOLTAGE (V) INPUT THRESHOLD VOLTAGE (V) SUPPLY CURRENT (mA) 30 25 20 15 10 5 0 1 10 INPUT FREQUENCY (kHz) 100 LT1158 G04 CGATE = 10000pF CGATE = 3000pF CGATE = 1000pF Enable Thresholds 3.5 FAULT CONDUCTION THRESHOLD (mV) ENABLE THRESHOLD VOLTAGE (V) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 5 10 V(HIGH) –40°C +25°C +85°C 140 130 120 110 100 90 80 70 60 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 +85°C +25°C –40°C CURRENT LIMIT THRESHOLD (mV) –40°C +25°C V(LOW) +85°C 15 20 25 30 SUPPLY VOLTAGE (V) Current Limit Inhibit VDS Threshold 1.50 CURRENT LIMIT INHIBIT THRESHOLD (V) 1.45 1.40 1.35 1.30 1.25 1.20 1.15 1.10 1.05 1.00 0 V2 – V11 350 350 BOTTOM GATE FALL TIME (ns) BOTTOM GATE RISE TIME (ns) 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 4 UW 35 40 LT1158 G07 Charge Pump Output Voltage 50 45 40 35 30 25 20 15 10 5 0 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 10µA LOAD NO LOAD Input Thresholds 2.0 1.8 1.6 1.4 1.2 V(LOW) 1.0 0.8 0 5 V(HIGH) –40°C +25°C +85°C –40°C +25°C +85°C 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 LT1158 G05 LT1158 G06 Fault Conduction Threshold 160 150 V11 = 0V 200 190 180 170 160 150 140 130 120 110 100 Current Limit Threshold CLOSED LOOP +85°C +25°C –40°C 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 LT1158 G08 LT1158 G09 Bottom Gate Rise Time 400 400 Bottom Gate Fall Time 300 250 200 150 100 50 CGATE = 1000pF CGATE = 3000pF CGATE = 10000pF 300 250 200 150 100 50 0 CGATE = 10000pF –40°C +25°C +85°C CGATE = 3000pF CGATE = 1000pF 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 35 40 0 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 LT1158 G10 LT1158 G11 LT1158 G12 LT1158 TYPICAL PERFORMANCE CHARACTERISTICS Top Gate Rise Time 400 350 400 350 TOP GATE RISE TIME (ns) TOP GATE FALL TIME (ns) CGATE = 10000pF TRANSITION TIMES (ns) 300 250 200 150 100 50 0 0 5 CGATE = 10000pF CGATE = 3000pF CGATE = 1000pF 10 15 20 25 30 SUPPLY VOLTAGE (V) PI FU CTIO S Pin 1 (Boost Drive): Recharges and clamps the bootstrap capacitor to 14.5V higher than pin 13 via an external diode. Pin 2 (V +): Main supply pin; must be closely decoupled to the ground pin 7. Pin 3 (Bias): Decouple point for the internal 2.6V bias generator. Pin 3 cannot have any external DC loading. Pin 4 (Enable): When left open, the LT1158 operates normally. Pulling pin 4 low holds both MOSFETs off regardless of the input state. Pin 5 (Fault): Open collector NPN output which turns on when V12 – V11 exceeds the fault conduction threshold. Pin 6 (Input): Taking pin 6 high turns the top MOSFET on and bottom MOSFET off; pin 6 low reverses these states. An input latch captures each low state, ignoring an ensuing high until pin 13 has gone below 2.6V. Pin 8 (Bottom Gate Feedback): Must connect directly to the bottom power MOSFET gate. The top MOSFET turn-on is inhibited until pin 8 has discharged to 1.5V. A hold-on current source also feeds the bottom gate via pin 8. Pin 9 (Bottom Gate Drive): The high current drive point for the bottom MOSFET. When a gate resistor is used, it is inserted between pin 9 and the gate of the MOSFET. Pin 10 (V +): Bottom side driver supply; must be connected to the same supply as pin 2. Pin 11 (Sense Negative): The floating reference for the current limit comparator. Connects to the low side of a current shunt or Kelvin lead of a current-sensing MOSFET. When pin 11 is within 1.2V of V +, current limit is inhibited. Pin 12 (Sense Positive): Connects to the high side of the current shunt or sense lead of a current-sensing MOSFET. A built-in offset between pins 11 and 12 in conjunction with RSENSE sets the top MOSFET short-circuit current. Pin 13 (Top Source): Top side driver return; connects to MOSFET source and low side of the bootstrap capacitor. Pin 14 (Top Gate Feedback): Must connect directly to the top power MOSFET gate. The bottom MOSFET turn-on is inhibited until V14 – V13 has discharged to 1.75V. An onchip charge pump also feeds the top gate via pin 14. Pin 15 (Top Gate Drive): The high current drive point for the top MOSFET. When a gate resistor is used, it is inserted between pin 15 and the gate of the MOSFET. Pin 16 (Boost): Top side driver supply; connects to the high side of the bootstrap capacitor and to a diode either from supply (V + < 10V) or from pin 1 (V + > 10V). UW 35 40 LT1158 G13 Top Gate Fall Time 800 700 600 500 400 Transition Times vs RGate V + = 12V CGATE = 3000pF 300 250 200 150 100 RISE TIME FALL TIME CGATE = 3000pF 300 200 100 CGATE = 1000pF 50 0 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 40 0 0 10 20 30 40 50 60 70 80 90 100 GATE RESISTANCE (Ω) LT1158 G15 LT1158 G14 U U U 5 LT1158 FUNCTIONAL DIAGRA W V+ 16 BOOST CHG PUMP BOOST DR 1 V+ 2 V+ 15V 14 T GATE FB BIAS 3 BIAS GEN LOGIC INPUT T 25µA ENABLE 4 7.5V 15 T GATE DR 1.75V O 1-SHOT R INPUT 6 1.4V 1-SHOT R B GND 7 + 2.7V – 1.2V 110mV FAULT 5 S 7.5V 10 V + + – S Q Q 15V 9 B GATE DR R 6 – + – + – + U U V+ 13 T SOURCE + – 12 SENSE+ 11 SENSE– 2.6V 1.5V 8 B GATE FB 1158 FD LT1158 TEST CIRCUIT 150Ω 2W 1 2 BOOST DR V + BOOST T GATE DR T GATE FB T SOURCE LT1158 16 + 15 14 13 1µF VN2222LL + V16 + V+ + 10µF 0.01µF 3 4 BIAS ENABLE FAULT INPUT GND B GATE FB + V14 – V13 3000pF 2k 1/2W + V4 3k 1/2W V6 50Ω 5 6 7 8 12 SENSE+ SENSE – V + 11 10 9 100Ω CLOSED LOOP + V12 + V11 B GATE DR 3000pF + V8 LT1158 TC01 OPERATIO The LT1158 self-enables via an internal 25µA pull-up on the enable pin 4. When pin 4 is pulled down, much of the input logic is disabled, reducing supply current to 2mA. With pin 4 low, the input state is ignored and both MOSFET gates are actively held low. With pin 4 enabled, one or the other of the 2 MOSFETs is turned on, depending on the state of the input pin 6: high for top side on, and low for bottom side on. The 1.4V input threshold is regulated and has 200mV of hysteresis. In order to allow operation over 5V to 30V nominal supply voltages, an internal bias generator is employed to furnish constant bias voltages and currents. The bias generator is decoupled at pin 3 to eliminate any effects from switching transients. No DC loading is allowed on pin 3. The top and bottom gate drivers in the LT1158 each utilize two gate connections: 1) A gate drive pin, which provides the turn-on and turn-off currents through an optional series gate resistor; and 2) A gate feedback pin which connects directly to the gate to monitor the gate-to-source voltage and supply the DC gate sustaining current. U (Refer to Functional Diagram) Whenever there is an input transition on pin 6, the LT1158 follows a logical sequence to turn off one MOSFET and turn on the other. First, turn-off is initiated, then VGS is monitored until it has decreased below the turn-off threshold, and finally the other gate is turned on. An input latch gets reset by every low state at pin 6, but can only be set if the top source pin has gone low, indicating that there will be sufficient charge in the bootstrap capacitor to safely turn on the top MOSFET. In order to conserve power, the gate drivers only provide turn-on current for up to 2µs, set by internal one-shot circuits. Each LT1158 driver can deliver 500mA for 2µs, or 1000nC of gate charge –– more than enough to turn on multiple MOSFETs in parallel. Once turned on, each gate is held high by a DC gate sustaining current: the bottom gate by a 100µA current source, and the top gate by an on-chip charge pump running at approximately 500kHz. The floating supply for the top side driver is provided by a bootstrap capacitor between the boost pin 16 and top source pin 13. This capacitor is recharged each time pin 7 LT1158 OPERATIO 13 goes low in PWM operation, and is maintained by the charge pump when the top MOSFET is on DC. A regulated boost driver at pin 1 employs a source-referenced 15V clamp that prevents the bootstrap capacitor from overcharging regardless of V + or output transients. The LT1158 provides a current-sense comparator and fault output circuit for protection of the top power MOSFET. APPLICATIONS INFORMATION Power MOSFET Selection Since the LT1158 inherently protects the top and bottom MOSFETs from simultaneous conduction, there are no size or matching constraints. Therefore selection can be made based on the operating voltage and RDS(ON) requirements. The MOSFET BVDSS should be at least 2 × VSUPPLY, and should be increased to 3 × VSUPPLY in harsh environments with frequent fault conditions. For the LT1158 maximum operating supply of 30V, the MOSFET BVDSS should be from 60V to 100V. The MOSFET RDS(ON) is specified at TJ = 25°C and is generally chosen based on the operating efficiency required as long as the maximum MOSFET junction temperature is not exceeded. The dissipation in each MOSFET is given by: P = D IDS the MOSFET junction temperature will be 125°C, and ∂ = 0.007(125 – 25) = 0.7. This means that the required RDS(ON) of the MOSFET will be 0.089Ω /1.7 = 0.0523Ω, which can be satisfied by an IRFZ34. Note that these calculations are for the continuous operating condition; power MOSFETs can sustain far higher dissipations during transients. Additional RDS(ON) constraints are discussed under Starting High In-Rush Current Loads. Paralleling MOSFETs ( )( ) 2 1 + ∂ RDS(ON) where D is the duty cycle and ∂ is the increase in RDS(ON) at the anticipated MOSFET junction temperature. From this equation the required RDS(ON) can be derived: RDS(ON) = P D IDS ( ) (1+ ∂) 2 For example, if the MOSFET loss is to be limited to 2W when operating at 5A and a 90% duty cycle, the required RDS(ON) would be 0.089Ω /(1 + ∂). (1 + ∂) is given for each MOSFET in the form of a normalized RDS(ON) vs. temperature curve, but ∂ = 0.007/°C can be used as an approximation for low voltage MOSFETs. Thus if TA = 85°C and the available heat sinking has a thermal resistance of 20°C/W, 8 U W U U U (Refer to Functional Diagram) The comparator input pins 11 and 12 are normally connected across a shunt in the source of the top power MOSFET (or to a current-sensing MOSFET). When pin 11 is more than 1.2V below V + and V12 – V11 exceeds the 110mV offset, fault pin 5 begins to sink current. During a short circuit, the feedback loop regulates V12 – V11 to 150mV, thereby limiting the top MOSFET current. GATE DR LT1158 GATE FB RG RG RG: OPTIONAL 10Ω 1158 F01 Figure 1. Paralleling MOSFETs When the above calculations result in a lower RDS(ON) than is economically feasible with a single MOSFET, two or more MOSFETs can be paralleled. The MOSFETs will inherently share the currents according to their RDS(ON) ratio. The LT1158 top and bottom drivers can each drive four power MOSFETs in parallel with only a small loss in switching speeds (see Typical Performance Characteristics). Individual gate resistors may be required to “decouple” each MOSFET from its neighbors to prevent LT1158 APPLICATIONS INFORMATION high frequency oscillations –– consult manufacturer’s recommendations. If individual gate decoupling resistors are used, the gate feedback pins can be connected to any one of the gates. Driving multiple MOSFETs in parallel may restrict the operating frequency at high supply voltages to prevent over-dissipation in the LT1158 (see Gate Charge and Driver Dissipation below). When the total gate capacitance exceeds 10,000pF on the top side, the bootstrap capacitor should be increased proportionally above 0.1µF. Gate Charge and Driver Dissipation A useful indicator of the load presented to the driver by a power MOSFET is the total gate charge QG, which includes the additional charge required by the gate-to-drain swing. QG is usually specified for VGS = 10V and VDS = 0.8VDS(MAX). When the supply current is measured in a switching application, it will be larger than given by the DC electrical characteristics because of the additional supply current associated with sourcing the MOSFET gate charge: MOSFET Gate Drive Protection For supply voltages of over 8V, the LT1158 will protect standard N-channel MOSFETs from under or overvoltage gate drive conditions for any input duty cycle including DC. Gate-to-source zener clamps are not required and not recommended since they can reduce operating efficiency. A discontinuity in tracking between the output pulse width and input pulse width may be noted as the top side MOSFET approaches 100% duty cycle. As the input low signal becomes narrower, it may become shorter than the time required to recharge the bootstrap capacitor to a safe voltage for the top side driver. Below this duty cycle the output pulse width will stop tracking the input until the input low signal is 2VOUT, the switch is off longer than it is on, making the diode losses more significant than the switch. The worst case for the diode is during a short circuit, when VOUT approaches zero and the diode conducts the short-circuit current almost continuosly. Figure 3 shows the LT1158 used to synchronously drive a pair of power MOSFETs in a step-down regulator application, where the top MOSFET is the switch and the bottom MOSFET replaces the Schottky diode. Since both conduction paths have low losses, this approach can result in very high efficiency –– from 90% to 95% in most applications. And for regulators under 5A, using low RDS(ON) N-channel MOSFETs eliminates the need for heatsinks. VIN + T GATE DR T GATE FB RGS T SOURCE SENSE + RSENSE VOUT + SENSE – B GATE DR B GATE FB 1158 F03 LT1158 APPLICATIONS INFORMATION 100 90 EFFICIENCY (%) FIGURE 12 CIRCUIT VIN = 12V 80 70 60 0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT CURRENT (A) 3.5 4.0 LT1158 F04 Figure 4. Typical Efficiency Curve for Step-Down Regulator with Synchronous Switch One fundamental difference in the operation of a stepdown regulator with synchronous switching is that it never becomes discontinuous at light loads. The inductor current doesn’t stop ramping down when it reaches zero, but actually reverses polarity resulting in a constant ripple current independent of load. This does not cause any efficiency loss as might be expected, since the negative inductor current is returned to VIN when the switch turns back on. The LT1158 performs the synchronous MOSFET drive and current sense functions in a step-down switching regulator. A reference and PWM are required to complete the regulator. Any voltage-mode PWM controller may be used, but the LT3525 is particularly well suited to high power, high efficiency applications such as the 10A circuit shown in Figure 13. In higher current regulators a small Schottky diode across the bottom MOSFET helps to reduce reverse-recovery switching losses. The LT1158 input pin can also be driven directly with a ramp or sawtooth. In this case, the DC level of the input waveform relative to the 1.4V threshold sets the LT1158 duty cycle. In the 5V to 3.3V converter circuit shown in Figure 11, an LT1431 controls the DC level of a triangle wave generated by a CMOS 555. The Figure 10 and 12 circuits use an RC network to ramp the LT1158 input back up to its 1.4V threshold following each switch cycle, setting a constant off time. Figure 4 shows the U W U U efficiency vs. output current for the Figure 12 regulator with VIN = 12V. Current Limit in Switching Regulator Applications Current is sensed by the LT1158 by measuring the voltage across a current shunt (low valued resistor). Normally, this shunt is placed in the source lead of the top MOSFET (see Short-Circuit Protection in Bridge Applications). However, in step-down switching regulator applications, the remote current sensing capability of the LT1158 allows the actual inductor current to be sensed. This is done by placing the shunt in the output lead of the inductor as shown in Figure 3. Routing of the sense + and sense– PC traces is critical to prevent stray pickup. These traces must be routed together at minimum spacing and use a Kelvin connection at the shunt. When the voltage across RSENSE exceeds 110mV, the LT1158 fault pin begins to conduct. By feeding the fault signal back to a control input of the PWM, the LT1158 will assume control of the duty cycle forming a true current mode loop to limit the output current: IOUT = 110mV in current limit RSENSE In LT3525 based circuits, connecting the fault pin to the LT3525 soft-start pin accomplishes this function. In circuits where the LT1158 input is being driven with a ramp or sawtooth, the fault pin is used to pull down the DC level of the input. The constant off-time circuits shown in Figures 10 and 12 are unique in that they also use the current sense during normal operation. The LT1431 output reduces the normal LT1158 110mV fault conduction threshold such that the fault pin conducts at the required load current, thus discharging the input ramp capacitor. In current limit the LT1431 output turns off, allowing the fault conduction threshold to reach its normal value. The resistor RGS shown in Figure 3 is necessary to prevent output voltage overshoot due to charge coupled into the gate of the top MOSFET by a large start-up dv/dt on VIN. If DC operation of the top MOSFET is required, RGS must be 330k or greater to prevent loading the charge pump. 11 LT1158 APPLICATIONS INFORMATION Low Current Shutdown The LT1158 may be shutdown to a current level of 2mA by pulling the enable pin 4 low. In this state both the top and bottom MOSFETs are actively held off against any transients which might occur on the output during shutdown. This is important in applications such as 3-phase DC motor control when one of the phases is disabled while the other two are switching. If zero standby current is required and the load returns to ground, then a switch can be inserted into the supply path of the LT1158 as shown in Figure 5. Resistor RGS ensures that the top MOSFET gate discharges, while the voltage across the bottom MOSFET goes to zero. The voltage drop across the P-channel supply switch must be less than 300mV, and RGS must be 330k or greater for DC operation. This technique is not recommended for applications which require the LT1158 VDS sensing function. V+ 100k VP0300 V+ 2N2222 100k CMOS ON/OFF TO OTHER CONTROL CIRCUITS V+ T SOURCE LT1158 T GATE DR T GATE FB RGS + GND B GATE DR B GATE FB 1158 F05 Figure 5. Adding Zero Current Shutdown Short-Circuit Protection in Bridge Applications The LT1158 protects the top power MOSFET from output shorts to ground, or in a full bridge application, shorts across the load. Both standard 3-lead MOSFETs and current-sensing 5-lead MOSFETs can be protected. The bottom MOSFET is not protected from shorts to supply. Current is sensed by measuring the voltage across a current shunt in the source lead of a standard 3-lead MOSFET (Figure 6). For the current-sensing MOSFET T SOURCE 5V 10k FAULT SENSE – LT1158 SENSE + 12 U W U U shown in Figure 7, the sense resistor is inserted between the sense and Kelvin leads. The sense+ and sense– PC traces must be routed together at minimum spacing to prevent stray pickup, and a Kelvin connection must be used at the current shunt for the 3lead MOSFET. Using a twisted pair is the safest approach and is recommended for sense runs of several inches. When the voltage across RSENSE exceeds 110mV, the LT1158 fault pin begins to conduct, signaling a fault condition. The current in a short circuit ramps very rapidly, limited only by the series inductance and ultimately the MOSFET and shunt resistance. Due to the response time of the LT1158 current limit loop, an initial current spike of V+ + T GATE DR T GATE FB + 5V 10k FAULT LT1158 T SOURCE SENSE + RSENSE SENSE – 1158 F06 LOAD Figure 6. Short-Circuit Protection with Standard MOSFET V+ + T GATE DR T GATE FB SENSE KELVIN RSENSE OUTPUT 1158 F07 Figure 7. Short-Circuit Protection with Current-Sensing MOSFET LT1158 APPLICATIONS INFORMATION from 2 to 5 times the final value will be present for a few µs, followed by an interval in which IDS = 0. The current spike is normally well within the safe operating area (SOA) of the MOSFET, but can be further reduced with a small (0.5µH) inductor in series with the output. value of RSENSE for the 5-lead MOSFET increases by the current sensing ratio (typically 1000 – 3000), thus eliminating the need for a low valued shunt. ∆V is in the range of 1V to 3V in most applications. Assuming a dead short, the MOSFET dissipation will rise to VSUPPLY × ISC. For example, with a 24V supply and ISC = 10A, the dissipation would be 240W. To determine how long the MOSFET can remain at this dissipation level before it must be shut down, refer to the SOA curves given in the MOSFET data sheet. For example, an IRFZ34 would be safe if shut down within 10ms. A Tektronix A6303 current probe is highly recommended for viewing output fault currents. If Short-Circuit Protection is Not Required LT1158 F08 5A/DIV ISC 5µs/DIV Figure 8. Top MOSFET Short-Circuit Turn-On current If neither the enable nor input pins are pulled low in response to the fault indication, the top MOSFET current will recover to a steady-state value ISC regulated by the LT1158 as shown in Figure 8: 150mV ISC = RSENSE 150mV RSENSE = ISC Standard 3-Lead MOSFET −2 r 150mV  150mV  ISC = 1− ∆V  RSENSE    ( ) r 150mV  150mV  RSENSE =  1− ∆  ISC V  ( ) −2 5-Lead MOSFET r = current sense ratio, ∆V = VGS = VGS − VT The time for the current to recover to ISC following the initial current spike is approximately QGS/0.5mA, where QGS is the MOSFET gate-to-source charge. ISC need not be set higher than the required start-up current for motors (see Starting High In-Rush Current Loads). Note that the U W U U In applications which do not require the current sense capability of the LT1158, the sense pins 11 and 12 should both be connected to pin 13, and the fault pin 5 left open. The enable pin 4 may still be used to shut down the device. Note, however, that when unprotected the top MOSFET can be easily (and often dramatically) destroyed by even a momentary short. Self-Protection with Automatic Restart When using the current sense circuits of Figures 6 and 7, local shutdown can be achieved by connecting the fault pin through resistor RF to the enable pin as shown in Figure 9. An optional thermostat mounted to the load or MOSFET heatsink can also be used to pull enable low. An internal 25µA current source normally keeps the enable capacitor CEN charged to the 7.5V clamp voltage (or to V +, for V+ < 7.5V). When a fault occurs, CEN is discharged to below the enable low threshold (1.15V typ.) which shuts down both MOSFETs. When the fault pin or thermostat releases, CEN recharges to the upper enable threshold where restart is attempted. In a sustained short circuit, fault will again pull low and the cycle will repeat until the short is removed. The time to shut down for a DC input or thermal fault is given by: tSHUTDOWN = (100 + 0.8RF) CEN DC input 13 LT1158 APPLICATIONS INFORMATION Note that for the first event only, tSHUTDOWN is approximately twice the above value since CEN is being discharged all the way from its quiescent voltage. Allowable values for RF are from zero to 10k. 7.5V 1.15V ENABLE CEN 1µF 25µA + 7.5V RF 1k FAULT LT1158 OPTIONAL THERMOSTAT CLOSE ON RISE AIRPAX #67FXXX 1158 F09 Figure 9. Self-Protection with Auto Restart tSHUTDOWN becomes more difficult to analyze when the output is shorted with a PWM input. This is because the fault pin only conducts when fault currents are actually present in the MOSFET. Fault does not conduct while the input is low in Figures 6 and 7 or during the interval IDS = 0 in Figure 8. Thus tSHUTDOWN will safely increase when the duty cycle of the current in the top MOSFET is low, maintaining the average MOSFET current at a relatively constant level. The length of time following shutdown before restart is attempted is given by:  1.5V  4  t RESTART =   CEN =  6 × 10  CEN  25µA  In Figure 9, the top MOSFET would shut down after being in DC current limit for 0.9ms and try to restart at 60ms intervals, thus producing a duty cyle of 1.5% in short circuit. The resulting average top MOSFET dissipation during a short is easily measured by taking the product of the supply voltage and the average supply current. Starting High In-Rush Current Loads The LT1158 has a VDS sensing function which allows more than ISC to flow in the top MOSFET providing that the 14 U W U U sense – pin is within 1.2V of supply. Under these conditions the current is limited only by the RDS(ON) in series with RSENSE. For a 5-lead MOSFET the current is limited by RDS(ON) alone, since RSENSE is not in the output path (see Figure 7). Again adjusting RDS(ON) for temperature, the worst-case start currents are: ISTART = ISTART = ( ) () 1.2V 1.2V 1 + ∂ RDS ON + RSENSE 3-Lead MOSFET (1+ ∂)RDS(ON) 5-Lead MOSFET Properly sizing the MOSFET for ISTART allows inductive loads with long time constants, such as motors with high mechanical inertia, to be started. Returning to the example used in Power MOSFET Selection, an IRFZ34 (RDS(ON) = 0.05Ω max.) was selected for operation at 5A. If the short-circuit current is also set at 5A, what start current can be supported? From the equation for RSENSE, a 0.03Ω shunt would be required, allowing the worst-case start current to be calculated: ISTART = (1.7)0.05 Ω +0.03Ω 1 .2V = 10A This calculation gives the minimum current which could be delivered with the IRFZ34 at TJ = 125°C without activating the fault pin on the LT1158. If more start current is required, using an IRFZ44 (RDS(ON) = 0.028Ω max.) would increase ISTART to over 15A at TJ = 110°C, even though the short-circuit current remains at 5A. In order for the VDS sensing function to work properly, the supply pins for the LT1158 must be connected at the drain of the top MOSFET, which must be properly decoupled (see Ugly Transient Issues). Driving Lamps Incandescent lamps represent a challenging load because they have much in common with a short circuit when cold. The top gate driver in the LT1158 can be configured to turn on large lamps while still protecting the power MOSFET LT1158 APPLICATIONS INFORMATION from a true short. This is done by using the current limit to control cold filament current in conjunction with the selfprotection circuit of Figure 9. The reduced cold filament current also extends the life of the filament. A good guideline is to choose RSENSE to set ISC at approximately twice the steady state “on” current of the lamp(s). tSHUTDOWN is then made long enough to guarantee that the lamp filaments heat and drop out of current limit before the enable capacitor discharges to the enable low threshold. For a short circuit, the enable capacitor will continue to discharge below the threshold, shutting down the top MOSFET. The LT1158 will then go into the automatic restart mode described in Self-Protection with Automatic Restart above. The time constant for an incandescent filament is tens of milliseconds, which means that tSHUTDOWN will have to be longer than in most other applications. This places increased SOA demands on the MOSFET during a short circuit, requiring that a larger than normal device be used. A protected high current lamp driver application is shown in Figure 18. TYPICAL APPLICATIONS 5V TO 10V INPUT (USE LOGIC-LEVEL Q1, Q2) 1N4148 100k 8V TO 20V INPUT (USE STANDARD Q1, Q2 AND CONNECT BOOST DIODE TO PIN 1) 16 Q1 15 14 13 100Ω 100Ω Q2 7 Q1, Q2: IRLZ44 (LOGIC-LEVEL) IRFZ44 (STANDARD) L1: HURRICANE LAB HL-KK122T/BB RS: VISHAY/DALE TYPE LVR-3 VISHAY/ULTRONIX RCS01, SM1 ISOTEK CORP. ISA-PLAN SMR CONSTANT OFF TIME CURRENT MODE CONTROL LOOP FREQUENCY = 1 tOFF 8 24k 510Ω 1000pF 0.05µF 1k 1N4148 1 2 3 4 LT1431 8 7 6 5 LT1158 F10 × VP0300 INSERT FOR ZERO POWER SHUTDOWN 1 2 0.01µF 3 4 10µF 5 6 BOOST DR V + BIAS ENABLE LT1158 FAULT INPUT GND B GATE FB 100k 2N2222 CMOS ON/OFF + (1 – VV ) WHERE t OUT IN OFF ≈ 10µs Figure 10. High Efficiency 3.3V Step-Down Switching Regulator (Requires No Heatsinks) U W U U U BOOST T GATE DR T GATE FB T SOURCE SENSE + 500µF LOW ESR SHORT-CIRCUIT RS CURRENT = 8A 0.015Ω +3.3V/6A OUTPUT – 0.1µF 680k L1 22µH + + 12 + 1000µF LOW ESR SENSE – V 11 + 10 B GATE DR 9 1.62k 1% 4.99k 1% 200pF 15 LT1158 TYPICAL APPLICATIONS DRIVER SUPPLY 10V TO 15V (CAN BE POWERED FROM VIN WITH LOGIC-LEVEL Q1, Q2) 0.01µF 1 2 3 3.3k 4 LT1431 16k 0.33µF VIN 4.5V TO 6V 8 7 6 5 200pF 0.01µF 4.99k 1% SHUTDOWN 1000pF 1 2 24k 3 4 CMOS 555 8 7 6 5 RX 1% 470pF VOUT RX (1%) 2.90V 3.05V 806Ω 1.10k 3.30V 1.62k 3.45V 3.60V 1.91k 2.21k Figure 11. 5V to 3.XXV,15A Converter (Uses PC Board Area for Heatsink) 8V TO 20V INPUT 1N4148 100k × VP0300 INSERT FOR ZERO POWER SHUTDOWN 100k 2N2222 CMOS ON/OFF + 24k 510Ω L1: COILTRONICS CTX50-5-52 RS: VISHAY/DALE TYPE LVR-3 VISHAY/ULTRONIX RCS01, SM1 ISOTEK CORP. ISA-PLAN SMR CONSTANT OFF TIME CURRENT MODE CONTROL LOOP V FREQUENCY = 1 – OUT VIN tOFF 1 SEE FIGURE 4 FOR EFFICIENCY CURVE 1000pF 0.05µF 1k 1N4148 1 2 3 4 LT1431 8 7 6 5 LT1158 F12 ( ) WHERE t OFF ≈ 10µs Figure 12. High Efficiency 5V Step-Down Switching Regulator (Requires No Heatsinks) 16 U + 10µF 1 2 3 4 5 6 7 8 BOOST DR V+ BIAS ENABLE LT1158 FAULT INPUT GND B GATE FB BOOST T GATE DR T GATE FB T SOURCE SENSE+ SENSE – V+ B GATE DR 16 15 14 13 12 11 10 9 BAS16 + Q1 220µF 10V OS-CON × 4 SHORT-CIRCUIT CURRENT = 22A RS 0.22µF 500k L1 8µH + – 0.01Ω EA + VOUT 15A 330µF 6.3V AVX × 4 Q2 LT1158 F11 Q1, Q2: MTB75N05HD (USE WITH 10V TO 15V DRIVER SUPPLY) MTB75N03HDL (USE WITH VIN DRIVER SUPLY) CMOS 555: LMC555 OR TLC555 L1: COILTRONICS CTX02-12171-1 RS: KRL/BANTRY SL-1R010J × 2 1 2 0.01µF 3 4 10µF 5 6 7 8 BOOST DR V+ BIAS ENABLE LT1158 FAULT INPUT GND B GATE FB BOOST T GATE DR T GATE FB T SOURCE SENSE+ SENSE – V+ B GATE DR 16 IRFZ34 15 14 13 12 11 10 9 100Ω 100Ω IRFZ44 0.1µF + 500µF LOW ESR SHORT-CIRCUIT CURRENT = 6A 510k L1 50µH RS 20mΩ + – + +5V/4A OUTPUT 1000µF LOW ESR LT1158 TYPICAL APPLICATIONS SHUTDOWN 0.01µF 4.7k 1 16 15 14 10µF 13 LT3525 5 0.01µF 6 27k 7 510Ω 1µF 8 9 10 7 GND B GATE FB V+ B GATE DR 10 9 (2) IRFZ44 11 12 1N4148 5 6 FAULT INPUT 0.1µF 2 EXT SYNC 2.2nF 3 4 f = 25kHz 2 4.7k 1N4148 1µF 1 BOOST DR V+ BIAS ENABLE LT1158 BOOST T GATE DR T GATE FB T SOURCE SENSE+ SENSE 16 IRFZ44 15 14 13 12 0.1µF 330k SHORT-CIRCUIT CURRENT = 15A L1 70µH RS 0.007Ω INPUT 30V MAX * 3.4k + 30k * ADD THESE COMPONENTS TO IMPLEMENT LOW-DROPOUT 12V REGULATOR Figure 13. 90% Efficiency 24V to 5V 10A Switching Regulator 95% Efficiency 24V to 12V 10A Low Dropout Switching Regulator MOTOR SPEED 0 TO 100% 10k 1µF + 7.5k 1N5231A 0.01µF 1 2 13k 3 4 CMOS 555 8 7 6 5 2.2nF THE CMOS 555 IS USED AS A 25kHz TRIANGLE-WAVE OSCILLATOR DRIVING THE LT1158 INPUT PIN. THE D.C. LEVEL OF THE TRIANGLE WAVE IS SET BY THE POTENTIOMETER ON THE CMOS 555 SUPPLY PIN, AND ALLOW ADJUSTMENT OF THE LT1158 DUTY CYCLE FROM 0 TO 100%. Figure 14. Potentiometer-Adjusted Open Loop Motor Speed Control with Short-Circuit Protection U + + 500µF EA LOW ESR + 0.01µF 3 4 1N4148 + – + 5V OR 12V* 1000µF LOW ESR – 11 * 330pF 10k 8 + MBR340 LT1158 F13 L1: MAGNETICS CORE #55585-A2 30 TURNS 14GA MAGNET WIRE RS: DALE TYPE LVR-3 ULTRONIX RCS01 5.1k 1N4148 1 2 10µF 16 15 14 13 24Ω 0.1µF 10V TO 30V BOOST DR V + BOOST T GATE DR T GATE FB T SOURCE LT1158 SENSE + 1000µF LOW ESR + 0.33µF 3 4 1k 5 6 510Ω 7 8 BIAS ENABLE FAULT INPUT GND B GATE FB Q1 + 12 + START CURRENT = 15A MINIMUM 0.02Ω SENSE – V+ B GATE DR 11 – 10 9 24Ω Q2 Μ CMOS 555: LMC555 OR TLC555 Q1, Q2: MTP35N06E LT1158 F14 17 LT1158 TYPICAL APPLICATIONS 7.2V NOMINAL BAT85 1 2 BOOST DR V+ BIAS ENABLE LT1158 FAULT INPUT GND B GATE FB BOOST T GATE DR T GATE FB T SOURCE SENSE SENSE 16 15 14 13 15Ω 0.1µF + STOP (FREE RUN) 1N4148 + PWM Figure 15. High Efficiency 6-Cell NiCd Protected Motor Drive LT1158 ENABLE FAULT 5V INPUT φA SHUTDOWN COMMUTATING LOGIC PWM CONTROLS LT1158 INPUTS POSITION FEEDBACK CONTROLS LT1158 ENABLE INPUTS 1158 F16 18 U + 100µF 10µF 0.01µF 3 4 Q1 START CURRENT = 25A MINIMUM RS 0.015Ω 1µF 1k 5 6 7 8 + 12 – 11 + V+ B GATE DR 10 9 15Ω – Q2 Μ Q1, Q2: IRLZ44 (LOGIC-LEVEL) RS: DALE TYPE LVR-3 ULTRONIX RCS01 LT1158 F15 V+ LT1158 ENABLE FAULT INPUT V+ LT1158 ENABLE φB FAULT INPUT V+ φC Figure 16. 3-Phase Brushless DC Motor Control LT1158 TYPICAL APPLICATIONS 1N4148 1 2 0.01µF 3 ENABLE A FAULT A INPUT A 4 10µF 5 6 7 8 16 15 14 13 12 15Ω D1 0.1µF Q1 10V TO 30V BOOST DR V + BIAS ENABLE LT1158 FAULT INPUT GND B GATE FB + 1 2 0.01µF 3 4 BOOST DR V + BIAS ENABLE LT1158 FAULT INPUT GND B GATE FB ENABLE B FAULT B INPUT B + 10µF 5 6 7 8 Control Logic for Sign/Magnitude Drive ENABLE A 74HC02 FAULT A INPUT A PWM PWM DIRECTION 1N4148 STOP (FREE RUN) ENABLE B + 1µF Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U BOOST T GATE DR T GATE FB T SOURCE SENSE+ SENSE V + 470µF LOW ESR SIDE A: SHOWS STANDARD MOSFET CONNECTION + RS 0.015Ω Q2 15Ω – 11 – 2.4k + 10 B GATE DR 9 1N4148 16 15 14 13 12 11 10 9 15Ω 47Ω Q4 Q1, Q3: IRF540 (STANDARD) IRC540 (SENSE FET) Q2, Q4: IRFZ44 D1, D2: BAT83 RS: DALE TYPE LVR-3 ULTRONIX RCS01 LT1158 F17a + 15Ω D2 0.1µF Q3 BOOST T GATE DR T GATE FB T SOURCE SENSE+ SENSE – V+ B GATE DR 470µF LOW ESR Μ SIDE B: SHOWS CURRENT-SENSING MOSFET CONNECTION + – 2.4k Control Logic for Locked Anti-Phase Drive Motor stops if either side is shorted to ground 5V 74HC132 5.1k 0.01µF FAULT A INPUT A ENABLE A 150k 0.1µF ENABLE B 1N4148 FAULT B INPUT B 1158F17c FAULT B INPUT B 1158F17b Figure 17. 10A Full Bridge Motor Control 19 LT1158 TYPICAL APPLICATIONS 12V 1N4148 1 2 16 IRCZ44 15 14 13 12 11 10 9 ISC: 10A t SHUTDOWN = 50ms tRESTART = 600ms 51Ω MBR330 12V 55W 0.1µF + 10µF + 10µF ON/OFF Figure 18. High Current Lamp Driver with Short-Circuit Protection PACKAGE DESCRIPTION 0.300 – 0.325 (7.620 – 8.255) 0.130 ± 0.005 (3.302 ± 0.127) 0.009 – 0.015 (0.229 – 0.381) 0.015 (0.381) MIN ( +0.025 0.325 –0.015 8.255 +0.635 –0.381 ) 0.125 (3.175) MIN 0.005 (0.127) RAD MIN 0.291 – 0.299 (7.391 – 7.595) (NOTE 2) 0.010 – 0.029 × 45° (0.254 – 0.737) 0° – 8° TYP 0.050 (1.270) TYP 0.394 – 0.419 (10.007 – 10.643) 0.009 – 0.013 (0.229 – 0.330) NOTE 1 0.016 – 0.050 (0.406 – 1.270) NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS. 2. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm). 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977 U U + BOOST DR V+ BIAS ENABLE LT1158 FAULT INPUT GND B GATE FB BOOST T GATE DR T GATE FB T SOURCE SENSE+ SENSE – V+ B GATE DR 1000µF 0.01µF 3 4 6.2k 5 6 7 8 + – LT1158 F18 Dimensions in inches (millimeters) unless otherwise noted. N Package 16-Lead Plastic DIP 0.045 – 0.065 (1.143 – 1.651) 0.770 (19.558) MAX 16 15 14 13 12 11 10 9 0.065 (1.651) TYP 0.260 ± 0.010 (6.604 ± 0.254) 1 0.045 ± 0.015 (1.143 ± 0.381) 0.100 ± 0.010 (2.540 ± 0.254) 0.018 ± 0.003 (0.457 ± 0.076) 2 3 4 5 6 7 8 S Package 16-Lead Plastic SOL 0.093 – 0.104 (2.362 – 2.642) 0.037 – 0.045 (0.940 – 1.143) 16 15 0.398 – 0.413 (10.109 – 10.490) (NOTE 2) 14 13 12 11 10 9 0.004 – 0.012 (0.102 – 0.305) NOTE 1 0.014 – 0.019 (0.356 – 0.482) TYP 1 2 3 4 5 6 7 8 LT/GP 0394 5K REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1994