LT1168CS8

FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ LT1168 Low Power, Single Resistor Gain Programmable, Precision Instrumentation Amplifier DESCRIPTIO The LT ®1168 is a micropower, precision instrumentation amplifier that requires only one external resistor to set gains of 1 to 10,000. The low voltage noise of 10nV/√Hz (at 1kHz) is not compromised by low power dissipation (350µA typical for ±15V supplies). The wide supply range of ± 2.3V to ± 18V allows the LT1168 to fit into a wide variety of industrial as well as battery-powered applications. The high accuracy of the LT1168 is due to a 20ppm maximum nonlinearity and 0.4% max gain error (G = 10). Previous monolithic instrumentation amps cannot handle a 2k load resistor whereas the nonlinearity of the LT1168 is specified for loads as low as 2k. The LT1168 is laser trimmed for very low input offset voltage (40µV max), drift (0.3µV/°C), high CMRR (90dB, G = 1) and PSRR (103dB, G = 1). Low input bias currents of 250pA max are achieved with the use of superbeta processing. The output can handle capacitive loads up to 1000pF in any gain configuration while the inputs are ESD protected up to 13kV (human body). The LT1168 with two external 5k resistors passes the IEC 1000-4-2 level 4 specification. The LT1168 is a pin-for-pin improved second source for the AD620 and INA118. The LT1168, offered in 8-pin PDIP and SO packages, requires significantly less PC board area than discrete op amp resistor designs. These advantages make the LT1168 the most cost effective solution for precision instrumentation amplifier applications. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Supply Current: 530µA Max Meets IEC 1000-4-2 Level 4 (±15kV) ESD Tests with Two External 5k Resistors Single Gain Set Resistor: G = 1 to 10,000 Gain Error: G = 10, 0.4% Max Input Offset Voltage Drift: 0.3µV/°C Max Gain Nonlinearity: G = 10, 20ppm Max Input Offset Voltage: 40µV Max Input Bias Current: 250pA Max PSRR at AV =1: 103dB Min CMRR at AV = 1: 90dB Min Wide Supply Range: ± 2.3V to ± 18V 1kHz Voltage Noise: 10nV/√Hz 0.1Hz to 10Hz Noise: 0.28µVP-P Available in 8-Pin PDIP and SO Packages APPLICATIO S ■ ■ ■ ■ ■ ■ ■ ■ ■ Bridge Amplifiers Strain Gauge Amplifiers Thermocouple Amplifiers Differential to Single-Ended Converters Differential Voltage to Current Converters Data Acquisition Battery-Powered and Portable Equipment Medical Instrumentation Scales TYPICAL APPLICATIO 5V Single Supply* Pressure Monitor BI TECHNOLOGIES 67-8-3 R40KQ, (0.02% RATIO MATCH) 1 3.5k 3.5k 3 8 R1 G = 200 249Ω 1 2 + 40k 7 REF LT1168 5 6 20k 3 40k 2 IN ADC LTC®1286 1 AGND DIGITAL DATA OUTPUT 3.5k 3.5k – + 1/2 LT1112 4 – 1168 TA01 NONLINEARITY (100ppm/DIV) *See Theory of Operation section U U U Gain Nonlinearity G = 1000 RL = 2 k VOUT = ± 10V OUTPUT VOLTAGE (2V/DIV) 1168 TA01a 1168fa 1 LT1168 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO Supply Voltage ...................................................... ± 20V Differential Input Voltage (Within the Supply Voltage) ..................................................... ± 40V Input Voltage (Equal to Supply Voltage) ................ ± 20V Input Current (Note 2) ....................................... ± 20mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4) .. – 40°C to 85°C Specified Temperature Range LT1168AC/LT1168C (Note 5) ............. – 40°C to 85°C LT1168AI/LT1168I ............................. – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ ORDER PART NUMBER TOP VIEW RG 1 –IN 2 +IN 3 –VS 4 N8 PACKAGE 8-LEAD PDIP S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 150°C/ W (N8) TJMAX = 150°C, θJA = 190°C/ W (S8) 8 – + 7 6 5 RG +VS OUTPUT REF LT1168ACN8 LT1168ACS8 LT1168AIN8 LT1168AIS8 LT1168CN8 LT1168CS8 LT1168IN8 LT1168IS8 S8 PART MARKING 1168 1168A 1168AI 1168I Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL G PARAMETER Gain Range Gain Error TA = 25°C. VS = ± 15V, VCM = 0V, RL = 10k unless otherwise noted. LT1168AC/LT1168AI MIN TYP MAX 1 0.008 0.04 0.04 0.08 2 10 20 4 20 40 15 40 50 40 10k 0.02 0.4 0.5 0.5 6 20 40 15 40 75 40 200 300 250 LT1168C/LT1168I MIN TYP MAX 1 0.015 0.05 0.05 0.08 3 15 25 5 30 50 20 50 60 80 2.00 0.28 15 220 10 165 5 74 200 1250 15 220 10k 0.03 0.5 0.6 0.6 10 25 60 20 60 90 60 300 450 500 % % % % ppm ppm ppm ppm ppm ppm µV µV pA pA µVP-P µVP-P nV/√Hz nV/√Hz pAP-P fA/√Hz GΩ UNITS CONDITIONS (Note 6) G = 1 + (49.4k/RG) G=1 G = 10 (Note 7) G = 100 (Note 7) G = 1000 (Note 7) VO = ±10V, G = 1 VO = ±10V,G = 10 and 100 VO = ±10V, G = 1000 VO = ±10V, G = 1, RL = 2k VO = ±10V,G = 10 and 100, RL = 2k VO = ±10V, G = 1000, RL = 2k Gain Nonlinearity (Notes 7, 8) VOST VOSI VOSO IOS IB en Total Input Referred Offset Voltage VOST = VOSI + VOSO/G Input Offset Voltage Output Offset Voltage Input Offset Current Input Bias Current Input Noise Voltage, RTI Input Noise Voltage Density, RTI 0.1Hz to 10Hz, G = 1 0.1Hz to 10Hz, G = 1000 fO = 1kHz G = 1000, VS = ± 5V to ±15V G = 1, VS = ± 5V to ±15V 2.00 0.28 10 165 5 74 300 1250 in RIN Output Noise Voltage Density, RTI fO = 1kHz (Note 9) Input Noise Current fO = 0.1Hz to 10Hz Input Noise Current Density Input Resistance fO = 10Hz VIN = ±10V 2 U 1168fa W U U WW W LT1168 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CIN(DIFF) CIN(CM) VCM Differential Input Capacitance Common Mode Input Capacitance Input Voltage Range fO = 100kHz fO = 100kHz TA = 25°C. VS = ± 15V, VCM = 0V, RL = 10k unless otherwise noted. LT1168AC/LT1168AI MIN TYP MAX 1.6 1.6 LT1168C/LT1168I MIN TYP MAX 1.6 1.6 UNITS pF pF CONDITIONS (Note 6) G = 1, Other Input Grounded VS = ± 2.3V to ± 5V VS = ± 5V to ±18V 1k Source Imbalance, VCM = 0V to ±10V G=1 G = 10 G = 100 G = 1000 VS = ±2.3V to ±18V G=1 G = 10 G = 100 G = 1000 VS = ± 2.3V to ± 18V RL = 10k VS = ± 2.3V to ± 5V VS = ± 5V to ±18V G=1 G = 10 G = 100 G = 1000 G = 1, VOUT = ±10V 10V Step G = 1 to 100 G = 1000 VREF = 0V –VS + 1.9 –VS + 1.9 +VS – 1.2 +VS – 1.4 –VS + 1.9 –VS + 1.9 +VS – 1.2 +VS – 1.4 V V CMRR Common Mode Rejection Ratio 90 106 120 126 103 122 131 135 95 115 135 140 108 128 145 150 350 530 +VS – 1.2 +VS – 1.3 32 400 200 13 1 85 100 110 120 100 118 126 130 95 115 135 140 108 128 145 150 350 530 +VS – 1.2 +VS – 1.3 32 400 200 13 1 dB dB dB dB dB dB dB dB µA V V mA kHz kHz kHz kHz V/µs µs µs kΩ µA +VS – 1.6 V PSRR Power Supply Rejection Ratio IS VOUT Supply Current Output Voltage Swing –VS + 1.1 –VS + 1.2 20 –VS + 1.1 –VS + 1.2 20 IOUT BW Output Current Bandwidth SR Slew Rate Settling Time to 0.01% 0.3 0.5 30 200 60 18 0.3 0.5 30 200 60 18 REFIN IREFIN VREF AVREF Reference Input Resistance Reference Input Current Reference Voltage Range Reference Gain to Output –VS + 1.6 +VS – 1.6 –VS + 1.6 1 ± 0.0001 1 ± 0.0001 The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C temperature range. VS = ± 15V, VCM = 0V, RL = 10k unless otherwise noted. SYMBOL PARAMETER Gain Error CONDITIONS (Note 6) G=1 G = 10 (Note 7) G = 100 (Note 7) G = 1000 (Note 7) VOUT = ±10V, G = 1 VOUT = ±10V, G = 10 and 100 VOUT = ±10V, G = 1000 G < 1000 (Note 7) ● ● ● ● ● ● ● ● MIN LT1168AC TYP 0.01 0.40 0.45 0.50 2 7 25 100 MAX 0.03 1.5 1.6 1.7 15 30 60 200 MIN LT1168C TYP 0.012 0.500 0.550 0.600 3 10 30 100 MAX 0.04 1.6 1.7 1.8 20 35 80 200 UNITS % % % % ppm ppm ppm ppm/°C 1168fa Gain Nonlinearity (Notes 7, 8) ∆G/∆T Gain vs Temperature 3 LT1168 The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C temperature range. VS = ±15V, VCM = 0V, RL = 10k unless otherwise noted. SYMBOL PARAMETER VOST VOSI VOSIH VOSO VOSOH VOSI/T VOSO/T IOS IOS/T IB IB/T VCM Input Offset Voltage Input Offset Voltage Hysteresis Output Offset Voltage Input Offset Drift (RTI) Output Offset Drift Input Offset Current Input Offset Current Drift Input Bias Current Input Bias Current Drift Input Voltage Range G = 1, Other Input Grounded VS = ± 2.3V to ± 5V VS = ± 5V to ± 18V 1k Source Imbalance, VCM = 0V to ±10V G=1 G = 10 G = 100 G = 1000 VS = ± 2.3V to ±18V G=1 G = 10 G = 100 G = 1000 VS = ± 2.3V to ±18V RL = 10k VS = ± 2.3V to ± 5V VS = ± 5V to ± 18V G = 1, VOUT = ±10V (Note 9) CONDITIONS (Note 6) VOST = VOSI + VOSO/G ● ● ● ● ● ● ● ● ● ● ● ● ELECTRICAL CHARACTERISTICS MIN LT1168AC TYP 18 3.0 60 30 0.05 0.7 100 0.3 65 1.4 MAX 60 380 0.3 3 400 350 MIN LT1168C TYP 23 3.0 70 30 0.06 0.8 120 0.4 105 1.4 MAX 80 500 0.4 4 550 600 UNITS µV µV µV µV µV/°C µV/°C pA pA/°C pA pA/°C Total Input Referred Offset Voltage VS = ± 5V to ± 15V (Notes 7, 10) VS = ± 5V to ± 15V (Note 9) (Note 9) Output Offset Voltage Hysteresis (Notes 7, 10) –VS + 2.1 –VS + 2.1 +VS – 1.3 –VS + 2.1 +VS – 1.4 –VS + 2.1 +VS – 1.3 +VS – 1.4 V V CMRR Common Mode Rejection Ratio ● ● ● ● ● ● ● ● ● ● ● ● ● ● 88 100 115 117 102 123 127 129 92 110 120 135 115 130 135 145 390 615 83 97 113 114 98 118 124 126 92 110 120 135 115 130 135 145 390 615 +VS – 1.3 +VS – 1.5 25 0.48 +VS – 1.6 dB dB dB dB dB dB dB dB µA V V mA V/µs V PSRR Power Supply Rejection Ratio IS VOUT Supply Current Output Voltage Swing –VS + 1.4 –VS + 1.6 16 0.25 –VS + 1.6 25 0.48 IOUT SR VREF Output Current Slew Rate Voltage Range +VS – 1.3 –VS + 1.4 +VS – 1.5 –VS + 1.6 16 0.25 +VS – 1.6 –VS + 1.6 The ● denotes the specifications which apply over the – 40°C ≤ TA ≤ 85°C temperature range. VS = ± 15V, VCM = 0V, RL = 10k unless otherwise noted. (Note 8) SYMBOL PARAMETER Gain Error CONDITIONS (Note 6) G=1 G = 10 (Note 7) G = 100 (Note 7) G = 1000 (Note 7) VO = ±10V, G = 1 VO = ±10V, G = 10 and 100 VO = ±10V, G = 1000 G < 1000 (Note 7) ● ● ● ● ● ● ● ● MIN LT1168AI TYP 0.014 0.600 0.600 0.600 3 10 30 100 MAX 0.04 1.9 2.0 2.1 20 35 70 200 MIN LT1168I TYP 0.015 0.700 0.700 0.700 5 15 35 100 MAX 0.05 2.0 2.1 2.2 25 40 100 200 UNITS % % % % ppm ppm ppm ppm/°C 1168fa GN Gain Nonlinearity (Notes 7, 8) Gain vs Temperature ∆G/∆T 4 LT1168 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOST VOSI VOSIH VOSO VOSOH VOSI/T VOSO/T IOS IOS/T IB IB/T VCM CMRR Input Offset Voltage Input Offset Voltage Hysteresis Output Offset Voltage Output Offset Voltage Hysteresis (Notes 7, 10) Input Offset Drift (RTI) Output Offset Drift Input Offset Current Input Offset Current Drift Input Bias Current Input Bias Current Drift Input Voltage Range Common Mode Rejection Ratio VS = ± 2.3V to ± 5V VS = ± 5V to ± 18V (Note 9) (Note 9) (Notes 7, 10) The ● denotes the specifications which apply over the – 40°C ≤ TA ≤ 85°C temperature range. VS = ±15V, VCM = 0V, RL = 10k unless otherwise noted. (Note 5) CONDITIONS (Note 6) VOST = VOSI + VOSO/G ● ● ● ● ● ● ● ● ● ● ● ● MIN LT1168AI TYP MAX 20 3.0 180 30 0.05 0.8 110 0.3 120 1.4 500 +VS – 1.3 +VS – 1.4 0.3 5 550 500 75 MIN LT1168I TYP 25 3.0 200 30 0.06 1 120 0.3 220 1.4 MAX 100 600 0.4 6 700 800 +VS – 1.3 +VS – 1.4 UNITS µV µV µV µV µV/°C µV/°C pA pA/°C pA pA/°C V V Total Input Referred Offset Voltage –VS + 2.1 –VS + 2.1 –VS + 2.1 –VS + 2.1 1k Source Imbalance, VCM = 0V to ±10V G=1 G = 10 G = 100 G = 1000 VS = ± 2.3V to ±18V G=1 G = 10 G = 100 G = 1000 VS = ± 2.3V to ± 5V VS = ±5V to ± 18V ● ● ● ● ● ● ● ● ● ● ● ● ● 86 98 114 116 100 120 125 128 –VS + 1.4 –VS + 1.6 15 0.22 –VS + 1.6 90 105 118 133 112 125 132 140 420 650 +VS – 1.3 +VS – 1.5 22 0.41 +VS – 1.6 81 95 112 112 95 115 120 125 –VS + 1.4 –VS + 1.6 15 0.22 –VS + 1.6 90 105 118 133 112 125 132 140 420 650 +VS – 1.3 +VS – 1.5 22 0.42 +VS – 1.6 dB dB dB dB dB dB dB dB µA V V mA V/µs V PSRR Power Supply Rejection Ratio IS VOUT IOUT SR VREF Supply Current Output Voltage Swing Output Current Slew Rate Voltage Range (Note 9) ● Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: If the input voltage exceeds the supplies, the input current should be limited to less than 20mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. Note 4: The LT1168AC/LT1168C are guaranteed functional over the operating temperature range of – 40°C and 85°C. Note 5: The LT1168AC/LT1168C are guaranteed to meet specified performance from 0°C to 70°C. The LT1168AC/LT1168C are designed, characterized and expected to meet specified performance from – 40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1168AI/LT1168I are guaranteed to meet specified performance from – 40°C to 85°C. Note 6: Typical parameters are defined as the 60% of the yield parameter distribution. Note 7: Does not include the tolerance of the external gain resistor RG. Note 8: This parameter is measured in a high speed automatic tester that does not measure the thermal effects with longer time constants. The magnitude of these thermal effects are dependent on the package used, heat sinking and air flow conditions. Note 9: This parameter is not 100% tested. Note 10: Hysteresis in offset voltage is created by package stress that differs depending on whether the IC was previously at a higher or lower temperature. Offset voltage hysteresis is always measured at 25°C, but the IC is cycled to 85°C I-grade (or 70°C C-grade) or – 40°C I-grade (0°C C-grade) before successive measurement. 60% of the parts will pass the typical limit on the data sheet. 1168fa 5 LT1168 TYPICAL PERFOR A CE CHARACTERISTICS Distribution of Output Offset Voltage 60 VS = ±15V 55 T = 25°C A 50 G = 1 PERCENT OF UNITS (%) 45 40 35 30 25 20 15 10 5 0 0 50 –150 –100 –50 100 OUTPUT OFFSET VOLTAGE (µV) 150 299 N8 (2 LOTS) 337 S0-8 (2 LOTS) 636 TOTAL PARTS PERCENT OF UNITS (%) 60 PERCENT OF UNITS (%) Distribution of Input Offset Voltage Drift CHANGE IN OUTPUT OFFSET VOLTAGE (µV) 35 VS = ±15V T = – 40°C TO 85°C 30 GA= 1000 97 N8 (2 LOTS) 25 49 S0-8 (1 LOT) 146 TOTAL PARTS 20 15 10 5 0 –0.45 10 0 –10 –20 –30 –40 –50 0 2 1 TIME (MONTHS) 3 1168 G05 CHANGE IN INPUT OFFSET VOLTAGE (µV) PERCENT OF UNITS (%) –0.35 –0.25 –0.15 –0.05 0.05 INPUT OFFSET VOLTAGE DRIFT (µV/°C) 1168 G04 Warm-Up Drift 35 CHANGE IN TOTAL INPUT REFERRED OFFSET VOLTAGE (µV) 30 25 VOLTAGE NOISE DENSITY (nV/√Hz) VS = ± 15V TA = 25°C G=1 GAIN (dB) SO-8 20 15 N-8 10 5 0 0 1 2 3 4 TIME AFTER POWER-ON (MINUTES) 5 6 UW 1168 G01 Distribution of Input Offset Voltage VS = ±15V 55 T = 25°C A 50 G = 1000 45 40 35 30 25 20 15 10 5 0 –60 –20 0 20 40 –40 INPUT OFFSET VOLTAGE (µV) 60 1168 G02 Distribution of Output Offset Voltage Drift 35 VS = ±15V TA = – 40°C TO 85°C 30 G = 1 25 20 15 10 5 0 –1.8 97 N8 (2 LOTS) 49 S0-8 (1 LOT) 146 TOTAL PARTS 299 N8 (2 LOTS) 337 S0-8 (2 LOTS) 636 TOTAL PARTS 0.2 –0.6 –0.2 –1.0 –1.4 OUTPUT OFFSET VOLTAGE DRIFT (µV/°C) 1168 G03 Output Offset Voltage Long-Term Drift 50 VS = ± 15V 40 TA = 30°C G=1 30 4 PARTS FROM 4 LOTS 20 WARMED UP Input Offset Voltage Long-Term Drift 5 VS = ± 15V 4 TA = 30°C G = 1000 3 4 PARTS FROM 4 LOTS 2 WARMED UP 1 0 –1 –2 –3 –4 –5 0 2 1 TIME (MONTHS) 3 1168 G05 Gain vs Frequency 60 50 40 30 20 G = 10 10 0 G=1 –10 –20 0.01 0.1 1 10 FREQUENCY (kHz) 100 1000 1168 G08 1168 G07 Voltage Noise Density vs Frequency VS = ±15V TA = 25°C 1000 1/f CORNER = 2Hz GAIN = 1 100 1/f CORNER = 7Hz GAIN = 10 GAIN = 100, 1000 10 1/f CORNER = 3Hz BW LIMIT GAIN = 100 BW LIMIT GAIN = 1000 1 10 100 1k FREQUENCY (Hz) 10k 100k 1168 G09 G = 1000 VS = ±15V TA = 25°C G = 100 1 1168fa LT1168 TYPICAL PERFOR A CE CHARACTERISTICS 0.1Hz to 10Hz Noise Voltage, G=1 VS = ±15V TA = 25°C CURRENT NOISE DENSITY (fA/√Hz) NOISE VOLTAGE (0.2µV/DIV) NOISE VOLTAGE (2µV/DIV) 0 1 2 3 456 TIME (SEC) 7 0.1Hz to 10Hz Current Noise VS = ±15V TA = 25°C NOISE CURRENT (5pA/DIV) OUTPUT CURRENT (mA) (SINK) (SOURCE) 20 10 0 – 10 – 20 – 30 – 40 – 50 TA = 85°C OUTPUT IMPEDANCE (Ω) 0 1 2 3 456 TIME (SEC) 7 Overshoot vs Capacitive Load 100 90 80 OVERSHOOT (%) VS = ±15V VOUT = ± 50mV RL = ∞ OUTPUT VOLTAGE (V) 70 60 50 40 30 20 10 0 10 G = 100, 1000 100 1000 CAPACITIVE LOAD (pF) 10000 1168 G16 PERCENT OF UNITS (%) G=1 G = 10 UW 8 9 1168 G10 0.1Hz to 10Hz Noise Voltage, RTI G = 1000 1000 VS = ±15V TA = 25°C Current Noise Density vs Frequency VS = ±15V TA = 25°C RS 100 1/f CORNER = 55Hz 10 10 0 1 2 3 456 TIME (SEC) 7 8 9 10 1 10 100 FREQUENCY (Hz) 1000 1168 G12 1168 G11 Short-Circuit Current vs Time 50 40 30 VS = ±15V TA = – 40°C TA = 25°C Output Impedance vs Frequency 1k VS = ± 15V TA = 25°C G = 1 TO 1000 100 10 TA = 85°C TA = 25°C TA = – 40°C 1 8 9 10 2 1 0 3 TIME FROM OUTPUT SHORT TO GROUND (MINUTES) 1168 G14 0.1 1k 10k 100k FREQUENCY (Hz) 1M 1168 G15 1168 G13 Input Bias Current 50 VS ± 15V TA = 25°C 302 N8 (2 LOTS) 313 SO-8 (2 LOTS) 615 TOTAL PARTS 50 Input Offset Current VS = ± 15V TA = 25°C 302 N8 (2 LOTS) 313 SO-8 (2 LOTS) 615 TOTAL PARTS 40 40 30 30 20 +IB +IB 20 10 10 –IB 0 –120 0 –200 40 –120 120 –40 INPUT BIAS CURRENT (pA) 200 1168 G17 –80 0 40 80 –40 INPUT OFFSET CURRENT (pA) 120 1168 G18 1168fa 7 LT1168 TYPICAL PERFOR A CE CHARACTERISTICS Change in Input Bias Current for VCM = 20V 20 VS = ± 15V 18 VCM = ± 10V TA = 25°C 16 PERCENT OF UNITS (%) 302 N8 (2 LOTS) 313 SO-8 (2 LOTS) 615 TOTAL PARTS OUTPUT STEP (V) 14 12 10 8 6 4 2 0 0 4 8 12 16 20 24 28 32 34 CHANGE IN INPUT BIAS CURRENT (pA) 1168 G19 4 2 0 –2 –4 –6 –8 –10 SETTLING TIME (µs) RINCM = 5TΩ RINCM = 700GΩ Settling Time (0.1%) vs Load Capacitance 34 INPUT BIAS AND OFFSET CURRENT (pA) VIN (V) 32 30 G = 1, RISING EDGE G = 1, FALLING EDGE SETTLING TIME (µs) 28 26 24 22 20 18 16 10 G = 100, FALLING EDGE G = 100, RISING EDGE VS = ± 15V TA = 25°C RL = 1k STEP SIZE = 10V G = 10, FALLING EDGE G = 10, RISING EDGE IB VOUT (V) 30 100 300 LOAD CAPACITANCE (pF) Rising Edge Settling Time (0.10%) 36 VIN (V) 10 5 0 0.10 PEAK-TO-PEAK OUTPUT SWING (V) SETTLING TIME (µs) VOUT (V) 10 5 0 5µs/DIV 1168 G25 t=0 TA = 25°C VS = ± 15V RL = 2k CL = 15pF 8 UW 1168 G22 Settling Time vs Step Size 10 8 6 VS = ±15 G=1 TA = 25°C CL = 30pF RL = 1k 1000 Settling Time vs Gain VS = ± 15V TA = 25°C ∆VOUT = 10V TO 0.01% TO 0.1% TO 0.01% 100 0V 0V VOUT VOUT 10 TO 0.01% TO 0.1% 8 10 12 14 16 18 20 22 24 26 28 30 32 SETTLING TIME (µs) 1168 G20 1 1 10 GAIN 1168 G21 100 1000 Input Bias and Offset Current vs Temperature 500 400 300 200 100 0 –100 –200 –300 –400 –500 –75 –50 –25 0 25 50 TEMPERATURE 75 100 125 1168 G23 Falling Edge Settling Time (0.10%) 0 –5 –10 0.10 VS = ±15V VCM = 0V SETTLING (%) 0.05 0 IOS 0 –5 –10 5µs/DIV t=0 TA = 25°C VS = ± 15V R L = 2k CL = 15pF 1168 G24 0.05 0.10 1000 Settling Time (0.01%) vs Load Capacitance 35 Undistorted Output Swing vs Frequency 30 25 20 15 10 5 0 G = 10, 100, 1000 VS = ±15V TA = 25°C 34 32 SETTLING (%) G = 100, FALLING EDGE G = 1, RISING EDGE G = 100, RISING EDGE 0.05 0 0.05 0.10 30 28 G=1 G = 10, FALLING EDGE 26 24 22 20 18 10 G = 10, RISING EDGE VS = ± 15V TA = 25°C RL = 1k STEP SIZE = 10V G = 1, FALLING EDGE 30 100 300 LOAD CAPACITANCE (pF) 1000 1168 G26 1 10 100 FREQUENCY (kHz) 1000 1168 G27 1168fa LT1168 TYPICAL PERFOR A CE CHARACTERISTICS Output Voltage Swing vs Load Current INPUT VOLTAGE RANGE WITH RESPECT TO NEGATIVE SUPPLY (–VS + VIN) OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGE (SINK) (SOURCE) + VS VS = ± 15V + VS – 0.5 + VS – 1.0 + VS – 1.5 + VS – 2.0 + VS – 2.5 – VS + 2.5 – VS + 2.0 – VS + 1.5 – VS + 1.0 – VS + 0.5 – VS 0.01 1 10 0.1 OUTPUT CURRENT (mA) 100 1168 G28 Output Short-Circuit Current vs Temperature 60 VS = ± 15V 1.0 50 OUTPUT CURRENT (mA) SLEW RATE (V/µs) 40 30 SOURCING CURRENT 20 10 –50 –25 Large-Signal Transient Response 20mV/DIV 5V/DIV 5V/DIV G=1 VS = ± 15V RL = 2k CL = 60pF 50µs/DIV UW 1168 G31 Input Voltage Range vs Output Voltage for Various Gains 85°C 25°C – 40°C 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 –15 +VCM = +VS – 1.4V VS = ± 15V TA = 25°C G=2 VOUT = –VS + 1.2V G = 100 G = 10 G=2 VOUT = +VS – 1.3V G=1 –VCM = – VS + 1.9V –11 –7 3 –3 VOUT (V) 7 11 15 G = 10 G = 100 G=1 0 –1 –2 –3 –4 –5 –6 –7 –8 –9 –10 –11 –12 –13 –14 –15 INPUT VOLTAGE RANGE WITH RESPECT TO POSITIVE SUPPLY (+VS – VIN) 1168 G43 Slew Rate vs Temperature VS = ± 15V VOUT = ±10V G=1 0.8 SINKING CURRENT 0.6 +SLEW 0.4 –SLEW 0.2 50 25 0 TEMPERATURE (°C) 75 100 1168 G29 0 –50 –25 50 25 0 TEMPERATURE (°C) 75 100 1168 G30 Small-Signal Transient Response Large-Signal Transient Response G=1 VS = ± 15V RL = 2k CL = 60pF 10µs/DIV 1168 G32 G = 10 VS = ± 15V RL = 2k CL = 60pF 50µs/DIV 1168 G33 1168fa 9 LT1168 TYPICAL PERFOR A CE CHARACTERISTICS Small-Signal Transient Response Large-Signal Transient Response Small-Signal Transient Response 20mV/DIV 20mV/DIV 5V/DIV G = 10 VS = ± 15V RL = 2k CL = 60pF 10µs/DIV Large-Signal Transient Response NEGATIVE POWR SUPPLY REJECTION RATIO (dB) 20mV/DIV 5V/DIV G = 1000 VS = ± 15V RL = 2k CL = 60pF 200µs/DIV Positive Power Supply Rejection Ratio vs Frequency POSITIVE POWR SUPPLY REJECTION RATIO (dB) 160 140 120 100 80 60 40 20 0 VS = ± 15V TA = 25°C 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k 1168 G40 COMMON MODE REJECTION RATIO (dB) G = 1000 G = 100 G = 10 G=1 G = 10 100 G=1 80 60 40 20 0 VS = ± 15V TA = 25°C 1k SOURCE IMBALANCE 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k 1168 G41 SUPPLY CURRENT (mA) 10 UW 1168 G34 1168 G37 G = 100 VS = ± 15V RL = 2k CL = 60pF 50µs/DIV 1168 G35 G = 100 VS = ± 15V RL = 2k CL = 60pF 10µs/DIV 1168 G36 Small-Signal Transient Response 160 140 120 100 80 60 40 20 0 Negative Power Supply Rejection Ratio vs Frequency G = 1000 G = 100 G = 10 G=1 G = 1000 VS = ± 15V RL = 2k CL = 60pF 200µs/DIV 1168 G38 VS = ± 15V TA = 25°C 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k 1168 G39 Common Mode Rejection Ratio vs Frequency (1k Source Imbalance) 160 140 120 G = 1000 G = 100 0.5 0.6 Supply Current vs Temperature VS = ± 15V 0.4 0.3 0.2 0.1 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 1168 G42 1168fa LT1168 BLOCK DIAGRA R3 400Ω –IN 2 Q1 –VS RG 1 RG 8 VB +VS + A2 R7 30k R4 400Ω +IN 3 Q2 – C2 R2 24.7k –VS 7 +VS 4 –VS PREAMP STAGE DIFFERENCE AMPLIFIER STAGE 1168 F01 –VS Figure 1. Block Diagram THEORY OF OPERATIO The LT1168 is a modified version of the three op amp instrumentation amplifier. Laser trimming and monolithic construction allow tight matching and tracking of circuit parameters over the specified temperature range. Refer to the block diagram (Figure 1) to understand the following circuit description. The collector currents in Q1 and Q2 are trimmed to minimize offset voltage drift, thus assuring a high level of performance. R1 and R2 are trimmed to an absolute value of 24.7k to assure that the gain can be set accurately (0.6% at G = 100) with only one external resistor RG. The value of RG in parallel with R1 (R2) determines the transconductance of the preamp stage. As RG is reduced for larger programmed gains, the transconductance of the input preamp stage increases to that of the input transistors Q1 and Q2. This increases the open-loop gain when the programmed gain is increased, reducing the input referred gain related errors and noise. The input voltage noise at gains greater than 50 is determined only by Q1 and Q2. At lower gains the noise of the difference amplifier and preamp gain setting resistors increase the noise. The gain bandwidth product is determined by C1, C2 and the preamp transconductance which increases with programmed gain. Therefore, the bandwidth does not drop proportionally with gain. The input transistors Q1 and Q2 offer excellent matching, which is inherent in NPN bipolar transistors, as well as picoampere input bias current due to superbeta processing. The collector currents in Q1 and Q2 are held constant due to the feedback through the Q1-A1-R1 loop and Q2-A2-R2 loop which in turn impresses the differential input voltage across the external gain set resistor RG. Since the current that flows through RG also flows through R1 and R2, the ratios provide a gained-up differential 1168fa + – U W +VS VB + A1 R5 30k R6 30k 6 OUTPUT – C1 R1 24.7k A3 –VS R8 30k 5 REF 11 LT1168 THEORY OF OPERATIO voltage, G = (R1 + R2)/RG, to the unity-gain difference amplifier A3. The common mode voltage is removed by A3, resulting in a single-ended output voltage referenced to the voltage on the REF pin. The resulting gain equation is: G = (49.4kΩ / RG) + 1 solving for the gain set resistor gives: RG = 49.4kΩ /(G – 1) Table 1 shows appropriate 1% resistor values for a variety of gains. Table 1 DESIRED GAIN 1 2 5 10 20 50 100 200 500 1000 RG Open 49400Ω 12350Ω 5488.89Ω 2600Ω 1008.16Ω 498.99Ω 248.24Ω 99Ω 49.95Ω CLOSEST 1% VALUE Open 49900Ω 12400Ω 5490Ω 2610Ω 1000Ω 499Ω 249Ω 100Ω 49.4Ω RESULTANT GAIN 1 1.99 4.984 9.998 19.93 50.4 99.998 199.4 495 1001 Input and Output Offset Voltage The offset voltage of the LT1168 has two components: the output offset and the input offset. The total offset voltage referred to the input (RTI) is found by dividing the output offset by the programmed gain (G) and adding it to the input offset. At high gains the input offset voltage dominates, whereas at low gains the output offset voltage dominates. The total offset voltage is: Total input offset voltage (RTI) = input offset + (output offset/G) Total output offset voltage (RTO) = (input offset • G) + output offset Reference Terminal The reference terminal is one end of one of the four 30k resistors around the difference amplifier. The output 12 U voltage of the LT1168 (Pin 6) is referenced to the voltage on the reference terminal (Pin 5). Resistance in series with the REF pin must be minimized for best common mode rejection. For example, a 6Ω resistance from the REF pin to ground will not only increase the gain error by 0.02% but will lower the CMRR to 80dB. Input Voltage Range The input voltage range for the LT1168 is specified in the data sheet at 1.4V below the positive supply to 1.9V above the negative supply for a gain of one. As the gain increases the input voltage range decreases. This is due to the IR drop across the internal gain resistors R1 and R2 in Figure 1. For the unity gain condition there is no IR drop across the gain resistors R1 and R2, the output of the GM amplifiers is just the differential input voltage at Pin 2 and Pin 3 (level shifted by one VBE from Q1 and Q2). When a gain resistor is connected across Pins 1 and 8, the output swing of the GM cells is now the differential input voltage (level shifted by VBE) plus the differential voltage times the gain (ratio of the internal gain resistors to the external gain resistor across Pins 1 and 8). To calculate how close to the positive rail the input (VIN) can swing for a gain of 2 and a maximum expected output swing of 10V, use the following equation: + VS – VIN = – 0.5 – (VOUT/G) • (G – 1)/2 Substituting yields: – 0.5 – (10/2) • (1/2) = – 3V below the positive supply or 12V for a 15V supply. To calculate how far above the negative supply the input can swing for a gain of 10 with a maximum expected output swing of –10V, the equation for the negative case is: – VS + VIN = 1.5 – (VOUT/G) • (G – 1)/2 Substituting yields: 1.5 – (–10/10) • 9/2 = 6V above the negative supply or – 9V for a negative supply voltage of –15V. Figures 2 and 3 are for the positive common mode and negative common mode cases respectively. 1168fa LT1168 THEORY OF OPERATIO +VS INPUT VOLTAGE WITH RESPECT TO POSITIVE SUPPLY (+VS – VIN)(V) –1 –2 –3 –4 –5 G=1 AREA OF OPERATION G=2 AREA OF OPERATION G = 100 AREA OF OPERATION G = 10 AREA OF OPERATION –6 T = 25°C A INPUT COMMON –7 MODE RANGE IS BELOW THE CURVE –8 2 4 8 6 0 VOUT (V) 10 12 Figure 2. Positive Input Range vs Output Voltage for Different Gains 9 G = 10 AREA OF OPERATION TA = 25°C INPUT COMMON MODE RANGE IS ABOVE THE CURVE G = 100 AREA OF OPERATION INPUT VOLTAGE RANGE WITH RESPECT TO NEGATIVE SUPPLY (–VS + VIN)(V) 8 7 6 5 4 –IN 1 RG 8 +IN 1 –VS –14 –12 –10 –8 –6 VOUT (V) –4 –2 0 1168 F03 Figure 3. Negative Input Voltage Range vs Output Voltage for Various Gains Figure 4. Optional Trimming of Output Offset Voltage Single Supply Operation For best results under single supply operation, the REF pin should be raised above the negative supply (Pin 4) and one of the inputs should be at least 2.5V above ground. The barometer application later in this data sheet is an example that satisfies these conditions. The resistance RSET from the bridge transducer to ground sets the operating current for the bridge, and with R6, also has the effect of raising the input common mode voltage. The output of the LT1168 is always inside the specified range since the barometric pressure rarely goes low enough to cause the output to clip (30.00 inches of Hg corresponds to 3.000V). For applications that require the output to swing at or below the REF Input Bias Current Return Path The low input bias current of the LT1168 (250pA) and the high input impedance (200GΩ) allow the use of high impedance sources without introducing additional offset voltage errors, even when the full common mode range is required. However, a path must be provided for the input bias currents of both inputs when a purely differential signal is being amplified. Without this path the inputs will float to either rail and exceed the input common mode range of the LT1168, resulting in a saturated input stage. Figure 5 shows three examples of an input bias current 1168fa + G=1 AREA OF OPERATION 1/2 LT1112 ± 10mV ADJUSTMENT RANGE – G=2 3 AREA OF OPERATION 2 + 3 – U potential, the voltage on the REF pin can be further level shifted. The application in the front of this data sheet, Single Supply Pressure Monitor, is an example. An op amp is used to buffer the voltage on the REF pin since a parasitic series resistance will degrade the CMRR. Output Offset Trimming The LT1168 is laser trimmed for low offset voltage so that no external offset trimming is required for most applications. In the event that the offset needs to be adjusted, the circuit in Figure 4 is an example of an optional offset adjust circuit. The op amp buffer provides a low impedance to the REF pin where resistance must be kept to minimum for best CMRR and lowest gain error. 2 14 1168 F02 LT1168 REF 5 6 OUTPUT +VS 10mV 100Ω 10k 100Ω –10mV –VS 1168 F04 13 LT1168 THEORY OF OPERATIO path. The first example is of a purely differential signal source with a 10kΩ input current path to ground. Since the impedance of the signal source is low, only one resistor is needed. Two matching resistors are needed for higher THERMOCOUPLE LT1168 MICROPHONE, HYDROPHONE, ETC LT1168 10k 200k 200k CENTER-TAP PROVIDES BIAS CURRENT RETURN 1168 F05 Figure 5. Providing an Input Common Mode Current Path APPLICATIO S I FOR ATIO RG RIN The LT1168 can safely handle up to ± 20mA of input current in an overload condition. Adding an external 5k input resistor in series with each input allows DC input fault voltage up to ±100V and improves the ESD immunity to ±8kV (contact) and ±15kV (air discharge), which is the IEC 1000-4-2 level 4 specification. If lower value input resistors must be used, a clamp diode from the positive supply to each input will maintain the IEC 1000-4-2 Figure 6. Input Protection RFI Reduction In many industrial and data acquisition applications, instrumentation amplifiers are used to accurately amplify small signals in the presence of large common mode 1168fa 14 – Input Protection + The LT1168 is a low power precision instrumentation amplifier that requires only one external resistor to accurately set the gain anywhere from 1 to 1000. The LT1168 is trimmed for critical DC parameters such as gain error (0.04%, G = 10), input offset voltage (40µV, RTI), CMRR (90dB min, G = 1) and PSRR (103dB min, G = 1). These trims allow the amplifier to achieve very high DC accuracy. The LT1168 achieves low input bias current of just 250pA (max) through the use of superbeta processing. The output can handle capacitive loads up to 1000pF in any gain configuration and the inputs are protected against ESD strikes up to ±13kV (human body). specification to level 4 for both air and contact discharge. A 2N4393 drain/source to gate is a good low leakage diode for use with resistors between 1k and 20k, see Figure 6. The input resistors should be carbon and not metal film or carbon film in order to withstand the fault conditions. J1 2N4393 RIN J2 2N4393 OPTIONAL FOR RIN < 20k +VS LT1168 –VS – + – + U U impedance signal sources as shown in the second example. Balancing the input impedance improves both common mode rejection and DC offset. LT1168 OUT REF 1168 F06 W UU – + LT1168 APPLICATIO S I FOR ATIO voltages or high levels of noise. Typically, the sources of these very small signals (on the order of microvolts or millivolts) are sensors that can be a significant distance from the signal conditioning circuit. Although these sensors may be connected to signal conditioning circuitry, using shielded or unshielded twisted-pair cabling, the cabling may act as antennae, conveying very high frequency interference directly into the input stage of the LT1168. The amplitude and frequency of the interference can have an adverse effect on an instrumentation amplifier’s input stage by causing an unwanted DC shift in the amplifier’s input offset voltage. This well known effect is called RFI rectification and is produced when out-of-band interference is coupled (inductively, capacitively or via radiation) and rectified by the instrumentation amplifier’s input transistors. These transistors act as high frequency signal detectors, in the same way diodes were used as RF envelope detectors in early radio designs. Regardless of the type of interference or the method by which it is coupled into the circuit, an out-of-band error signal appears in series with the instrumentation amplifier’s inputs. To significantly reduce the effect of these out-of-band signals on the input offset voltage of instrumentation amplifiers, simple lowpass filters can be used at the inputs. This filter should be located very close to the input pins of the circuit. An effective filter configuration is illustrated in Figure 7, where three capacitors have been added to the inputs of the LT1168. Capacitors CXCM1 and CXCM2 form lowpass filters with the external series resistors RS1, 2 to any out-of-band signal appearing on each of the input traces. Capacitor CXD forms a filter to reduce any unwanted signal that would appear across the input traces. An added benefit to using CXD is that the circuit’s AC common mode rejection is not degraded due to common mode capacitive imbalance. The differential mode and common mode time constants associated with the capacitors are: tDM(LPF) = (RS1 + RS2)(CXD + CXCM1 + CXCM2) tCM(LPF) = (RS1|| RS2)(CXCM1+ CXCM2) Setting the time constants requires a knowledge of the frequency, or frequencies of the interference. Once this CXD 0.1µF RS2 1.6k CXCM2 0.001µF EXTERNAL RFI FILTER RG Figure 7. Adding a Simple RC Filter at the Inputs to an Instrumentation Amplifier is Effective in Reducing Rectification of High Frequency Out-of-Band Signals Nerve Impulse Amplifier The LT1168’s low current noise makes it ideal for EMG monitors that have high source impedances. Demonstrating the LT1168’s ability to amplify low level signals, the circuit in Figure 8 takes advantage of the amplifier’s high gain and low noise operation. This circuit amplifies the low level nerve impulse signals received from a patient at Pins 2 and 3. RG and the parallel combination of R3 and R4 set a gain of ten. The potential on LT1112’s Pin 1 creates 1168fa – IN – + U frequency is known, the common mode time constants can be set followed by the differential mode time constant. To avoid any possibility of inadvertently affecting the signal to be processed, set the common mode time constant an order of magnitude (or more) smaller than the differential mode time constant. Set the common mode time constants such that they do not degrade the LT1168 inherent AC CMR. Then the differential mode time constant can be set for the bandwidth required for the application. Setting the differential mode time constant close to the sensor’s BW also minimizes any noise pickup along the leads. To avoid any possibility of common mode to differential mode signal conversion, match the common mode time constants to 1% or better. If the sensor is an RTD or a resistive strain gauge and is in proximity to the instrumentation amplifier, then the series resistors RS1, 2 can be omitted. RS1 CXCM1 1.6k 0.001µF +VS IN + LT1168 VOUT –VS f– 3dB ≈ 500Hz 1168 F07 W UU 15 LT1168 APPLICATIO S I FOR ATIO a ground for the common mode signal. C1 was chosen to maintain the stability of the patient ground. The LT1168’s high CMRR ensures that the desired differential signal is amplified and unwanted common mode signals are attenuated. Since the DC portion of the signal is not important, R6 and C2 make up a 0.3Hz highpass filter. The AC signal at LT1112’s Pin 5 is amplified by a gain of 101 set by R7/R8 +1. The parallel combination of C3 and R7 form a lowpass filter that decreases this gain at frequencies above 1kHz. The ability to operate at ± 3V on 350µA of supply current makes the LT1168 ideal for battery-powered applications. Total supply current for this application is 1.05mA. Proper safeguards, such as isolation, must be added to this circuit to protect the patient from possible harm. PATIENT/CIRCUIT PROTECTION/ISOLATION +IN C1 0.01µF R2 1M R1 12k R3 30k R4 30k 2 3V 3 8 RG 6k 1 2 PATIENT GND 1 1/2 LT1112 3 AV = 101 POLE AT 1kHz –IN Figure 8. Nerve Impulse Amplifier 14 15V 8 PRECISION R THERMISTOR T 1 2 OUTPUT VOLTAGE (V) LT1634-1.25 22k –15V Figure 9. Precision Temperature Without Precision Resistors 16 + 3 7 LT1168 6 REF 5 49.4kΩ VOUT = 1.25 • RT 4 –15V 1168 F09 U Low IB Favors High Impedance Bridges, Lowers Dissipation The LT1168’s low supply current, low supply voltage operation and low input bias currents allow it to fit nicely into battery-powered applications. Low overall power dissipation necessitates using higher impedance bridges. The single supply pressure monitor application on the front of this data sheet, shows the LT1168 connected to the differential output of a 3.5k bridge. The picoampere input bias currents keep the error caused by offset current to a negligible level. The LT1112 level shifts the LT1168’s reference pin and the ADC’s analog ground pins above ground. The LT1168’s and LT1112’s combined power dissipation is still less than the bridge’s. This circuit’s total supply current is just 2.2mA. + 7 C2 0.47µF LT1168 G = 10 5 6 R6 1M 5 0.3Hz HIGHPASS 3V W – + UU – + – 8 1/2 LT1112 4 –3V 7 OUTPUT 1V/mV 6 – 4 –3V R8 100Ω R7 10k C3 15nF 1168 F08 12 10 8 6 4 2 THERMOMETRICS DC95F103W THERMO METRICS DC95G104Z YSI #44006 YSI #44011 0 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 1168 F10 Figure 10. Response of Figure 9 for Various Thermistors 1168fa LT1168 TYPICAL APPLICATIO S Single Supply Barometer R5 200k 2 LT1634CCZ-1.25 1 3 2 1/2 LT1490 1 4 5k 5k – 4 R6 1k R1 825Ω 2 6 5k 5k R2 12Ω 8 3 R4 50k R3 50k RSET 5 + 1/2 LT1490 7 R7 50k 5 6 R8 100k – 0.6% ACCURACY AT 25°C 1.7% ACCURACY AT 0°C TO 60°C VS = 8V TO 30V AC Coupled Instrumentation Amplifier –IN 2 1 – LT1168 6 C1 0.1µF R1 1M RG 8 +IN 3 OUTPUT REF + 5 2 f –3dB = 1 (2π)(R1)(C1) 1168 TA02 6 LT1677 3 = 1.59Hz + + 3 – + – + U VS LUCAS NOVA SENOR NPC-1220-015-A-3L VS 1 2 1 7 8 – LT1168 G = 60 5 4 6 TO 4-DIGIT DVM VOLTS 2.800 3.000 3.200 INCHES Hg 28.00 30.00 32.00 1168 TA03 1168fa 17 LT1168 TYPICAL APPLICATIO S 4-Digit Pressure Sensor 9V R8 392k 2 LT1634CCZ-1.25 1 2 3 + – 4 1 4 1/4 LT1114 11 0.6% ACCURACY AT ROOM TEMP 1.7% ACCURACY AT 0°C TO 60°C VOLTS 2.800 3.000 3.200 INCHES Hg 28.00 30.00 32.00 18 U LUCAS NOVA SENOR NPC-1220-015A-3L 9V 1 R1 825Ω R2 12Ω 8 3 2 1 LT1168 G = 60 5 – 5k 5k – 7 6 R9 1k 2 6 5k 5k RSET 5 + 3 + 4 10 + 1/4 LT1114 8 TO 4-DIGIT DVM 9 12 + 1/4 LT1114 14 – R6 50k R7 180k 13 – R4 100k R5 100k R3 51k C1 1µF 1168 TA04 1168fa LT1168 PACKAGE DESCRIPTIO .300 – .325 (7.620 – 8.255) .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 8.255 +0.889 –0.381 ) INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) NOTE: 1. DIMENSIONS ARE .050 BSC 8 .245 MIN .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 0°– 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) .400* (10.160) MAX 8 7 6 5 .255 ± .015* (6.477 ± 0.381) 1 2 3 4 .130 ± .005 (3.302 ± 0.127) .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076) N8 1002 .100 (2.54) BSC S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) .045 ±.005 .189 – .197 (4.801 – 5.004) NOTE 3 7 6 5 .160 ±.005 .228 – .244 (5.791 – 6.197) .150 – .157 (3.810 – 3.988) NOTE 3 1 2 3 4 .053 – .069 (1.346 – 1.752) .004 – .010 (0.101 – 0.254) .014 – .019 (0.355 – 0.483) TYP .050 (1.270) BSC SO8 0303 1168fa 19 LT1168 TYPICAL APPLICATIO Low Power Programmable Audio HPF/LPF with “Pop-Less” Switching 2 – + +15V 8 1 1/2 LT1462 VIN 3 4 –15V RELATED PARTS PART NUMBER LTC1043 LTC1100 LT1101 LT1102 LT1167 DESCRIPTION Dual Precision Instrumentation Building Block Precision Chopper-Stabilized Instrumentation Amplifier Precision, Micropower, Single Supply Instrumentation Amplifier High Speed, JFET Instrumentation Amplifier Single Resistor Programmable Precision Instrumentation Amplifier COMMENTS Switched Capacitor, Rail-to-Rail Input, 120dB CMRR G = 10 or 100, VOS = 10µV, IB = 50pA G = 10 or 100, IS = 105µA G = 10 or 100, Slew Rate = 30V/µs Lower Noise than LT1168, eN = 7.5nV/√Hz 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com U R3 8k P1 3 14 1 16 R2 4k P2 8 9 6 11 R1 4k GAIN SET 3 8 1 2 + – +15V 7 LT1168 5 4 –15V 6 HPF C1 100µF 5 LTC®201 2 15 12 13 4 5 7 10 + 1/2 LT1462 7 LPF 6 NC +15V –15V – 1168 TA05 P1 P2 POLE — 0 100 0 1 1 1 0 < 0.8V 1 > 2.4V Hz TOTAL SUPPLY CURRENT < 400µA 200 400 1168fa LT/LWI 0906 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2000