LT124XC

LT1241 Series High Speed Current Mode Pulse Width Modulators FEATURES s s s s s s s s s s DESCRIPTIO s s Low Start-Up Current: < 250µA 50ns Current Sense Delay Current Mode Operation: To 500kHz Pin Compatible with UC1842 Series Undervoltage Lockout with Hysteresis No Cross-Conduction Current Trimmed Bandgap Reference 1A Totem Pole Output Trimmed Oscillator Frequency and Sink Current Active Pull-Down on Reference and Output During Undervoltage Lockout High Level Output Clamp: 18V Current Sense Leading Edge Blanking APPLICATI s s S Off-Line Converters DC/DC Converters , LTC and LT are registered trademarks of Linear Technology Corporation. The LT ®1241 series devices are 8-pin, fixed frequency, current mode, pulse width modulators. They are improved plug compatible versions of the industry standard UC1842 series. These devices have both improved speed and lower quiescent current. The LT1241 series is optimized for off-line and DC/DC converter applications. They contain a temperature-compensated reference, high gain error amplifier, current sensing comparator and a high current totem pole output stage ideally suited to driving power MOSFETs. Start-up current has been reduced to less than 250µA. Cross-conduction current spikes in the output stage have been eliminated, making 500kHz operation practical. Several new features have been incorporated. Leading edge blanking has been added to the current sense comparator. Trims have been added to the oscillator circuit for both frequency and sink current, and both of these parameters are tightly specified. The output stage is clamped to a maximum VOUT of 18V in the on state. The output and the reference output are actively pulled low during undervoltage lockout. BLOCK DIAGRA REFERENCE ENABLE 5V REF MAIN BIAS REFERENCE PULL-DOWN RT/CT 4 OSCILLATOR T S R 6 OUTPUT COMP FB 1 1mA 2 2.5V 5.6V 1V – + 2R – R BLANKING + 1.5V ISENSE 3 U UV LOCKOUT 8 7 VREF VCC OUTPUT PULL-DOWN 5 18V GND W UO + – 1241 BD01 1 LT1241 Series ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW COMP 1 FB 2 ISENSE 3 RT/CT 4 J8 PACKAGE 8-LEAD CERDIP 8 7 6 5 VREF VCC OUTPUT GND Supply Voltage ........................................................ 25V Output Current ....................................................... ± 1A* Output Energy (Capacitive Load per Cycle) ...............5µJ Analog Inputs (Pins 2, 3) ............................... – 0.3 to 6V Error Amplifier Output Sink Current...................... 10mA Power Dissipation at TA ≤ 25°C ................................ 1W Operating Junction Temperature Range LT124XC ............................................. 0°C to 100°C LT124XI......................................... – 40°C to 100°C LT124XM........................................ – 55°C to 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C *The 1A rating for output current is based on transient switching requirements. ORDER PART NUMBER LT124XCJ8 LT124XCN8 LT124XCS8 LT124XIN8 LT124XIS8 LT124XMJ8 S8 PART MARKING 124X 124XI N8 PACKAGE 8-LEAD PDIP S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125°C, θJA = 100° C/W (J8) TJMAX = 100°C, θJA = 130° C/W (N8) TJMAX = 100°C, θJA = 150° C/W (S8) ELECTRICAL CHARACTERISTICS PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short-Circuit Current Oscillator Section Initial Accuracy Voltage Stability Temperature Stability Amplitude Clock Ramp Reset Current Error Amplifier Section Feedback Pin Input Voltage Input Bias Current Open-Loop Voltage Gain Unity-Gain Bandwidth Power Supply Rejection Ratio Output Sink Current Output Source Current VPIN1 = 2.5V VFB = 2.5V 2 < VO < 4V TJ = 25°C 12V < VCC < 25V Line, Load, Temp IO = 1mA, TJ = 25°C 12V < VCC < 25V 1mA < IVREF < 20mA CONDITIONS (Notes 1, 2) MIN 4.925 q q TYP 5.000 3 –6 0.1 MAX 5.075 20 – 25 5.13 UNITS V mV mV mV/°C V µV mV mA kHz kHz % %/°C V q 4.87 50 5 10Hz < F < 10kHz, TJ = 25°C TA = 125°C, 1000 Hrs. q 25 – 180 52.5 268 1 – 30 47.5 228 – 90 50 248 – 0.05 1.7 RT = 10k, C T = 3.3nF, TJ = 25°C RT = 13.0k, C T = 500pF, TJ = 25°C 12V < VCC < 25V, TJ = 25°C TMIN < TJ < TMAX TJ = 25°C (Pin 4) VOSC (Pin 4) = 2V, TJ = 25°C q q q 7.9 2.42 65 0.7 q q q 8.2 2.50 90 1.3 6 – 0.75 8.5 2.58 –2 2 60 2 – 0.5 VPIN2 = 2.7V, VPIN1 = 1.1V VPIN2 = 2.3V, VPIN1 = 5V 2 U mA V µA dB MHz dB mA mA W U U WW W LT1241 Series ELECTRICAL CHARACTERISTICS PARAMETER Error Amplifier Section Output Voltage High Level Output Voltage Low Level Current Sense Section Gain Maximum Current Sense Input Threshold Power Supply Rejection Ratio Input Bias Current Delay to Output Blanking Time Blanking Override Voltage Output Section Output Low Level Output High Level Rise Time Fall Time Output Clamp Voltage Undervoltage Lockout Start-Up Threshold LT1241 LT1242/LT1244 LT1243/LT1245 Minimum Operating Voltage LT1241/LT1243/LT1245 LT1242/LT1244 Hysteresis LT1241 LT1242/LT1244 LT1243/LT1245 PWM Maximum Duty Cycle LT1241/LT1244/LT1245 LT1242/LT1243 Minimum Duty Cycle Total Device Start-Up Current Operating Current The q denotes those specifications which apply over the full operating temperature range. Note 1: Unless otherwise specified, VCC = 15V, RT = 10k, CT = 3.3nF. q q q q q q q q (Notes 1, 2) MIN q q CONDITIONS VPIN2 = 2.3V, RL = 15k to GND VPIN2 = 2.7V, RL = 15k to Pin 8 TYP 5.6 0.2 MAX UNITS V 5 1.1 3.15 1.10 10 100 V V/V V dB µA ns ns V 2.85 0.90 3.00 1.00 70 –1 50 100 1.5 VPIN3 < 1.1V q q q q IOUT = 20mA IOUT = 200mA IOUT = 20mA IOUT = 200mA CL = 1nF, TJ = 25°C CL = 1.0nF, TJ = 25°C IO = 1mA q q q q 0.25 0.75 12.0 11.75 50 30 0.4 2.2 V V V V 80 60 19.5 ns ns V q 18 9.0 15 7.8 7.0 9.0 1.6 5.5 0.4 9.6 16 8.4 7.6 10 2.0 6.0 0.8 10.2 17 9.0 8.2 11 V V V V V V V V TJ = 25°C TJ = 25°C q 46 94 48 96 0 170 7 250 10 % % % µA mA Note 2: Low duty cycle pulse techniques are used during test to maintain junction temperature close to ambient. 3 LT1241 Series TYPICAL PERFOR A CE CHARACTERISTICS Undervoltage Lockout – LT1241 11 17 START-UP THRESHOLD 10 START-UP THRESHOLD 16 10 VCC (V) VCC (V) VCC (V) 9 8 MINIMUM OPERATING VOLTAGE 7 6 –50 –25 25 75 0 50 TEMPERATURE (°C) Start-Up Current 200 START-UP THRESHOLD START-UP CURRENT (µA) 150 LT1243/5 100 LT1241 LT1242/4 START-UP CURRENT (µA) 100 80 60 40 ICC (mA) 50 TJ = 25°C 0 0 2 4 6 8 10 VCC (V) 12 14 16 18 Supply Current vs Oscillator Frequency 10 9 8 SUPPLY CURRENT (mA) LT1242, LT1243 OSCILLATOR SINK CURRENT (mA) FREQUENCY (kHz) 7 6 5 4 3 2 1 0 10k VCC = 15V RT = 10k CL = 15pF LT1241, LT1244, LT1245 100k OSCILLATOR FREQUENCY (Hz) 4 UW 100 LT1241 • TPC01 LT1241 • TPC04 LT1241 • TPC18 Undervoltage Lockout – LT1242, LT1244 11 Undervoltage Lockout – LT1243, LT1245 15 9 START-UP THRESHOLD 8 MINIMUM OPERATING VOLTAGE 11 MINIMUM OPERATING VOLTAGE 10 7 125 9 –50 –25 0 50 25 75 TEMPERATURE (°C) 100 125 6 –50 –25 25 75 0 50 TEMPERATURE (°C) 100 125 LT1241 • TPC02 LT1241 • TPC03 Start-Up Current 200 180 160 140 120 8 9 10 Supply Current VCC = 15V RT = 10k CT = 3300pF 7 6 20 0 –50 –25 25 75 0 50 TEMPERATURE (°C) 100 125 5 –50 –25 25 75 0 50 TEMPERATURE (°C) 100 125 LT1241 • TPC05 LT1241 • TPC06 Oscillator Frequency 60 58 56 54 52 50 48 46 44 42 1M 40 –50 –25 25 75 0 50 TEMPERATURE (°C) 100 125 VCC = 5V RT = 10k CT = 3300pF 8.7 8.6 8.5 8.4 8.3 8.2 8.1 8.0 7.9 7.8 Oscillator Sink Current VPIN4 = 2V 7.7 –50 –25 0 50 25 75 TEMPERATURE (°C) 100 125 LT1241 • TPC07 LT1241 • TPC08 LT1241 Series TYPICAL PERFOR A CE CHARACTERISTICS Reference Voltage 5.04 IO = 1mA REFERENCE SHORT-CIRCUIT CURRENT (mA) 5.05 120 100 80 60 40 20 –50 –25 FEEDBACK PIN INPUT VOLTAGE (V) REFERENCE VOLTAGE (V) 5.03 5.02 5.01 5.00 4.99 4.98 4.97 4.96 4.95 –50 –25 0 50 25 75 TEMPERATURE (°C) 100 125 Error Amplifier Open-Loop Gain and Phase 100 AVOL OPEN-LOOP VOLTAGE GAIN (dB) 80 60 40 20 0 –20 10 100 GAIN 180 135 CURRENT SENSE CLAMP VOLTAGE (V) VCC = 15V VO = 2.0V - 4.0V RL = 100k TA = 25°C 1.04 1.03 1.02 1.01 1.00 0.99 0.98 0.97 0.96 0.95 –50 –25 0 50 25 75 TEMPERATURE (°C) 100 125 CURRENT SENSE INPUT THRESHOLD (V) PHASE 1k 100k 10k FREQUENCY (Hz) High Level Output Saturation Voltage 4.0 OUTPUT SATURATION VOLTAGE (V) OUTPUT SATURATION VOLTAGE (V) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 OUTPUT SATURATION VOLTAGE (V) 3.5 TJ = – 55°C TJ = 25°C TJ = 125°C 100 OUTPUT SOURCE CURRENT (mA) UW LT1241 • TPC10 Reference Short-Circuit Current 140 2.55 2.54 2.53 2.52 2.51 2.50 2.49 2.48 2.47 2.46 0 50 25 75 TEMPERATURE (°C) 100 125 Feedback Pin Input Voltage 2.45 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) LT1241 • TPC09 LT1241 • TPC11 Current Sense Clamp Voltage 225 1.05 1.2 1.0 0.8 Current Sense Input Threshold PHASE (DEG) TJ = – 55°C 0.6 0.4 0.2 0 0 1 2 4 5 3 ERROR AMP OUTPUT VOLTAGE (V) 6 TJ = 25°C TJ =125°C 90 45 0 –45 10M 1M LT1241 • TPC16 LT1241 • TPC12 LT1241 • TPC17 Low Level Output Saturation Voltage 1.0 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 Low Level Output Saturation Voltage During Undervoltage Lockout TJ = 125°C 0.5 TJ = – 55°C TJ = 25°C TJ = – 55°C TJ = 25°C TJ = 125°C 0 200 0 100 OUTPUT SINK CURRENT (mA) 200 0 5 OUTPUT SINK CURRENT (mA) 10 LT1241 • TPC13 LT1241 • TPC14 LT1241 • TPC15 5 LT1241 Series TYPICAL PERFOR A CE CHARACTERISTICS Output Deadtime vs Oscillator Frequency – LT1242, LT1244 60 50 5nF % OF DEADTIME 2nF % OF DEADTIME 40 30 500pF 20 10 100pF 0 0 100 OSCILLATOR FREQUENCY (kHz) 1000 RT (kΩ) Output Rise and Fall Time OUTPUT VOLTAGE 5V/DIV OUTPUT VOLTAGE OUTPUT CROSSCONDUCTION CURRENT 20mA/DIV CURRENT SENSE INPUT 1V/DIV OUTPUT VOLTAGE 5V/DIV VCC = 15V CL = 1nF TIME 50ns/DIV LT1241 • TPC22 6 UW 1nF LT1241 • TPC19 Output Deadtime vs Oscillator Frequency – LT1241, LT1243,LT1245 75 100 Timing Resistor vs Oscillator Frequency 100pF 200pF 70 1nF 500pF 10nF 65 5nF 2nF 1nF 2nF 10 CT =10nF 5nF 500pF 60 55 100pF 50 0 100 OSCILLATOR FREQUENCY (kHz) 1000 1 10k VCC = 15V TJ = 25°C 100k OSCILLATOR FREQUENCY (Hz) 1M LT1241 • TPC20 LT1241 • TPC21 Output Cross-Conduction Current Current Sense Delay VCC = 15V CL = 15pF TIME 50ns/DIV LT1241 • TPC23 TIME 50ns/DIV VCC = 15V CL = 1nF LT1241 • TPC24 LT1241 Series PI FU CTI COMP (Pin 1): Compensation Pin. This pin is the output of the Error Amplifier and is made available for loop compensation. It can also be used to adjust the maximum value of the current sense clamp voltage to less than 1V. This pin can source a minimum of 0.5mA (0.8mA typ) and sink a minimum of 2mA (4mA typ) FB (Pin 2) Voltage Feedback Pin. This pin is the inverting input of the error amplifier. The output voltage is normally fed back to this pin through a resistive divider. The noninverting input of the error amplifier is internally committed to a 2.5V reference point. ISENSE (Pin 3): Current Sense Pin. This is the input to the current sense comparator. The trip point of the comparator is set by, and is proportional to, the output voltage of the Error Amplifier. RT/CT (Pin 4): The oscillator frequency and the deadtime are set by connecting a resistor (RT) from VREF to RT/CT and a capacitor (CT) from RT/CT to GND. APPLICATI START-UP DEVICE LT1241 LT1242 LT1243 LT1244 LT1245 S I FOR ATIO MAXIMUM VOLTAGE 7.6V 10V 7.6V 10V 7.6V MINIMUM OPERATING THRESHOLD 9.6V 16V 8.4V 16V 8.4V DUTY CYCLE REPLACES 50% 100% 100% 50% 50% NONE UC1842 UC1843 UC1844 UC1845 Oscillator The LT1241 series devices are fixed frequency current mode pulse width modulators. The oscillator frequency and the oscillator discharge current are both trimmed and tightly specified to minimize the variations in frequency and deadtime. The oscillator frequency is set by choosing a resistor and capacitor combination, RT and CT. This RC combination will determine both the frequency and the maximum duty cycle. The resistor RT is connected from VREF (Pin 8) to the RT/CT pin (Pin 4). The capacitor CT is U W U UO UO U U S The rise time of the oscillator waveform is set by the RC time constant of RT and CT. The fall time, which is equal to the output deadtime, is set by a combination of the RC time constant and the oscillator sink current (8.2mA typ). GND (Pin 5): Ground. OUTPUT (Pin 6): This pin is the output of a high current totem pole output stage. It is capable of driving up to ±1A of current into a capacitive load such as the gate of a MOSFET. VCC (Pin 7): This pin is the positive supply of the control IC. VREF (Pin 8): Reference. This is the reference output of the IC. The reference output is used to supply charging current to the external timing resistor RT. The reference provides biasing to a large portion of the internal circuitry, and is used to generate several internal reference levels including the VFB level and the current sense clamp voltage. connected from the RT/CT pin to ground. The charging current for CT is determined by the value of RT. The discharge current for CT is set by the difference between the current supplied by RT and the discharge current of the LT124X. The discharge current of the device is trimmed to 8.2mA. For large values of RT discharge time will be determined by the discharge current of the device and the value of CT. As the value of RT is reduced it will have more effect on the discharge time of CT. During an oscillator cycle capacitor CT is charged to approximately 2.8V and discharged to approximately 1.1V. The output is enabled during the charge time of CT and disabled, in an off state, during the discharge time of CT. The deadtime of the circuit is equal to the discharge time of CT. The maximum duty cycle is limited by controlling the deadtime of the oscillator. There are many combinations of RT and CT that will yield a given oscillator frequency, however there is only one combination that will yield a specific deadtime at that frequency. Curves of oscillator frequency and deadtime 7 LT1241 Series APPLICATI S I FOR ATIO for various values of RT and CT appear in the Typical Performance Characteristics section. Frequency and deadtime can also be calculated using the following formulas: Oscillator Rise Time: t r = 0.583 • RC Oscillator Discharge Time: t d = Oscillator Period: TOSC = tr + td Oscillator Frequency: fOSC = 1 TOSC (0.0164) R − 11.73 3.46 • RC Maximum Duty Cycle: LT1241, LT1244, LT1245 tr TOSC − t d DMAX = = 2 TOSC 2 TOSC LT1242, LT1243 DMAX = tr TOSC = TOSC − t d TOSC The above formulas will give values that will be accurate to approximately ± 5%, at the oscillator, over the full operating frequency range. This is due to the fact that the oscillator trip levels are constant versus frequency and the discharge current and initial oscillator frequency are trimmed. Some fine adjustment may be required to achieve more accurate results. Once the final RT/CT combination is selected the oscillator characteristics will be repeatable from device to device. Note that there will be some slight differences between maximum duty cycle at the oscillator and maximum duty cycle at the output due to the finite rise and fall times of the output. The output switching frequency will be equal to the oscillator frequency for LT1242 and LT1243. The output switching frequency will be equal to one-half the oscillator 8 U frequency for LT1241, LT1244 and LT1245. The oscillator of LT1241 series devices will run at frequencies up to 1MHz, allowing 500kHz output switching frequencies for all devices. Error Amplifier The LT1241 series of devices contain a fully compensated error amplifier with a DC gain of 90dB and a unity-gain frequency of 1MHz. Phase margin at unity-gain is 80°. The noninverting input is internally committed to a 2.5V reference point derived from the 5V reference of Pin 8. The inverting input (Pin 2) and the output (Pin 1) are made available to the user. The output voltage in a regulator circuit is normally fed back to the inverting input of the error amplifier through a resistive divider. The output of the error amplifier is made available for external loop compensation. The output current of the error amplifier is limited to approximately 0.8mA sourcing and approximately 6mA sinking. In a current mode PWM the peak switch current is a function of the output voltage of the error amplifier. In the LT1241 series devices the output of the error amplifier is offset by two diodes (1.4V at 25°C), divided by a factor of three, and fed to the inverting input of the current sense comparator. For error amplifier output voltages less than 1.4V the duty cycle of the output stage will be zero. The maximum offset that can appear at the current sense input is limited by a 1V clamp. This occurs when the error amplifier output reaches 4.4V at 25°C. The output of the error amplifier can be clamped below 4.4V in order to reduce the maximum voltage allowed across the current sensing resistor to less than 1V. The supply current will increase by the value of the output source current when the output voltage of the error amplifier is clamped. W U UO LT1241 Series APPLICATI S I FOR ATIO Current Sense Comparator and PWM Latch LT1241 series devices are current mode controllers. Under normal operating conditions the output (Pin 6) is turned on at the start of every oscillator cycle, coincident with the rising edge of the oscillator waveform. The output is then turned off when the current reaches a threshold level proportional to the error voltage at the output of the error amplifier. Once the output is turned off it is latched off until the start of the next cycle. The peak current is thus proportional to the error voltage and is controlled on a cycle by cycle basis. The peak switch current is normally sensed by placing a sense resistor in the source lead of the output MOSFET. This resistor converts the switch current to a voltage that can be fed into the current sense input. For normal operating conditions the peak inductor current, which is equal to the peak switch current, will be equal to: IPK = (VPIN1 − 1.4V) (3RS) During fault conditions the maximum threshold voltage at the input of the current sense comparator is limited by the internal 1V clamp at the inverting input. The peak switch current will be equal to: IPK (MAX) = 1.0V RS In certain applications, such as high power regulators, it may be desirable to limit the maximum threshold voltage to less than 1V in order to limit the power dissipated in the sense resistor or to limit the short-circuit current of the regulator circuit. This can be accomplished by clamping the output of the error amplifier. A voltage level of approximately 1.4V at the output of the error amplifier will give a threshold voltage of 0V. A voltage level of approximately 4.4V at the output of the error amplifier will give a threshold level of 1V. Between 1.4V and 4.4V the threshold voltage will change by a factor of one-third of the U change in the error amplifier output voltage. The threshold voltage will be 0.333V for an error amplifier voltage of 2.4V. To reduce the maximum current sense threshold to less than 1V the error amplifier output should be clamped to less than 4.4V. Blanking A unique feature of the LT1241 series devices is the builtin blanking circuit at the output of the current sense comparator. A common problem with current mode PWM circuits is erratic operation due to noise at the current sense input. The primary cause of noise problems is the leading edge current spike due to transformer interwinding capacitance and diode reverse recovery time. This current spike can prematurely trip the current sense comparator causing an instability in the regulator circuit. A filter at the current sense input is normally required to eliminate this instability. This filter will in turn slow down the current sense loop. A slow current sense loop will increase the minimum pulse width which will increase the short-circuit current in an overload condition. The LT1241 series devices blank (lock out) the signal at the output of the current sense comparator for a fixed amount of time after the switch is turned on. This effectively prevents the PWM latch from tripping due to the leading edge current spike. The blanking time will be a function of the voltage at the feedback pin (Pin 2). The blanking time will be 100ns for normal operating conditions (VFB = 2.5V). The blanking time goes to zero as the feedback pin is pulled to 0V. This means that the blanking time will be minimized during start-up and also during an output short-circuit fault. This blanking circuit eliminates the need for an input filter at the current sense input except in extreme cases. Eliminating the filter allows the current sense loop to operate with minimum delays, reducing peak currents during fault conditions. W U UO 9 LT1241 Series APPLICATI S I FOR ATIO Undervoltage Lockout The LT1241 series devices incorporate an undervoltage lockout comparator which prevents the internal reference circuitry and the output from starting up until the supply voltage reaches the start-up threshold voltage. The quiescent current, below the start-up threshold, has been reduced to less than 250µA (170µA typ.) to minimize the power loss due to the bleed resistor used for start-up in off-line converters. In undervoltage lockout both VREF (Pin 8) and the output (Pin 6) are actively pulled low by Darlington connected PNP transistors. They are designed to sink a few milliamps of current and will pull down to about 1V. The pull-down transistor at the reference pin can be used to reset the external soft start capacitor. The pulldown transistor at the output eliminates the external pulldown resistor required, with earlier devices, to hold the external MOSFET gate low during undervoltage lockout. Output The LT1241 series devices incorporate a single high current totem pole output stage. This output stage is capable of driving up to ± 1A of output current. Crossconduction current spikes in the output totem pole have been eliminated. This device is primarily intended for driving MOSFET switches. Rise time is typically 40ns and fall time is typically 30ns when driving a 1.0nF load. A clamp is built into the device to prevent the output from rising above 18V in order to protect the gate of the MOSFET switch. The output is actively pulled low during undervoltage lockout by a Darlington PNP. This PNP is designed to sink several milliamps and will pull the output down to approximately 1V. This active pull-down eliminates the need for an external resistor which was required in older designs. The output pin of the device connects directly to the emitter of the upper NPN drive transistor and the collector of the lower NPN drive transistor in the totem pole. The collector of the lower transistor, which is n-type silicon, forms a p-n junction with the substrate of the device. This junction is reverse biased during normal operation. In some applications the parasitic LC of the external MOSFET gate can ring and pull the OUTPUT pin below 10 U ground. If the OUTPUT pin is pulled negative by more than a diode drop the parasitic diode formed by the collector of the output NPN and the substrate will turn on. This can cause erratic operation of the device. In these cases a Schottky clamp diode is recommended from the output to ground. Reference The internal reference of the LT1241 series devices is a 5V bandgap reference, trimmed to within ±1% initial tolerance. The reference is used to power the majority of internal logic and the oscillator circuitry. The oscillator charging current is supplied from the reference. The feedback pin voltage and the clamp level for the current sense comparator are derived from the reference voltage. The reference can supply up to 20mA of current to power external circuitry. Note that using the reference in this manner, as a voltage regulator, will significantly increase power dissipation in the device which will reduce the useful operating ambient temperature range. Design/Layout Considerations LT1241 series devices are high speed circuits capable of generating pulsed output drive currents of up to 1A peak. The rise and fall time for the output drive current is in the range of 10ns to 20ns. High speed circuit techniques must be used to insure proper operation of the device. Do not attempt to use Proto-boards or wire-wrap techniques to breadboard high speed switching regulator circuits. They will not work properly. Printed circuit layouts should include separate ground paths for the voltage feedback network, oscillator capacitor, and switch drive current. These ground paths should be connected together directly at the ground pin (Pin 5) of the LT124X. This will minimize noise problems due to pulsed ground pin currents. VCC should be bypassed, with a minimum of 0.1µF, as close to the device as possible. High current paths should be kept short and they should be separated from the feedback voltage network with shield traces if possible. W U UO LT1241 Series TYPICAL APPLICATI External Clock Synchronization VREF 8 RT RT/CT EXTERNAL SYNC INPUT 4 0.01µF CT OSCILLATOR C VREF 5V REF R + 47Ω D1 D1 IS REQUIRED IF THE SYNC AMPLITUDE IS LARGE ENOUGH TO PULL THE BOTTOM OF CT MORE THAN LT1241 • TA01 300mV BELOW GROUND. VREF 8 RT/CT 4 R2 100k COMP 1 FB 2 1mA – + 2.5V C R1 VCLAMP ≈ ( UO 1.67 R2 +1 R1 S Soft Start 8 COMP 1 FB 2 1mA 5.6V 5V REF 1V – + 2.5V 2R R – + + 1.5V ISENSE 3 – LT1241 • TA02 Adjustable Clamp Level with Soft Start 5V REF MAIN BIAS REFERENCE ENABLE REFERENCE PULL-DOWN UV LOCKOUT VCC 7 VIN OUTPUT PULL-DOWN OSCILLATOR 5.6V 1V T S R 18V 2R R OUTPUT 6 GND 5 – + BLANKING + 1.5V – ISENSE 3 RS ( IPK (MAX) ≈ VCLAMP RS WHERE: 0V ≤ VCLAMP ≤ 1.0V tSOFT START = – ln 1 – VC 3 • VCLAMP C R1 R2 R1 + R2 LT1241 • TA03 11 LT1241 Series TYPICAL APPLICATI UO 3 T1 BALEN 2 4 C5 4700pF 250V Y-CAP C6 4700pF 250V Y-CAP C3 0.1µF 250V MP3-X2 C4 4700pF 250V Y-CAP GND 5 S 300kHz Off-Line Power Supply HOT 1 90VAC TO 240VAC NEU R5 1M 1/2W C2 0.1µF 250V MP3-X2 D5 – + 2KBPO8M 1212-R6103 COILTRONICS AC GND RT1 MCID404 2KBPOO5M T2 8 30T 2 7 30T 1 D1 MUR160 3 13T 6 D3 MUR420 L1 5 1/2 TURN AIRCORE C15 3.3µF 50V C16 3.3µF 50V R15 750Ω 1W 20V 1.5A + C14 100µF 400V R1 200k 1/2W R3 200k 1/2W R2 660k 1/10W R4 660k 1/10W C1 470pF R5 27k 2W 4 12T 5 D6 1N5245B 15V CTX210433-1 RTN C13 4700pF 1kV Y-CAP D7 BAV21 R7 510 1/10W D2 BAV21 LP = 100µH LT1241 • TA06 R8 152k C7 0.22µF MKS-2 C8 100pF R14 39 7 2 C9 0.01µF, 100V MKS-2 1 FB VCC LT1241 COMP OUTPUT ISENSE 6 3 R12 1k 1/10W C12 22µF 25V R11 12 D4 BAT 85 R9 200k Q1 MPT2N60 8V REF 4 R10 20k R13 12k C10 0.1µF MKS-2 RT/CT C11 220pF NOTES: UNLESS OTHERWISE SPECIFIED 1. ALL RESISTANCES ARE IN OHMS, 1/4W, 5%. 2. ALL CAPACITANCES ARE IN MICROFARADS, 50V, 10%. R18 2Ω 1/4W R16 2Ω 1/4W R17 2Ω 1/4W 12 LT1241 Series TYPICAL APPLICATI VREF 8 RT RT/CT 4 CT COMP 1 FB 2 1mA – + 2.5V PACKAGE DESCRIPTIO CORNER LEADS OPTION (4 PLCS) 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION 0.300 BSC (0.762 BSC) 0.008 – 0.018 (0.203 – 0.457) 0.385 ± 0.025 (9.779 ± 0.635) 0° – 15° NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS. U UO S Slope Compensation at ISENSE Pin 5V REF MAIN BIAS REFERENCE ENABLE REFERENCE PULL-DOWN UV LOCKOUT VCC 7 VIN OUTPUT PULL-DOWN OSCILLATOR 5.6V T 1V S R 18V 2R R OUTPUT 6 GND 5 – + BLANKING + 1.5V – ISENSE 3 RS LT1241 • TA04 Dimensions in inches (millimeters) unless otherwise noted. J8 Package 8-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) 0.405 (10.287) MAX 8 7 6 5 0.005 (0.127) MIN 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0.025 (0.635) RAD TYP 1 2 3 0.220 – 0.310 (5.588 – 7.874) 4 0.200 (5.080) MAX 0.015 – 0.060 (0.381 – 1.524) 0.045 – 0.068 (1.143 – 1.727) 0.014 – 0.026 (0.360 – 0.660) 0.125 3.175 0.100 ± 0.010 MIN (2.540 ± 0.254) J8 0694 13 LT1241 Series PACKAGE DESCRIPTIO 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) ( +0.025 0.325 –0.015 8.255 +0.635 –0.381 ) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 14 U Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.400* (10.160) MAX 8 7 6 5 0.255 ± 0.015* (6.477 ± 0.381) 1 2 3 4 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) 0.065 (1.651) TYP 0.005 (0.127) MIN 0.100 ± 0.010 (2.540 ± 0.254) 0.125 (3.175) MIN 0.018 ± 0.003 (0.457 ± 0.076) 0.015 (0.380) MIN N8 0695 LT1241 Series PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 2 3 4 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0.016 – 0.050 0.406 – 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) BSC SO8 0695 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1241 Series TYPICAL APPLICATION Slope Compensation at Error Amp VREF 8 RT TO VOUT RT/CT 4 OSCILLATOR 5.6V 1mA 2 FB CT RSLOPE COMP 1 Rf RELATED PARTS PART NUMBER LT1246 LT1248/LT1249 LT1372 LT1376 LT1509 DESCRIPTION 1MHz Current Mode PWM Power Factor Controllers High Efficiency Switching Regulator 1.5A 500kHz Step-Down Switching Regulator Power Factor and PWM Controller COMMENTS 16V Start-Up Threshold, 10V Minimum Operating Voltage Minimal Parts Count 500kHz 1.5A Boost Regulator Steps Down from Up to 25V Using 4.7µH Inductors Complete Solution for Universal Off-Line Switching Power Supplies 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417q (408) 432-1900 FAX: (408) 434-0507q TELEX: 499-3977 q www.linear-tech.com U – + 5V REF MAIN BIAS REFERENCE ENABLE REFERENCE PULL-DOWN UV LOCKOUT VCC 7 OUTPUT PULL-DOWN T 1V S R 18V 2R R OUTPUT 6 GND 5 – + BLANKING + 1.5V 2.5V – ISENSE 3 LT1241 • TA05 1241fa LT/TP 0297 5K REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1992