LT1256CS

LT1251/LT1256 40MHz Video Fader and DC Gain Controlled Amplifier FEATURES s s s s s s s s DESCRIPTION The LT ®1251/LT1256 are 2-input, 1-output, 40MHz current feedback amplifiers with a linear control circuit that sets the amount each input contributes to the output. These parts make excellent electronically controlled variable gain amplifiers, filters, mixers and faders. The only external components required are the power supply bypass capacitors and the feedback resistors. Both parts operate on supplies from ± 2.5V (or single 5V) to ±15V (or single 30V). Absolute gain accuracy is trimmed at wafer sort to minimize part-to-part variations. The circuit is completely temperature compensated. The LT1251 includes circuitry that eliminates the need for accurate control signals around zero and full scale. For control signals of less than 2% or greater than 98%, the LT1251 sets one input completely off and the other completely on. This is ideal for fader applications because it eliminates off-channel feedthrough due to offset or gain errors in the control signals. The LT1256 does not have this on/off feature and operates linearly over the complete control range. The LT1256 is recommended for applications requiring more than 20dB of linear control range. s s s s Accurate Linear Gain Control: ± 1% Typ, ± 3% Max Constant Gain with Temperature Wide Bandwidth: 40MHz High Slew Rate: 300V/µs Fast Control Path: 10MHz Low Control Feedthrough: 2.5mV High Output Current: 40mA Low Output Noise 45nV/√Hz at AV = 1 270nV/√Hz at AV = 100 Low Distortion: 0.01% Wide Supply Range: ± 2.5V to ± 15V Low Supply Current: 13mA Low Differential Gain and Phase: 0.02%, 0.02° APPLICATIONS s s s s s s s Composite Video Gain Control RGB, YUV Video Gain Control Video Faders, Keyers Gamma Correction Amplifiers Audio Gain Control, Faders Multipliers, Modulators Electronically Tunable Filters , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATION Two-Input Video Fader 5 IN1 1 + LT1256 Gain Accuracy vs Control Voltage 4 VS = ± 5V VFS = 2.5V LT1251/LT1256 + – + – 14 2 – + IN2 GAIN ACCURACY (%) 2 0V TO 2.5V CONTROL IC 3 4 5 NULL V– 6 7 1 CONTROL C 5k IC IFS 3 2 1 0 –1 –2 –3 13 12 2.5VDC INPUT 11 IFS 10 9 8 VOUT 1251/56 TA01 FS 5k – RF2 1.5k RF1 1.5k V+ –4 GAIN ACCURACY (%) = AVMEAS – –5 0 0.5 U U U ( VC 100 2.5 )( ) 2.5 1.5 2.0 1.0 CONTROL VOLTAGE (V) 1251/56 TA02 1 LT1251/LT1256 ABSOLUTE MAXIMUM RATINGS Total Supply Voltage (V + to V –) .............................. 36V Input Current ...................................................... ± 15mA Input Voltage on Pins 3,4,5,10,11,12 ............... V – to V + Output Short-Circuit Duration (Note 1) ........ Continuous Specified Temperature Range (Note 2) ....... 0°C to 70°C Operating Temperature Range ............... – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Junction Temperature (Note 3)............................ 150°C Lead Temperature (Soldering, 10 sec).................. 300°C PACKAGE/ORDER INFORMATION TOP VIEW IN1 FB1 VC IC RC NULL V– 1 2 3 4 5 6 7 N PACKAGE 14-LEAD PDIP + – + – + 14 13 12 11 10 9 8 IN2 FB2 VFS IFS RFS V+ VOUT ORDER PART NUMBER LT1251CN LT1251CS LT1256CN LT1256CS (Note 2) 1 CONTROL 2 – + C FS – S PACKAGE 14-LEAD PLASTIC SO TJMAX = 150°C, θJA = 70°C/ W (N) TJMAX = 150°C, θJA = 100°C/ W (S) Consult factory for Industrial and Military grade parts. SIG AL A PLIFIER AC CHARACTERISTICS 0°C ≤ TA ≤ 70°C, VS = ± 5V, VIN = 1VRMS, f = 1kHz, AVMAX = 1, RF1 = RF2 = 1.5k, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted. SYMBOL 2%IN1 10%IN1 20%IN1 30%IN1 40%IN1 50%IN1 60%IN1 70%IN1 80%IN1 90%IN1 98%IN1 2%IN2 10%IN2 20%IN2 30%IN2 40%IN2 50%IN2 60%IN2 70%IN2 80%IN2 90%IN2 98%IN2 PARAMETER 2% Input 1 Gain 10% Input 1 Gain 20% Input 1 Gain 30% Input 1 Gain 40% Input 1 Gain 50% Input 1 Gain 60% Input 1 Gain 70% Input 1 Gain 80% Input 1 Gain 90% Input 1 Gain 98% Input 1 Gain 2% Input 2 Gain 10% Input 2 Gain 20% Input 2 Gain 30% Input 2 Gain 40% Input 2 Gain 50% Input 2 Gain 60% Input 2 Gain 70% Input 2 Gain 80% Input 2 Gain 90% Input 2 Gain 98% Input 2 Gain Gain Drift with Temperature (Worst Case at 30% Gain) CONDITIONS VC (Pin 3) = 0.05V VC (Pin 3) = 0.25V VC (Pin 3) = 0.50V VC (Pin 3) = 0.75V VC (Pin 3) = 1.00V VC (Pin 3) = 1.25V VC (Pin 3) = 1.50V VC (Pin 3) = 1.75V VC (Pin 3) = 2.00V VC (Pin 3) = 2.25V VC (Pin 3) = 2.45V VC (Pin 3) = 2.45V VC (Pin 3) = 2.25V VC (Pin 3) = 2.00V VC (Pin 3) = 1.75V VC (Pin 3) = 1.50V VC (Pin 3) = 1.25V VC (Pin 3) = 1.00V VC (Pin 3) = 0.75V VC (Pin 3) = 0.50V VC (Pin 3) = 0.25V VC (Pin 3) = 0.05V VC (Pin 3) = 0.75V VC (Pin 3) = 0.75V LT1251 LT1256 q q q q q q q q q q q LT1251 LT1256 LT1251 LT1256 q q q q q q q q q q q q q LT1251 LT1256 N Package S Package q q MIN 0 0.1 7 17 27 37 47 57 67 77 87 99.9 95.0 0 0.1 7 17 27 37 47 57 67 77 87 99.9 95.0 TYP MAX 0.1 5.0 13 23 33 43 53 63 73 83 93 100.0 99.9 0.1 5.0 13 23 33 43 53 63 73 83 93 100.0 99.9 50 400 UNITS % % % % % % % % % % % % % % % % % % % % % % % % % % ppm/°C ppm/°C 2 U W U U WW W W U LT1251/LT1256 SIG AL A PLIFIER AC CHARACTERISTICS 0°C ≤ TA ≤ 70°C, VS = ± 5V, VIN = 1VRMS, f = 1kHz, AVMAX = 1, RF1 = RF2 = 1.5k, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted. SYMBOL PARAMETER Gain Supply Rejection External Resistor Gain 50% Input 1 Slew Rate Control Feedthrough Full Power Bandwidth Small-Signal Bandwidth Differential Gain (Notes 4,5) Differential Phase (Notes 4,5) THD Total Harmonic Distortion CONDITIONS VC = 1.25V, VS = ± 5V to ± 15V Pins 5,10 = Open, External 5k Resistors from Pins 4,11 to Ground, VC = 1.25V VIN = ± 2.5V, VO at ± 2V, RL = 150Ω VC = 1.25VDC + 2.5VP-P at 1kHz VO = 1VRMS VS = ± 5V VS = ± 15V Control = 0% or 100% Control = 25% or 75% Control = 0% or 100% Control = 25% or 75% Gain = 100% Gain = 50% Gain = 10% 10% to 90%, VO = 100mV VO = 100mV VO = 100mV 0.1%, ∆VO = 2V MIN q q q SR BW t r, tf OS t PD tS Rise Time, Fall Time Overshoot Propagation Delay Settling Time SIG AL A PLIFIER DC CHARACTERISTICS SYMBOL VOS PARAMETER Input Offset Voltage Input Offset Voltage Drift Noninverting Input Bias Current Inverting Input Bias Current Inverting Input Bias Current Null Change Input Noise Voltage Density Noninverting Input Noise Current Density Inverting Input Noise Current Density Input Resistance Input Capacitance Input Voltage Range Common Mode Rejection Ratio Inverting Input Current Common Mode Rejection PSRR Power Supply Rejection Ratio Noninverting Input Current Power Supply Rejection Inverting Input Current Power Supply Rejection 0°C ≤ TA ≤ 70°C, VS = ± 5V, VCM = 0V, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted. CONDITIONS Either Input Difference Between Inputs Either Input Either Input Difference Between Inputs Null (Pin 6) Open to V – f = 1kHz f = 1kHz f = 1kHz Either Noninverting Input Either Noninverting Input VS = ± 5V VS = 5V VCM = – 3V to 3V VS = 5V, VCM = 2V to 3V, VO = 2.5V VCM = – 3V to 3V VS = 5V, VCM = 2V to 3V, VO = 2.5V VS = ± 5V to ± 15V VS = ± 5V to ± 15V VS = ± 5V to ± 15V MIN q q q q q q IIN+ IIN– en +in –in RIN CIN CMRR W W U U TYP 0.03 45 150 300 2.5 20 30 40 0.02 0.90 0.02 0.55 0.002 0.015 0.4 11 3 10 65 MAX 0.10 55 UNITS %/V % V/ µs mVP-P MHz MHz MHz % % DEG DEG % % % ns % ns ns –3 – 2.5 – 30 –1 – 280 q q q q q q q q q q q 5 ±3 2 55 50 TYP 2 1 10 0.5 10 0.5 – 170 2.7 1.5 29 17 1.5 ± 3.2 61 57 0.07 0.17 76 30 30 MAX 5 3 2.5 30 1 – 60 3 0.25 0.70 100 200 70 UNITS mV mV µV/ °C µA µA µA µA nV/√Hz pA/√Hz pA/√Hz MΩ pF V V dB dB µA/ V µA/ V dB nA/V nA/V 3 LT1251/LT1256 SIG AL A PLIFIER DC CHARACTERISTICS SYMBOL AVOL ROL VOUT PARAMETER Large-Signal Voltage Gain Transresistance, ∆VOUT / ∆IIN– Maximum Output Voltage Swing 0°C ≤ TA ≤ 70°C, VS = ± 5V, VCM = 0V, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted. CONDITIONS VO = – 3V to 3V, RL = 150Ω VO = – 2.75V to 2.75V, RL = 150Ω VO = – 3V to 3V, RL = 150Ω VO = – 2.75V to 2.75V, RL = 150Ω No Load RL = 150Ω VS = ± 15V, No Load VS = 5V, VCM = 2.5V, (Note 6) VS = ± 5V VS = 5V, VCM = VO = 2.5V VC = VFS = 2.5V VC = VFS = 1.25V VC = VFS = 0V VC = VFS = 2.5V, VS = ± 15V VC = VFS = 0V, VS = ± 15V MIN 83 83 0.75 0.75 ± 4.0 ± 3.0 ± 2.75 ± 14.0 1.2 ± 30 ± 20 TYP 93 1.8 ± 4.2 ± 3.5 ± 14.2 3.8 ± 40 ± 30 13.5 7.5 1.3 14.5 1.4 MAX UNITS dB dB MΩ MΩ V V V V V mA mA mA mA mA mA mA IO IS Maximum Output Current Supply Current CO TROL A D FULL SCALE A PLIFIER CHARACTERISTICS 0°C ≤ TA ≤ 70°C, VS = ± 5V, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted. SYMBOL PARAMETER Control Amplifier Input Offset Voltage Full-Scale Amplifier Input Offset Voltage Control Amplifier Input Resistance Full-Scale Amplifier Input Resistance Control Amplifier Input Bias Current Full-Scale Amplifier Input Bias Current Internal Control Resistor Internal Full-Scale Resistor Resistor Temperature Coefficient Control Path Bandwidth Control Path Rise and Fall Time Control Path Transition Time Control Path Propagation Delay CONDITIONS Pin 4 to Pin 3 Pin 11 to Pin 12 MIN q q q q q q RC RFS The q denotes specifications which apply over the specified operating temperature range. Note 1: A heat sink may be required depending on the power supply voltage. Note 2: Commercial grade parts are designed to operate over the temperature range of – 40°C to 85°C but are neither tested nor guaranteed beyond 0°C to 70°C. Industrial grade parts specified and tested over – 40°C to 85°C are available on special request. Consult factory. Note 3: TJ is calculated from the ambient temperature TA and the power dissipation PD according to the following formulas: LT1251CN/LT1256CN: TJ = TA + (PD • 70°C/W) LT1251CS/LT1256CS: TJ = TA + (PD • 100°C/W) 4 W U W U q q q q q q q q q q q q q 17.0 9.5 1.8 18.5 2.0 U TA = 25°C TA = 25°C Small Signal, VC = 100mV, (Note 7) Small Signal, VC = 100mV, (Note 7) 0% to 100% Small Signal, ∆VC = 100mV VC from 0% or 100% 25 25 – 750 – 750 3.75 4 TYP 5 5 100 100 – 300 – 300 5 5 0.2 10 35 150 50 90 MAX 15 15 6.25 6 UNITS mV mV MΩ MΩ nA nA kΩ kΩ %/ °C MHz ns ns ns ns Note 4: Differential gain and phase are measured using a Tektronix TSG120YC/NTSC signal generator and a Tektronix 1780R Video Measurement Set. The resolution of this equipment is 0.1% and 0.1°. Five identical amplifier stages were cascaded giving an effective resolution of 0.02% and 0.02°. Note 5: Differential gain and phase are best when the control is set at 0% or 100%. See the Typical Performance Characteristics curves. Note 6: Tested with RL = 150Ω to 2.5V to simulate an AC coupled load. Note 7: Small-signal control path response is measured driving RC (Pin 5) to eliminate peaking caused by stray capacitance on Pin 4. LT1251/LT1256 TYPICAL PERFORMANCE CHARACTERISTICS LT1251 Gain vs Control Voltage 1.0 1.0 SPOT NOISE (nV/√Hz OR pA/√Hz) 0.8 IN2 GAIN (V/V) 0.6 GAIN (V/V) VFS = 2.5V 0.4 IN1 0.2 0 0 0.5 1.5 2.0 1.0 CONTROL VOLTAGE (V) 2.5 1251/56 G01 LT1251/LT1256 Control Path Bandwidth 10 8 6 VOLTAGE GAIN (dB) VOLTAGE GAIN (dB) 10 VOLTAGE DRIVE VC VS = ± 5V OUTPUT VOLTAGE (VP-P) 4 2 0 –2 –4 –6 –8 –10 10k PIN 4 NOT IN SOCKET 100k 1M 10M FREQUENCY (Hz) THD Plus Noise vs Frequency 10 VS = ± 5V, VIN = 1VRMS AV = 1, RF = 1.5k, VFS = 2.5V CC –30 1 THD + NOISE (%) 3RD ORDER INTERCEPT (dBm) CC DISTORTION (dBc) VC = 10% 0.1 VC = 50% CC 0.01 VC = 100% CC 0.001 10 100 1k 10k FREQUENCY (Hz) 100k 1251/56 G08 UW LT1256 Gain vs Control Voltage 100 Spot Input Noise Voltage and Current vs Frequency 0.8 IN2 0.6 VFS = 2.5V –in 10 0.4 IN1 0.2 en +in 1 10 100 1k FREQUENCY (Hz) 10k 1251/56 G06 0 0 0.5 1.5 2.0 1.0 CONTROL VOLTAGE (V) 2.5 1251/56 G02 LT1251/LT1256 Control Path Bandwidth 8 VOLTAGE DRIVE RC VC = GND VS = ± 5V 7 6 5 4 3 2 8 6 4 2 0 –2 –4 –6 –8 Undistorted Output Voltage vs Frequency AV = 10 AV = 1 VS = ± 5V RL = 1k RF = 1.5k VC = VFS = 2.5V 1M 10M FREQUENCY (Hz) 100M 1251/56 G07 100M 1251/56 G04 –10 10k 100k 1M 10M FREQUENCY (Hz) 100M 1251/56 G05 1 100k 2nd and 3rd Harmonic Distortion vs Frequency –20 VS = ± 5V AV = 1 RF = 1.5k RL = 1k VO = 2VP-P VC = VFS = 2.5V CC 3rd Order Intercept vs Frequency 50 45 40 35 30 25 20 15 VS = ±15V AV = 1 RF = 1.5k RL = 100Ω VC = VFS = 2.5V CC –40 –50 2ND 3RD –60 –70 1 10 FREQUENCY (MHz) 100 1251/56 G09 10 0 5 10 15 20 FREQUENCY (MHz) 25 30 1251/56 G10 5 LT1251/LT1256 TYPICAL PERFORMANCE CHARACTERISTICS Bandwidth vs Feedback Resistance, AV = 1, RL = 100Ω 70 60 –3dB BANDWIDTH (MHz) 50 VS = ± 15V 40 VS = 5V 30 VS = ± 5V 20 10 PEAKING ≤ 0.5dB PEAKING ≤ 5.0dB –3dB BANDWIDTH (MHz) VOLTAGE GAIN (dB) 0.6 1.6 1.0 1.2 1.4 0.8 FEEDBACK RESISTANCE (kΩ) Bandwidth vs Feedback Resistance, AV = 10, RL = 100Ω 60 PEAKING ≤ 0.5dB PEAKING ≤ 5.0dB –3dB BANDWIDTH (MHz) 60 –3dB BANDWIDTH (MHz) 50 50 VS = ± 15V 40 VS = 5V OFF-CHANNEL ISOLATION (dB) 40 VS = ± 15V VS = 5V 30 20 VS = ± 5V 10 0.4 0.8 1.0 1.2 1.4 0.6 FEEDBACK RESISTANCE (kΩ) 1.6 Bandwidth vs Feedback Resistance, AV = 100, RL = 100Ω 10 NO PEAKING 9 9 10 –3dB BANDWIDTH (MHz) –3dB BANDWIDTH (MHz) 8 7 8 7 6 5 4 3 –3dB BANDWIDTH (MHz) VS = ±15V VS = ± 5V 6 5 4 3 2 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 FEEDBACK RESISTANCE (kΩ) 1251/56 G17 VS = 5V 6 UW 1.8 1251/56 G11 1251/56 G14 Bandwidth vs Feedback Resistance, AV = 1, RL = 1k 70 60 50 VS = ± 15V 40 VS = 5V 30 VS = ± 5V 20 10 5 Voltage Gain and Phase vs Frequency 45 PHASE 0 –45 –90 –135 GAIN –180 –225 VS = ± 5V RF = 1.3k RL = 100Ω 1M 10M FREQUENCY (Hz) –270 PHASE SHIFT (DEG) PEAKING ≤ 0.5dB PEAKING ≤ 5.0dB 4 3 2 1 0 –1 –2 –3 –4 0.6 1.6 1.0 1.2 1.4 0.8 FEEDBACK RESISTANCE (kΩ) 1.8 –5 100k 100M 1251/56 G13 1251/56 G12 Bandwidth vs Feedback Resistance, AV = 10, RL = 1k PEAKING ≤ 0.5dB PEAKING ≤ 5.0dB Off-Channel Isolation vs Frequency 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 AV = 1 VS = ± 5V VFS = 2.5V VC = 0V RL = 100Ω RF = 1.5k AV = 10 30 20 VS = ± 5V 10 0.4 0.8 1.0 1.2 1.4 0.6 FEEDBACK RESISTANCE (kΩ) 1.6 –100 10k 100k 1M 10M FREQUENCY (Hz) 100M 1251/56 G16 1251/56 G15 Bandwidth vs Feedback Resistance, AV = 100, RL = 1k 40 NO PEAKING VS = ±15V –3dB Bandwidth vs Control Voltage VS = ±5V RL = 100Ω VFS = 2.5V RF = 1.3k 35 30 25 20 15 10 VS = ± 5V VS = 5V 2 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 FEEDBACK RESISTANCE (kΩ) 1251/56 G18 0 0.5 1.0 1.5 2.0 CONTROL VOLTAGE (V) 2.5 1251/56 G19 LT1251/LT1256 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Full-Scale Voltage 14 12 SUPPLY CURRENT (mA) VS = ± 5V INTERNAL RESISTORS SUPPLY CURRENT (mA) 10 8 6 4 2 0 0 0.5 2.0 1.5 FULL-SCALE VOLTAGE, VFS (V) 1.0 2.5 TA = – 55°C, TA = 25°C TA = 125°C 10 8 TA = – 55°C 6 4 2 0 0 300 400 100 200 FULL-SCALE CURRENT, IFS (µA) 500 COMMON MODE RANGE (V) Inverting Input Bias Current vs Null Voltage 400 INVERTING INPUT BIAS CURRENT (µA) 300 200 100 0 –100 –200 –300 –400 0 TA = 25°C TA = – 55°C TA = 125°C INVERTING INPUT BIAS CURRENT (µA) VS = ± 5V VFS = 2.5V 100 50 0 –50 –100 –150 –200 0 INPUT BIAS CURRENT (nA) 250 100 150 200 300 50 NULL VOLTAGE, REFERENCED TO V – (mV) 1251/56 G23 Positive Output Saturation Voltage vs Load Current 1.7 SATURATION VOLTAGE, V + – VOUT (V) 1.5 1.3 1.1 TA = 25°C 0.9 0.7 0.5 TA = 125°C TA = – 55°C SATURATION VOLTAGE, VOUT – V – (V) VS = ± 5V 2.5 TA = 25°C TA = – 55°C OUTPUT SHORT-CIRCUIT CURRENT (mA) VS = ± 5V 0 30 20 10 LOAD CURRENT (mA) UW 1251/56 G20 Supply Current vs Full-Scale Current 14 12 VS = ± 5V VC = 0V TA = 125°C Input Common Mode Range vs Temperature V+ V+ – 1 V+ – 2 V– + 2 V– +1 V– –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 1251/56 G21 1251/56 G22 Inverting Input Bias Current vs Null Voltage 200 150 VS = ± 5V VFS = 1.25V TA = 25°C TA = – 55°C TA = 125°C –400 –350 –300 –250 –200 –150 –100 –50 Control and Full-Scale Amp Input Bias Current vs Input Voltage TA = – 55°C VS ≥ ± 7.5V TA = 25°C TA = 125°C 20 40 60 80 100 120 140 160 NULL VOLTAGE, REFERENCED TO V – (mV) 1251/56 G24 0 0 1 2 3 INPUT VOLTAGE (V) 4 5 1251/56 G25 Negative Output Saturation Voltage vs Load Current 3.0 60 Output Short-Circuit Current vs Temperature 50 2.0 1.5 TA = 125°C 40 1.0 40 1251/56 G26 0.5 0 –30 –10 –20 LOAD CURRENT (mA) –40 1251/56 G27 30 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1251/56 G28 7 LT1251/LT1256 TYPICAL PERFORMANCE CHARACTERISTICS Slew Rate vs Full-Scale Reference Voltage 350 AV = 1 300 SLEW RATE (V/µs) POWER SUPPLY REJECTION RATIO (dB) VS = ± 15V SLEW RATE (V/µs) 250 200 150 100 50 0 0 2.0 1.5 FULL-SCALE REFERENCE VOLTAGE (V) 0.5 1.0 2.5 VS = ± 5V Settling Time to 10mV vs Output Step 10 8 6 VS = ± 15V RF = 1.5k OUTPUT STEP (V) 10 8 6 4 2 0 –2 –4 –6 NONINVERTING –8 –10 0 25 75 100 50 SETTLING TIME (ns) 125 150 INVERTING, NONINVERTING OUTPUT IMPEDANCE (Ω) OUTPUT STEP (V) 4 2 0 –2 –4 –6 –8 –10 INVERTING Differential Gain vs Controlled Gain 2 1.0 DIFFERENTIAL PHASE (DEG) DIFFERENTIAL GAIN (%) 1 0 50 60 80 90 70 CONTROLLED GAIN, VC /VFS (%) 8 UW 1251/56 G29 1251/56 G32 Slew Rate vs Temperature 80 350 VS = ±5V AV = 1 NO LOAD 70 60 Power Supply Rejection Ratio vs Frequency POSITIVE NEGATIVE 50 40 30 20 10 0 1k 10k 1M 100k FREQUENCY (Hz) 10M 1251/56 G31 VS = ±5V AV = 1 RF = 1.5k VC = VFS = 2.5V 300 250 200 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 1251/56 G30 Settling Time to 1mV vs Output Step 100 NONINVERTING INVERTING Output Impedance vs Frequency VS = ± 5V RF = 1.5k VC = VFS = 2.5V 10 VS = ± 15V RF = 1.5k 1 AV = 100 0.1 AV = 1, 10 NONINVERTING INVERTING 0 50 100 150 SETTLING TIME (ns) 200 1251/56 G33 0.01 10k 100k 1M 10M FREQUENCY (Hz) 100M 1251/56 G34 Differential Phase vs Controlled Gain 50mV 0 – 50mV LT1251 Switching Transient (Glitch) VOUT 0.5 2.5 VC 0 VFS = 2.5V RF1 = RF2 = 1.5k VS = ± 5V 0 100 1251/56 G37 50 60 80 90 70 CONTROLLED GAIN, VC /VFS (%) 100 1251/56 G35 1251/56 G36 LT1251/LT1256 SI PLIFIED SCHE ATIC VCC Q8 Q9 Q10 Q11 Q19 Q20 + I1 + I2 Q5 Q6 R1 250Ω Q1 Q2 VC Q3 Q4 + I3 Q29 D1 D2 Q21 I7 Q42 Q43 Q46 Q47 Q57 Q25 Q26 Q48 Q49 D3 D4 Q59 Q60 Q61 Q50 Q51 Q23 Q24 Q27 W W + I4 + I5 Q16 Q17 R3 250Ω Q7 R2 250Ω IC RC 5k RC VFS Q12 Q13 Q18 R4 250Ω IFS RFS 5k Q14 Q15 + I6 RFS VEE VCC Q30 Q31 Q32 R5 200Ω Q52 R6 200Ω Q53 R7 200Ω Q54 Q36 Q37 Q38 Q39 Q22 Q41 Q40 IN1 FB1 IN2 Q44 FB2 Q45 Q55 Q56 OUT Q58 Q28 Q33 Q34 Q35 R8 200Ω R9 200Ω R10 400Ω R11 200Ω VEE NULL 1251/56 SS 9 LT1251/LT1256 APPLICATIONS INFORMATION Supply Voltage The LT1251/LT1256 are high speed amplifiers. To prevent problems, use a ground plane with point-to-point wiring and small bypass capacitors (0.01µF to 0.1µF) at each supply pin. For good settling characteristics, especially driving heavy loads, a 4.7µF tantalum within an inch or two of each supply pin is recommended. The LT1251/LT1256 can be operated on single or split supplies. The minimum total supply is 4V (Pins 7 to 9). However, the input common mode range is only guaranteed to within 2V of each supply. On a 4V supply the parts must be operated in the inverting mode with the noninverting input biased half way between Pin 7 and Pin 9. See the Typical Applications section for the proper biasing for single supply operation. The op amps in the control section operate from V – (Pin 7) to within 2V of V + (Pin 9). For this reason the positive supply should be 4.5V or greater in order to use 2.5V control and full-scale voltages. Inputs The noninverting inputs (Pins 1 and 14) are easy to drive since they look like a 17M resistor in parallel with a 1.5pF capacitor at most frequencies. However, the input stage can oscillate at very high frequencies (100MHz to 200MHz) if the source impedance is inductive (like an unterminated cable). Several inches of wire look inductive at these high frequencies and can cause oscillations. Check for oscillations at the inverting inputs (Pins 2 and 13) with a 10× probe and a 200MHz oscilloscope. A small capacitor (10pF to 50pF) from the input to ground or a small resistor (100Ω to 300Ω) in series with the input will stop these parasitic oscillations, even when the source is inductive. These components must be within an inch of the IC in order to be effective. All of the inputs to the LT1251/LT1256 have ESD protection circuits. During normal operation these circuits have no effect. If the voltage between the noninverting and inverting inputs exceeds 6V, the protection circuits will trigger and attempt to short the inputs together. This condition will continue until the voltage drops to less than 500mV or the current to less than 10mA. If a very fast edge is used to measure settling time with an input step of more than 6V, the protection circuits will cause the 1mV settling time to become hundreds of microseconds. Feedback Resistor Selection The feedback resistor value determines the bandwidth of the LT1251/LT1256 as in other current feedback amplifiers. The curves in the Typical Performance Characteristics show the effect of the feedback resistor on small-signal bandwidth for various loads, gains and supply voltages. The bandwidth is limited at high gains by the 500MHz to 800MHz gain-bandwidth product as shown in the curves. Capacitance on the inverting input will cause peaking and increase the bandwidth. Take care to minimize the stray capacitance on Pins 2 and 13 during printed circuit board layout for flat response. If the two input stages are not operating with equal gain, the gain versus control voltage characteristic will be nonlinear. This is true even if RF1 equals RF2. This is because the open-loop characteristic of a current feedback amplifier is dependent on the Thevenin impedance at the inverting input. For linear control of the gain, the loop gain of the two stages must be equal. For an extreme example, let’s take a gain of 101 on input 1, RF1 = 1.5k and RG1 = 15Ω, and unity-gain on input 2, RF2 = 1.5k. The curve in Figure 1 shows about 25% error at midscale. To eliminate this nonlinearity we must change the value of RF2. The correct value is the Thevenin impedance at inverting input 1 (including the internal resistance of 27Ω) times the gain set at input 1. For a linear gain versus control voltage characteristic when input 2 is operating at unity-gain, the formula is: RF2 = (AV1)(RF1 RG1 + 27)  RF2 = (101)(14.85 + 27) = 4227 Because the feedback resistor of the unity-gain input is increased, the bandwidth will be lower and the output noise will be higher. We can improve this situation by reducing the values of RF1 and RG1, but at high gains the internal 27Ω dominates. 10 U W U U LT1251/LT1256 APPLICATIONS INFORMATION 100 VFS = 2.5V GAIN (V/V) RF2 = 4.3k 50 RF2 = 1.5k 0 0 0.5 1.5 2.0 1.0 CONTROL VOLTAGE (V) 2.5 1251/56 F01 Figure 1. Linear Gain Control from 0 to 101 Capacitive Loads Increasing the value of the feedback resistor reduces the bandwidth and open-loop gain of the LT1251/LT1256; therefore, the pole introduced by a capacitive load can be overcome. If there is little or no resistive load in parallel with the load capacitance, the output stage will resonate, peak and possibly oscillate. With a resistive load of 150Ω, any capacitive load can be accommodated by increasing the feedback resistor. If the capacitive load cannot be paralleled with a DC load of 150Ω, a network of 200pF in series with 100Ω should be placed from the output to ground. Then the feedback resistor should be selected for best response. The Null Pin Pin 6 can be used to adjust the gain of an internal current mirror to change the output offset. The open circuit voltage at Pin 6 is set by the full scale current IFS flowing through 200Ω to the negative supply. Therefore, the NULL pin sits 100mV above the negative supply with VFS equal to 2.5V. Any op amp whose output swings within a few U W U U millivolts of the negative supply can drive the NULL pin. The AM modulator application shows an LT1077 driving the NULL pin to eliminate the output DC offset voltage. Crosstalk The amount of signal from the off input that appears at the output is a function of frequency and the circuit topology. The nature of a current feedback input stage is to force the voltage at the inverting input to be equal to the voltage at the noninverting input. This is independent of feedback and forced by a buffer amplifier between the inputs. When the LT1251/LT1256 are operating noninverting, the off input signal is present at the inverting input. Since one end of the feedback resistor is connected to this input, the off signal is only a feedback resistor away from the output. The amount of unwanted signal at the output is determined by the size of the feedback resistor and the output impedance of the LT1251/LT1256. The output impedance rises with increasing frequency resulting in more crosstalk at higher frequencies. Additionally, the current that flows in the inverting input is diverted to the supplies within the chip and some of this signal will also show up at the output. With a 1.5k feedback resistor, the crosstalk is down about 86dB at low frequencies and rises to – 78dB at 1MHz and on to – 60dB at 6MHz. The curves show the details. Distortion When only one input is contributing to the output (VC = 0% or 100%) the LT1251/LT1256 have very low distortion. As the control reduces the output, the distortion will increase. The amount of increase is a function of the current that flows in the inverting input. Larger input signals generate more distortion. Using a larger feedback resistor will reduce the distortion at the expense of higher output noise. 11 LT1251/LT1256 APPLICATIONS INFORMATION Signal Path Description RG1 I1 RF1 R1 2 – 1 I1 K V1 1 + V2 14 + 2 13 – I2 RG2 R2 RF2 1251/56 BD Figure 2. Signal Path Block Diagram Figure 2 is the basic block diagram of the LT1251/LT1256 signal path with external resistors RG1, RF1, RG2 and RF2. Both input stages are operating as noninverting amplifiers with two input signals V1 and V2. Each input stage has a unity-gain buffer from the noninverting input to the inverting input. Therefore, the inverting input is at the same voltage as the noninverting input. R1 and R2 represent the internal output resistances of these buffers, approximately 27Ω. K is a constant determined by the control circuit and can be any value between 0 and 1. The control circuit is described in a later section. By inspection of the diagram: I1 = (RG1)(RF1) R1 + RG1 + RF1 V1 − VO R  RF1 + R1 F1 + 1  RG1  12 U W U U Σ I2 1–K IO ROL C +1 8 VO I2 = R2 + (RG2)(RF2) () RG2 + RF2     V2 − VO R  RF2 + R2 F2 + 1  RG2  IO = KI1 + 1 − K I2  ROL VO = IO   1 + sROLC  ( ) Substituting and rearranging gives: (1− K)V2 (RG1)(RF1) R2 + (RG2)(RF2) R1 + KV1 + VO = RG1 + RF1 RG2 + RF2 1 + sROLC + ROL 1− K K + R  R  RF1 + R1 F1 + 1 RF2 + R2  F2 + 1  RG1   RG2  () General Equation for the Noninverting Amplifier Case LT1251/LT1256 APPLICATIONS INFORMATION In low gain applications, R1 and R2 are small compared to the feedback resistors and therefore we can simplify the equation to: () + (RG1)(RF1) (RG2)(RF2) KV1 1 − K V2 VO = RG1 + RF1 RG2 + RF2 1− K 1 + sROLC K + + ROL RF1 RF2 () Note that the denominator causes a gain error due to the open-loop gain (typically 0.1% for frequencies below 20kHz) and for mismatches in RF1 and RF2. A 1% mismatch in the feedback resistors results in a 0.25% error at K = 0.5. If we set RF1 = RF2 and assume ROL >> RF1 (a 0.1% error at low frequencies) the above equation simplifies to: VO = KV1A V1 + 1 − K V2A V2 R R where A V1 = 1 + F1 and A V2 = 1 + F2 RG1 RG2 This shows that the output fades linearly from input 2, times its gain, to input 1, times its gain, as K goes from 0 to 1. If only one input is used (for example, V1) and Pin 14 is grounded, then the gain is proportional to K. VO = KA V1 V1 () U W U U Similarly for the inverting case where the noninverting inputs are grounded and the input voltages V1 and V2 drive the normally grounded ends of RG1 and RG2, we get: 1 − K V2 KV1 + R  R  RG1 + R1 G1 + 1 RG2 + R2 G2 + 1  RF1   RF2  1 + sROLC + ROL () VO = − 1− K K + R  R  RF1 + R1 F1 + 1 RF2 + R2  F2 + 1  RG1   RG2  () General Equation for the Inverting Amplifier Case Note that the denominator is the same as the noninverting case. In low gain applications, R1 and R2 are small compared to the feedback resistors and therefore we can simplify the equation to: KV1 1 − K V2 + RG1 RG2 VO = − 1− K 1 + sROLC K + + ROL RF1 RF2 () () Again, if we set RF1 = RF2 and assume ROL >> RF1 (a 0.1% error at low frequencies) the above equation simplifies to: VO = − KV1A V1 + 1 − K V2A V2 R R where A V1 = F1 and A V2 = F2 RG1 RG2 The 4-resistor difference amplifier yields the same result as the inverting amplifier case, and the common mode rejection is independent of K. [ () ] 13 LT1251/LT1256 APPLICATIONS INFORMATION Control Circuit Description V+ VC 3 IC + C IFS FS + – – IC RC 4 5 RC 5k CONTROL V TO I RFS 5k FULL SCALE V TO I 1251/56 F03 Figure 3. Control Circuit Block Diagram The control section of the LT1251/LT1256 consists of two identical voltage-to-current converters (V-to-I); each V-to-I contains an op amp, an NPN transistor and a resistor. The converter on the right generates a full-scale current IFS and the one on the left generates a control current IC. The ratio IC/IFS is called K. K goes from a minimum of zero (when IC is zero) to a maximum of one (when IC is equal to, or greater than, IFS). K determines the gain from each signal input to the output. The op amp in each V-to-I drives the transistor until the voltage at the inverting input is the same as the voltage at the noninverting input. If the open end of the resistor (Pin 5 or 10) is grounded, the voltage across the resistor is the same as the voltage at the noninverting input. The emitter current is therefore equal to the input voltage VC divided by the resistor value RC. The collector current is essentially the same as the emitter current and it is the ratio of the two collector currents that sets the gain. The LT1251/LT1256 are tested with Pins 5 and 10 grounded and a full-scale voltage of 2.5V applied to VFS (Pin 12). This sets IFS at approximately 500µA; the control voltage VC is applied to Pin 3. When the control voltage is negative or zero, IC is zero and K is zero. When VC is 2.5V or greater, IC is equal to or greater than IFS and K is one. The gain of channel one goes from 0% to 100% as VC goes from zero to 2.5V. The gain of channel two goes the opposite way, from 100% down to 0%. The worst-case error in K (the 14 U W U U gain) is ± 3% as detailed in the electrical tables. By using a 2.5V full-scale voltage and the internal resistors, no additional errors need be accounted for. In the LT1256, K changes linearly with IC. To insure that K is zero, VC must be negative 15mV or more to overcome the worst-case control op amp offset. Similarly to insure that K is 100%, VC must be 3% larger than VFS based on the guaranteed gain accuracy. To eliminate the overdrive requirement, the LT1251 has internal circuitry that senses when the control current is at about 5% and sets K to 0%. Similarly, at about 95% it sets K to 100%. The LT1251 guarantees that a 2% (50mV) input gives zero and 98% (2.45V) gives 100%. The operating currents of the LT1251/LT1256 are derived from IFS and therefore the quiescent current is a function of VFS and RFS. The electrical tables show the supply current for three values of VFS including zero. An approximate formula for the supply current is: IS = 1mA + (24)(IFS) + (VS /20k) where VS is the total supply voltage between Pins 9 and 7. By reducing IFS the supply current can be reduced, however, the slew rate and bandwidth will also be reduced as indicated in the characteristic curves. Using the internal resistors (5k) with VFS equal to 2.5V results in IFS equal to 500µA; there is no reason to use a larger value of IFS. The inverting inputs of the V-to-I converters are available so that external resistors can be used instead of the internal ones. For example, if a 10V full-scale voltage is desired, an external pair of 20k resistors should be used to set IFS to 500µA. The positive supply voltage must be 2.5V greater than the maximum VC and/or VFS to keep the transistors from saturating. Do not use the internal resistors with external resistors because the internal resistors have a large positive temperature coefficient (0.2%/°C) that will cause gain errors. If the control voltage is applied to the free end of resistor RC (Pin 5) and the VC input (Pin 3) is grounded, the polarity of the control voltage must be inverted. Therefore, K will be 0% for zero input and 100% for – 2.5V input, assuming VFS equals 2.5V. With Pin 3 grounded, Pin 4 is a virtual ground; this is convenient for summing several negative going control signals. 12 VFS 11 10 IFS RFS LT1251/LT1256 TYPICAL APPLICATIONS AM Modulator with DC Output Nulling Circuit 1MHz CARRIER 2.5VDC INPUT 220k 0.1µF AUDIO MODULATION 220k LT1077 V– Single Supply Inverting AC Amplifier C1 10µF V1 RG1 1.5k RF1 1.5k Single Supply Noninverting AC Amplifier with Digital Gain Control 10µF RG1 1.5k RF1 1.5k + + V + R1 20k R2 20k 2 1 LT1251/LT1256 – + 1 8 V+ 2 V– 9 7 5V VOUT + CO 10µF 14 13 V1 V2 10µF 10µF + + + – VC RC RFS VFS 3 5 10 12 C2 10µF V2 RG2 1.5k CONTROL VOLTAGE RF2 1.5k 2.5VDC INPUT 20k 5V 10k 20k 10µF 1251/56 TA05 + + RG2 1.5k – + U 0.1µF 1 + LT1256 + – + – 14 2 – + 50Ω 2 3 4 5 NULL 6 V– 7 1 CONTROL 13 12 11 10 9 8 V+ VOUT 220k RF2 1.5k RF1 1.5k C 5k IC IFS FS 5k – 0.1µF V+ 1251/56 TA03 2 1 14 10k 13 LT1251/LT1256 – + 1 8 9 V+ 2 V– 7 5V VOUT + – + 10µF VC RC RFS VFS 3 5 10 12 RF2 1.5k VREF VOUT LTC1257 GND VCC 1251/56 TA06 DIN CLK LOAD µP 5V 15 LT1251/LT1256 TYPICAL APPLICATIONS Controlled Gain, Voltage-to-Current Converter (Current Source) RF 1k RF 1k RG 100Ω ×4 V IN R2 R1 V IN R3 – LT1252 INVERTED HIGHPASS BASIC VARIABLE INTEGRATOR R R4 1.5k 2 – + R1 = R3 R2 R4 16 U 1 2 14 13 LT1256 + 1 – 8 RO 1k IOUT + – 2 + LT1363 VC RC RFS VFS 3 5 10 12 CONTROL VOLTAGE RF 1k 2.5VDC INPUT RF 1k V RF VC IOUT = IN RO RG VFS – () 1251/56 TA09 OUTPUT RESISTANCE DEPENDS ON MATCHING OF RESISTORS Variable Lowpass, Highpass and Allpass Filter R C ALLPASS LT1256 1 + R 8 LOWPASS 1 14 13 + 2 – 1.5k R VC RC RFS VFS 3 5 10 12 VC C VFS RDC ≅ 10k 1251/56 TA13 LT1251/LT1256 TYPICAL APPLICATIONS Logarithmic Gain Control (Noninverting) 6k 15 VFS = 2.5V 2k V IN 600Ω 200Ω 2 1 14 13 LT1251/LT1256 – + 1 8 V 2 +9 + – GAIN (dB) VC RC RFS VFS 3 5 10 12 CONTROL VOLTAGE 1.5k 2.5VDC INPUT 1251/56 TA07a 1.5k 2 1 LT1251/LT1256 – 1 + V IN 6k 14 13 + – V 2 +9 GAIN (dB) VC RC RFS VFS 3 5 10 12 CONTROL VOLTAGE 1.5k 2.5VDC INPUT 1251/56 TA08a 1MHz Wien Bridge Oscillator R VIN 1k 200Ω 1 2 14 LT1251/LT1256 + 1 – 100pF 100pF 200Ω 1.6k + – 13 2 VC RC RFS VFS 3 5 10 12 1.6k 1k 10µF 10k 7 5V 1 + U VOUT V– 7 0