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LT1351CS8

LT1351CS8

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LT1351CS8 - 250uA, 3MHz, 200V/us Operational Amplifier - Linear Technology

  • 数据手册
  • 价格&库存
LT1351CS8 数据手册
LT1351 250µA, 3MHz, 200V/µs Operational Amplifier FEATURES s s s s s s s s s s s s s s s s s DESCRIPTION The LT ®1351 is a low power, high speed, high slew rate operational amplifier with outstanding AC and DC performance. The LT1351 features lower supply current, lower input offset voltage, lower input bias current and higher DC gain than devices with comparable bandwidth. The circuit combines the slewing performance of a current feedback amplifier in a true operational amplifier with matched high impedance inputs. The high slew rate ensures that the large-signal bandwidth is not degraded. The amplifier is a single gain stage with outstanding settling characteristics which make the circuit an ideal choice for data acquisition systems. The output drives a 1kΩ load to ±13V with ±15V supplies and a 500Ω load to ±3.4V on ±5V supplies. The amplifier is also stable with any capacitive load which makes it useful in buffer or cable driver applications. The LT1351 is a member of a family of fast, high performance amplifiers using this unique topology and employing Linear Technology Corporation’s advanced complementary bipolar processing. For dual and quad amplifier versions of the LT1351 see the LT1352/LT1353 data sheet. For higher bandwidth devices with higher supply current see the LT1354 through LT1365 data sheets. Singles, duals and quads of each amplifier are available. , LTC and LT are registered trademarks of Linear Technology Corporation. C-Load is a trademark of Linear Technology Corporation. 3MHz Gain Bandwidth 200V/µs Slew Rate 250µA Supply Current Available in Tiny MSOP Package C-LoadTM Op Amp Drives All Capacitive Loads Unity-Gain Stable Power Saving Shutdown Feature Maximum Input Offset Voltage: 600µV Maximum Input Bias Current: 50nA Maximum Input Offset Current: 15nA Minimum DC Gain, RL = 2k: 30V/mV Input Noise Voltage: 14nV/√Hz Settling Time to 0.1%, 10V Step: 700ns Settling Time to 0.01%, 10V Step: 1.25µs Minimum Output Swing into 1k: ± 13V Minimum Output Swing into 500Ω: ± 3.4V Specified at ± 2.5V, ± 5V and ± 15V APPLICATIONS s s s s s s Battery-Powered Systems Wideband Amplifiers Buffers Active Filters Data Acquisition Systems Photodiode Amplifiers TYPICAL APPLICATION Instrumentation Amplifier R1 50k R2 5k R5 1.1k R3 5k R4 50k Large-Signal Response – LT1351 – LT1351 VOUT – VIN + + + GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102 TRIM R5 FOR GAIN TRIM R1 FOR COMMON MODE REJECTION BW = 30kHz 1351 TA01 AV = – 1 U U U 1351 TA02 1 LT1351 ABSOLUTE MAXIMUM RATINGS Total Supply Voltage (V + to V –) .............................. 36V Differential Input Voltage (Transient Only, Note 1) ... ±10V Input Voltage .......................................................... ± VS Output Short-Circuit Duration (Note 2) ........... Indefinite Operating Temperature Range ................ – 40°C to 85°C Specified Temperature Range (Note 6) ..... – 40°C to 85°C Maximum Junction Temperature (See Below) Plastic Package ................................................ 150°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C PACKAGE/ORDER INFORMATION TOP VIEW NULL –IN +IN V– 1 2 3 4 8 7 6 5 NULL V+ VOUT SHDN ORDER PART NUMBER LT1351CMS8 MS8 PART MARKING LTBT MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150° C, θJA = 250°C/ W Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS SYMBOL VOS PARAMETER Input Offset Voltage TA = 25°C, VCM = 0V unless otherwise noted. VSUPPLY ± 15V ± 5V ± 2.5V ± 2.5V to ± 15V ± 2.5V to ± 15V MIN TYP 0.2 0.2 0.3 5 20 14 0.5 300 600 20 3 12.0 2.5 0.5 13.5 3.5 1.0 – 13.5 – 3.5 – 1.0 80 78 68 90 94 86 77 106 – 12.0 – 2.5 – 0.5 MAX 0.6 0.6 0.8 15 50 UNITS mV mV mV nA nA nV/√Hz pA/√Hz MΩ MΩ pF V V V V V V dB dB dB dB CONDITIONS IOS IB en in RIN CIN Input Offset Current Input Bias Current Input Noise Voltage Input Noise Current Input Resistance Input Capacitance Positive Input Voltage Range f = 10kHz f = 10kHz VCM = ± 12V Differential Negative Input Voltage Range CMRR Common Mode Rejection Ratio VCM = ± 12V VCM = ± 2.5V VCM = ± 0.5V VS = ± 2.5V to ± 15V PSRR Power Supply Rejection Ratio 2 U U W WW U W TOP VIEW NULL 1 – IN 2 +IN 3 V– 4 N8 PACKAGE 8-LEAD PDIP 8 7 6 5 NULL V+ VOUT SHDN ORDER PART NUMBER LT1351CN8 LT1351CS8 S8 PART MARKING 1351 S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 130°C/ W (N8) TJMAX = 150°C, θJA = 190°C/ W (S) ± 2.5V to ± 15V ± 2.5V to ± 15V ± 15V ± 15V ± 15V ± 15V ± 5V ± 2.5V ± 15V ± 5V ± 2.5V ± 15V ± 5V ± 2.5V LT1351 ELECTRICAL CHARACTERISTICS SYMBOL AVOL PARAMETER Large-Signal Voltage Gain TA = 25°C, VCM = 0V unless otherwise noted. VSUPPLY ± 15V ± 15V ± 15V ± 5V ± 5V ± 5V ± 2.5V ± 15V ± 15V ± 15V ± 5V ± 5V ± 2.5V ± 15V ± 5V ± 15V ± 15V ± 5V ± 15V ± 5V ± 15V ± 5V ± 2.5V ± 15V ± 5V ± 15V ± 5V ± 15V ± 5V ± 15V ± 15V ± 5V ± 5V ± 15V ± 15V ± 15V ± 15V ± 5V ± 5V 2.0 1.8 MIN 40 30 20 30 25 15 20 13.5 13.4 13.0 3.5 3.4 1.3 13.0 6.8 30 120 30 TYP 80 60 40 60 50 30 40 14.0 13.8 13.4 4.0 3.8 1.7 13.4 7.6 45 200 50 3.2 2.6 3.0 2.7 2.5 46 53 13 16 41 52 700 1250 950 1400 1.5 – 10 0.1 250 220 10 2 330 300 MAX UNITS V/mV V/mV V/mV V/mV V/mV V/mV V/mV ±V ±V ±V ±V ±V ±V mA mA mA V/µs V/µs MHz MHz MHz MHz MHz ns ns % % ns ns ns ns ns ns Ω µA µA µA µA µA CONDITIONS VOUT = ± 12V, RL = 5k VOUT = ± 10V, RL = 2k VOUT = ± 10V, RL = 1k VOUT = ± 2.5V, RL = 5k VOUT = ± 2 .5V, RL = 2k VOUT = ± 2.5V, RL = 1k VOUT = ± 1V, RL = 5k RL = 5k, VIN = ±10mV RL = 2k, VIN = ±10mV RL = 1k, VIN = ±10mV RL = 1k, VIN = ±10mV RL= 500Ω, VIN = ±10mV RL = 5k, VIN = ±10mV VOUT = ± 13V VOUT = ± 3.4V VOUT = 0V, VIN = ± 3V AV = – 1, RL = 5k (Note 3) 10V Peak (Note 4) 3V Peak (Note 4) f = 200kHz, RL = 10k VOUT Output Swing IOUT ISC SR Output Current Short-Circuit Current Slew Rate Full-Power Bandwidth GBW Gain Bandwidth t r , tf Rise Time, Fall Time Overshoot Propagation Delay AV = 1, 10% to 90%, 0.1V AV = 1, 0.1V 50% VIN to 50% VOUT, 0.1V 10V Step, 0.1%, AV = – 1 10V Step, 0.01%, AV = – 1 5V Step, 0.1%, AV = – 1 5V Step, 0.01%, AV = – 1 AV = 1, f = 20kHz SHDN = VEE + 0.1V SHDN = VCC ts Settling Time RO ISHDN IS Output Resistance Shutdown Input Current Supply Current SHDN = VEE + 0.1V 0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted. SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS VSUPPLY ± 15V ± 5V ± 2.5V (Note 5) ± 2.5V to ± 15V ± 2.5V to ± 15V ± 2.5V to ± 15V 3 MIN TYP MAX 0.8 0.8 1.0 8 20 75 UNITS mV mV mV µV/ °C nA nA Input VOS Drift IOS IB Input Offset Current Input Bias Current 3 LT1351 ELECTRICAL CHARACTERISTICS SYMBOL CMRR PARAMETER Common Mode Rejection Ratio 0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted. VSUPPLY ± 15V ± 5V ± 2.5V ± 15V ± 15V ± 5V ± 5V ± 5V ± 2.5V ± 15V ± 15V ± 15V ± 5V ± 5V ± 2.5V ± 15V ± 5V ± 15V ± 15V ± 5V ± 15V ± 5V ± 15V ±15V ± 15V ± 5V ± 5V MIN 78 77 67 89 25 20 20 15 10 15 13.4 13.3 12.0 3.4 3.3 1.2 12.0 6.6 24 100 21 1.8 1.6 – 20 3 380 355 20 TYP MAX UNITS dB dB dB dB V/mV V/mV V/mV V/mV V/mV V/mV ±V ±V ±V ±V ±V ±V mA mA mA V/µs V/µs MHz MHz µA µA µA µA µA CONDITIONS VCM = ± 12V VCM = ± 2.5V VCM = ± 0.5V VS = ± 2.5V to ± 15V VOUT = ± 12V, RL = 5k VOUT = ± 10V, RL = 2k VOUT = ± 2.5V, RL = 5k VOUT = ± 2 .5V, RL = 2k VOUT = ± 2.5V, RL = 1k VOUT = ± 1V, RL = 5k RL = 5k, VIN = ±10mV RL = 2k, VIN = ±10mV RL = 1k, VIN = ±10mV RL = 1k, VIN = ±10mV RL= 500Ω, VIN = ±10mV RL = 5k, VIN = ±10mV VOUT = ± 12V VOUT = ± 3.3V VOUT = 0V, VIN = ± 3V AV = – 1, RL = 5k (Note 3) f = 200kHz, RL = 10k SHDN = VEE + 0.1V SHDN = VCC PSRR AVOL Power Supply Rejection Ratio Large-Signal Voltage Gain VOUT Output Swing IOUT ISC SR GBW ISHDN IS Output Current Short-Circuit Current Slew Rate Gain Bandwidth Shutdown Input Current Supply Current SHDN = VEE + 0.1V – 40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted (Note 6). SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS VSUPPLY ± 15V ± 5V ± 2.5V (Note 5) ± 2.5V to ± 15V ± 2.5V to ± 15V ± 2.5V to ± 15V VCM = ± 12V VCM = ± 2.5V VCM = ± 0.5V VS = ± 2.5V to ± 15V VOUT = ± 12V, RL = 5k VOUT = ± 10V, RL = 2k VOUT = ± 2.5V, RL = 5k VOUT = ± 2 .5V, RL = 2k VOUT = ± 2.5V, RL = 1k VOUT = ± 1V, RL = 5k ± 15V ± 15V ± 5V ± 5V ± 5V ± 2.5V ± 15V ± 5V ± 2.5V 76 76 66 87 20 15 15 10 8 10 3 MIN TYP MAX 1.0 1.0 1.2 8 30 100 UNITS mV mV mV µV/ °C nA nA dB dB dB dB V/mV V/mV V/mV V/mV V/mV V/mV Input VOS Drift IOS IB CMRR Input Offset Current Input Bias Current Common Mode Rejection Ratio PSRR AVOL Power Supply Rejection Ratio Large-Signal Voltage Gain 4 LT1351 ELECTRICAL CHARACTERISTICS SYMBOL VOUT PARAMETER Output Swing – 40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted (Note 6). VSUPPLY ± 15V ± 15V ± 15V ± 5V ± 5V ± 2.5V ± 15V ± 5V ± 15V ± 15V ± 5V ± 15V ± 5V ± 15V ±15V ± 15V ± 5V ± 5V MIN 13.3 13.2 10.0 3.3 3.2 1.1 10.0 6.4 20 50 15 1.6 1.4 – 30 5 390 380 30 TYP MAX UNITS ±V ±V ±V ±V ±V ±V mA mA mA V/µs V/µs MHz MHz µA µA µA µA µA CONDITIONS RL = 5k, VIN = ±10mV RL = 2k, VIN = ±10mV RL = 1k, VIN = ±10mV RL = 1k, VIN = ±10mV RL= 500Ω, VIN = ±10mV RL = 5k, VIN = ±10mV VOUT = ± 10V VOUT = ± 3.2V VOUT = 0V, VIN = ± 3V AV = – 1, RL = 5k (Note 3) f = 200kHz, RL = 10k SHDN = VEE + 0.1V SHDN = VCC IOUT ISC SR GBW ISHDN IS Output Current Short-Circuit Current Slew Rate Gain Bandwidth Shutdown Input Current Supply Current SHDN = VEE + 0.1V Note 1: Differential inputs of ±10V are appropriate for transient operation only, such as during slewing. Large, sustained differential inputs will cause excessive power dissipation and may damage the part. See Input Considerations in the Applications Information section of this data sheet for more details. Note 2: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 3: Slew rate is measured between ± 8V on the output with ± 12V input for ± 15V supplies and ± 2V on the output with ± 3V input for ± 5V supplies. Note 4: Full-power bandwidth is calculated from the slew rate measurement: FPBW = (Slew Rate)/2πVP. Note 5: This parameter is not 100% tested. Note 6: The LT1351 is designed, characterized and expected to meet these extended temperature limits, but is not tested at – 40°C and at 85°C. Guaranteed I grade parts are available; consult factory. TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage and Temperature 350 COMMON MODE RANGE (V) INPUT BIAS CURRENT (nA) 300 SUPPLY CURRENT (µA) 125°C 250 25°C 200 – 55°C 150 100 0 10 5 15 SUPPLY VOLTAGE (± V) UW 1351 G01 Input Common Mode Range vs Supply Voltage V+ –0.5 –1.0 –1.5 –2.0 TA = 25°C ∆VOS = 1mV 30 Input Bias Current vs Input Common Mode Voltage TA = 25°C VS = ±15V 20 IB = IB+ + IB– 2 10 2.0 1.5 1.0 0.5 V– 0 –10 20 0 15 10 5 SUPPLY VOLTAGE (± V) 20 1351 G02 –20 –15 10 –5 0 5 –10 INPUT COMMON MODE VOLTAGE (V) 15 1351 G03 5 LT1351 TYPICAL PERFORMANCE CHARACTERISTICS Input Bias Current vs Temperature 40 36 INPUT BIAS CURRENT (nA) 32 28 24 20 16 12 8 4 INPUT VOLTAGE NOISE (nV/√Hz) VS = ±15V IB+ + IB– IB = 2 OPEN-LOOP GAIN (dB) 0 –50 –25 50 25 0 75 TEMPERATURE (°C) Open-Loop Gain vs Temperature 100 99 OPEN-LOOP GAIN (dB) OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) VS = ±15V VO = ±12V RL = 5k 98 97 96 95 94 –50 –25 50 25 75 0 TEMPERATURE (°C) Output Short-Circuit Current vs Temperature 60 OUTPUT SHORT-CIRCUIT CURRENT (mA) VS = ±15V 55 6 OUTPUT STEP (V) OUTPUT STEP (V) 50 SINK 45 40 35 30 25 –50 –25 SOURCE 50 25 75 0 TEMPERATURE (°C) 6 UW 100 1351 G04 Input Noise Spectral Density 100 TA = 25°C VS = ±15V AV = 101 RS = 100k en 10 in 1 10 INPUT CURRENT NOISE (pA/√Hz) Open-Loop Gain vs Resistive Load 110 TA = 25°C VS = ±15V VS = ± 5V 90 100 80 70 125 1 1 10 1k 100 FREQUENCY (Hz) 0.1 10k 1351 G05 60 10 100 1k 10k 1351 G06 LOAD RESISTANCE (Ω) Output Voltage Swing vs Supply Voltage V+ –1 –2 –3 3 2 1 V– 0 5 15 SUPPLY VOLTAGE (V) 10 20 1351 G08 Output Voltage Swing vs Load Current V+ RL = 2k RL = 1k TA = 25°C VIN = ±10mV RL = 1k RL = 2k – 0.5 –1.0 –1.5 –2.0 VS = ± 5V VIN = 10mV 25°C 85°C – 40°C 25°C – 40°C 85°C 2.0 1.5 1.0 0.5 25°C 85°C – 40°C – 40°C 25°C 85°C 15 20 100 125 V– –20 –15 –10 – 5 0 10 5 OUTPUT CURRENT (mA) 1351 G07 1351 G09 Settling Time vs Output Step (Noninverting) 10 8 10mV 4 2 0 –2 –4 –6 –8 –10 10mV 1mV VS = ±15V AV = 1 OUTPUT FILTER: 1.6MHz LPF 1mV Settling Time vs Output Step (Inverting) 10 8 6 4 2 0 –2 –4 –6 –8 10mV VS = ±15V AV = –1 RG = RF = 2k CF = 5pF RL = 2k 1mV 10mV 1mV 100 125 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 SETTLING TIME (µs) 1351 G11 –10 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 SETTLING TIME (µs) 1351 G12 1351 G10 LT1351 TYPICAL PERFORMANCE CHARACTERISTICS Gain and Phase vs Frequency 70 60 50 GAIN (dB) PHASE VS = ±15V VS = ± 5V GAIN VS = ± 5V TA = 25°C AV = –1 RF = RG = 5k VS = ±15V 80 60 40 20 0 –20 PHASE (DEG) OUTPUT IMPEDANCE (Ω) GAIN (dB) 40 30 20 10 0 –10 1k 10k 100k 1M FREQUENCY (Hz) Gain Bandwidth and Phase Margin vs Temperature 4.50 4.25 4.00 GAIN BANDWIDTH (MHz) VS = ±15V VS = ± 5V PHASE MARGIN 3.75 3.50 3.25 3.00 2.75 2.50 2.25 2.00 –50 –25 GAIN (dB) GAIN BANDWIDTH VS = ±15V VS = ± 5V 40 38 36 34 32 0 –1 –2 –3 –4 –5 10k 100k 1M FREQUENCY (Hz) 10M 1351 G17 GAIN (dB) 50 25 0 75 TEMPERATURE (°C) Gain Bandwidth and Phase Margin vs Supply Voltage 4.50 4.25 4.00 TA = 25°C PHASE MARGIN 50 POWER SUPPLY REJECTION RATIO (dB) 48 46 100 80 COMMON MODE REJECTION RATIO (dB) GAIN BANDWIDTH (MHz) 3.75 3.50 3.25 3.00 2.75 2.50 2.25 2.00 0 GAIN BANDWIDTH 15 10 5 SUPPLY VOLTAGE (± V) UW 10M 1351 G13 Output Impedance vs Frequency 120 100 100 AV = 100 AV = 10 10 AV = 1 1000 TA = 25°C VS = ±15V 10 8 6 4 2 0 –2 –4 0.1 –6 –8 0.01 1k 10k 100k 1M FREQUENCY (Hz) 10M 1351 G14 Frequency Response vs Capacitive Load TA = 25°C VS = ±15V AV = – 1 RFB = RG = 5k C = 5000pF C = 1000pF C = 500pF C = 100pF 1 C = 10pF –40 100M –10 10k 100k 1M FREQUENCY (Hz) 10M 1351 G15 Frequency Response vs Supply Voltage (AV = 1) 50 48 46 PHASE MARGIN (DEG) 5 4 3 2 1 TA = 25°C AV = 1 RL = 5k Frequency Response vs Supply Voltage (AV = – 1) 5 4 3 2 1 0 –1 –2 –3 –4 –5 10k ±15V ±5V ± 2.5V 100k 1M FREQUENCY (Hz) 10M 1351 G18 TA = 25°C AV = – 1 RL = RG = 5k 44 42 ±15V ±5V ± 2.5V 100 30 125 1351 G16 Power Supply Rejection Ratio vs Frequency 120 TA = 25°C VS = ±15V 120 100 80 60 40 20 Common Mode Rejection Ratio vs Frequency TA = 25°C VS = ±15V PHASE MARGIN (DEG) 44 42 40 38 36 34 32 30 20 1351 G19 – PSRR = +PSRR 60 40 20 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 1351 G20 0 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 1351 G21 7 LT1351 TYPICAL PERFORMANCE CHARACTERISTICS Slew Rate vs Supply Voltage 200 TA = 25°C AV = –1 RF = RG = 5k SR = (SR+ + SR – )/2 250 AV = –1 RF = RG = RL = 5k SR = (SR+ + SR – )/2 150 SLEW RATE (V/µs) SLEW RATE (V/µs) SLEW RATE (V/µs) 100 50 50 0 0 5 10 SUPPLY VOLTAGE (± V) 15 1351 G22 Total Harmonic Distortion vs Frequency 1 TOTAL HARMONIC DISTORTION (%) OUTPUT VOLTAGE (VP-P) OUTPUT VOLTAGE (VP-P) TA = 25°C VS = ±15V RL = 5k VO = 2VP-P 0.1 0.01 AV = –1 0.001 10 AV = 1 100 1k 10k FREQUENCY (Hz) 100k 1351 G25 2nd and 3rd Harmonic Distortion vs Frequency – 30 – 40 – 50 3RD HARMONIC – 60 –70 2ND HARMONIC – 80 – 90 100k FREQUENCY (Hz) 1351 G28 HARMONIC DISTORTION (dB) SUPPLY CURRENT (µA) VS = ±15V AV = 1 RL = 5k VO = 2VP-P 60 50 40 30 20 10 VSHDN = VEE + 0.2 VSHDN = VEE + 0.1 OVERSHOOT (%) 8 UW Slew Rate vs Temperature 200 175 150 125 100 75 50 25 0 –50 –25 50 0 75 25 TEMPERATURE (°C) 100 125 Slew Rate vs Input Level TA = 25°C VS = ±15V AV = –1 RFB = RG = 5k SR = (SR+ + SR – )/2 200 VS = ±15V 150 100 VS = ± 5V 0 0 4 8 16 12 INPUT LEVEL (VP-P) 20 24 1351 G24 1351 G23 Undistorted Output Swing vs Frequency (± 15V) 30 AV = –1 25 AV = 1 20 15 10 5 VS = ±15V RL = 5k THD = 1% 100k FREQUENCY (Hz) 1M 1351 G26 Undistorted Output Swing vs Frequency (± 5V) 10 9 8 7 6 5 4 3 2 1 VS = ± 5V RL = 5k THD = 1% 100k FREQUENCY (Hz) 1M 1351 G27 AV = 1 AV = –1 0 10k 0 10k Shutdown Supply Current vs Temperature 100 90 80 70 VS = ±15V 100 90 80 70 60 50 40 30 20 10 Capacitive Load Handling TA = 25°C VS = ±15V RL = 5k AV = 1 AV = – 1 VSHDN = VEE 1M 0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 0 10p 100p 1n 10n 0.1µ CAPACITIVE LOAD (F) 1µ 1351 G30 1351 G29 LT1351 TYPICAL PERFORMANCE CHARACTERISTICS Small-Signal Transient (AV = 1) Small-Signal Transient (AV = – 1) Small-Signal Transient (AV = – 1, CL = 1000pF) Large-Signal Transient (AV = 1) APPLICATIONS INFORMATION The LT1351 may be inserted directly into many high speed amplifier applications improving both DC and AC performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1351 is shown in Figure 1. V+ 3 0.1µF + LT1351 7 4 8 1 100k V– 6 2 – 0.1µF 1351 F01 Figure 1. Offset Nulling U W UW 1351 G31 1351 G34 1351 G32 1351 G33 Large-Signal Transient (AV = – 1) Large-Signal Transient (AV = 1, CL = 10,000pF) 1351 G35 1351 G36 U U Layout and Passive Components The LT1351 amplifier is easy to apply and tolerant of less than ideal layouts. For maximum performance (for example fast settling time) use a ground plane, short lead lengths and RF-quality bypass capacitors (0.01µF to 0.1µF). For high drive current applications use low ESR bypass capacitors (1µF to 10µF tantalum). For details see Design Note 50. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause peaking or even oscillations. For feedback resistors greater than 10k, a parallel capacitor of value, CF > (RG)(CIN/RF) should be used to cancel the input pole and optimize dynamic performance. For applications where the DC 9 LT1351 APPLICATIONS INFORMATION noise gain is one and a large feedback resistor is used, CF should be greater than or equal to CIN. An example would be an I-to-V converter as shown in the Typical Applications section. Capacitive Loading The LT1351 is stable with any capacitive load. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response. Graphs of Frequency Response vs Capacitive Load, Capacitive Load Handling and the transient response photos clearly show these effects. Input Considerations Each of the LT1351 inputs is the base of an NPN and a PNP transistor whose base currents are of opposite polarity and provide first-order bias current cancellation. Because of variation in the matching of NPN and PNP beta, the polarity of the input bias current can be positive or negative. The offset current does not depend on NPN/PNP beta matching and is well controlled. The use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized. The inputs can withstand transient differential input voltages up to 10V without damage and need no clamping or source resistance for protection. Differential inputs, however, generate large supply currents (tens of mA) as required for high slew rates. If the device is used with sustained differential inputs, the average supply current will increase, excessive power dissipation will result and the part may be damaged. The part should not be used as a comparator, peak detector or other open-loop application with large, sustained differential inputs. Under normal, closed-loop operation, an increase of power dissipation is only noticeable in applications with large slewing outputs and is proportional to the magnitude of the differential input voltage and the percent of the time that the inputs are apart. Measure the average supply current for the application in order to calculate the power dissipation. Shutdown The LT1351 has a Shutdown pin for conserving power. When this pin is open or 2V above the negative supply the part operates normally. When pulled down to V – the supply current will drop to about 10µA. The current out of the Shutdown pin is also typically 10µA. In shutdown the amplifier output is not isolated from the inputs so the LT1351 cannot be used in multiplexing applications using the shutdown feature. A level shift application is shown in the Typical Applications section so that a ground-referenced logic signal can control the Shutdown pin. Circuit Operation The LT1351 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the simplified schematic. The inputs are buffered by complementary NPN and PNP emitter followers which drive R1, a 1k resistor. The input voltage appears across the resistor generating currents which are mirrored into the high impedance node and compensation capacitor CT. Complementary followers form an output stage which buffers the gain node from the load. The output devices Q19 and Q22 are connected to form a composite PNP and composite NPN. The bandwidth is set by the input resistor and the capacitance on the high impedance node. The slew rate is determined by the current available to charge the capacitance. This current is the differential input voltage divided by R1, so the slew rate is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. For example, a 10V output step in a gain of 10 has only a 1V input step whereas the same output step in unity gain has a 10 times greater input step. The curve of Slew Rate vs Input Level illustrates this relationship. Capacitive load compensation is provided by the RC, CC network which is bootstrapped across the output stage. When the amplifier is driving a light load the network has no effect. When driving a capacitive load (or a low value 10 U W U U LT1351 APPLICATIONS INFORMATION resistive load) the network is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance slows down the amplifier and a zero is created by the RC combination, both of which improve the phase margin. The design ensures that even for very large load capacitances the total phase lag can never exceed 180 degrees (zero phase margin) and the amplifier remains stable. SI PLIFIED SCHE ATIC V+ R2 Q10 Q11 Q12 Q20 R3 Q21 –IN Q5 Q7 R1 Q3 1k Q6 Q8 Q4 Q2 V– TYPICAL APPLICATIONS 20kHz, 4th Order Butterworth Filter 4.64k 470pF 5.49k 220pF 4.64k VIN 2200pF 13.3k – LT1351 + U Q1 W U W U U W C1 R6 Q9 Q17 +IN Q18 R7 Q13 CT Q15 RC CC Q19 OUTPUT Q22 C2 Q14 Q16 Q23 R4 Q24 R5 1351 SS 5.49k 11.3k – LT1351 VOUT 4700pF + 1351 TA03 11 LT1351 TYPICAL APPLICATIONS DAC INPUTS V VOS + IOS (5kΩ) + OUT < 0.5LSB AVOL 12 U Shutdown Circuit 3 + LT1351 6 2 1N4148 SHDN 1M G S SST177 D 1M – G 5 S SST177 D V– 1351 TA04 DAC I-to-V Converter 10pF 12 5k – LT1351 VOUT 565A TYPE 5k + 1351 TA05 LT1351 PACKAGE DESCRIPTION 0.007 (0.18) 0.021 ± 0.006 (0.53 ± 0.015) * DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE U Dimensions in inches (millimeters) unless otherwise noted. MS8 Package 8-Lead Plastic MSOP (LTC DWG # 05-08-1660) 0.118 ± 0.004* (3.00 ± 0.102) 8 76 5 0.192 ± 0.004 (4.88 ± 0.10) 0.118 ± 0.004** (3.00 ± 0.102) 1 0.040 ± 0.006 (1.02 ± 0.15) 0° – 6° TYP SEATING PLANE 0.012 (0.30) 0.0256 REF (0.65) TYP 23 4 0.034 ± 0.004 (0.86 ± 0.102) 0.006 ± 0.004 (0.15 ± 0.102) MSOP (MS8) 1197 13 LT1351 PACKAGE DESCRIPTION U Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.400* (10.160) MAX 8 7 6 5 0.255 ± 0.015* (6.477 ± 0.381) 1 2 3 4 0.300 – 0.325 (7.620 – 8.255) 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.009 – 0.015 (0.229 – 0.381) 0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076) N8 1197 ( +0.035 0.325 –0.015 8.255 +0.889 –0.381 ) 0.100 ± 0.010 (2.540 ± 0.254) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 14 LT1351 PACKAGE DESCRIPTION U Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 1 2 3 4 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0.016 – 0.050 0.406 – 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) TYP SO8 0996 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1351 TYPICAL APPLICATION Low Power Sample-and-Hold LTC201 LT1351 VIN 2000pF DROOP: 20nA/2000pF = 10mV/ms ACQUISITION TIME: 10V, 0.1% = 2µs CHARGE INJECTION ERROR: 8pC/2000pF = 4mV RELATED PARTS PART NUMBER LT1352/LT1353 LT1354 DESCRIPTION Dual/Quad 250µA, 3MHz, 200V/µs Op Amp 1mA, 12MHz, 400V/µs Op Amp COMMENTS Good DC Precision, Stable with All Capacitive Loads Good DC Precision, Stable with All Capacitive Loads 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com + – + – U LT1351 VOUT 1351 TA06 1351fa LT/TP 0498 REV A 2K • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1996
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