LT1363 70MHz, 1000V/µs Op Amp
FEATURES
s s s s s s s s s s s s s s s s
DESCRIPTIO
70MHz Gain Bandwidth 1000V/µs Slew Rate 7.5mA Maximum Supply Current 9nV/√Hz Input Noise Voltage Unity-Gain Stable C-LoadTM Op Amp Drives All Capacitive Loads 1.5mV Maximum Input Offset Voltage 2µA Maximum Input Bias Current 350nA Maximum Input Offset Current 50mA Minimum Output Current ±7.5V Minimum Output Swing into 150Ω 4.5V/mV Minimum DC Gain, RL=1k 50ns Settling Time to 0.1%, 10V Step 0.06% Differential Gain, AV=2, RL=150Ω 0.04° Differential Phase, AV=2, RL=150Ω Specified at ± 2.5V, ±5V, and ±15V
The LT1363 is a high speed, very high slew rate operational amplifier with excellent DC performance. The LT1363 features reduced supply current, lower input offset voltage, lower input bias current and higher DC gain than devices with comparable bandwidth. The circuit topology is a voltage feedback amplifier with the slewing characteristics of a current feedback amplifier. The amplifier is a single gain stage with outstanding settling characteristics which makes the circuit an ideal choice for data acquisition systems. The output drives a 150Ω load to ±7.5V with ±15V supplies and to ±3.4V on ± 5V supplies. The amplifier is also capable of driving any capacitive load which makes it useful in buffer or cable driver applications. The LT1363 is a member of a family of fast, high performance amplifiers using this unique topology and employing Linear Technology Corporation’s advanced bipolar complementary processing. For dual and quad amplifier versions of the LT1363 see the LT1364/1365 data sheet. For 50MHz amplifiers with 4mA of supply current per amplifier see the LT1360 and LT1361/1362 data sheets. For lower supply current amplifiers with bandwidths of 12MHz and 25MHz see the LT1354 through LT1359 data sheets. Singles, duals, and quads of each amplifier are available.
, LTC and LT are registered trademarks of Linear Technology Corporation. C-Load is a trademark of Linear Technology Corporation
APPLICATIO S
s s s s s s
Wideband Amplifiers Buffers Active Filters Video and RF Amplification Cable Drivers Data Acquisition Systems
TYPICAL APPLICATIO
2
Cable Driver Frequency Response
AV = –1 Large-Signal Response
0 VS = ± 2.5V
GAIN (dB)
VS = ±15V VS = ± 5V VS = ±10V
IN
–2
–4
+
LT1363 – 510Ω 510Ω
75Ω
OUT 75Ω
–6
–8 1 10 FREQUENCY (MHz) 100
1363 TA02
1363 TA01
U
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1
LT1363
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V –) ...............................
Differential Input Voltage (Transient Only) (Note 2)................................... ±10V Input Voltage ............................................................ ±VS Output Short-Circuit Duration (Note 3) ............ Indefinite
PACKAGE/ORDER INFORMATION
TOP VIEW NULL 1 8 7 6 5 N8 PACKAGE 8-LEAD PDIP
TJMAX = 150°C, θJA = 130°C/ W
NULL V+ VOUT NC
ORDER PART NUMBER LT1363CN8
–IN 2 +IN 3 V– 4
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS (Note 4)
TA = 25°C, VCM = 0V unless otherwise noted.
VSUPPLY ±15V ± 5V ± 2.5V ± 2.5V to ±15V ± 2.5V to ±15V MIN TYP 0.5 0.5 0.7 120 0.6 9 1 12 50 5 3 12.0 2.5 0.5 13.4 3.4 1.1 –13.2 –12.0 –3.2 –2.5 –0.9 –0.5 84 76 66 90 ±15V ±15V ±15V ± 5V ± 5V ± 2.5V 4.5 3.0 2.0 3.0 2.0 2.5 90 81 71 100 9.0 6.5 3.8 6.4 5.6 5.2 MAX 1.5 1.5 1.8 350 2.0 UNITS mV mV mV nA µA nV/√Hz pA/√Hz MΩ MΩ pF V V V V V V dB dB dB dB V/mV V/mV V/mV V/mV V/mV V/mV
IOS IB en in RIN CIN
Input Offset Current Input Bias Current Input Noise Voltage Input Noise Current Input Resistance Input Resistance Input Capacitance Input Voltage Range + f = 10kHz f = 10kHz VCM = ±12V Differential
Input Voltage Range –
CMRR
Common Mode Rejection Ratio
VCM = ±12V VCM = ±2.5V VCM = ±0.5V VS = ±2.5V to ±15V VOUT = ±12V, RL = 1k VOUT = ±10V, RL = 500Ω VOUT = ±7.5V, RL = 150Ω VOUT = ±2.5V, RL = 500Ω VOUT = ±2.5V, RL = 150Ω VOUT = ±1V, RL = 500Ω
PSRR AVOL
Power Supply Rejection Ratio Large-Signal Voltage Gain
2
U
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W
(Note 1)
36V
Operating Temperature Range (Note 8) ...–40°C to 85°C Specified Temperature Range (Note 9) ....–40°C to 85°C Maximum Junction Temperature (See Below) Plastic Package ................................................ 150°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW NULL 1 –IN 2 +IN 3 V– 4 8 7 6 5 NULL V+ VOUT NC
ORDER PART NUMBER LT1363CS8 S8 PART MARKING 1363
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 190°C/ W
± 2.5V to ±15V ± 2.5V to ±15V ±15V ±15V ±15V ±15V ± 5V ± 2.5V ±15V ± 5V ± 2.5V ±15V ± 5V ± 2.5V
LT1363
ELECTRICAL CHARACTERISTICS
SYMBOL VOUT PARAMETER Output Swing CONDITIONS
TA = 25°C, VCM = 0V unless otherwise noted.
VSUPPLY ±15V ±15V ± 5V ± 5V ± 2.5V ±15V ± 5V ±15V ±15V ± 5V ±15V ± 5V ±15V ± 5V ± 2.5V ±15V ± 5V ±15V ± 5V ±15V ±5V ±15V ±15V ± 5V ±15V ± 5V ±15V ± 5V ±15V ± 5V ±15V ± 5V ±15V ±15V ±5V MIN 13.5 13.0 3.5 3.4 1.3 50 23 70 750 300 TYP 14.0 13.7 4.1 3.8 1.7 60 29 105 1000 450 15.9 23.9 70 50 40 2.6 3.6 36 23 4.6 5.6 50 80 55 0.03 0.06 0.01 0.01 0.10 0.04 0.05 0.25 0.7 6.3 6.0 7.5 7.2 MAX UNITS ±V ±V ±V ±V ±V mA mA mA V/µs V/µs MHz MHz MHz MHz MHz ns ns % % ns ns ns ns ns % % % % Deg Deg Deg Deg Ω mA mA
RL = 1k, VIN = ±40mV RL = 500Ω, VIN = ±40mV RL = 500Ω, VIN = ±40mV RL = 150Ω, VIN = ±40mV RL = 500Ω, VIN = ±40mV VOUT = ±7.5V VOUT = ± 3.4V VOUT = 0V, VIN = ± 3V AV = –2, (Note 5) 10V Peak, (Note 6) 3V Peak, (Note 6) f = 1MHz
IOUT ISC SR
Output Current Short-Circuit Current Slew Rate Full Power Bandwidth
GBW
Gain Bandwidth
tr , tf
Rise Time, Fall Time Overshoot Propagation Delay
AV = 1, 10%-90%, 0.1V AV = 1, 0.1V 50% VIN to 50% VOUT, 0.1V 10V Step, 0.1%, AV = – 1 10V Step, 0.01%, AV = – 1 5V Step, 0.1%, AV = – 1 f = 3.58MHz, AV = 2, RL = 150Ω f = 3.58MHz, AV = 2, RL = 1k
ts
Settling Time
Differential Gain
Differential Phase
f = 3.58MHz, AV = 2, RL = 150Ω f = 3.58MHz, AV = 2, RL = 1k
RO IS
Output Resistance Supply Current
AV = 1, f = 1MHz
The q denotes the specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS (Note 4) VSUPPLY ±15V ± 5V ± 2.5V ± 2.5V to ±15V ± 2.5V to ±15V ± 2.5V to ±15V VCM = ±12V VCM = ± 2.5V VCM = ± 0.5V ±15V ± 5V ± 2.5V
q q q q q q q q q
MIN
TYP
MAX 2.0 2.0 2.2
UNITS mV mV mV µV/°C nA µA dB dB dB
Input VOS Drift IOS IB CMRR Input Offset Current Input Bias Current Common Mode Rejection Ratio
(Note 7)
10
13 500 3
82 74 64
3
LT1363
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
SYMBOL PSRR AVOL PARAMETER Power Supply Rejection Ratio Large-Signal Voltage Gain
ELECTRICAL CHARACTERISTICS
CONDITIONS
The q denotes the specifications which apply over the temperature range
VSUPPLY
q
MIN 88 3.6 2.4 2.4 1.5 2.0 13.4 12.8 3.4 3.3 1.2 25 22 55 600 225
q q q q q q q q q q q q q q q q q
TYP
MAX
UNITS dB V/mV V/mV V/mV V/mV V/mV ±V ±V ±V ±V ±V mA mA mA V/µs V/µs
VS = ± 2.5V to ±15V VOUT = ±12V, RL = 1k VOUT = ±10V, RL = 500Ω VOUT = ± 2.5V, RL = 500Ω VOUT = ± 2.5V, RL = 150Ω VOUT = ±1V, RL = 500Ω RL = 1k, VIN = ±40mV RL = 500Ω, VIN = ±40mV RL = 500Ω, VIN = ±40mV RL = 150Ω, VIN = ±40mV RL = 500Ω, VIN = ±40mV VOUT = ±12.8V VOUT = ± 3.3V VOUT = 0V, VIN = ± 3V AV = – 2, (Note 5) ±15V ±15V ± 5V ± 5V ± 2.5V ±15V ±15V ± 5V ± 5V ± 2.5V ±15V ± 5V ±15V ±15V ± 5V ±15V ± 5V
VOUT
Output Swing
IOUT ISC SR IS
Output Current Short-Circuit Current Slew Rate Supply Current
8.7 8.4
mA mA
The q denotes the specifications which apply over the temperature range –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. (Note 9)
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS (Note 4) VSUPPLY ±15V ± 5V ± 2.5V ± 2.5V to ±15V ± 2.5V to ±15V ± 2.5V to ±15V VCM = ±12V VCM = ±2.5V VCM = ± 0.5V VS = ±2.5V to ±15V VOUT = ±12V, RL = 1k VOUT = ±10V, RL = 500Ω VOUT = ± 2.5V, RL = 500Ω VOUT = ± 2.5V, RL = 150Ω VOUT = ±1V, RL = 500Ω RL = 1kΩ, VIN = ±40mV RL = 500Ω, VIN = ±40mV RL = 500Ω, VIN = ±40mV RL = 150Ω, VIN = ±40mV RL = 500Ω, VIN = ±40mV VOUT = ±12.7V VOUT = ± 3.2V VOUT = 0V, VIN = ± 3V AV = – 2, (Note 5) ±15V ±15V ± 5V ± 5V ± 2.5V ±15V ±15V ± 5V ± 5V ± 2.5V ±15V ± 5V ±15V ±15V ± 5V ±15V ± 5V ±15V ± 5V ± 2.5V
q q q q q q q q q q q q q q q q q q q q q q q q q q q
MIN
TYP
MAX 2.5 2.5 2.7
UNITS mV mV mV µV/°C nA µA dB dB dB dB V/mV V/mV V/mV V/mV V/mV ±V ±V ±V ±V ±V mA mA mA V/µs V/µs
Input VOS Drift IOS IB CMRR Input Offset Current Input Bias Current Common Mode Rejection Ratio
(Note 7)
10
13 600 3.6
82 74 64 87 2.5 1.5 1.5 1.0 1.3 13.4 12.7 3.4 3.2 1.2 25 21 50 550 180 9.0 8.7
PSRR AVOL
Power Supply Rejection Ratio Large-Signal Voltage Gain
VOUT
Output Swing
IOUT ISC SR IS
Output Current Short-Circuit Current Slew Rate Supply Current
mA mA
4
LT1363
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Differential inputs of ±10V are appropriate for transient operation only, such as during slewing. Large, sustained differential inputs will cause excessive power dissipation and may damage the part. See Input Considerations in the Applications Information section of this data sheet for more details. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 4: Input offset voltage is pulse tested and is exclusive of warm-up drift. Note 5: Slew rate is measured between ±10V on the output with ±6V input for ±15V supplies and ±2V on the output with ±1.75V input for ±5V supplies. Note 6: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2πVP. Note 7: This parameter is not 100% tested. Note 8: The LT1363C is guaranteed functional over the operating temperature range of –40°C to 85°C. Note 9: The LT1363C is guaranteed to meet specified performance from 0°C to 70°C. The LT1363C is designed, characterized and expected to meet specified performance from – 40°C to 85°C, but is not tested or QA sampled at these temperatures. For guaranteed I-grade parts, consult the factory.
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage and Temperature
10
V+ – 0.5 TA = 25°C ∆VOS < 1mV
COMMON MODE RANGE (V)
SUPPLY CURRENT (mA)
125°C 25°C –55°C
INPUT BIAS CURRENT (µA)
8
6
4
2
0 0 5 10 15 SUPPLY VOLTAGE (±V) 20
1363 G01
Input Bias Current vs Temperature
1.4 1.2
INPUT VOLTAGE NOISE (nV/√Hz)
INPUT BIAS CURRENT (µA)
VS = ±15V IB+ + IB– IB = ———— 2
1.0 0.8 0.6 0.4 0.2 0 – 50
OPEN-LOOP GAIN (dB)
–25
0 25 50 75 TEMPERATURE (°C)
UW
100
1363 G04
Input Common Mode Range vs Supply Voltage
1.0
Input Bias Current vs Input Common Mode Voltage
VS = ±15V TA = 25°C IB+ + IB– IB = ———— 2
–1.0 –1.5 –2.0
0.8
0.6
2.0 1.5 1.0 0.5 V– 0 5 10 15 SUPPLY VOLTAGE (±V) 20
1363 G02
0.4
0.2 –15
–10 –5 0 5 10 INPUT COMMON MODE VOLTAGE (V)
15
1363 G03
Input Noise Spectral Density
100 VS = ±15V TA = 25°C AV = 101 RS = 100k in en 1 10
85
Open-Loop Gain vs Resistive Load
TA = 25°C
INPUT CURRENT NOISE (pA/√Hz)
80 VS = ±15V 75 VS = ± 5V
10
70
65
1
125
10
100
1k 10k FREQUENCY (Hz)
0.1 100k
1363 G05
60 10 100 1k LOAD RESISTANCE (Ω) 10k
1363 G06
5
LT1363 TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain vs Temperature
81 80 RL = 1k VO = ±12V VS = ±15V
OUTPUT VOLTAGE SWING (V)
OUTPUT VOLTAGE SWING (V)
OPEN-LOOP GAIN (dB)
79 78 77 76 75 74 – 50
–25
0 25 50 75 TEMPERATURE (°C)
Output Short-Circuit Current vs Temperature
140
OUTPUT SHORT-CIRCUIT CURRENT (mA)
VS = ±5V
130
OUTPUT IMPEDANCE (Ω)
120 110 SOURCE 100 SINK 90 80 70 – 50
GAIN (dB)
–25
0 25 50 75 TEMPERATURE (°C)
Settling Time vs Output Step (Noninverting)
10 8 6
OUTPUT STEP (V)
VS = ±15V AV = 1 RL = 1k 1mV
OUTPUT STEP (V)
GAIN BANDWIDTH (MHz)
4 2 0 –2 –4 –6 –8 –10 0
10mV
10mV
1mV
20
40 60 80 SETTLING TIME (ns)
6
UW
100
1363 G07
Output Voltage Swing vs Supply Voltage
V+ –0.5 –1.0 –1.5 –2.0 TA = 25°C RL = 1k RL = 500Ω
Output Voltage Swing vs Load Current
V+ –0.5 –1.0 –1.5 –2.0 25°C 25°C VS = ± 5V VIN = 100mV 85°C
–40°C
2.0 1.5 1.0 0.5 V–
RL = 500Ω RL = 1k
2.0 1.5 1.0 85°C 0.5 V– –50 –40 –30 –20 –10 0 10 20 30 40 50 OUTPUT CURRENT (mA)
1363 G09
– 40°C
125
0
5 10 15 SUPPLY VOLTAGE (±V)
20
1363 G08
Output Impedance vs Frequency
100 VS = ±15V TA = 25°C AV = 100
70 60 50
Gain and Phase vs Frequency
120 PHASE VS = ±15V GAIN 40 30 20 10 0 TA = 25°C AV = –1 RF = RG = 1k 100k 1M 10M FREQUENCY (Hz) VS = ± 5V VS = ±15V VS = ± 5V 100 80 60 40 20 0
10
PHASE (DEG)
1 AV = 10 AV = 1 0.1
100
125
0.01 10k
100k
1M 10M FREQUENCY (Hz)
100M
1363 G11
–10 10k
100M
1363 G14
1363 G10
Settling Time vs Output Step (Inverting)
10 8 6 4 2 0 –2 –4 10mV –6 –8 –10 100
1363 G13
Gain Bandwidth and Phase Margin vs Supply Voltage
130 120 50 TA = 25°C 48 46
PHASE MARGIN (DEG)
VS = ±15V AV = –1 RF = 1k CF = 3pF
10mV 1mV
110 100 90 80 70 60 50 40 GAIN BANDWIDTH PHASE MARGIN
44 42 40 38 36 34 32 30
1mV
0
20
40 60 80 SETTLING TIME (ns)
100
1363 G12
30 0 5 10 15 SUPPLY VOLTAGE (±V) 20
1363 G15
LT1363 TYPICAL PERFORMANCE CHARACTERISTICS
Gain Bandwidth and Phase Margin vs Temperature
130 120 110 GAIN BANDWIDTH (MHz) 100 90 80 70 60 50 40 30 –50 GAIN BANDWIDTH VS = ± 5V –25 0 25 50 75 TEMPERATURE (°C) 100 GAIN BANDWIDTH VS = ±15V PHASE MARGIN VS = ±15V PHASE MARGIN VS = ± 5V 50 45 40 PHASE MARGIN (DEG) 35 30 25 20 15 10 5 0 125
GAIN (dB)
0 –2 –4 –6 –8 –10 100k 1M 10M FREQUENCY (Hz) ± 5V
GAIN (dB)
Frequency Response vs Capacitive Load
15 12 C = 500pF C = 100pF C = 50pF C=0 100
COMMON-MODE REJECTION RATIO (dB)
POWER SUPPLY REJECTION RATIO (dB)
VOLTAGE MAGNITUDE (dB)
9 6 3 0 –3 –6 –9 –12 –15 1M
VS = ±15V TA = 25°C AV = –1
C = 1000pF
10M FREQUENCY (Hz)
Slew Rate vs Supply Voltage
2400 2200 2000 1800
1400
1600 1400 1200 1000 800 600 400 200 0 0
1000 800 600 VS = ± 5V 400 200 – 50 VS = ±15V
SLEW RATE (V/µS)
SLEW RATE (V/µs)
SLEW RATE (V/µs)
TA = 25°C AV = –1 RF = RG = 1k SR+ + SR– SR = ————— 2
5 10 SUPPLY VOLTAGE (±V)
UW
1363 G16
1363 G19
Frequency Response vs Supply Voltage (AV = 1)
10 8 6 4 2 TA = 25°C AV = 1 RL = 1k 5 4 ± 15V 3 2 1 0 –1 –2 ±2.5V –3 –4
Frequency Response vs Supply Voltage (AV = –1)
TA = 25°C AV = –1 RF = RG = 1k
± 15V
± 5V
±2.5V
100M
1363 G17
–5 100k
1M 10M FREQUENCY (Hz)
100M
1363 G18
Power Supply Rejection Ratio vs Frequency
120 +PSRR 80 – PSRR VS = ±15V TA = 25°C 100 80 60 40 20 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M
1363 G20
Common Mode Rejection Ratio vs Frequency
VS = ±15V TA = 25°C
60
40
20
100M
0 100
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
1363 G21
Slew Rate vs Temperature
2000 AV = –2 SR+ + SR– SR = ————— 2 1800 1600 1400 1200 1000 800 600 400 200 0 –25 0 25 50 75 TEMPERATURE (°C) 100 125
Slew Rate vs Input Level
TA = 25°C VS = ±15V AV = –1 RF = RG = 1k SR+ + SR – SR = ————— 2
1200
15
1363 G22
0
2
4
6 8 10 12 14 16 18 INPUT LEVEL (VP-P)
20
1363 G23
1363 G24
7
LT1363 TYPICAL PERFORMANCE CHARACTERISTICS
Total Harmonic Distortion vs Frequency
0.01
TOTAL HARMONIC DISTORTION (%)
20 15 10 5 VS = ±15V RL = 1k AV = 1, 1% MAX DISTORTION AV = –1, 2% MAX DISTORTION 1M FREQUENCY (Hz) 10M
1363 G26
OUTPUT VOLTAGE (VP-P)
OUTPUT VOLTAGE (VP-P)
TA = 25°C VO = 3VRMS RL = 500Ω
0.001
AV = –1 AV = 1
0.0001 10 100 1k 10k FREQUENCY (Hz) 100k
1363 G25
2nd and 3rd Harmonic Distortion vs Frequency
–40 –50 –60 –70 2ND HARMONIC –80 –90 VS = ±15V VO = 2VP-P RL = 500Ω AV = 2
HARMONIC DISTORTION (dB)
3RD HARMONIC
DIFFERENTIAL PHASE (DEG)
0.3
0
OVERSHOOT (%)
–100 100k 200k
400k 1M 2M FREQUENCY (Hz)
Small-Signal Transient (AV = 1)
8
UW
4M
1363 G28
1363 TA31
Undistorted Output Swing vs Frequency (±15V)
30 25 AV = 1 AV = –1 10
Undistorted Output Swing vs Frequency (± 5V)
AV = –1
8
6
AV = 1
4
2
VS = ±5V RL = 1k 2% MAX DISTORTION 1M FREQUENCY (Hz) 10M
1363 G27
0 100k
0 100k
Differential Gain and Phase vs Supply Voltage
0.2
Capacitive Load Handling
DIFFERENTIAL GAIN (%)
100 TA = 25°C VS = ±15V AV = –1
0.1 DIFFERENTIAL GAIN
50
0.2 DIFFERENTIAL PHASE 0.1 AV = 2 RL = 150Ω TA = 25°C ±5 ±10 SUPPLY VOLTAGE (V) ±15
1363 G29
AV = 1 0 10p 1000p 0.01µ 0.1µ CAPACITIVE LOAD (F) 1µ
1363 G30
10M
0.0
100p
Small-Signal Transient (AV = –1)
Small-Signal Transient (AV = –1, CL = 200pF)
1363 TA32
1363 TA33
LT1363 TYPICAL PERFORMANCE CHARACTERISTICS
Large-Signal Transient (AV = 1) Large-Signal Transient (AV = –1) Large-Signal Transient (AV = 1, CL = 10,000pF)
1363 TA34
APPLICATIONS INFORMATION
The LT1363 may be inserted directly into AD817, AD847, EL2020, EL2044, and LM6361 applications improving both DC and AC performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1363 is shown below.
Offset Nulling
V+ 3
+ –
1 10k
7 LT1363 6 4 8
2
V–
1363 AI01
Layout and Passive Components The LT1363 amplifier is easy to apply and tolerant of less than ideal layouts. For maximum performance (for example fast settling time) use a ground plane, short lead lengths, and RF-quality bypass capacitors (0.01µF to 0.1µF). For high drive current applications use low ESR bypass capacitors (1µF to 10µF tantalum). Sockets should be avoided when maximum frequency performance is required, although low profile sockets can provide reasonable performance up to 50MHz. For more details see Design Note 50.
U
W
UW
1363 TA35
1363 TA36
U
U
The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause peaking or oscillations. For feedback resistors greater than 5kΩ, a parallel capacitor of value CF > RG x CIN/RF should be used to cancel the input pole and optimize dynamic performance. For unity-gain applications where a large feedback resistor is used, CF should be greater than or equal to CIN. Capacitive Loading The LT1363 is stable with any capacitive load. This is accomplished by sensing the load induced output pole and adding compensation at the amplifier gain node. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response as shown in the typical performance curves.The photo of the small-signal response with 200pF load shows 62% peaking. The largesignal response with a 10,000pF load shows the output slew rate being limited to 10V/µs by the short-circuit current. Coaxial cable can be driven directly, but for best pulse fidelity a resistor of value equal to the characteristic impedance of the cable (i.e., 75Ω) should be placed in series with the output. The other end of the cable should be terminated with the same value resistor to ground. The response of a cable driver in a gain of 2 driving a 75Ω cable is shown on the front page of the data sheet.
9
LT1363
APPLICATIONS INFORMATION
Input Considerations Each of the LT1363 inputs is the base of an NPN and a PNP transistor whose base currents are of opposite polarity and provide first-order bias current cancellation. Because of variation in the matching of NPN and PNP beta, the polarity of the input bias current can be positive or negative. The offset current does not depend on NPN/PNP beta matching and is well controlled. The use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized. The inputs can withstand transient differential input voltages up to 10V without damage and need no clamping or source resistance for protection. Differential inputs, however, generate large supply currents (tens of mA) as required for high slew rates. If the device is used with sustained differential inputs, the average supply current will increase, excessive power dissipation will result and the part may be damaged. The part should not be used as a comparator, peak detector or other open-loop application with large, sustained differential inputs. Under normal, closed-loop operation, an increase of power dissipation is only noticeable in applications with large slewing outputs and is proportional to the magnitude of the differential input voltage and the percent of the time that the inputs are apart. Measure the average supply current for the application in order to calculate the power dissipation. Single Supply Operation The LT1363 is specified at ±15V, ±5V, and ±2.5V supplies, but it is also well suited to single supply operation down to a single 5V supply. The symmetrical input Ccmmon mode range and output swing make the device well suited for applications with a single supply if the the input and output swing ranges are centered (i.e., a DC bias of 2.5V on the input and the output). For 5V video applications with an assymetrical swing, an offset of 2V on the input works best. Power Dissipation The LT1363 combines high speed and large output drive in a small package. Because of the wide supply voltage range, it is possible to exceed the maximum junction temperature under certain conditions. Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) as follows: LT1363CN8: TJ = TA + (PD x 130°C/W) LT1363CS8: TJ = TA + (PD x 190°C/W) Worst case power dissipation occurs at the maximum supply current and when the output voltage is at 1/2 of either supply voltage (or the maximum swing if less than 1/2 supply voltage). Therefore PDMAX is: PDMAX = (V+ – V –)(ISMAX) + (V+/2)2/RL Example: LT1363CS8 at 70°C, VS = ±15V, RL = 390Ω PDMAX = (30V)(8.7mA) + (7.5V)2/390Ω = 405mW TJMAX = 70°C + (405mW)(190°C/W) = 147°C Circuit Operation The LT1363 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the simplified schematic. The inputs are buffered by complementary NPN and PNP emitter followers which drive a 500Ω resistor. The input voltage appears across the resistor generating currents which are mirrored into the high impedance node. Complementary followers form an output stage which buffers the gain node from the load. The bandwidth is set by the input resistor and the capacitance on the high impedance node. The slew rate is determined by the current available to charge the gain node capacitance. This current is the differential input voltage divided by R1, so the slew rate is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. For example, a 10V output step in a gain of 10 has only a 1V input step, whereas the same output step in unity gain has a 10 times greater input step. The curve of Slew Rate vs Input Level illustrates this relationship. The LT1363 is tested for slew rate in a gain of –2 so higher slew rates can be expected in gains of 1 and –1, and lower slew rates in higher gain configurations.
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LT1363
APPLICATIONS INFORMATION
The RC network across the output stage is bootstrapped when the amplifier is driving a light or moderate load and has no effect under normal operation. When driving a capacitive load (or a low value resistive load) the network is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance slows down the amplifier which improves the phase margin by moving the unity-gain frequency away from the pole formed by the output impedance and the capacitive load. The zero created by the RC combination adds phase to ensure that even for very large load capacitances, the total phase lag can never exceed 180 degrees (zero phase margin) and the amplifier remains stable. Comparison to Current Feedback Amplifiers The LT1363 enjoys the high slew rates of Current Feedback Amplifiers (CFAs) while maintaining the characteristics of a true voltage feedback amplifier. The primary differences are that the LT1363 has two high impedance inputs and its closed loop bandwidth decreases as the gain increases. CFAs have a low impedance inverting input and maintain relatively constant bandwidth with increasing gain. The LT1363 can be used in all traditional op amp configurations including integrators and applications such as photodiode amplifiers and I-to-V converters where there may be significant capacitance on the inverting input. The frequency compensation is internal and not dependent on the value of the feedback resistor. For CFAs, the feedback resistance is fixed for a given bandwidth and capacitance on the inverting input can cause peaking or oscillations. The slew rate of the LT1363 in noninverting gain configurations is also superior in most cases.
SI PLIFIED SCHE ATIC
V+
R1 500Ω –IN
V–
PACKAGE DESCRIPTION
Dimension in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.300 – 0.325 (7.620 – 8.255)
0.045 – 0.065 (1.143 – 1.651)
0.009 – 0.015 (0.229 – 0.381)
0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076)
(
+0.035 0.325 –0.015 +0.889 8.255 –0.381
)
0.100 (2.54) BSC
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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+IN C
RC OUT CC
1363 SS01
0.130 ± 0.005 (3.302 ± 0.127)
0.400* (10.160) MAX 8 7 6 5
0.255 ± 0.015* (6.477 ± 0.381)
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2
3
4
N8 1098
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LT1363
TYPICAL APPLICATIONS
Two Op Amp Instrumentation Amplifier
R5 220Ω R1 10k R2 1k
464Ω 1.33k 220pF
–
LT1363
R3 1k
–
VIN
+ +
+
R4 1 R2 R3 R2 + R3 GAIN = 1 + + + R5 R3 2 R1 R4 TRIM R5 FOR GAIN TRIM R1 FOR COMMON-MODE REJECTION BW = 700kHz
(
) = 102
1363 TA03
PACKAGE DESCRIPTION
0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP
0.053 – 0.069 (1.346 – 1.752)
0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 – 0.050 (0.406 – 1.270)
RELATED PARTS
PART NUMBER LT1364/LT1365 LT1360 LT1357 LT1812 DESCRIPTION Dual and Quad 70MHz, 1000V/µs Op Amps 50MHz, 800V/µs Op Amp 25MHz, 600V/µs Op Amp 100MHz, 750V/µs Op Amp COMMENTS Dual and Quad Versions of LT1363 Lower Power Version of LT1363, VOS = 1mV, IS = 4mA Lower Power Version of LT1363, VOS = 0.6mV, IS = 2mA Low Voltage, Low Power LT1363, VOS = 1.5mV, IS = 3mA
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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2MHz, 4th Order Butterworth Filter
464Ω 47pF 22pF 549Ω
R4 10k
VIN
–
LT1363
549Ω
1.13k 470pF
–
LT1363 VOUT
LT1363
VOUT
+
+
1363 TA04
Dimension in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197* (4.801 – 5.004) 8 0.004 – 0.010 (0.101 – 0.254) 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 7 6 5
0.050 (1.270) BSC
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2
3
4
SO8 1298
1363fa LT/TP 0400 2K REV A • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 1994