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LT1431M

LT1431M

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LT1431M - Programmable Reference - Linear Technology

  • 数据手册
  • 价格&库存
LT1431M 数据手册
LT1431 Programmable Reference U 5V V + RTOP REF – RMID 2.5V LT1431 GND-S LT1431 • TA01 FEATURES s s s s s DESCRIPTIO Guaranteed 0.4% Initial Voltage Tolerance 0.1Ω Typical Dynamic Output Impedance Fast Turn-On Sink Current Capability, 1mA to 100mA Low Reference Pin Current APPLICATI s s s S Linear Regulators Adjustable Power Supplies Switching Power Supplies The LT1431 is an adjustable shunt voltage regulator with 100mA sink capability, 0.4% initial reference voltage tolerance, and 0.3% typical temperature stability. On-chip divider resistors allow the LT1431 to be configured as a 5V shunt regulator, with 1% initial voltage tolerance and requiring no additional external components. By adding two external resistors, the output voltage may be set to any value between 2.5V and 36V. The nominal internal current limit of 100mA may be decreased by including one external resistor. A simplified three pin version, the LT1431Z/IZ, is available for applications as an adjustable reference and is pin compatible with the TL431. TYPICAL APPLICATI + VIN SWITCHING REGULATOR + gm = 4mA/V – UO UO Isolated 5V Regulator + COLL COMP GND-F 1 LT1431 ABSOLUTE AXI U RATI GS JunctionTemperature Range LT1431M ........................................ – 55°C to 150°C LT1431I .......................................... – 40°C to 100°C LT1431C ............................................. 0°C to 100°C Storage Temperature Range ................ –65°C to 150°C Lead Temperature (Soldering, 10 sec)................ 300°C V+, VCOLLECTOR ....................................................... 36V VCOMP, RTOP,RMID,VREF ............................................ 6V GND-F to GND-S .................................................... 0.7V Ambient Temperature Range LT1431M ........................................ – 55°C to 125°C LT1431I ............................................ – 40°C to 85°C LT1431C .............................................. 0°C TO 70°C PACKAGE/ORDER I FOR ATIO TOP VIEW COLLECTOR 1 COMP 2 V+ 3 RTOP 4 J8 PACKAGE 8-LEAD CERAMIC DIP 8 7 6 5 REF RMID GND-F GND-S ORDER PART NUMBER COLLECTOR 1 LT1431MJ8 LT1431CN8 LT1431IN8 COMP 2 V+ 3 RTOP 4 N8 PACKAGE 8-LEAD PLASTIC DIP S8 PACKAGE 8-LEAD PLASTIC SOIC TJ MAX = 150°C, θJA = 100° C/W (J) TJ MAX = 100°C, θJA = 130°C/W (N) TJ MAX = 100°C, θJA = 170°C/W ELECTRICAL CHARACTERISTICS TA = 25°C, IK = 10mA, unless otherwise specified (Note 1). SYMBOL VREF ∆VREF/∆T PARAMETER Reference Voltage Reference Drift CONDITIONS VKA = 5V, IK = 2mA, (Note 2) q VKA = 5V, IK = 2mA IK = 2mA, VKA = 3V to 36V VKA = 5V, TA = 25°C ∆VREF/∆VKA Voltage Ratio, Reference to Cathode (Open-Loop Gain) |IREF| IMIN |IOFF| |ILEAK| |ZKA| ILIM Reference Input Current Minimum Operating Current Off-State Cathode Current Off-State Collector Leakage Current Dynamic Impedance Collector Current Limit 5V Reference Output VKA = VREF to 36V VKA = 36V, VREF = 0V q VCOLL = 36V, V + = 5V, VREF = 2.4V q VKA = VREF, IK = 1mA to 100mA, f ≤ 1kHz VKA = VREF + 50mV Internal Divider Used, IK = 2mA q The q denotes specifications which apply over the operating temperature range. Note 1: VKA is the cathode voltage of the LT1431CZ/IZ and corresponds to V + of the LT1431CN8/MJ8. IK is the cathode current of the LT1431CZ/IZ and corresponds to I(V +) + ICOLLECTOR of the LT1431CN8/MJ8/IN8. 2 U U W WW U W TOP VIEW 8 7 6 5 REF RMID GND-F GND-S ORDER PART NUMBER LT1431CS8 LT1431IS8 PART MARKING LT1431 LT1431I BOTTOM VIEW 3 2 1 ORDER PART NUMBER LT1431CZ LT1431IZ REF ANODE CATHODE Z PACKAGE 3-LEAD TO-92 PLASTIC TJ MAX = 100°C, θJA = 160° C/W LT1431M/I MIN TYP MAX LT1431C MIN TYP MAX UNITS V V ppm/°C 0.5 1.0 1.2 1.0 1 2 1 2 0.2 100 260 mV/V µA µA mA µA µA µA µA Ω mA V 2.490 2.500 2.510 2.490 2.500 2.510 2.465 2.535 2.480 2.520 50 0.2 0.2 0.5 1.0 1.5 1.0 1 15 1 5 0.2 80 360 30 0.2 0.2 0.6 q q q 0.6 4.950 5.000 5.050 4.950 5.000 5.050 Note 2: The LT1431 has bias current cancellation which is effective only for VKA ≥ 3V. A slight (≈2mV) shift in reference voltage occurs when VKA drops below 3V. For this reason, these tests are not performed at VKA = VREF. LT1431 TYPICAL PERFOR A CE CHARACTERISTICS 2.5V Reference IK vs VKA 1000 900 800 700 IMIN 2.505 2.504 2.503 2.502 VREF (V) IK (µA) 600 500 400 300 200 100 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VKA (V) LT1431 • TPC01 VREF and IREF vs V + 2.505 2.504 2.503 2.502 3.5 3.0 2.5 2.0 VREF (V) 2.5000 2.4975 2.5025 VREF (V) 2.501 2.500 2.499 2.498 2.497 2.496 2.495 0 4 8 12 16 20 24 28 32 36 40 V + (V) LT1431 • TPC03 ILIMIT vs Temperature with External Resistor 1.250 ILIMIT = 1.125 ILIMIT (NORMALIZED) 0.7 AT 25°C RLIM + 3.6 ICOLL = 100mA 1.000 VSAT (V) PROPAGATION DELAY (µs) 0.875 0.750 0.625 0.500 –50 –25 50 25 75 0 TEMPERATURE (°C) UW IREF 100 VREF and IREF vs V + 3.5 3.0 2.5 2.0 VREF 1.5 1.0 0.5 0 –0.5 –1.0 2.501 2.500 2.499 2.498 2.497 2.496 IREF (µA) IREF –1.5 2.495 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 + (V) V LT1431 • TPC02 VREF and IREF vs Temperature 1.00 VREF 0.66 0.33 1.5 VREF 1.0 0.5 0 –0.5 –1.0 –1.5 COLLECTOR VSAT vs Temperature vs Current 1.20 1.00 0.80 0.60 ICOLL = 50mA 0.40 0.20 0 –50 –25 ICOLL = 20mA ICOLL = 10mA 50 25 75 0 TEMPERATURE (°C) 100 125 150 135 120 105 90 75 60 45 30 15 0 IREF (µA) IREF (µA) 2.4950 2.4925 2.4900 2.4875 –50 –25 IREF 0 –0.33 –0.66 –1.00 125 50 25 75 0 TEMPERATURE (°C) 100 LT1027 • TPC04 Propagation Delay vs Overdrive 5V 1k 3 VREF ± OVERDRIVE LT1431 5 6 1 OUTPUT OUTPUT HIGH-TO-LOW OUTPUT LOW-TO-HIGH 125 0 50 150 100 OVERDRIVE (mV) 200 250 LT1431 • TPC05 LT1431 • TPC06 LT1431 • TPC07 3 LT1431 TYPICAL PERFOR A CE CHARACTERISTICS Voltage Gain and Phase vs Frequency 140 120 REF-TO-COLL 1k LOAD AV (dB) PHASE AV REF-TO-COLL gm (m ) 100 80 60 40 20 0 –20 100 1k 10k 100k FREQUENCY (Hz) Transconductance and Phase vs Frequency (Ref to Comp) 104 PHASE gm 0 –20 –40 103 –60 –80 3 × 102 1.2 1.0 REF-TO-COLL gm (µ ) 3 × 103 ZKA (Ω) 0.8 0.6 0.4 0.2 0 100 VCOMP (V) 0.1 100 1k 10k 100k FREQUENCY (Hz) ICOMP vs VCOMP vs VREF 600 500 VREF = 5V ICOMP (µA) VREF = 4V VREF = 3V 200 VREF = 2.53V 100 0 0 0.5 1.0 1.5 2.0 VCOMP (V) 2.5 3.0 3.5 0 NOISE (nV/√Hz) 1000 400 300 500 1 10 100 1k FREQUENCY (Hz) 10k 100k NOISE VOLTAGE (50µV/DIV) 4 UW 1M Transconductance and Phase vs Frequency (REF to COLL) 180 135 90 45 0 –45 –90 –135 1M –180 10M PHASE (DEG) Ω 1010 10 9 180 135 PHASE 90 gm 45 0 –45 –90 –135 1k 10k 100k FREQUENCY (Hz) 1M –180 10M 108 107 106 105 104 103 102 100 PHASE (DEG) LT1431 • TPC08 LT1431 • TPC09 Dynamic Impedance vs Frequency 20 1.4 IK ≤ 100mA 2.5 2.0 1.5 1.0 0.5 3.0 VCOMP vs Temperature vs ICOLL Ω –100 –120 –140 10M PHASE (DEG) ICOLL = 100mA ICOLL = 10mA 1k 10k FREQUENCY (Hz) 100k LT1431 • TPC11 0 –50 –25 50 25 75 0 TEMPERATURE (˚C) 100 125 LT1431 • TPC10 LT1431 • TPC12 Noise vs Frequency 0.1Hz to 10Hz Noise 0 1 4 3 2 TIME (MINUTES) 5 6 LT1431 • TPC13 LT1431 • G14 LT1431 • TPC15 LT1431 PI FU CTIO S COLL (Pin 1): Open collector of the output transistor. The maximum pin voltage is 26V. The saturation voltage at 100mA is approximately 1V. COMP (Pin 2): Base of the driver for the output transistor. This pin allows additional compensation for complex feedback systems and shutdown of the regulator. It must be left open if unused. V + (Pin 3): Bias voltage for the entire shunt regulator. The maximum input voltage is 36V and the minimum to operate is equal to VREF (2.5V). The quiescent current is typically 0.6mA. RTOP (Pin 4): Top of the on-chip 5k-5k resistive divider that guarantees 1% accuracy of operation as a 5V shunt regulator with no external trim. The pin is tied to COLL for self-contained 5V operation. It may be left open if unused. See note on parasitic diodes below. GND-S (Pin 5): Ground reference for the on-chip resistive divider and shunt regulator circuitry except for the output transistor. This pin allows external current limit of the output transistor with one resistor between GND-F (force) and GND-S (sense). GND-F (Pin 6): Emitter of the output transistor and substrate connection for the die. RMID (Pin 7): Middle of the on-chip resistive divider string between RTOP and GND-S. The pin is tied to REF for selfcontained 5V operation. It may be left open if unused. REF (Pin 8): Control pin of the shunt regulator with a 2.5V threshold. If V + > 3V, input bias current cancellation reduces IB to 0.2µA typical. COMP, RTOP, RMID, and REF have static discharge protection circuits that must not be activated on a continuous basis. Therefore, the absolute maximum DC voltage on these pins is 6V, well beyond the normal operating conditions. As with all bipolar ICs, the LT1431 contains parasitic diodes which must not be forward biased or else anomalous behavior will result. Pin conditions to be avoided are RTOP below RMID in voltage and any pin below GND-F in voltage (except for GND-S). The following pin definitions apply to the Z package. CATHODE (Pin 1): Corresponds to COLL and V + tied together. ANODE (Pin 2): Corresponds to GND-S and GND-F tied together. REF (Pin 3): Corresponds to REF. BLOCK DIAGRA W U U U RTOP 4 V + 3 COMP 2 COLLECTOR 1 5k REF 8 + gm = 4mA/V – RMID 7 5k 2.5V 5 GND-SENSE 6 GND-FORCE LT1431 • BD01 5 LT1431 APPLICATIO S I FOR ATIO Frequency Compensation As a shunt regulator, the LT1431 is stable for all capacitive loads on the COLL pin. Capacitive loading between 0.01µF and 18µF causes reduced phase margin with some ringing under transient conditions. Output capacitors should not be used arbitrarily because output noise is not necessarily reduced. Excess capacitance on the REF pin can introduce enough phase shift to induce oscillation when configured as a reference >2.5V. This can be compensated with capacitance between COLL and REF (phase lead). More complicated feedback loops may require shaping of the frequency response of the LT1431 with dominant pole or TYPICAL APPLICATIO S 2.5V Reference 3-Pin Package RL VIN CATHODE REF LT1431Z ANODE LT1431 • TA02 2.5V VIN V+ LT1431 GND-S GND-F LT1431 • TA03 Increasing 5V Reference RL VIN R V+ RTOP LT1431 RMID GND-S GND-F LT1431 • TA05 5V + ∆ COLL REF ∆ = R × (0.5mA) ±25% PROCESS TOLERANCE ∆ ≤ 500mV 6 U pole-zero compensation. This can be accomplished with a capacitor or series resistor and capacitor between COLL and COMP. The compensation schemes mentioned above use voltage feedback to stabilize the circuits. There must be voltage gain at the COLL pin for them to be effective, so the COLL pin must see a reasonable AC impedance. Capacitive loading of the COLL pin reduces the AC impedance, voltage gain, and frequency response, thereby decreasing the effectiveness of the compensation schemes, but also decreasing their necessity. 2.5V Reference 8-Pin Package RL 2.5V COLL REF W U UU 5V Reference RL VIN V+ RTOP LT1431 RMID GND-S GND-F LT1431 • TA04 5V COLL REF Programmable Reference with Adjustable Current Limit RL VIN V+ LT1431 GND-S RLIM GND-F ILIMIT = 0.7 AT 25°C RLIM + 3.6 LT1431 • TA06 VOUT = 1 + R1 VREF R2 COLL REF R2 R1 () LT1431 TYPICAL APPLICATIO S PNP Low Dropout 5V Regulator* VIN 0.1µF 20Ω** 2W 1k 2N2219 0.015µF 150Ω 2 COMP V+ LT1431 RTOP GND-S 5 RMID GND-F 6 5V MEASURED DROPOUT VOLTAGE 420mV AT 4A 190mV AT 2A 95mV AT 1A 60mV AT 0.5A *NO SHORT-CIRCUIT PROTECTION **MAY BE INCREASED AT LOWER WATTAGE FOR LOWER OUTPUT CURRENTS 1 COLL REF 47Ω MJE2955 VIN ≥ 5.2V Measured Dropout Voltages ILOAD 2A 1A 0.5A MTP50N05EL 47mV 22mV 11.5mV MTM25N05L 145mV 73mV 37mV U 3 4 8 7 + 330µF LT1431 • TA07 FET Low Dropout 5V Regulator with Current Limit 12V MTP50N05EL MTM25N05L 0.002Ω* 5V, 2.5A 2 3 + D 47µF G S + 4 – 1.5V 7 LT1006 + 5 47µF 1N4148 1 COLL 3 4 V+ LT1431 RTOP GND-S 5 RMID GND-F 6 REF 8 7 6 LT1431 • TA08 *1.5" #23 SOLID COPPER WIRE ~0.002Ω → 3A LIMIT 7 LT1431 TYPICAL APPLICATIO S 12V to 5V Buck Converter with Foldback Current Limit* PULSE ENGINEERING #PE-51515 VIN VIN VOUT LT1089 HI-SIDE SWITCH GND MBR735 80 VIN = 9V 70 LOGIC IN EFFICIENCY (%) 5k 1500pF 2 COMP 1 COLL REF LT1431 RMID GND-F 6 3 4 V+ RTOP GND-S 5 8 7 30 0 1 2 3 4 ILOAD (A) LT1431 • TA10 *CONTACT LTC FOR HIGH EFFICIENCY SWITCHING REGULATORS Isolated 5V to ± 15V Flyback Converter COILTRONICS CTX02-11934 4.5V TO 5.5V 0.47µF 3k 6, 7 9 MUR105 –15V, 70mA C* 15k MUR105 • 4, 5 • 2 10 + 50µF VIN LT1172 OR LT1072 GND VOUT VC 1 • MUR105 1.5k 4N36 MEASURED EFFICIENCY LT117267.8% AT 2.2W OUT LT107268.6% AT 2.2W OUT LT107161.1% AT 4.4W OUT 0.68µF 2.4k 0.1µF 1 20k 2 3 V+ 8 REF LT1431 COMP GND-S 5 GND-F 6 LT1431 • TA11 8 + U Buck Converter Efficiency 100Ω 0.5W VIN = 12V 60 VIN = 15V 50 40 5 6 7 8 + 5V, 7A 3300µF LT1431 • TA09 Fully Loaded Output Ripple vs Filtering C* LT1172 LT1072 + 210µF 30mVP-P 40mVP-P L* + 100µF + 100µF 6mVP-P 8mVP-P *L BELL INDUSTRIES J.W. MILLER DIVISION 9310-36 10µH, 450mA LT1431 • TA12 + C* 15V, 70mA 13.3k COLL 2.7k LT1431 TYPICAL APPLICATIO S 5V Power Supply Monitor with ± 500mV Window and 50mV Hysteresis 6 1k 6k* 1N4148 COLL REF LT1431 5k COLL REF LT1431 5k VOUT V+ V+ GND-S GND-F 10Ω** GND-S VIN 1 + C1 220µF 35V D1 BAT85 5 VIN LT1170 GND 3 VC FB 1 R2 1k C3 0.1µF C4 0.033µF D3 MBR330 2 VSW 4 C5 0.047µF R1 470k + C2 4.7µF 35V TANTALUM OFF 1 RUN = 0 SHUTDOWN > 3V R3 10k RTN 2 NOTES: UNLESS OTHERWISE SPECIFIED 1. ALL RESISTANCES ARE IN Ω, 0.25W, 5% 2. ALL CAPACITANCES ARE IN µF, 50V, 10% 3. SHUTDOWN LOGIC STATE MUST BE DEFINED BY A LOGIC GATE OR BY TYING TO GND U Transfer Function 1k 4k* “HIGH” FOR OVER VOLTAGE OR UNDER VOLTAGE 5 4 3 2 1 GND-F 10Ω** *DETERMINES WINDOW SIZE V = (R – 5)(0.5mA) **SETS HYSTERESIS LT1431 • TA13 0 0 1 2 3 VIN 4 5 6 LT1431 • TA14 High Efficiency Buck Converter E = 85% to 89% BOLD LINE INDICATES HIGH CURRENT PATHS * = 1% FILM RESISTORS C1 = NICHICON-UPL1V221MPH C6 = NICHICON-UPL1C471MPH6 D1, D2 = PHILIPS-BAT85 D3 = MOTORALA-MBR330 L1 = COILTRONICS CTX50-3-MP C3, C4, C5 = WIMA-MKS-2 D4 BAT85 L1 50µH 3A 0.12mΩ ESR + C6 470µF 16V 5V 2.5A D2 BAT85 Q2 2N3904 2 Q1 VN2222LL Q3 2N3904 3 COMP V+ 1 COLL REF RMID GND-F 6 8 7 R6* 23.7k 4 R4 100Ω R5 680Ω R8* 24.9k VR2 LT1431CN8 RTOP GND-S 5 R7* 24.9k LT1431 • TA15 9 LT1431 SCHE ATIC DIAGRA Q5 R1 35k R2 35k 4X Q7 3X Q1 Q2 Q3 8 REF R6 8.5k Q4 RTOP 4 R3 5k R MID 7 Q8 10X R4 5k GND-SENSE 5 R5 5k R8 600Ω R7 2.5k 10 W Q13 3 Q17 V + Q11 Q10 Q12 Q6 2X Q9 5X R11 11k C2 65pF R13 6.5k Q14 C1 22pF R12 1k R15 5k C4 1pF COMP 2 C3 6pF R17 1.5k COLLECTOR 1 Q20 2X Q22 45X R9 2.5k Q18 Q19 Q15 Q16 R16 11Ω R21 100k R14 11Ω R20 5k Q21 2.5X R10 340Ω R18 50k R19 3.6Ω 6 GND-FORCE LT1431 • SD01 W LT1431 PACKAGE DESCRIPTIO 0.290 – 0.320 (7.366 – 8.128) 0.008 – 0.018 (0.203 – 0.460) 0.385 ± 0.025 (9.779 ± 0.635) 0.300 – 0.320 (7.620 – 8.128) 0.009 – 0.015 (0.229 – 0.381) ( +0.025 0.325 –0.015 +0.635 8.255 –0.381 ) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (millimeters) unless otherwise noted. J8 Package 8-Lead Ceramic DIP 0.405 (10.287) MAX 8 7 6 5 0.005 (0.127) MIN 0.025 (0.635) RAD TYP 1 0.055 (1.397) MAX 2 3 0.220 – 0.310 (5.588 – 7.874) 4 0.200 (5.080) MAX 0.015 – 0.060 (0.381 – 1.524) 0° – 15° 0.038 – 0.068 (0.965 – 1.727) 0.014 – 0.026 (0.360 – 0.660) 0.125 3.175 0.100 ± 0.010 MIN (2.540 ± 0.254) J8 0392 N8 Package 8-Lead Plastic DIP 0.400 (10.160) MAX 8 7 6 5 0.250 ± 0.010 (6.350 ± 0.254) 1 2 3 4 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) 0.065 (1.651) TYP 0.125 (3.175) MIN 0.020 (0.508) MIN 0.045 ± 0.015 (1.143 ± 0.381) 0.100 ± 0.010 (2.540 ± 0.254) 0.018 ± 0.003 (0.457 ± 0.076) N8 0392 11 LT1431 PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic SOIC 0.189 – 0.197 (4.801 – 5.004) 8 7 6 5 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157 (3.810 – 3.988) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.016 – 0.050 0.406 – 1.270 2 3 4 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0°– 8° TYP 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) BSC SO8 0392 Z Package 3-Lead TO-92 0.060 ± 0.005 (1.524± 0.127) DIA 0.180 ± 0.005 (4.572 ± 0.127) 0.90 (2.286) NOM 0.060 ± 0.010 (1.524 ± 0.254) 0.180 ± 0.005 (4.572 ± 0.127) 0.140 ± 0.010 (3.556 ± 0.127) 0.500 (12.79) MIN 0.050 (1.270) MAX UNCONTROLLED LEAD DIA 0.020 ± 0.003 (0.508 ± 0.076) 0.016 ± 0.03 (0.406 ± 0.076) 5° NOM 10° NOM 0.015 ± 0.02 (0.381 ± 0.051) Z3 1191 0.050 ± 0.005 (1.270 ± 0.127) 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977 LT/GP1292 5K REV B © LINEAR TECHNOLOGY CORPORATION 1992
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