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LT1801CS8

LT1801CS8

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LT1801CS8 - Dual/Quad 80MHz, 25V/μs Low Power Rail-to-Rail Input and Output Precision Op Amps - Line...

  • 数据手册
  • 价格&库存
LT1801CS8 数据手册
FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ LT1801/LT1802 Dual/Quad 80MHz, 25V/µs Low Power Rail-to-Rail Input and Output Precision Op Amps DESCRIPTIO The LT ®1801/LT1802 are dual/quad, low power, high speed rail-to-rail input and output operational amplifiers with excellent DC performance. The LT1801/LT1802 feature reduced supply current, lower input offset voltage, lower input bias current and higher DC gain than other devices with comparable bandwidth. Typically, the LT1801/LT1802 have an input offset voltage of less than 100µV, an input bias current of less than 50nA and an open-loop gain of 85 thousand. The LT1801/LT1802 have an input range that includes both supply rails and an output that swings within 20mV of either supply rail to maximize the signal dynamic range in low supply applications. The LT1801/LT1802 maintain their performance for supplies from 2.3V to 12.6V and are specified at 3V, 5V and ±5V supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output. The LT1801 is available in the MS8, SO-8 and the 3mm × 3mm × 0.8mm dual fine pitch leadless package (DFN) with the standard dual op amp pinout. The LT1802 features the standard quad op amp configuration and is available in the 14-pin plastic SO package. The LT1801/LT1802 can be used as plug-in replacements for many op amps to improve input/output range and performance. For a single version of these amplifiers, see the LT1800 data sheet. 1MHz Filter Frequency Response 0 –20 Gain Bandwidth Product: 80MHz Input Common Mode Range Includes Both Rails Output Swings Rail-to-Rail Low Voltage Operation: Single or Split Supplies 2.3V to 12.6V Low Quiescent Current: 2mA/Amplifier Max Input Offset Voltage: 350µV Max Input Bias Current: 250nA Max 3mm × 3mm × 0.8mm DFN Package Large Output Current: 50mA Typ Low Voltage Noise: 8.5nV/√Hz Typ Slew Rate: 25V/µs Typ Common Mode Rejection: 105dB Typ Power Supply Rejection: 97dB Typ Open-Loop Gain: 85V/mV Typ Operating Temperature Range: – 40°C to 85°C LT1801 is Available in 8-Lead SO, MS8 and DFN Packages LT1802 is Available in 14-Lead SO Package APPLICATIO S ■ ■ ■ ■ ■ Low Voltage, High Frequency Signal Processing Driving A/D Converters Rail-to-Rail Buffer Amplifiers Active Filters Video Line Driver , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO 909Ω 909Ω VIN 220pF 2.67k 47pF 3V, 1MHz, 4th Order Butterworth Filter GAIN (dB) 1.1k 22pF 3V 1/2 LT1801 470pF VS /2 18012 TA01 + – 1.1k 2.21k 1/2 LT1801 VOUT U U + – U –40 –60 –80 –100 –120 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 18012 TA02 18012fb 1 LT1801/LT1802 ABSOLUTE AXI U RATI GS Total Supply Voltage (VS– to VS+) ......................... 12.6V Input Current (Note 2) ........................................ ± 10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4) .. – 40°C to 85°C Specified Temperature Range (Note 5) ... – 40°C to 85°C PACKAGE/ORDER I FOR ATIO TOP VIEW OUT A 1 –IN A 2 +IN A 3 V – 8 V+ 7 OUT B A B 6 –IN B 5 +IN B 4 DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 160°C/ W, (Note 10) EXPOSED PAD INTERNALLY CONNECTED TO V–. (PCB CONNECTION OPTIONAL) ORDER PART NUMBER LT1801CDD LT1801IDD DD PART MARKING LAAM* TOP VIEW OUT A 1 –IN A 2 +IN A 3 V– 4 – + 8 7 – + 6 5 V+ OUT B –IN B +IN B S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 190°C/ W, (Note 10) ORDER PART NUMBER LT1801CS8 LT1801IS8 S8 PART MARKING 1801 1801I Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. 2 U U W WW U W (Note 1) Junction Temperature .......................................... 150°C Storage Temperature Range ................. – 65°C to 150°C Maximum Junction Temperature (DD Package) ... 125°C Storage Temperature (DD Package) ..... – 65°C to 125°C Lead Temperature (Soldering, 10 sec).................. 300°C TOP VIEW OUT A –IN A +IN A V– 1 2 3 4 8 7 6 5 V+ OUT B –IN B +IN B MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 250°C/ W, (Note 10) ORDER PART NUMBER LT1801CMS8 LT1801IMS8 TOP VIEW OUT A 1 –IN A 2 +IN A 3 V+ 4 +IN B 5 –IN B 6 OUT B 7 B C A D MS8 PART MARKING LTYR LTYS 14 OUT D 13 –IN D 12 +IN D 11 V – 10 +IN C 9 8 –IN C OUT C S PACKAGE 14-LEAD PLASTIC SO TJMAX = 150°C, θJA = 160°C/ W, (Note 10) ORDER PART NUMBER LT1802CS LT1802IS 18012fb LT1801/LT1802 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS Input Offset Voltage TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. CONDITIONS VCM = 0V VCM = 0V (MS8) VCM = 0V (DD) VCM = VS VCM = 0V to VS – 1.5V VCM = 0V VCM = 0V (MS8) VCM = 0V (DD) VCM = 1V VCM = VS VCM = 1V VCM = VS VCM = 1V VCM = VS 0.1Hz to 10Hz f = 10kHz f = 10kHz VS = 5V, VO = 0.5V to 4.5V, RL = 1k at VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω at VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k at VS/2 VS = 5V, VCM = 0V to 3.5V VS = 3V, VCM = 0V to 1.5V VS = 5V, VCM = 0V to 3.5V VS = 3V, VCM = 0V to 1.5V VS = 2.5V to 10V, VCM = 0V VS = 2.5V to 10V, VCM = 0V No Load ISINK = 5mA ISINK = 20mA No Load ISOURCE = 5mA ISOURCE = 20mA VS = 5V VS = 3V Frequency = 2MHz VS = 5V, AV = – 1, RL = 1k, VO = 4VP-P VS = 5V, AV = 1, VO = 4VP-P VS = 5V, AV = 1, RL = 1k, VO = 2VP-P, fC = 500kHz 0.01%, VS = 5V, VSTEP = 2V, AV = 1, RL = 1k VS = 5V, AV = 2, RL = 150Ω VS = 5V, AV = 2, RL = 150Ω 35 3.5 30 85 78 79 72 0 78 72 MIN TYP 75 140 175 0.5 20 100 150 280 25 500 25 25 25 25 1.4 8.5 1 2 85 8 85 105 97 105 97 VS 97 97 2.3 16 85 225 18 120 450 45 40 1.6 80 25 2 –75 250 0.35 0.4 MAX 350 500 800 3 185 650 900 1200 250 1500 350 500 200 200 UNITS µV µV µV mV µV µV µV µV nA nA nA nA nA nA µVP-P nV/√Hz pA/√Hz pF V/mV V/mV V/mV dB dB dB dB V dB dB V mV mV mV mV mV mV mA mA mA MHz V/µs MHz dBc ns % Deg ∆VOS Input Offset Shift Input Offset Voltage Match (Channel-to-Channel) (Note 9) IB Input Bias Current Input Bias Current Match (Channel-to-Channel) (Note 9) IOS Input Offset Current Input Noise Voltage en in CIN AVOL Input Noise Voltage Density Input Noise Current Density Input Capacitance Large-Signal Voltage Gain CMRR Common Mode Rejection Ratio CMRR Match (Channel-to-Channel) (Note 9) Input Common Mode Range Power Supply Rejection Ratio PSRR Match (Channel-to-Channel) (Note 9) Minimum Supply Voltage (Note 6) Output Voltage Swing Low (Note 7) PSRR VOL VOH Output Voltage Swing High (Note 7) 2.5 60 200 500 60 250 800 ISC IS GBW SR FPBW HD tS ∆G ∆θ Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate Full Power Bandwidth Harmonic Distortion Settling Time Differential Gain (NTSC) Differential Phase (NTSC) 20 20 40 12.5 2 18012fb 3 LT1801/LT1802 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS Input Offset Voltage The ● denotes the specifications which apply over the temperature range of 0°C < TA < 70°C. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. CONDITIONS VCM = 0V VCM = 0V (MS8) VCM = 0V (DD) VCM = VS VCM = 0V to VS – 1.5V VCM = 0V VCM = 0V (MS8) VCM = 0V (DD) VCM = 1V VCM = VS – 0.2V VCM = 1V VCM = VS – 0.2V VCM = 1V VCM = VS – 0.2V VS = 5V, VO = 0.5V to 4.5V, RL = 1k at VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω at VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k at VS/2 VS = 5V, VCM = 0V to 3.5V VS = 3V, VCM = 0V to 1.5V VS = 5V, VCM = 0V to 3.5V VS = 3V, VCM = 0V to 1.5V VS = 2.5V to 10V, VCM = 0V VS = 2.5V to 10V, VCM = 0V No Load ISINK = 5mA ISINK = 20mA No Load ISOURCE = 5mA ISOURCE = 20mA V S = 5V V S = 3V Frequency = 2MHz VS = 5V, AV = – 1, RL = 1k, VO = 4VP-P MIN ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ∆VOS Input Offset Shift Input Offset Voltage Match (Channel-to-Channel) (Note 9) Input Offset Voltage Drift (Note 8) Input Bias Current Input Bias Current Match (Channel-to-Channel) (Note 9) Input Offset Current Large-Signal Voltage Gain VOS TC IB IOS AVOL CMRR Common Mode Rejection Ratio CMRR Match (Channel-to-Channel) (Note 9) Input Common Mode Range Power Supply Rejection Ratio PSRR Match (Channel-to-Channel) (Note 9) Minimum Supply Voltage (Note 6) Output Voltage Swing Low (Note 7) PSRR 25 2.5 20 82 74 76 68 0 74 68 TYP 125 140 290 0.6 30 200 200 275 1.5 50 550 25 25 25 25 75 6 75 101 93 101 93 91 91 2.3 18 100 300 25 150 600 40 30 2 75 22 MAX 500 650 950 3.5 275 850 1250 1500 5 300 2000 400 600 300 300 VS VOL VOH Output Voltage Swing High (Note 7) 2.5 80 225 600 80 300 950 ISC IS GBW SR Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate 20 15 35 11 2.8 UNITS µV µV µV mV µV µV µV µV µV/°C nA nA nA nA nA nA V/mV V/mV V/mV dB dB dB dB V dB dB V mV mV mV mV mV mV mA mA mA MHz V/µs 18012fb 4 LT1801/LT1802 The ● denotes the specifications which apply over the temperature range of – 40°C < TA < 85°C. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. (Note 5) SYMBOL PARAMETER VOS Input Offset Voltage CONDITIONS VCM = 0V VCM = 0V (MS8) VCM = 0V (DD) VCM = VS VCM = 0V to VS – 1.5V VCM = 0V VCM = 0V (MS8) VCM = 0V (DD) ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ELECTRICAL CHARACTERISTICS MIN TYP 175 200 320 0.75 30 200 280 320 1.5 50 600 25 25 25 25 MAX 700 850 1150 4 300 1250 1600 1800 5 400 2250 450 700 350 350 UNITS µV µV µV mV µV µV µV µV µV/°C nA nA nA nA nA nA V/mV V/mV V/mV dB dB dB dB ∆VOS Input Offset Shift Input Offset Voltage Match (Channel-to-Channel) (Note 9) VOS TC IB Input Offset Voltage Drift (Note 8) Input Bias Current VCM = VS – 0.2V Input Bias Current Match (Channel-to-Channel) (Note 9) VCM = 1V VCM = VS – 0.2V VCM = 1V VCM = VS – 0.2V VS = 5V, VO = 0.5V to 4.5V, RL = 1k at VS/2 VS = 5V, VO = 1.5V to 3.5V, RL = 100Ω at VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k at VS/2 VS = 5V, VCM = 0V to 3.5V VS = 3V, VCM = 0V to 1.5V VS = 5V, VCM = 0V to 3.5V VS = 3V, VCM = 0V to 1.5V VS = 2.5V to 10V, VCM = 0V VS = 2.5V to 10V, VCM = 0V VCM = VO = 0.5V No Load ISINK = 5mA ISINK = 10mA No Load ISOURCE = 5mA ISOURCE = 10mA V S = 5V V S = 3V Frequency = 2MHz VS = 5V, AV = – 1, RL = 1k, VO = 4V IOS AVOL Input Offset Current Large-Signal Voltage Gain 20 2 17.5 81 73 75 67 0 73 67 65 6 65 101 93 101 93 VS 90 90 2.3 15 105 170 25 150 300 2.5 90 250 400 90 350 700 CMRR Common Mode Rejection Ratio CMRR Match (Channel-to-Channel) (Note 9) Input Common Mode Range V dB dB V mV mV mV mV mV mV mA mA PSRR Power Supply Rejection Ratio PSRR Match (Channel-to-Channel) (Note 9) Minimum Supply Voltage (Note 6) VOL Output Voltage Swing Low (Note 7) VOH Output Voltage Swing High (Note 7) ISC IS GBW SR Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate 12.5 12.5 25 9 30 30 2.1 70 18 3 mA MHz V/µs 18012fb 5 LT1801/LT1802 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS Input Offset Voltage TA = 25°C, VS = ± 5V, VCM = 0V, VOUT = 0V, unless otherwise noted. MIN TYP 150 180 260 0.7 30 150 275 325 25 400 20 20 20 20 1.4 8.5 1 2 25 2.5 85 79 VS– = 0V = 0V 78 72 70 7 109 109 VS+ 97 97 15 90 225 20 130 450 25 50 1.8 3 70 0.9 20 –75 300 0.35 0.2 70 200 500 80 260 850 MAX 600 750 1050 3.5 475 1000 1300 1600 250 1500 350 500 250 250 UNITS µV µV µV mV µV µV µV µV nA nA nA nA nA nA µVP-P nV/√Hz pA/√Hz pF V/mV V/mV dB dB V dB dB mV mV mV mV mV mV mA mA MHz MHz V/µs dBc ns % Deg CONDITIONS VCM = VS– VCM = VS– (MS8) VCM = VS– (DD) VCM = VS+ VCM = VS– to VS+ – 1.5V VCM = VS– VCM = VS– (MS8) VCM = VS– (DD) VCM = VS– + 1V VCM = VS+ VCM = VS– + 1V VCM = VS+ VCM = VS– + 1V VCM = VS+ 0.1Hz to 10Hz f = 10kHz f = 10kHz f = 100kHz VO = – 4V to 4V, RL = 1k VO = – 2V to 2V, RL = 100Ω VCM = VS– to 3.5V VCM = VS VS+ VS+ – to 3.5V ∆VOS Input Offset Shift Input Offset Voltage Match (Channel-to-Channel) (Note 9) IB Input Bias Current Input Bias Current Match (Channel-to-Channel) (Note 9) IOS Input Offset Current Input Noise Voltage en in CIN AVOL CMRR Input Noise Voltage Density Input Noise Current Density Input Capacitance Large-Signal Voltage Gain Common Mode Rejection Ratio CMRR Match (Channel-to-Channel) (Note 9) Input Common Mode Range PSRR VOL Power Supply Rejection Ratio PSRR Match (Channel-to-Channel) (Note 9) Output Voltage Swing Low (Note 7) = 2.5V to 10V, VS– = 2.5V to 10V, VS– No Load ISINK = 5mA ISINK = 20mA No Load ISOURCE = 5mA ISOURCE = 20mA VOH Output Voltage Swing High (Note 7) ISC IS GBW FPBW SR HD tS ∆G ∆θ Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Full Power Bandwidth Slew Rate Harmonic Distortion Settling Time Differential Gain (NTSC) Differential Phase (NTSC) Frequency = 2MHz VO = 8VP-P AV = – 1, RL = 1k, VO = ± 4V, Measured at VO = ± 2V AV = 1, RL = 1k, VO = 2VP-P, fC = 500kHz 0.01%, VSTEP = 5V, AV = 1V, RL = 1k AV = 2, RL = 150Ω AV = 2, RL = 150Ω 18012fb 6 LT1801/LT1802 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS Input Offset Voltage The ● denotes the specifications which apply over the temperature range of 0°C < TA < 70°C. VS = ± 5V, VCM = 0V, VOUT = 0V, unless otherwise noted. CONDITIONS VCM = VS VCM = VS– (MS8) VCM = VS– (DD) VCM = VS+ VCM = VS– to VS+ – 1.5V VCM = VS– VCM = VS– (MS8) VCM = VS– (DD) VCM = VS + 1V VCM = VS+ – 0.2V VCM = VS– + 1V VCM = VS+ – 0.2V VCM = VS– + 1V VCM = VS+ – 0.2V VO = –4V to 4V, RL = 1k VO = –2V to 2V, RL = 100Ω VCM = VS– to 3.5V VCM = VS– to 3.5V VS+ VS+ = 2.5V to 10V, VS– = 2.5V to 10V, VS– = 0V = 0V – – MIN ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● TYP 200 220 290 0.75 45 240 300 340 1.5 30 450 25 25 25 25 MAX 800 1000 1300 4 675 1500 1700 1950 5 300 2000 400 700 300 300 UNITS µV µV µV mV µV µV µV µV µV/°C nA nA nA nA nA nA V/mV V/mV dB dB ∆VOS Input Offset Shift Input Offset Voltage Match (Channel-to-Channel) (Note 9) VOS TC IB Input Offset Voltage Drift (Note 8) Input Bias Current Input Bias Current Match (Channel-to-Channel) (Note 9) IOS AVOL CMRR Input Offset Current Large-Signal Voltage Gain Common Mode Rejection Ratio CMRR Match (Channel-to-Channel) (Note 9) Input Common Mode Range 15 2 82 76 VS – 55 5 105 105 VS 91 93 17 105 250 25 150 600 80 250 575 90 310 975 4 + V dB dB mV mV mV mV mV mV mA mA MHz V/µs PSRR VOL Power Supply Rejection Ratio PSRR Match (Channel-to-Channel) (Note 9) Output Voltage Swing Low (Note 7) 74 68 No Load ISINK = 5mA ISINK = 20mA No Load ISOURCE = 5mA ISOURCE = 20mA VOH Output Voltage Swing High (Note 7) ISC IS GBW SR Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate Frequency = 2MHz AV = – 1, RL = 1k, VO = ± 4V, Measured at VO = ± 2V 22.5 45 2.4 70 20 ● ● The ● denotes the specifications which apply over the temperature range of – 40°C < TA < 85°C. VS = ± 5V, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER VOS Input Offset Voltage CONDITIONS VCM = VS VCM = VS– (MS8) VCM = VS– (DD) VCM = VS+ VCM = VS– to VS+ – 1.5V VCM = VS VCM = VS– (MS8) VCM = VS– (DD) – – MIN ● ● ● ● ● ● ● ● TYP 350 350 350 0.75 50 280 380 410 MAX 1000 1200 1500 5 750 1700 1900 2100 UNITS µV µV µV mV µV µV µV µV 18012fb ∆VOS Input Offset Shift Input Offset Voltage Match (Channel-to-Channel) (Note 9) 7 LT1801/LT1802 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS TC IB Input Offset Voltage Drift (Note 8) Input Bias Current Input Bias Current Match (Channel-to-Channel) (Note 9) IOS AVOL CMRR Input Offset Current Large-Signal Voltage Gain Common Mode Rejection Ratio CMRR Match (Channel-to-Channel) (Note 9) Input Common Mode Range PSRR VOL Power Supply Rejection Ratio PSRR Match (Channel-to-Channel) (Note 9) Output Voltage Swing Low (Note 7) VS+ VS+ The ● denotes the specifications which apply over the temperature range of – 40°C < TA < 85°C. VS = ± 5V, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) CONDITIONS ● MIN ● ● ● ● ● ● ● ● ● ● ● TYP 1.5 50 450 25 25 25 25 MAX 5 400 2250 450 700 350 350 UNITS µV/°C nA nA nA nA nA nA V/mV V/mV dB dB VCM = VS– + 1V VCM = VS+ – 0.2V VCM = VS– + 1V VCM = VS+ – 0.2V VCM = VS– + 1V VCM = VS+ – 0.2V VO = – 4V to 4V, RL = 1k VO = – 1V to 1V, RL = 100Ω VCM = VS– to 3.5V VCM = VS – to 3.5V 12.5 2 81 75 VS– 73 67 55 5 104 104 VS+ 90 90 20 110 180 30 150 300 100 275 400 110 350 700 4.5 V dB dB mV mV mV mV mV mV mA mA MHz V/µs = 2.5V to 10V, VS– = 2.5V to 10V, VS– = 0V = 0V ● ● ● ● ● ● ● ● ● ● No Load ISINK = 5mA ISINK = 10mA No Load ISOURCE = 5mA ISOURCE = 10mA VOH Output Voltage Swing High (Note 7) ISC IS GBW SR Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate Frequency = 2MHz AV = – 1, RL = 1k, VO = ± 4V, Measured at VO = ± 2V 12.5 30 2.6 65 15 ● ● Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 4: The LT1801C/LT1801I and LT1802C/LT1802I are guaranteed functional over the temperature range of – 40°C to 85°C. Note 5: The LT1801C/LT1802C are guaranteed to meet specified performance from 0°C to 70°C. The LT1801C/LT1802C are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1801I/LT1802I are guaranteed to meet specified performance from –40°C to 85°C. Note 6: Minimum supply voltage is guaranteed by power supply rejection ratio test. Note 7: Output voltage swings are measured between the output and power supply rails. Note 8: This parameter is not 100% tested. Note 9: Matching parameters are the difference between amplifiers A and D and between B and C on the LT1802; between the two amplifiers on the LT1801. Note 10: Thermal resistance (θJA) varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. If desired, the thermal resistance can be substantially reduced by connecting Pin 4 of the SO-8 and MS8, Pin 11 of the SO-14 or the underside metal of the DD package to a larger metal area (VS– trace). 18012fb 8 LT1801/LT1802 TYPICAL PERFOR A CE CHARACTERISTICS VOS Distribution, VCM = 0V (PNP Stage) 35 30 VS = 5V, 0V VCM = 0V PERCENT OF UNITS (%) 45 40 35 30 25 20 15 10 5 –150 –50 50 150 INPUT OFFSET VOLTAGE (µV) 250 0 –2000 –1200 –400 400 1200 INPUT OFFSET VOLTAGE (µV) 2000 SUPPLY CURRENT (mA) PERCENT OF UNITS (%) 25 20 15 10 5 0 –250 Offset Voltage vs Input Common Mode Voltage 500 400 300 TA = – 55°C VS = 5V, 0V TYPICAL PART 1.0 0.8 100 0 TA = 25°C 0.2 0 –0.2 –0.4 –0.6 –0.8 INPUT BIAS (µA) 200 INPUT BIAS CURRENT (µA) OFFSET VOLTAGE (µV) –100 TA = 125°C –200 –300 –400 –500 0 1 3 4 2 INPUT COMMON MODE VOLTAGE (V) 5 Output Saturation Voltage vs Load Current (Output Low) 10 OUTPUT SATURATION VOLTAGE (V) VS = 5V, 0V OUTPUT SATURATION VOLTAGE (V) 10 1 0.1 TA = 125°C 0.01 TA = – 55°C TA = 25°C 0.001 0.01 1 10 0.1 LOAD CURRENT (mA) UW 18012 G01 18012 G04 VOS Distribution, VCM = 5V (NPN Stage) VS = 5V, 0V VCM = 5V Supply Current vs Supply Voltage 4 PER AMPLIFIER 3 TA = 125°C 2 TA = 25°C TA = – 55°C 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 TOTAL SUPPLY VOLTAGE (V) 18012 G03 18012 G02 Input Bias Current vs Common Mode Voltage VS = 5V, 0V TA = 25°C TA = 125°C TA = – 55°C 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 Input Bias Current vs Temperature 0.6 0.4 NPN ACTIVE VS = 5V, 0V VCM = 5V PNP ACTIVE VS = 5V, 0V VCM = 1V –1.0 –1 0 2 3 4 5 1 INPUT COMMON MODE VOLTAGE (V) 6 –0.1 20 –60 –40 –20 0 40 TEMPERATURE (°C) 60 80 18012 G06 18012 G05 Output Saturation Voltage vs Load Current (Output High) VS = 5V, 0V 1 0.1 TA = 125°C 0.01 TA = – 55°C TA = 25°C 100 18012 G07 0.001 0.01 1 10 0.1 LOAD CURRENT (mA) 100 18012 G08 18012fb 9 LT1801/LT1802 TYPICAL PERFOR A CE CHARACTERISTICS Minimum Supply Voltage 0.6 CHANGE IN OFFSET VOLTAGE (mV) 0.4 0.2 CHANGE IN OFFSET VOLTAGE (µV) TA = – 55°C OUTPUT SHORT-CIRCUIT CURRENT (mA) TA = 25°C 0 –0.2 –0.4 –0.6 0 1.5 2 2.5 3 3.5 4 4.5 TOTAL SUPPLY VOLTAGE (V) 5 5.5 TA = 125°C Open-Loop Gain 2000 CHANGE IN OFFSET VOLTAGE (µV) 1600 1200 800 400 0 –400 –800 –1200 –1600 –2000 0 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT VOLTAGE (V) 4.5 5 RL = 100Ω RL = 1k VS = 5V, 0V RL TO GND 2000 CHANGE IN OFFSET VOLTAGE (µV) 1200 800 400 0 –400 –800 RL = 100Ω RL = 1k CHANGE IN OFFSET VOLTAGE (mV) Warm-Up Drift vs Time 120 110 OFFSET VOLTAGE (µV) VS = ± 5V NOISE VOLTAGE (nV/√Hz) 100 90 80 70 60 50 40 0 20 40 TYPICAL PART 80 100 120 60 TIME AFTER POWER-UP (SECONDS) 140 VS = ± 1.5V VS = ± 2.5V 10 UW 18012 G09 18012 G12 Output Short-Circuit Current vs Power Supply Voltage 70 60 50 40 30 20 10 0 –10 –20 –30 –40 –50 –60 –70 1.5 2 TA = 25°C TA = 125°C TA = – 55°C SINKING Open-Loop Gain 2000 1600 1200 800 400 0 –400 –800 RL = 100Ω RL = 1k VS = 3V, 0V RL TO GND TA = – 55°C TA = 125°C TA = 25°C SOURCING –1200 –1600 –2000 5 4 2.5 4.5 3.5 3 POWER SUPPLY VOLTAGE (± V) 0 0.5 1.5 2 1 OUTPUT VOLTAGE (V) 2.5 3 18012 G10 18012 G11 Open-Loop Gain 1600 VS = ± 5V RL TO GND 2.0 1.5 1.0 0.5 0 Offset Voltage vs Output Current VS = ± 5V TA = – 55°C –0.5 TA = 25°C –1.0 –1.5 TA = 125°C –1200 –1600 –2000 –5 –4 –3 –2 –1 0 1 2 3 OUTPUT VOLTAGE (V) 4 5 –2.0 15 30 –60 –45 –30 –15 0 OUTPUT CURRENT (mA) 45 60 18012 G13 18012 G14 Input Noise Voltage vs Frequency 60 50 40 30 20 10 NPN ACTIVE VCM = 4.25V VS = 5V, 0V PNP ACTIVE VCM = 2.5V 0.1 1 10 FREQUENCY (kHz) 100 18012 G16 0 0.01 18012 G15 18012fb LT1801/LT1802 TYPICAL PERFOR A CE CHARACTERISTICS Input Current Noise vs Frequency 3.0 2.5 VS = 5V, 0V INPUT NOISE VOLTAGE (nV) NOISE CURRENT (pA/√Hz) GAIN BANDWIDTH (MHz) 2.0 1.5 1.0 0.5 NPN ACTIVE VCM = 4.25V PNP ACTIVE VCM = 2.5V 0 0.01 0.1 1 10 FREQUENCY (kHz) Gain Bandwidth and Phase Margin vs Temperature 100 90 80 GBW PRODUCT VS = ± 2.5V GAIN BANDWIDTH (MHz) OPEN-LOOP GAIN (dB) SLEW RATE (V/µs) 70 60 50 GBW PRODUCT VS = ± 5V PHASE MARGIN VS = ± 2.5V PHASE MARGIN VS = ± 5V 60 50 40 30 20 –55 –35 –15 10 5 25 45 65 85 105 125 TEMPERATURE (°C) 18012 G20 Gain vs Frequency (AV = 1) 12 RL = 1k 9 CL = 10pF AV = 1 6 GAIN (dB) GAIN (dB) 3 0 –3 –6 –9 –12 0.1 1 10 FREQUENCY (MHz) VS = ± 5V UW 18012 G17 0.1Hz to 10Hz Input Voltage Noise 2000 VS = 5V, 0V 100 90 1000 80 70 60 Gain Bandwidth and Phase Margin vs Supply Voltage TA = 25°C GAIN BANDWIDTH PRODUCT PHASE MARGIN (DEG) 0 60 PHASE MARGIN 50 40 30 –1000 100 –2000 0 1 2 3 4567 TIME (SECONDS) 8 9 10 0 1 2345678 TOTAL SUPPLY VOLTAGE (V) 9 10 20 18012 G18 18012 G19 Slew Rate vs Temperature 35 AV = –1 RF = RG = 1k RL = 1k 70 Gain and Phase vs Frequency 100 80 PHASE 50 40 30 20 10 0 –10 –20 VS = ± 2.5V VS = ± 5V 0.1 1 10 FREQUENCY (MHz) GAIN 60 40 PHASE (DEG) VS = ± 2.5V 60 30 PHASE MARGIN (DEG) 25 VS = ± 5V 20 0 –20 –40 –60 –80 20 15 10 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 18012 G21 –30 0.01 –100 100 300 18012 G22 Gain vs Frequency (AV = 2) 18 RL = 1k 15 CL = 10pF AV = 2 12 VS = ± 2.5V 9 6 3 VS = ± 5V 0 –3 VS = ± 2.5V 100 300 –6 0.1 10 1 FREQUENCY (MHz) 100 300 18012 G23 18012 G24 18012fb 11 LT1801/LT1802 TYPICAL PERFOR A CE CHARACTERISTICS Output Impedance vs Frequency 600 100 OUTPUT IMPEDANCE (Ω) COMMON MODE REJECTION RATIO (dB) POWER SUPPLY REJECTION RATIO (dB) VS = ± 2.5V 10 1 0.1 0.01 AV = 10 AV = 1 AV = 2 0.001 0.1 1 10 FREQUENCY (MHz) Series Output Resistor vs Capacitive Load 60 55 50 45 VS = 5V, 0V AV = 1 ROS = 10Ω 60 55 50 45 DISTORTION (dBc) OVERSHOOT (%) OVERSHOOT (%) 40 35 30 25 20 15 10 5 0 10 ROS = RL = 50Ω ROS = 20Ω 100 1000 CAPACITIVE LOAD (pF) Distortion vs Frequency –40 –50 VS = 5V, 0V AV = 2 VOUT = 2VP-P RL = 150Ω, 2ND –70 –80 –90 –100 RL = 1k, 3RD –110 0.01 0.1 1 FREQUENCY (MHz) 10 18012 G31 DISTORTION (dBc) –60 RL = 1k, 2ND RL = 150Ω, 3RD OUTPUT VOLTAGE SWING (VP-P) 12 UW 100 18012 G25 18012 G28 Common Mode Rejection Ratio vs Frequency 120 100 80 60 40 20 0 0.01 VS = 5V, 0V Power Supply Rejection Ratio vs Frequency 90 80 70 60 50 40 30 20 10 0 –10 0.001 0.01 0.1 1 FREQUENCY (MHz) 10 100 18012 G27 VS = 5V, 0V TA = 25°C NEGATIVE SUPPLY POSITIVE SUPPLY 500 0.1 1 10 FREQUENCY (MHz) 100 18012 G26 Series Output Resistor vs Capacitive Load VS = 5V, 0V AV = 2 –40 –50 –60 –70 –80 –90 –100 ROS = RL = 50Ω 10 100 1000 CAPACITIVE LOAD (pF) 10000 18012 G29 Distortion vs Frequency VS = 5V, 0V AV = 1 VOUT = 2VP-P RL = 150Ω, 2ND 40 35 30 25 20 15 10 5 0 ROS = 10Ω ROS = 20Ω RL = 1k, 2ND RL = 150Ω, 3RD RL = 1k, 3RD 0.1 1 FREQUENCY (MHz) 10 18012 G30 10000 –110 0.01 Maximum Undistorted Output Signal vs Frequency 4.6 4.5 4.4 AV = 2 4.3 AV = –1 4.2 4.1 4.0 3.9 1k VS = 5V, 0V RL = 1k 10k 100k 1M FREQUENCY (Hz) 10M 18012 G32 18012fb LT1801/LT1802 TYPICAL PERFOR A CE CHARACTERISTICS 5V Large-Signal Response 5V Small-Signal Response 1V/DIV 0V VS = 5V, 0V AV = 1 RL = 1k ± 5V Large-Signal Response 2V/DIV 0V VS = ± 5V AV = 1 RL = 1k UW 100ns/DIV 50mV/DIV 0V 18012 G33 VS = 5V, 0V AV = 1 RL = 1k 50ns/DIV 18012 G34 ± 5V Small-Signal Response 50mV/DIV 0V 200ns/DIV 18012 G35 VS = ± 5V AV = 1 RL = 1k 50ns/DIV 18012 G36 Output Overdriven Recovery VIN 1V/DIV 0V VOUT 2V/DIV VS = 5V, 0V AV = 2 RL = 1k 100ns/DIV 18012 G37 18012fb 13 LT1801/LT1802 APPLICATIO S I FOR ATIO Circuit Description The LT1801/LT1802 have an input and output signal range that covers from the negative power supply to the positive power supply. Figure 1 depicts a simplified schematic of the amplifier. The input stage is comprised of two differential amplifiers, a PNP stage Q1/Q2 and an NPN stage Q3/ Q4 that are active over the different ranges of common mode input voltage. The PNP differential pair is active between the negative supply to approximately 1.2V below the positive supply. As the input voltage moves closer toward the positive supply, the transistor Q5 will steer the tail current I1 to the current mirror Q6/Q7, activating the NPN differential pair and the PNP pair becomes inactive for the rest of the input common mode range up to the positive supply. Also at the input stage, devices Q17 to Q19 act to cancel the bias current of the PNP input pair. When Q1-Q2 are active, the current in Q16 is controlled to be the same as the current in Q1-Q2, thus the base current of Q16 is nominally equal to the base current of the input devices. The base current of Q16 is then mirrored by devices Q17-Q19 to cancel the base current of the input devices Q1-Q2. V+ V+ V– ESDD2 D1 + I2 +IN ESDD1 D6 D5 –IN ESDD4 V– Q16 Q17 Q18 V+ ESDD3 D8 D7 Q19 V– Figure 1. LT1801/LT1802 Simplified Schematic Diagram 14 U A pair of complementary common emitter stages Q14/ Q15 that enable the output to swing from rail to rail constructs the output stage. The capacitors C2 and C3 form the local feedback loops that lower the output impedance at high frequency. These devices are fabricated on Linear Technology’s proprietary high speed complementary bipolar process. Power Dissipation The LT1801 amplifier is offered in a small package, SO-8, which has a thermal resistance of 190°C/W, θJA. So there is a need to ensure that the die’s junction temperature should not exceed 150°C. Junction temperature TJ is calculated from the ambient temperature TA, power dissipation PD and thermal resistance θJA: TJ = TA + (PD • θJA) The power dissipation in the IC is the function of the supply voltage, output voltage and the load resistance. For a given supply voltage, the worst-case power dissipation PDMAX occurs at the maximum supply current and the output R3 R4 R5 W UU + I1 Q11 Q12 Q13 C2 Q15 D2 Q5 VBIAS CC + I3 OUT V– Q4 Q3 Q1 Q2 D3 Q10 D4 Q9 Q8 C1 BUFFER AND OUTPUT BIAS Q7 Q6 R1 R2 18012 F01 Q14 18012fb LT1801/LT1802 APPLICATIO S I FOR ATIO PDMAX = (VS • ISMAX) + (VS/2)2/RL voltage is at half of either supply voltage (or the maximum swing is less than 1/2 supply voltage). PDMAX is given by: Example: An LT1801 in an SO-8 package operating on ±5V supplies and driving a 50Ω load, the worst-case power dissipation is given by: PDMAX = (10 • 4.5mA) + (2.5)2/50 = 0.045 + 0.125 = 0.17W If both amplifiers are loaded simultaneously, then the total power dissipation is 0.34W. The maximum ambient temperature that the part is allowed to operate is: TA = TJ – (PDMAX • 190°C/W) = 150°C – (0.34W • 190°C/W) = 85°C Input Offset Voltage The offset voltage will change depending upon which input stage is active. The PNP input stage is active from the negative supply rail to 1.2V from the positive supply rail, then the NPN input stage is activated for the remaining input range up to the positive supply rail during which the PNP stage remains inactive. The offset voltage is typically less than 75µV in the range that the PNP input stage is active. Input Bias Current The LT1801/LT1802 employ a patent-pending technique to trim the input bias current to less than 250nA for the input common mode voltage of 0.2V above negative supply rail to 1.2V of the positive rail. The low input offset voltage and low input bias current of the LT1801/LT1802 provide precision performance especially for high source impedance applications. U Output The LT1801/LT1802 can deliver a large output current, so the short-circuit current limit is set around 50mA to prevent damage to the device. Attention must be paid to keep the junction temperature of the IC below the absolute maximum rating of 150°C (refer to the Power Dissipation section) when the output is continuously short circuited. The output of the amplifier has reverse-biased diodes connected to each supply. If the output is forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to several hundred mA and the total supply voltage is less than 12.6V, the absolute maximum rating, no damage will occur to the device. Overdrive Protection When the input voltage exceeds the power supplies, two pairs of crossing diodes D1 to D4 will prevent the output from reversing polarity. If the input voltage exceeds either power supply by 700mV, diode D1/D2 or D3/D4 will turn on to keep the output at the proper polarity. For the phase reversal protection to perform properly, the input current must be limited to less than 10mA. If the amplifier is severely overdriven, an external resistor should be used to limit the overdrive current. The LT1801/LT1802’s input stages are also protected against a large differential input voltage of 1.4V or higher by a pair of back-back diodes D5/D8 to prevent the emitterbase breakdown of the input transistors. The current in these diodes should be limited to less than 10mA when they are active. The worst-case differential input voltage usually occurs when the input is driven while the output is shorted to ground in a unity gain configuration. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins by a pair of protection diodes on each pin that are connected to the power supplies as shown in Figure 1. 18012fb W UU 15 LT1801/LT1802 APPLICATIO S I FOR ATIO Capacitive Load The LT1801/LT1802 are optimized for high bandwidth, low power and precision applications. They can drive a capacitive load of about 75pF in a unity-gain configuration, and more for higher gain. When driving a larger capacitive load, a resistor of 10Ω to 50Ω should be connected between the output and the capacitive load to avoid ringing or oscillation. The feedback should still be taken from the output so that the resistor will isolate the capacitive load to ensure stability. Graphs on capacitive loads indicate the transient response of the amplifier when driving capacitive load with a specified series resistor. TYPICAL APPLICATIO S Single 3V Supply, 1MHz, 4th Order Butterworth Filter The circuit shown on the first page of this data sheet makes use of the low voltage operation and the wide bandwidth of the LT1801 to create a DC accurate 1MHz 4th order lowpass filter powered from a 3V supply. The amplifiers are configured in the inverting mode for the lowest distortion and the output can swing rail-to-rail for maximum dynamic range. Also on the first page of this data sheet, the graph displays the frequency response of the filter. Stopband attenuation is greater than 100dB at 50MHz. With a 2.25VP-P, 250kHz input signal, the filter has harmonic distortion products of less than – 85dBc. Worst case output offset voltage is less than 6mV. Fast 1A Current Sense Amplifier A simple, fast current sense amplifier in Figure 2 is suitable for quickly responding to out-of-range currents. The circuit amplifies the voltage across the 0.1Ω sense resistor by a gain of 20, resulting in a conversion gain of 2V/A. The –3dB bandwidth of the circuit is 4MHz, and the uncertainty due to VOS and IB is less than 4mA. The minimum output voltage is 60mV, corresponding to 30mA. The large-signal response of the circuit is shown in Figure 3. 52.3Ω VOUT = 2 • IL f–3dB = 4MHz UNCERTAINTY DUE TO VOS, IB < 4mA Figure 2. Fast 1A Current Sense 16 – 0.1Ω + IL 0A TO 1A 52.3Ω 3V 1/2 LT1801 VOUT 0V TO 2V 500mV/DIV 1k 0V 18012 F02 U Feedback Components When feedback resistors are used to set up gain, care must be taken to ensure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. For instance, the LT1801/ LT1802 in a noninverting gain of 2, setup with two 5k resistors and a capacitance of 5pF (part plus PC board) will probably oscillate. The pole is formed at 12.7MHz that will reduce phase margin by 57 degrees when the crossover frequency of the amplifier is around 20MHz. A capacitor of 5pF or higher connected across the feedback resistor will eliminate any ringing or oscillation. V S = 3V 50ns/DIV 18012 F03 W U UU Figure 3. Current Sense Amplifier Large-Signal Response 18012fb LT1801/LT1802 TYPICAL APPLICATIO S Single Supply 1A Laser Driver Amplifier Figure 4 shows the LT1801 used in a 1A laser driver application. One of the reasons the LT1801 is well suited to this control task is that its 2.3V operation ensures that it will be awaked during power-up and operated before the circuit can otherwise cause significant current to flow in the 2.1V threshold laser diode. Driving the noninverting input of the LT1801 to a voltage VIN will control the turning on of the high current NPN transistor, FMMT619 and the laser diode. A current equal to VIN/R1 flows through the laser diode. The LT1801 low offset voltage and low input bias current allows it to control the current that flows through the laser diode precisely. The overall circuit is a 1A per volt V-to-I converter. Frequency compensation components R2 and C1 are selected for fast but zero-overshoot time domain response to avoid overcurrent conditions in the laser. The time domain response of this circuit, measured at R1 and given a 500mV 230ns input pulse, is shown in Figure 5. While the circuit is capable of 1A operation, the laser diode and the transistor are thermally limited due to power dissipation, so they must be operated at low duty cycles. Figure 4. Single Supply 1A Laser Driver Amplifier 100mA/DIV Figure 5. 500mA Pulse Response – + U 5V VIN DO NOT FLOAT R3 10Ω 1/2 LT1801 C1 39pF R2 330Ω Q1 ZETEX FMMT619 IR LASER INFINEON SFH495 R1 1Ω 18012 F04 50ns/DIV 18012 F05 18012fb 17 LT1801/LT1802 PACKAGE DESCRIPTIO 3.5 ± 0.05 1.65 ± 0.05 2.15 ± 0.05 (2 SIDES) PIN 1 PACKAGE TOP MARK (NOTE 6) OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.23 (.206) MIN 0.42 ± 0.04 (.0165 ± .0015) TYP RECOMMENDED SOLDER PAD LAYOUT DETAIL “A” 0° – 6° TYP 4.90 ± 0.15 (1.93 ± .006) 0.254 (.010) GAUGE PLANE 0.18 (.077) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.13 ± 0.076 (.005 ± .003) MSOP (MS8) 0802 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 18012fb 18 U DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.675 ± 0.05 0.38 ± 0.10 8 3.00 ± 0.10 (4 SIDES) 1.65 ± 0.10 (2 SIDES) (DD) DFN 1203 0.200 REF 0.75 ± 0.05 4 0.25 ± 0.05 2.38 ± 0.10 (2 SIDES) 1 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 3.2 – 3.45 (.126 – .136) 0.65 (.0256) BSC 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 8 7 65 0.52 (.206) REF 3.00 ± 0.102 (.118 ± .004) NOTE 4 0.53 ± 0.015 (.021 ± .006) DETAIL “A” 1 23 4 1.10 (.043) MAX 0.86 (.034) REF 0.65 (.0256) BSC LT1801/LT1802 PACKAGE DESCRIPTIO .050 BSC 8 .245 MIN .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 0°– 8° TYP NOTE: 1. DIMENSIONS IN INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) S Package 14-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .045 ±.005 .050 BSC N 14 13 .337 – .344 (8.560 – 8.738) NOTE 3 12 11 10 9 8 .245 MIN 1 .030 ±.005 TYP 2 3 RECOMMENDED SOLDER PAD LAYOUT 1 .010 – .020 × 45° (0.254 – 0.508) 2 3 4 5 6 7 .008 – .010 (0.203 – 0.254) .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .045 ±.005 .189 – .197 (4.801 – 5.004) NOTE 3 7 6 5 .160 ±.005 .228 – .244 (5.791 – 6.197) .150 – .157 (3.810 – 3.988) NOTE 3 1 2 3 4 .053 – .069 (1.346 – 1.752) .004 – .010 (0.101 – 0.254) .016 – .050 (0.406 – 1.270) .014 – .019 (0.355 – 0.483) TYP .050 (1.270) BSC SO8 0303 N .160 ±.005 .228 – .244 (5.791 – 6.197) N/2 N/2 .150 – .157 (3.810 – 3.988) NOTE 3 .053 – .069 (1.346 – 1.752) 0° – 8° TYP .004 – .010 (0.101 – 0.254) .014 – .019 (0.355 – 0.483) TYP .050 (1.270) BSC S14 0502 18012fb 19 LT1801/LT1802 TYPICAL APPLICATIO Low Power High Voltage Amplifier Certain materials used in optical applications have characteristics that change due to the presence and strength of a DC electric field. The voltage applied across these materials should be precisely controlled to maintain desired properties, sometimes as high as 100’s of volts. The materials are not conductive and represent a capacitive load. The circuit of Figure 6 shows the LT1801 used in an amplifier capable of a 250V output swing and providing 130V 5V 10k 0.1µF Q5 4.99k 5V Q1 R4 2k Q2 R2 2k 1/2 LT1801 R5 2k Q3 Q4 VIN R1 2k C2 8pF 150V C1 39pF R3 200k 10k Q7 4.99k Q8 1k –130V 18012 F06 Figure 6. Low Power, High Voltage Amplifier RELATED PARTS PART NUMBER LT1399 LT1498/LT1499 LT1630/LT1631 LT1800 LT1806/LT1807 LT1809/LT1810 DESCRIPTION Triple 300MHz Current Feedback Amplifier Dual/Quad 10MHz, 6V/µs Rail-to-Rail Input and Output C-LoadTM Op Amps Dual/Quad 30MHz, 10V/µs Rail-to-Rail Input and Output Op Amps 80MHz, 25V/µs Low Power Rail-to-Rail Input/Output Precision Op Amp Single/Dual 325MHz, 140V/µs Rail-to-Rail Input and Output Op Amps Single/Dual 180MHz Rail-to-Rail Input/Output Op Amps COMMENTS 0.1dB Gain Flatness to 150MHz, Shutdown High DC Accuracy, 475µV VOS(MAX), 4µV/°C Max Drift High DC Accuracy, 525µV VOS(MAX), 70mA Output Current, Max Supply Current 4.4mA per Amplifier Single Version of LT1801/LT1802 High DC Accuracy, 550µV VOS(MAX), Low Noise 3.5nV/√Hz, Low Distortion –80dB at 5MHz, Power-Down (LT1806) 350V/µs Slew Rate, Low Distortion –90dBc at 5MHz, Power-Down (LT1809) C-Load is a trademark of Linear Technology Corporation. 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U 1k Q6 precise DC output voltage. When no signal is present, the op amp output sits at about mid-supply. Transistors Q1 and Q3 create bias voltages for Q2 and Q4, which are forced into a low quiescent current by degeneration resistors R4 and R5. When a transient signal arrives at VIN, the op amp output moves and causes the current in Q2 or Q4 to change depending on the signal polarity. The current, limited by the clipping of the LT1801 output and the 3kΩ of total emitter degeneration, is mirrored to the output devices to drive the capacitive load. The LT1801 output then returns to near mid-supply, providing the precise DC output voltage to the load. The attention to limit the current of the output devices minimizes power dissipation thus allowing for dense layout, and inherits better reliability. Figure 7 shows the time domain response of the amplifier providing a 200V output swing into a 100pF load. 5V R6 2k VOUT R7 2k MATERIAL UNDER ELECTRIC FIELD 100pF – + VIN 2V/DIV AV = VOUT/VIN = –100 ±130V SUPPLY IQ = 130µA OUTPUT SWING = ±128.8V OUTPUT OFFSET ≅ 20mV OUTPUT SHORT-CIRCUIT CURRENT ≅ 3mA 10% TO 90% RISE TIME ≅ 8µs, 200V OUTPUT STEP SMALL-SIGNAL BANDWIDTH ≅ 150kHz Q1, Q2, Q7, Q8: ON SEMI MPSA42 Q3, Q4, Q5, Q6: ON SEMI MPSA92 VOUT 50V/DIV 10µs/DIV 18012 F07 Figure 7. Large-Signal Time Domain Response of the Amplifier 18012fb LT 0607 REV B • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2002
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