LT3468-1

LT3468/LT3468-1/LT3468-2 Photoflash Capacitor Chargers in ThinSOT TM FEATURES ■ ■ ■ DESCRIPTIO ■ ■ ■ ■ ■ ■ Highly Integrated IC Reduces Solution Size Uses Small Transformers: 5.8mm × 5.8mm × 3mm Fast Photoflash Charge Times: 4.6s for LT3468 (0V to 320V, 100µF, VIN = 3.6V) 5.7s for LT3468-2 (0V to 320V, 100µF, VIN = 3.6V) 5.5s for LT3468-1 (0V to 320V, 50µF, VIN = 3.6V) Controlled Input Current: 500mA (LT3468) 375mA (LT3468-2) 225mA (LT3468-1) Supports Operation from Single Li-Ion Cell, or Any Supply from 2.5V up to 16V Adjustable Output Voltage No Output Voltage Divider Needed Charges Any Size Photoflash Capacitor Low Profile (1V) to enable the part. A low (1V) transition on this pin puts the part into power delivery mode. Once the target output voltage is reached, the part will stop charging the output. Toggle this pin to start charging again. Ground to shut down. You may bring this pin low during a charge cycle to halt charging at any time. VIN (Pin 5): Input Supply Pin. Must be locally bypassed with a good quality ceramic capacitor. Input supply must be 2.5V or higher. Where: VOUT is the desired output voltage. You must tie a Schottky diode from GND to SW, with the anode at GND for proper operation of the circuit. Please refer to the applications section for further information. GND (Pin 2): Ground. Tie directly to local ground plane. BLOCK DIAGRA TO BATTERY C1 PRIMARY 3 DONE Q3 Q1 ENABLE MASTER LATCH Q S Q R A2 R1 2.5k R DRIVER S Q Q1 CHARGE 4 ONESHOT CHIP ENABLE LT3468: RSENSE = 0.015Ω LT3468-2: RSENSE = 0.022Ω LT3468-1: RSENSE = 0.03Ω 6 W U U U T1 D1 VOUT SECONDARY D2 5 VIN R2 60k DCM COMPARATOR 1 SW + COUT PHOTOFLASH CAPACITOR + ONESHOT A3 – Q2 + – 36mV + – VOUT COMPARATOR 1.25V REFERENCE A1 + 20mV RSENSE GND – +– 2 3486 BD Figure 1 sn346812 346812fs LT3468/LT3468-1/LT3468-2 OPERATIO The LT3468/LT3468-1/LT3468-2 are designed to charge photoflash capacitors quickly and efficiently. The operation of the part can be best understood by referring to Figure 1. When the CHARGE pin is first driven high, a one shot sets both SR latches in the correct state. The power NPN device, Q1, turns on and current begins ramping up in the primary of transformer T1. Comparator A1 monitors the switch current and when the peak current reaches 1.4A (LT3468), 1A(LT3468-2) or 0.7A (LT3468-1), Q1 is turned off. Since T1 is utilized as a flyback transformer, the flyback pulse on the SW pin will cause the output of A3 to be high. The voltage on the SW pin needs to be at least 36mV higher than VIN for this to happen. During this phase, current is delivered to the photoflash capacitor via the secondary and diode D1. As the secondary current decreases to zero, the SW pin voltage will begin to collapse. When the SW pin voltage drops to 36mV above VIN or lower, the output of A3 (DCM Comparator) will go low. This fires a one shot which turns Q1 back on. This cycle will continue to deliver power to the output. Output voltage detection is accomplished via R2, R1, Q2, and comparator A2 (VOUT Comparator). Resistors R1 and R2 are sized so that when the SW voltage is 31.5V above VIN, the output of A2 goes high which resets the master latch. This disables Q1 and halts power delivery. NPN transistor Q3 is turned on pulling the DONE pin low, APPLICATIO S I FOR ATIO Choosing The Right Device (LT3468/LT3468-1/ LT3468-2) The only difference between the three versions of the LT3468 is the peak current level. For the fastest possible charge time, use the LT3468. The LT3468-1 has the lowest peak current capability, and is designed for applications that need a more limited drain on the batteries. Due to the lower peak current, the LT3468-1 can use a physically smaller transformer. The LT3468-2 has a current limit in between that of the LT3468 and the LT3468-1. Transformer Design The flyback transformer is a key element for any LT3468/ LT3468-1/LT3468-2 design. It must be designed carefully U W U U U indicating that the part has finished charging. Power delivery can only be restarted by toggling the CHARGE pin. The CHARGE pin gives full control of the part to the user. The charging can be halted at any time by bringing the CHARGE pin low. Only when the final output voltage is reached will the DONE pin go low. Figure 2 shows these various modes in action. When CHARGE is first brought high, charging commences. When CHARGE is brought low during charging, the part goes into shutdown and VOUT no longer rises. When CHARGE is brought high again, charging resumes. When the target VOUT voltage is reached, the DONE pin goes low and charging stops. Finally the CHARGE pin is brought low again so the part enters shutdown and the DONE pin goes high. LT3468-2 VIN = 3.6V VOUT COUT = 50µF 100V/DIV VDONE 5V/DIV VCHARGE 5V/DIV 1s/DIV 3468 F02 Figure 2. Halting the Charging Cycle with the CHARGE Pin. and checked that it does not cause excessive current or voltage on any pin of the part. The main parameters that need to be designed are shown in Table 1. The first transformer parameter that needs to be set is the turns ratio N. The LT3468/LT3468-1/LT3468-2 accomplish output voltage detection by monitoring the flyback waveform on the SW pin. When the SW voltage reaches 31.5V higher than the VIN voltage, the part will halt power delivery. Thus, the choice of N sets the target output voltage as it changes the amplitude of the reflected voltage from the output to the SW pin. Choose N according to the following equation: N= VOUT + 2 31. 5 sn346812 346812fs 7 LT3468/LT3468-1/LT3468-2 APPLICATIO S I FOR ATIO Where: VOUT is the desired output voltage. The number 2 in the numerator is used to include the effect of the voltage drop across the output diode(s). Thus for a 320V output, N should be 322/31.5 or 10.2. For a 300V output, choose N equal to 302/31.5 or 9.6. The next parameter that needs to be set is the primary inductance, LPRI. Choose LPRI according to the following formula: VOUT • 200 • 10 −9 N • IPK Where: V OUT i s the desired output voltage. N is the transformer turns ratio. IPK is 1.4 (LT3468), 0.7 (LT3468-1), and 1.0 (LT3468-2). LPRI ≥ LPRI needs to be equal or larger than this value to ensure that the LT3468/LT3468-1/LT3468-2 has adequate time to respond to the flyback waveform. All other parameters need to meet or exceed the recommended limits as shown in Table 1. A particularly important parameter is the leakage inductance, LLEAK. When the power switch of the LT3468/LT3468-1/LT3468-2 turns Table 1. Recommended Transformer Parameters PARAMETER LPRI LLEAK N VISO ISAT RPRI RSEC NAME Primary Inductance Primary Leakage Inductance Secondary: Primary Turns Ratio Secondary to Primary Isolation Voltage Primary Saturation Current Primary Winding Resistance Secondary Winding Resistance VIN = 5V VOUT = 320V VSW 10V/DIV 0V 3420 F07 100ns/DIV 3468 G18 Figure 3. LT3468 SW Voltage Waveform 8 U off, the leakage inductance on the primary of the transformer causes a voltage spike to occur on the SW pin. The height of this spike must not exceed 40V, even though the absolute maximum rating of the SW Pin is 50V. The 50V absolute maximum rating is a DC blocking voltage specification, which assumes that the current in the power NPN is zero. Figure 3 shows the SW voltage waveform for the circuit of Figure 6(LT3468). Note that the absolute maximum rating of the SW pin is not exceeded. Make sure to check the SW voltage waveform with VOUT near the target output voltage, as this is the worst case condition for SW voltage. Figure 4 shows the various limits on the SW voltage during switch turn off. It is important not to minimize the leakage inductance to a very low level. Although this would result in a very low leakage spike on the SW pin, the parasitic capacitance of the transformer would become large. This will adversely effect the charge time of the photoflash circuit. Linear Technology has worked with several leading magnetic component manufacturers to produce pre-designed flyback transformers for use with the LT3468/LT3468-1/ LT3468-2. Table 2 shows the details of several of these transformers. TYPICAL RANGE LT3468 >5 100 to 300 8 to 12 >500 >1.6 500 >0.8 500 >1.0