LT3472EDD

LT3472 Boost and Inverting DC/DC Converter for CCD Bias DESCRIPTIO The LT®3472 dual channel switching regulator generates positive and negative outputs for biasing CCD imagers. The device delivers up to –8V at 50mA and 15V at 20mA from a lithium-ion cell, providing bias for many popular CCD imagers. Switching at 1.1MHz, the LT3472 uses tiny, low profile capacitors and inductors and generates low noise outputs that are easy to filter. Schottky diodes are internal and the output voltages are set with one resistor per channel, reducing external component count. The entire solution is less than 1mm profile and occupies just 50mm2. Internal sequencing circuitry disables the negative channel until the positive channel has reached 88% of its final value, ensuring that the sum of the two outputs is always positive. Separate soft-start capacitors for each output allow the ramp of each output to be independently controlled. The LT3472 is available in a low profile (0.75mm) 10-pin 3mm × 3mm DFN package. FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ Generates 15V at 20mA, –8V at 50mA from a Li-Ion Cell Internal Schottky Diodes VIN Range: 2.2V to 16V Output Voltages Up to ±34V Capacitor-Programmable Soft-Start Sequencing: Positive Output Reaches 88% of Final Value Before Negative Output Begins Requires Only One Resistor to Set Output Voltage Constant Switching Frequency Ensures Low Noise Outputs Available in a 10-Lead (3mm × 3mm) DFN Package APPLICATIO S ■ ■ ■ ■ CCD Bias TFT LCD Bias OLED Bias ± Rail Generation for Op Amps , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO VIN 3V TO 4.2V 22µH 47µH Li-Ion CCD Bias Supply Conversion Efficiency 2.2µF 1µF 85 80 75 POS CHANNEL EFFICIENCY (%) VPOS 15V 20mA SWP VPOS 550k FBP 4.7pF VIN SWN DN 70 65 60 55 50 LT3472 320k FBN 10pF 47µH VNEG –8V 50mA SHDN SHDN SSP GND 100nF SSN 100nF 2.2µF 45 40 0 10 30 20 LOAD CURRENT (mA) 40 50 2.2µF 3472 TA01a U U U NEG CHANNEL 3472 TA01b 3472f 1 LT3472 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW SWP VIN SHDN SWN DN 1 2 3 4 5 11 10 VPOS 9 SSP 8 FBP 7 SSN 6 FBN VIN, SHDN Voltage ................................................... 16V SWP, SWN, VPOS Voltage ....................................... 36V DN Voltage ............................................................ –36V FBP, FBN, SSP, SSN Voltage ................................... 10V Maximum Junction Temperature .......................... 125°C Operating Temperature Range Extended Commercial ......................... –40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C ORDER PART NUMBER LT3472EDD DFN PART MARKING LBGC DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W, θJC = 3°C/W EXPOSED PAD IS GND (PIN 11) MUST BE SOLDERED TO PCB Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3V, SHDN = 3V unless otherwise noted. PARAMETER Minimum Operation Voltage Maximum Operation Voltage Supply Current SHDN Voltage High SHDN Voltage Low SHDN Pin Bias Current Positive Feedback Voltage Negative Feedback Voltage Positive Feedback Voltage Line Regulation Negative Feedback Voltage Line Regulation FBP Current FBN Current FBP to Start Negative Channel Switching Frequency Maximum Duty Cycle (Both Channels) Positive Channel Switch Current Limit Negative Channel Switch Current Limit Positive Channel Switch VCESAT Negative Channel Switch VCESAT Switch Leakage Current (Both Channels) Schottky DP Forward Drop Schottky DN Forward Drop Schottky Leakage Current (Both Channels) ISWP = 200mA ISWN = 200mA VSW = 5V IDP = 150mA IDN = 150mA VR = 36V ● ● ● ELECTRICAL CHARACTERISTICS CONDITIONS MIN 2.2 TYP MAX 16 UNITS V V mA µA V V µA V mV %/V mV/V SHDN = 3V, Not Switching SHDN = 0V ● ● 2.8 0.1 0.8 1 0.3 SHDN = 3V ● ● 35 1.2 –5 1.25 0 0.01 0.008 1.3 5 FBP = VFBP FBN = VFBN ● ● 24.5 24.5 1.02 0.9 88 250 300 25 25 1.1 1.1 92 350 400 245 400 0.01 700 750 25.3 25.3 1.18 1.4 5 950 1000 4 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT3472E is guaranteed to meet specified performance from 0°C to 70°C. Specifications over the –40°C to 85°C operating range are assured by design, characterization and correlation with statistical process controls. 3472f 2 U µA µA V MHz % mA mA mV mV µA mV mV µA W U U WW W LT3472 TYPICAL PERFOR A CE CHARACTERISTICS Quiescent Current 3.1 3.0 1.13 1.12 1.11 2.9 1.10 1.28 QUIESCENT CURRENT (mA) FBP VOLTAGE (V) 50 0 TEMPERATURE (°C) VFB1 (V) 2.8 2.7 2.6 2.5 –50 50 0 TEMPERATURE (°C) FBN Voltage 10 26.0 25.5 FBN BIAS CURRENT (µA) FBP BIAS CURRENT (µA) 5 FBN VOLTAGE (mV) 0 –5 –10 –50 50 0 TEMPERATURE (°C) SHDN Pin Bias Current 300 250 POSITIVE SWITCH SATURATION VOLTAGE (mV) SHDN CURRENT (µA) 200 150 100 50 0 0 UW 3472 G01 3472 G04 Minimum FBP Voltage to Enable Inverter 1.30 FBP Voltage 1.26 1.09 1.08 1.07 1.24 1.22 1.06 1.05 –50 1.20 50 100 100 3472 G02 –50 0 100 3472 G03 TEMPERATURE (°C) FBP Bias Current 26.0 FBN Bias Current 25.5 25.0 25.0 24.5 24.5 100 24.0 –50 50 0 TEMPERATURE (°C) 100 3472 G05 24.0 –50 0 50 100 3472 G06 TEMPERATURE (°C) Positive Channel Switch VCESAT 350 90°C 300 250 200 150 100 50 0 25°C –45°C 5 10 15 SHDN VOLTAGE (V) 20 3472 G07 0 50 100 150 200 250 SWITCH CURRENT (mA) 300 3472 G08 3472f 3 LT3472 TYPICAL PERFOR A CE CHARACTERISTICS Positive Channel Schottky I-V Characteristic NEGATIVE SWITCH SATURATION VOLTAGE (mV) POSITIVE SCHOTTKY FORWARD CURRENT (mA) 400 350 90°C 300 250 200 150 100 50 0 0 0.8 0.6 SCHOTTKY FORWARD DROP (V) 0.2 0.4 1.0 3472 G09 600 500 25°C 400 –45°C 300 200 100 0 90°C NEGATIVE SCHOTTKY FORWARD CURRENT (mA) 4 UW 25°C –45°C Negative Channel Switch VCESAT 350 300 250 200 150 100 50 0 Negative Channel Schottky I-V Characteristic 25°C 90°C –45°C 0 50 100 150 200 SWITCH CURRENT (mA) 250 3472 G10 0 0.2 0.4 0.8 0.6 SCHOTTKY FORWARD DROP (V) 1.0 3472 G11 3472f LT3472 PI FU CTIO S SWP (Pin 1): Switch Pin for Positive (Boost) Channel. Connect boost inductor here. VIN (Pin 2): Input Supply Pin. Must be locally bypassed with a X5R or X7R type ceramic capacitor. SHDN (Pin 3): Shutdown Pin. Connect to 0.8V or higher to enable device, 0.3V or less to disable device. SWN (Pin 4): Switch Pin for Negative (Inverter) Channel. Connect inverter input inductor and flying capacitor here. DN (Pin 5): Anode of Internal Schottky for Inverter. Connect inverter output inductor and flying capacitor here. FBN (Pin 6): Feedback Pin for Inverter. Connect feedback resistor R2 from this pin to VO2. Choose R2 according to VO2 = 1.25 • R2/50k. Pin voltage = 0V when regulated. SSN (Pin 7): Soft Start-Up Pin for Inverter. Connect a cap here for soft start-up. Leave open for quick start-up. This pin is connected to 1.25V with a 50k resistor internally. FBP (Pin 8): Feedback Pin for Boost. Connect boost feedback resistor R1 from this Pin to VO1. Choose R1 according to VO1 = 1.25 • (1 + R1/50k). Pin voltage = 1.25V when regulated. SSP (Pin 9): Soft Start-Up Pin for Boost. Connect a cap here for soft start-up. Leave open for quick start-up. This pin is connected to 1.25V with a 50k resistor internally. VPOS (Pin 10): Output Pin for Boost. Connect boost output capacitor here. GND (Exposed Pad) (Pin 11): GND Pin. Tie directly to ground plane through multiple vias under the package for optimum thermal performance. BLOCK DIAGRA FBP 8 50k VIN 2 VREF 1.25V FBN 6 SSN 7 50k 1.25V 50k SSP 9 W U U U SWP 1 – A1 COMPARATOR DP X1 DRIVER 1 Q S Q1 10 VPOS – A2 + + ∑ R – + RAMP GENERATOR 11 GND 50k 1.2MHz OSCILLATOR COMPARATOR A3 3 SHDN + – – A4 X2 R S Q DRIVER 2 Q2 4 SWN + – ∑ + RAMP GENERATOR DN 5 DN 3472 BD Figure 1. LT3472 Block Diagram 3472f 5 LT3472 APPLICATIO S I FOR ATIO Operation The LT3472 uses a constant frequency, current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring to the block diagram in Figure 1. At the start of each oscillator cycle, the SR latch X1 is set, which turns on the power switch Q1. A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator A2. When this voltage exceeds the level at the negative input of A2, the SR latch X1 is reset turning off the power switch Q1. The level at the negative input of A2 is set by the error amplifier A1, and is simply an amplified version of the difference between the feedback voltage and the reference voltage of 1.25V. In this manner, the error amplifier sets the correct peak current level to keep the output in regulation. If the error amplifier’s output increases, more current is delivered to the output; if it decreases, less current is delivered. The second channel is an inverting converter. The basic operation is the same as the positive channel. The SR latch X2 is also set at the start of each oscillator cycle. The power switch Q2 is turned on at the same time as Q1. The turn off of Q2 is determined by its own feedback loop, which consists of error amplifier A3 and PWM comparator A4. The reference voltage of this negative channel is ground. Switching waveforms with typical load conditions are shown in Figure 2. EFFICIENCY (%) VSWP 20V/DIV IL1 100mA/DIV VSWN 20V/DIV ISWN 100mA/DIV VIN = 3.6V VPOS = 15V, 20mA VNEG = –7.5V, 30mA 500ns/DIV 3472 FO4 EFFICIENCY (%) Figure 2. Switching Waveforms 6 U Inductor Selection A 22µH inductor is recommended for LT3472 step-up channel. The inverter channel can use a 22µH or 47µH inductor. 47µH inductors will provide slightly more current. Small size and high efficiency are the major concerns for most LT3472 applications. Inductors with low core losses and small DCR (copper wire resistance) at 1.1MHz are good choices for LT3472 applications. Some inductors in this category with small size are listed in Table 1. The efficiency comparison of different inductors is shown in Figure 3. 85 INVERTER LOAD = 20mA LQH32CN220 80 TOKO 1067FB-220M 75 LQH2MCN220 70 65 60 0 5 10 15 20 25 LOAD CURRENT IO1 (mA) 30 3473 F02a 3472 F02a W U U 85 BOOST LOAD = 20mA LQH32CN220 80 TOKO 1067FB-220M 75 LQH2MCN220 70 65 60 0 5 10 15 20 25 LOAD CURRENT IO2 (mA) 30 3473 F02a 3472 F02b Figure 3. Efficiency Comparison of Different Inductors 3472f LT3472 APPLICATIO S I FOR ATIO Table 1. Recommended Inductors Part No. LQH32CN220 LQH32CN470 LQH2MCN220 LQH2MCN470 D1067FB-220M Inductance DCR Current Manufacturer (µH) (Ω) Rating (mA) 22 47 22 47 22 0.71 1.3 2.1 5.1 2.0 250 170 185 120 270 Murata (814) 237-1431 www.murata.com TOKO (408) 432-8281 www.tokoam.com Panasonic (714) 373-7334 www.panasonic.com Sumida (847) 956-0666 www.sumida.com Taiyo Yuden (408) 573-4150 www.t-yuden.com ELJPC220KF 22 4.0 160 CDRH3D16-220 22 0.53 350 LB2012B220M LEM2520-220 22 22 1.7 5.5 75 125 Capacitor Selection The small size of ceramic capacitors makes them suitable for LT3472 applications. X5R and X57 types of ceramic capacitors are recommended because they retain their capacitance over wider voltage and temperature ranges than other types such as Y5V or Z5U. A 2.2µF input capacitor and a 2.2µF output capacitor are sufficient for most LT3472 applications. Table 2. Recommended Ceramic Capacitor Manufacturers Manufacturer Taiyo Yuden Murata Kemet Phone (408) 573-4150 (814) 237-1431 (408) 986-0424 URL www.t-yuden.com www.murata.com www.kemet.com Inrush Current The LT3472 uses internal Schottky diodes. When supply voltage is abruptly applied to VIN pin, for the positive channel, the voltage difference between VIN and VPOS generates inrush current flowing from input through the inductor LP and the internal Schottky diode DP to charge the output capacitor COP. For the inverter channel, there is a similar inrush current flowing from input through the inductor LN1 path, charging the capacitor CNF, and returning through the internal Schottky diode DN. The maximum current the Schottky diodes in the LT3472 can sustain is U 1A. The selection of inductor and capacitor value should ensure the peak of the inrush current to be below 1A. The peak inrush current can be calculated as follows: IP = ⎡α VIN – 0.6 ⎛ ω⎞⎤ • EXP⎢ – • arctan ⎜ ⎟ ⎥ • ⎝ α⎠⎦ L•ω ⎣ω ⎡ ⎛ ω⎞⎤ SIN⎢arctan• ⎜ ⎟ ⎥ ⎝ α⎠⎦ ⎣ r + 1.5 α= 2•L 1 r – ω= L • C 4 • L2 where L is the inductance, r is the resistance of the inductor and C is the output capacitance. For low DCR inductors, which is usually the case for this application, the peak inrush current can be simplified as follows: IP = ⎛ α π⎞ VIN – 0.6 • EXP⎜ – • ⎟ L•ω ⎝ ω 2⎠ W UU Table 3 gives inrush peak currents for some component selections. Note that inrush current is not a concern if the input voltage rises slowly. Table 3. Inrush Peak Current VIN (V) 5 3.6 3.6 3.6 3.6 r (Ω) 0.5 0.7 2.1 1.3 0.7 L (µH) 22 22 22 47 22 C (µF) 2.2 2.2 2.2 1 1 IP (A) 0.89 0.59 0.46 0.32 0.46 External Diode Selection As stated previously the LT3472 has internal Schottky diodes. The Schottky diode DP is sufficient for most stepup applications. However, for high current inverter applications, a properly selected external Schottky diode in parallel with DN can improve efficiency. For external diode selection, both forward voltage drop and diode capacitance need to be considered. Schottky diodes rated for higher current usually have lower forward voltage drop 3472f 7 LT3472 APPLICATIO S I FOR ATIO and larger capacitance, which can cause significant switching losses at 1.1MHz switching frequency. Some recommended Schottky diodes are listed in Table 4. Table 4. Recommended Schottky Diodes Forward Current (mA) 100 200 Forward Voltage Drop (V) Diode Capacitance (pF) Manufacturer Central Semiconductor (631) 435-1110 www.centralsemi.com Part No. CMDSH-3 CMDSH2-3 0.58 @100mA 7 @ 10V 0.49 @ 200mA 15 @ 10V Setting the Output Voltages The LT3472 has an accurate feedback resistor of 50k for each channel. Only one resistor is needed to set the output voltage for each channel. The output voltage can be set according to the following formulas: R1 ⎞ ⎛ VPOS = 1.25 • ⎜ 1 + ⎟ ⎝ 50k ⎠ ⎛ R2 ⎞ VNEG = –1.25 • ⎜ ⎟ ⎝ 50k ⎠ VSSP 1V/DIV VPOS 5V/DIV IIN 100mA/DIV 1ms/DIV 3472 FO4a Figure 4a. VSSP, VPOS, IIN with 100nF on SSP VSSN 1V/DIV VNEG 5V/DIV IIN 100mA/DIV 500µs/DIV 3472 FO5a Figure 5a. VSSN, VNEG, IIN with 100nF on SSN 8 U In order to maintain accuracy, high precision resistors are preferred (1% is recommended). Soft-Start The LT3472 has independent soft-start control for each channel. As shown in Figure 1, the SSP and SSN pins have an internal resistor of 50k pulling up to 1.25V, respectively. By connecting a capacitor from the SSP or SSN pin to ground, the ramp of each output can be programmed individually. If SSP or SSN is open or pull higher than 1.25V, the corresponding output will ramp up quickly. The waveforms with and without soft-start for the Boost channel are shown in Figure 4. The waveforms with and without soft-start for the negative channel are shown in Figure 5. Start Sequencing The LT3472 has internal sequencing circuitry that inhibits the negative channel from operating until feedback voltage of the step-up channel reaches about 1.1V, ensuring that VSSP 2V/DIV VPOS 5V/DIV IIN 200mA/DIV 100µs/DIV 3472 FO4b W UU Figure 4b. VSSP, VPOS, IIN with SSP Open VSSN 2V/DIV VNEG 5V/DIV IIN 200mA/DIV 100µs/DIV 3472 FO5b Figure 5b. VSSN, VNEG, IIN with SSN Open 3472f LT3472 APPLICATIO S I FOR ATIO the sum of the two outputs is always positive. The sequencing is shown in Figure 6. Board Layout Consideration As with all switching regulators, careful attention must be paid to the PCB board layout and component placement. To maximize efficiency, switch rise and fall times are made as short as possible. To prevent electromagnetic interfer- VPOS 5V/DIV VNEG 5V/DIV VSHDN 5V/DIV 100µs/DIV 3472 FO6 Figure 6. Start-Up Sequencing U ence (EMI) problems, proper layout of the high frequency switching path is essential. The voltage signals of the SWP and SWN pins have rise and fall times of a few ns. Minimize the length and area of all traces connected to the SWP and SWN pins and always use a ground plane under the switching regulator to minimize interplane coupling. Recommended component placement is shown in Figure 7. COP CIN LP RFBP LN1 CFBP CSSP CNF LN2 CON RFBN CFBN CSSN 3472 F06 W UU Figure 7. Recommended Component Placement 3472f 9 LT3472 TYPICAL APPLICATIO S VIN 3V TO 4.2V CIN 2.2µF LP 22µH LN1 47µH VPOS 15V 20mA VPOS Load Step Response IPOS 15mA 25mA VPOS 20mV/DIV 20µs/DIV 10 U CNF 1µF RFBP 550k CFBP, 4.7pF SWP VPOS FBP VIN SWN DN LN2 47µH VNEG –8V 50mA LT3472 RFBN 320k FBN SHDN COP 2.2µF SHDN SSP CSSP 100nF GND SSN CSSN 100nF CFBN 10pF CON 2.2µF CIN: TAIYO YUDEN JMK107BJ225 COP: TAIYO YUDEN EMK316BJ225 CNF: TAIYO YUDEN EMK212BJ105 CON: TAIYO YUDEN LMK212BJ225 LP: MURATA LQH32CN220 LN1, LN2: MURATA LQH32CN470 3472 TA02 VNEG Load Step Response –20mA –30mA INEG VNEG 10mV/DIV 3472 TA04 50µs/DIV 3472 TA05 3472f LT3472 PACKAGE DESCRIPTIO U DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) R = 0.115 TYP 6 0.675 ± 0.05 0.38 ± 0.10 10 3.00 ± 0.10 (4 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 TOP MARK (SEE NOTE 6) 5 0.200 REF 0.75 ± 0.05 2.38 ± 0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 1 0.25 ± 0.05 0.50 BSC 1.65 ± 0.10 (2 SIDES) (DD10) DFN 1103 3.50 ± 0.05 1.65 ± 0.05 2.15 ± 0.05 (2 SIDES) 0.00 – 0.05 3472f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LT3472 TYPICAL APPLICATIO VPOS 15V 20mA RELATED PARTS PART NUMBER LT1611 LT1615/LT1615-1 LT1617/LT1617-1 LT1930/LT1930A LT1931/LT1931A LT1944/LT1944-1 LT1945(Dual) LT1946/LT1946A LT3461/LT3461A LT3462/LT3462A LT3463/LT3463A DESCRIPTION 550mA (ISW), 1.4MHz, High Efficiency Micropower Inverting DC/DC Converter 300mA/80mA (ISW), High Efficiency Step-Up DC/DC Converter 350mA/100mA (ISW), High Efficiency Micropower Inverting DC/DC Converter 1A (ISW), 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converter 1A (ISW), 1.2MHz/2.2MHz, High Efficiency Micropower Inverting DC/DC Converter Dual Output, 350mA/100mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter Dual Output, Boost/Inverter, 350mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter 1.5A (ISW), 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC Converter 0.3A (ISW), Inverting 1.3MHz/3MHz High Efficiency Step-Up DC/DC Converter with Integrated Schottky Diodes 300mA (ISW), Inverting 1.2MHz/2.7MHz DC/DC Converter with Integrated Schottky Diodes Dual Output, Boost/Inverter, 250mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter with Integrated Schottkys 85mA (ISW), High Efficiency Step-Up DC/DC Converter with Integrated Schottky and PNP Disconnect 1.1A, 1.3MHz/2.1MHz Step-Up DC/DC Converter with Integrated Soft-Start in ThinSOT COMMENTS VIN: 1.1V to 10V, VOUT(MAX) = – 34V, IQ = 3mA, ISD