LT3473AEDE

LT3473/LT3473A Micropower 1A Boost Converter with Schottky and Output Disconnect FEATURES ■ ■ DESCRIPTIO ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Tiny Solution Size Low Quiescent Current: 150µA in Active Mode (VIN = 3.6V, VOUT = 15V, No Load) 1µA in Shutdown Mode Internal 1A, 36V Switch Integrated Schottky Diode Integrated PNP Output Disconnect Internal Reference Override Pin PGOOD Pin 25V at 80mA from 3.6V Input Auxiliary NPNs for Intermediate Bias Voltages (LT3473A) Automatic Burst Mode® Operation at Light Load Constant Switching Frequency: 1.2MHz Thermal Shutdown Input Range: 2.2V to 16V Low Profile (3mm × 3mm) DFN Package (LT3473) Low Profile (4mm × 3mm) DFN Package (LT3473A) The LT®3473/LT3473A are micropower step-up DC/DC converters with integrated Schottky diode and output disconnect circuitry in low profile DFN packages. The small package size, high level of integration and the use of tiny SMT components yield a solution size of less than 50mm2. The internal 1A switch allows the device to deliver 25V at up to 80mA from a Li-Ion cell, while automatic Burst Mode operation maintains efficiency at light load. An auxiliary reference input (CTRL) allows the user to override the internal 1.25V feedback reference with any lower value, allowing full control of the output voltage during operation. A PGOOD pin sinks current when the output voltage reaches 90% of final value. The LT3473A includes two NPN transistors for generating intermediate bias voltages from the output and is offered in a 12-lead (4mm × 3mm) DFN package. The LT3473 does not include these NPNs and is offered in an 8-lead (3mm × 3mm) package. The rugged 36V switch and output disconnect circuitry allow outputs up to 34V to be easily generated in a simple boost topology. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. APPLICATIO S ■ ■ OLED Bias CCD Bias TYPICAL APPLICATIO PGOOD CTRL VIN 3V TO 4.2V 6.8µH SW VIN SHDN 4.7µF GND LT3473 Conversion Efficiency and Power Loss vs Output Current 80 VOUT 25V 2.2µF 80mA VIN = 3.6V VOUT = 15V OUT 75 EFFICIENCY (%) 70 CAP 2M FB 100k 3473 TA01a 65 0.47µF 60 55 0.1 U 500 400 POWER LOSS (mW) U U 300 200 100 10 1 OUTPUT CURRENT (mA) 0 100 3473 TA01b 3473f 1 LT3473/LT3473A ABSOLUTE AXI U RATI GS (Note 1) CTRL Voltage .......................................................... 10V NB1, NB2 Voltage ................................................... 36V NE1, NE2 Voltage ................................................... 36V Maximum Junction Temperature ......................... 125°C Operating Temperature Range (Note 2) .. – 40°C to 85°C Storage Temperature Range ................ – 65°C to 125°C VIN Voltage ............................................................. 16V SHDN Voltage .......................................................... 16V SW Voltage ............................................................. 36V PGOOD Voltage ...................................................... 36V CAP Voltage ............................................................ 36V OUT Voltage ........................................................... 36V FB Voltage .............................................................. 10V PACKAGE/ORDER I FOR ATIO TOP VIEW CAP 1 OUT 2 CTRL 3 FB 4 9 8 7 6 5 SW VIN SHDN PGOOD ORDER PART NUMBER LT3473EDD DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/ W EXPOSED PAD (PIN 9) IS GND MUST BE SOLDERED TO PCB (NOTE 3) DD PART MARKING LBJJ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = 3V, SHDN = 3V, CTRL = 2V, unless otherwise specified. PARAMETER Minimum Operation Voltage Maximum Operation Voltage Supply Current SHDN Voltage to Enable Chip SHDN Voltage to Disable Chip SHDN Pin Bias Current FB Voltage FB Voltage Line Regulation FB Pin Bias Current CTRL to FB Offset CTRL Pin Bias Current FB Threshold for PGOOD PGOOD Current Capacity 3V < VIN < 16V FB = 1.27V CTRL = 0.5V CTRL = 1V CTRL = 2V CTRL = 0.5V ● ● CONDITIONS SHDN = 3V, Not Switching SHDN = 0V ● ● 2 U U W WW U W TOP VIEW CAP OUT NB1 NE1 NB2 NE2 1 2 3 4 5 6 13 12 SW 11 VIN 10 SHDN 9 8 7 PGOOD CTRL FB ORDER PART NUMBER LT3473AEDE DE PART MARKING 3473A DE PACKAGE 12-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/ W EXPOSED PAD (PIN 13) IS GND MUST BE SOLDERED TO PCB (NOTE 3) MIN 2.2 TYP MAX 16 UNITS V V µA µA V V µA V %/V nA 100 0.1 1.4 1 0.2 2 1.235 1.25 0.01 20 5 50 1.15 0.40 100 20 1.26 mV nA V V µA 3473f LT3473/LT3473A ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = 3V, SHDN = 3V, CTRL = 2V, unless otherwise specified. PARAMETER Switching Frequency Maximum Duty Cycle Switch Current Limit Switch VCESAT Switch Leakage Current Schottky Forward Drop Schottky Leakage Current Disconnect PNP Voltage Drop Disconnect PNP Quiescent Current Disconnect PNP Leakage Current LTC3473A Only NPN1 Voltage Drop NPN1 Beta NPN2 Voltage Drop NPN2 Beta INE1 = 1mA INE1 = 1mA INE2 = 1mA INE2 = 1mA 60 Note 3: Failure to correctly solder the Exposed Pad of the package to the PC board will result in a thermal resistance much higher than 40°C. 60 0.8 V 0.8 V ISW = 100mA VSW = 5V ID = 100mA CAP = 36V, SW = 0V IOUT = 100µA, CAP = 20V IOUT = 50mA, CAP = 20V CAP = 20V SHDN = OUT = 0V, CAP = 20V 80 250 1.2 0.01 0.1 ● ● CONDITIONS MIN 0.9 88 1.2 TYP 1.2 92 45 0.1 0.45 MAX 1.4 UNITS MHz % A mV 5 4 µA V µA mV mV µA µA Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT3473EDD and LT3473AEDE are guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. TYPICAL PERFOR A CE CHARACTERISTICS Load Regulation (Feedback Taken from CAP) 20.20 20.00 FEEDBACK VOLTAGE (V) VIN = 3.6V CAP VOLTAGE (V) 19.80 OUT 19.60 19.40 19.20 19.00 0 20 40 60 80 LOAD CURRENT (mA) 100 3473 G01 1.0 0.8 0.6 0.4 0.2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 CTRL VOLTAGE (V) 2 PGOOD THRESHOLD VOLTAGE (V) UW TA = 25°C unless otherwise noted. Feedback Voltage 1.4 1.2 PGOOD Threshold Voltage 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.5 1 CTRL VOLTAGE (V) 3473 G03 1.5 2 3473 G02 3473f 3 LT3473/LT3473A TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise noted. Sleep Mode Quiescent Current 105 SLEEP MODE QUIESCENT CURRENT (µA) SLEEP MODE QUIESCENT CURRENT (µA) SHDN = 3V VIN = 3V 100 98 96 94 92 SHDN = 1.5V 90 88 SHDN PIN CURRENT (µA) 95 90 –50 0 50 TEMPERATURE (°C) Switch VCE(SAT) 450 SWITCH SATURATION VOLTAGE (mV) 400 350 300 250 200 150 100 50 0 0 200 400 600 800 1000 SWITCH CURRENT (mA) 1200 49 48 47 46 45 44 43 42 –50 0 50 100 3473 G08 SCHOTTKY FORWARD CURRENT (mA) SWITCH SATURATION VOLTAGE (mV) Schottky Forward Voltage 550 SCHOTTKY FORWARD VOLTAGE (mV) ID = 100mA 500 VOLTAGE DROP (mV) 300 250 200 150 100 50 –45°C SWITCHING FREQUENCY (MHz) 450 400 350 300 –50 50 0 TEMPERATURE (°C) 4 UW 3473 G04 3473 G07 Sleep Mode Quiescent Current (Not Switching) 102 100 SHDN = 3V 2.0 2.5 SHDN Pin Current SHDN = 3V VIN = 3V 1.5 1.0 0.5 100 0 2 4 12 INPUT VOLTAGE, VIN (V) 6 8 10 14 16 0 –50 50 0 TEMPERATURE (°C) 100 3473 G06 3473 G5 Switch Saturation Voltage 50 ISW = 100mA 1000 900 800 700 600 500 400 300 200 100 0 Schottky I-V Characteristic 0 TEMPERATURE (°C) 200 600 800 400 SCHOTTKY FORWARD DROP (mV) 1000 3473 G09 Output Disconnect Voltage Drop 400 350 90°C 25°C 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 Switching Frequency 0 100 3473 G10 0 20 80 COLLECTOR CURRENT (mA) 40 60 100 3473 G11 0 5 10 15 3473 G12 INPUT VOLTAGE, VIN (V) 3473f LT3473/LT3473A TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise noted. Disconnect PNP Quiescent Current DISCONNECT PNP QUIESCENT CURRENT (µA) 1.4 1.2 0.9 0.8 0.7 SHDN VOLTAGE (V) 1.0 0.8 0.6 0.4 0.2 0 0 5 10 15 20 25 30 35 40 CAP VOLTAGE (V) 3473 G13 0.5 0.4 0.3 0.2 0.1 0 0 80 20 60 40 OUTPUT CURRENT (mA) 100 3473 G14 NPN VBE (V) PI FU CTIO S (LT3473/LT3473A) CAP (Pin 1/Pin 1): Internal Output Voltage. This pin is the Schottky cathode and disconnect PNP emitter. Connect output capacitor here. OUT (Pin 2/Pin 2): Output of Disconnect Circuit. Bypass this pin with capacitor to ground. CTRL (Pin 3/Pin 8): External Reference Pin. This pin sets the FB voltage externally between 0V and 1.25V. Tie this pin 1.5V or higher to use the internal 1.25V reference. FB (Pin 4/Pin 7): Feedback Pin. Pin voltage is regulated to 1.25V if internal reference is used or to the CTRL pin voltage if the CTRL pin voltage is between 0V and 1.25V. Connect the feedback resistor divider to this pin. The output voltage is regulated to: ⎛ R2 ⎞ VOUT = VREF • ⎜ + 1⎟ ⎝ R1 ⎠ PGOOD (Pin 5/Pin 9): Power Good Output. Open collector logic output that starts to sink current when FB reaches within 100mV of the reference voltage. SHDN (Pin 6/Pin 10): Shutdown Pin. Connect to 1.4V or higher to enable device; 0.2V or less to disable device. Also functions as soft-start. Use RC filter as shown in Figure 4. VIN (Pin 7/Pin 11): Input Supply Pin. Must be locally bypassed with a X5R or X7R type ceramic capacitor. SW (Pin 8/Pin 12): Switch Pin. Connect inductor here. Minimize the metal trace area connected to the pin to minimize EMI. Exposed Pad (Pin 9/Pin 13): Ground. Solder directly to PCB ground plane through multiple vias under the package for optimum thermal performance. LT3473A Only NB1 (Pin 3): NPN1 Base. NE1 (Pin 4): NPN1 Emitter. NB2 (Pin 5): NPN2 Base. NE2 (Pin 6): NPN2 Emitter. UW SHDN Voltage to Turn-On Disconnect PNP 1.00 0.95 0.90 0.85 0.80 0.75 Auxiliary NPN VBE 0.6 IE = 1mA 0.70 0.65 0.60 0.55 IE = 100µA 0.50 –50 50 0 TEMPERATURE (°C) 100 3473 G15 U U U 3473f 5 LT3473/LT3473A BLOCK DIAGRA 4 FB 3 CTRL Q5 9 GND Σ RAMP GENERATOR 1.2MHz OSCILLATOR A3 Figure 1. LT3473 Block Diagram 11 ERROR AMPLIFIER gm VIN 10 SHDN 12 SW CAP VC 1 7 8 CTRL Q5 13 GND Σ RAMP GENERATOR 1.2MHz OSCILLATOR A3 Figure 2. LT3473A Block Diagram 3473f 6 – + + 9 PGOOD – ––+ + 100mV A4 + + – FB + A1 ENABLE PNP DRIVER BTH VREF 1.25V – POWER SECTION A2 R S Q DRIVER COMPARATOR – + + 5 PGOOD – ––+ + 100mV A4 + + – W 7 ERROR AMPLIFIER gm VIN 6 SHDN 8 SW CAP 1 VC + A1 ENABLE PNP DRIVER Q2 OUT 2 BTH VREF 1.25V – POWER SECTION A2 R S Q DRIVER Q1 COMPARATOR 3437 F01 Q2 OUT 2 Q3 NB1 NE1 3 4 Q1 Q4 NB2 NE2 5 6 3437 F02 LT3473/LT3473A APPLICATIO S I FOR ATIO Operation The LT3473 combines a current mode, fixed frequency PWM architecture with Burst Mode micropower operation to maintain high efficiency at light loads. Operation can best be understood by referring to the Block Diagram. The reference of the part is determined by the lower of the internal 1.25V bandgap reference and the voltage at the CTRL pin. The error amplifier compares voltage at the FB pin with the reference and generates an error signal VC. When VC is below the Burst Mode threshold voltage, BTH, the hysteretic comparator, A1, shuts off the power section leaving only the low power circuitry running. Total current consumption in this state is minimized. As output loading Switching Waveforms IL 200mA/DIV IL 200mA/DIV VSW 10V/DIV 3473 AI01 VSW 10V/DIV 3473 AI02 VIN = 3.6V VOUT = 20V ILOAD = 50mA 0.5µs/DIV Transient Response VOUT 500mV/DIV IL 500mA/DIV ILOAD 51mA 1mA VIN = 3.6V VOUT = 20V 500µs/DIV 3473 AI04 VOUT 500mV/DIV IL 500mA/DIV ILOAD 55mA 5mA VIN = 3.6V VOUT = 20V 500µs/DIV 3473 AI05 Shutdown Waveforms VOUT 10V/DIV CAP 0.5V/DIV SHDN 5V/DIV VIN = 3.6V VOUT = 20V ILOAD = 60mA 100µs/DIV 3473 AI07 U causes the FB voltage to decrease, VC increases causing A1 to enable the power section circuitry. The chip starts switching. If the load is light, the output voltage (and FB voltage) will increase until A1 turns off the power section. The output voltage starts to fall again. This cycle repeats and generates low frequency ripple at the output. This Burst Mode operation keeps the output regulated and reduces average current into the IC, resulting in high efficiency at light load. If the output load increases sufficiently, A1’s output remains high, resulting in continuous operation. At the start of each oscillator cycle, the SR latch is set, turning on the power switch Q1. A voltage proportional to the switch current is added to a stabilizing ramp and the Switching Waveforms VOUT 200mV/DIV IL 200mA/DIV ILOAD 11mA 1mA VIN = 3.6V VOUT = 20V 500µs/DIV 3473 AI03 W UU Transient Response VIN = 3.6V VOUT = 20V ILOAD = 8mA 0.5µs/DIV Transient Response VOUT 500mV/DIV IL 500mA/DIV ILOAD 75mA 25mA Transient Response VIN = 3.6V VOUT = 20V 200µs/DIV 3473 AI06 Start-Up Waveforms VOUT 10V/DIV IL 500mA/DIV SHDN 2V/DIV 500µs/DIV VIN = 3.6V VOUT = 20V ILOAD = 30mA SHDN 20k, 100nF 3473 AI08 3473f 7 LT3473/LT3473A APPLICATIO S I FOR ATIO resulting sum is fed into the positive terminal of the PWM comparator A2. When this voltage exceeds the level of the error signal VC, the SR latch is reset, turning off the power switch Q1. The error amplifier sets the peak current level to keep the output in regulation. If the error amplifier’s output increases, more current is delivered to the output; if it decreases, less current is delivered. The LT3473 includes an internal power Schottky diode and a PNP transistor, Q2, for output disconnect. Q2 disconnects the load from the input during shutdown. The part also has a power good indication pin, PGOOD. When the FB voltage reaches within 100mV of the reference voltage, the comparator A4 turns on Q5, sinking current from PGOOD pin. The LT3473 has thermal shutdown feature with threshold at about 145°C. Inductor Selection A 6.8µH inductor is recommended for the LT3473. The minimum inductor size that may be used in a given application depends on required efficiency and output current. Inductors with low core losses and small DCR (copper wire resistance) at 1.2MHz are good choices for LT3473 applications. Some inductors in this category with small size are listed in Table 1. The efficiency comparison of different inductors is shown in Figure 3. Table 1. Recommended Inductors PART DO1605T-682 ME3220-682 MSS6122-682 MSS5131-682 LQH55DN6R8 DCR (mΩ) 200 270 100 60 74 CURRENT RATING (A) 1.1 1.0 1.45 1.05 2.0 EFFICIENCY (%) CDRH5D18-6R2 CDRH4D28-6R8 CDRH5D28-6R2 CRD53-4R7 A918CY-6R2M (TYPE D62LCB) A915AY-6R8M (TYPE D53LC) 71 81 33 74 62 68 8 U 80 VIN = 3.6V VOUT = 20V 75 70 65 TOKO A915AY-6R8M SUMIDA CDRH4D28-6R8 SUMIDA CDRH5D18-6R2 COILCRAFT ME3220-682 COILCRAFT MSS5131-682 0 20 60 80 40 LEAD CURRENT lO (mA) 100 3473 F03 W UU 60 55 Figure 3. Efficiency Comparison of Different Inductors Capacitor Selection The small package of ceramic capacitors makes them suitable for LT3473 applications. X5R and X7R types of ceramic capacitors are recommended because they retain their capacitance over wider voltage and temperature ranges than other types such as Y5V or Z5U. A 4.7µF input capacitor, a 0.47µF output capacitor and a 2.2µF capacitor bypassing output disconnect PNP are sufficient for most LT3473 applications. Table 2. Recommended Ceramic Capacitor Manufacturers MANUFACTURER Taiyo Yuden AVX Murata Kemet TELEPHONE 408-573-4150 843-448-9411 814-237-1431 408-986-0424 URL www.t-yuden.com www.avxcorp.com www.murata.com www.kemet.com DIMENSION (mm) 5.4 × 4.2 × 1.8 3.2 × 2.5 × 2.0 6.1 × 6.1 × 2.2 5.1 × 5.1 × 3.1 5.7 × 5.0 × 4.7 MANUFACTURER Coilcraft 800-322-2645 www.coilcraft.com Murata 814-237-1431 www.murata.com Sumida 847-956-0666 www.sumida.com Toko 408-432-8281 www.tokoam.com 3473f 1.4 1.12 1.8 1.68 1.49 1.51 5.7 × 5.7 × 2.0 4.7 × 4.7 × 3.0 5.7 × 5.7 × 3.0 6.0 × 5.2 × 3.2 6.0 × 6.0 × 2.0 5.0 × 5.0 × 3.0 LT3473/LT3473A APPLICATIO S I FOR ATIO Inrush Current The LT3473 has an integrated Schottky power diode. When supply voltage is abruptly applied to the VIN pin while the output capacitor is discharged, the voltage difference between VIN and CAP generates inrush current flowing from the input through the inductor and the internal Schottky diode to charge the output capacitor at the CAP pin. The maximum current the LT3473’s Schottky can sustain is 2A. The selection of inductor and capacitor values should ensure that the peak inrush current is less than 2A. Peak inrush current can be calculated as follows: IP = α= ω= ⎛ ⎛α VIN – 0.6 ⎛ ω ⎞⎞ ⎛ ω ⎞⎞ • exp ⎜ – • arctan ⎜ ⎟⎟ • sin ⎜ arctan ⎜ ⎟⎟ ⎝ α ⎠⎠ ⎝ α ⎠⎠ L•ω ⎝ ⎝ω r + 1.5 2•L 1 r – L • C 4 • L2 where L is the inductance, r is the resistance of the inductor and C is the output capacitance. For a low DCR inductor, which is usually the case for this application, the peak inrush current can be simplified as follows: IP = VIN – 0.6 ⎛ α π⎞ • exp⎜ – • ⎟ ⎝ ω 2⎠ L•ω A large abrupt voltage step at VIN and/or a large capacitor at the CAP pin generate larger inrush current. Table 3 gives inrush peak currents for some component selections. An inductor with low saturation current could generate very large inrush current. For this case, inrush current should be measured to ensure safe operation. Note that inrush current is not a concern if the input voltage rises slowly. Table 3. Inrush Peak Current VIN (V) 5 10 3.6 3.6 R (Ω) 0.05 0.05 0.05 0.05 L (µH) 6.8 6.8 6.8 4.7 C (µF) 0.47 0.47 0.47 0.47 IP (A) 0.86 1.83 0.58 0.67 U Setting the Output Voltages The LT3473 has both an internal 1.25V reference and an external reference input. This allows the user to select between using the built-in reference and supplying an external reference voltage. The voltage at the CTRL pin can be adjusted while the device is operating to alter the output voltage for purposes such as display dimming or contrast adjustment. To use the internal 1.25V reference, the CTRL pin must be held higher than 1.5V. When the CTRL pin is held between 0V and 1.2V, the LT3473 will regulate the output such that the FB pin voltage is equal to the CTRL pin voltage. The CAP pin should be used as the feedback node. To set the output voltage, select the values of R1 and R2 according to the following equation. ⎛ R2 ⎞ VINT = VREF • ⎜ 1 + ⎟ ⎝ R1⎠ where VREF = 1.25V if the internal reference is used, or VREF = VCTRL if VCTRL is between 0V and 1.2V. To maintain output voltage accuracy, 1% resistors are recommended. Soft-Start The SHDN pin also functions as soft-start. Use an RC filter at the SHDN pin to limit the start-up current. The small bias current of the SHDN pin allows using a small capacitor for a large RC time constant. 20k ON/OFF 100nF 3473 F04 W UU LT3473 SHDN Figure 4. Soft-Start Circuitry Output Disconnect Considerations The LT3473 has an output disconnect PNP that isolates the load from the input during shutdown. The drive circuit maintains the PNP at the edge of saturation, adaptively according to the load, thus yielding the best compromise between VCESAT and quiescent current to minimize power loss. To remain stable, it requires a bypass capacitor connected between the OUT pin and the CAP pin or 3473f 9 LT3473/LT3473A APPLICATIO S I FOR ATIO between the OUT pin and ground. A ceramic capacitor with a value of 1µF is a good choice. The voltage drop (PNP VCESAT) can be accounted for by setting the output voltage according to the following formula: ⎛ R2 ⎞ VOUT = VINT – VCESAT = VREF • ⎜ 1 + ⎟ – VCESAT ⎝ R1⎠ Auxiliary NPN Devices (LT3473A Only) The LT3473A has two auxiliary NPNs as shown in the Block Diagram that can provide intermediate outputs less than OUT. The collectors of the NPNs are connected to the OUT pin internally. Each NPN can dissipate 100mW safely and has a minimum beta of 60. A resistor string can be 2 OUT REXT1 3 NB1 4 NE1 REXT2 5 NB2 6 NE2 REXT3 3473 F05 Figure 5. Auxiliary NPN Transistors in LT3473A. REXT1, REXT2 and REXT3 Set Intermediate Voltage at NE1 and NE2 OUT 1 2 3 13 4 5 6 9 8 7 12 11 10 OUT 1 2 3 4 9 8 7 6 5 Figure 6. Recommended Component Placement 3473f 10 U connected to the two bases as shown in Figure 5 to generate buffered voltage at the emitters. When sourcing high current at low voltage, keep in mind that the NPNs will be dissipating a fair amount of power, which must be supplied by the DC/DC converter. Thermal Shutdown The LT3473 has thermal shutdown circuitry that shuts down the part when the junction temperature reaches approximately 145°C to protect the part from abnormal operation with high power dissipation, such as an output short circuit or excessive power dissipation in the auxiliary NPNs. The part will turn back on when the junction cools down to approximately 125°C. If the abnormal condition remains, the part will turn on and off while maintaining the junction temperature within the window between 125°C and 145°C. Board Layout Consideration As with all switching regulators, careful attention must be paid to the PCB board layout and component placement. To maximize efficiency, switch rise and fall times are made as short as possible. To prevent electromagnetic interference (EMI) problems, proper layout of the high frequency switching path is essential. The voltage signal of the SW pin has sharp rise and fall edges. Minimize the length and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to minimize interplane coupling. Recommended component placement is shown in Figure 6. 3473 F06a 3473 F06b W UU LT3473/LT3473A PACKAGE DESCRIPTIO 3.5 ± 0.05 1.65 ± 0.05 2.15 ± 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (NOTE 6) 3.50 ± 0.05 1.70 ± 0.05 2.20 ± 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 3.30 ± 0.05 (2 SIDES) 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.675 ± 0.05 0.38 ± 0.10 8 3.00 ± 0.10 (4 SIDES) 1.65 ± 0.10 (2 SIDES) (DD8) DFN 1203 0.200 REF 0.75 ± 0.05 4 0.25 ± 0.05 2.38 ± 0.10 (2 SIDES) 1 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD DE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1708) 4.00 ± 0.10 (2 SIDES) 0.65 ± 0.05 R = 0.20 TYP 3.00 ± 0.10 (2 SIDES) 1.70 ± 0.10 (2 SIDES) 7 R = 0.115 TYP 0.38 ± 0.10 12 PIN 1 TOP MARK (NOTE 6) PIN 1 NOTCH (UE12/DE12) DFN 0603 0.200 REF 0.75 ± 0.05 6 0.25 ± 0.05 3.30 ± 0.10 (2 SIDES) 1 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3473f 11 LT3473/LT3473A TYPICAL APPLICATIO OLED Bias 100k PGOOD CTRL VIN 3V TO 4.2V L1 6.8µH SW VIN 20k SHDN CIN 4.7µF 100nF GND FB 100k CAP 2M CINT 0.47µF 3473 TA02a OUT LT3473 EFFICIENCY (%) CIN: TAIYO YUDEN JMK107BJ475 CINT: TAIYO YUDEN GMK212BJ474 COUT: TAIYO YUDEN GMK325BJ225 L1: TOKO A915AY-6R8M (TYPE D53LC) RELATED PARTS PART NUMBER LT1613 LT1615/LT1615-1 LT1930/LT1930A LT1935 LT1945 LT1946/LT1946A LTC®3436 LT3461/LT3461A LT3463/LT3463A DESCRIPTION 550mA (ISW), 1.4MHz, High Efficiency Step-Up DC/DC Converter 300mA/80mA (ISW), High Efficiency Step-Up DC/DC Converter 1A (ISW), 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converter 2A (ISW), 1.2MHz, High Efficiency Step-Up DC/DC Converter with Integrated Soft-Start Dual Output, Boost/Inverter, 350mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter 1.5A (ISW), 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC Converter 3A (ISW), 1MHz, 34V Step-Up DC/DC Converter 300mA (ISW), 1.3MHz/3MHz High Efficiency Step-Up DC/DC Converter with Integrated Schottky Diode Dual Output, Boost/Inverter, 250mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converters with Integrated Schottkys COMMENTS VIN: 0.9V to 10V, VOUT(MAX) = 34V, IQ = 3mA, ISD < 1µA, ThinSOTTM Package VIN: 1V to 15V, VOUT(MAX) = 34V, IQ = 20µA, ISD < 1µA, ThinSOT Package VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1µA, ThinSOT Package VIN: 2.3V to 16V, VOUT(MAX) = 38V, IQ = 3mA, ISD < 1µA, ThinSOT Package VIN: 1.2V to 15V, VOUT(MAX) = ±34V, IQ = 40µA, ISD < 1µA, 10-Lead MS Package VIN: 2.45V to 16V, VOUT(MAX) = 34V, IQ = 3.2mA, ISD < 1µA, MS8 Package VIN: 3V to 25V, VOUT(MAX) = 34V, IQ = 0.9mA, ISD < 6µA, TSSOP-16E Package VIN: 2.5V to 16V, VOUT(MAX) = 38V, IQ = 2.8mA, ISD < 1µA, ThinSOT Package VIN: 2.3V to 15V, VOUT(MAX) = ±40V, IQ = 40µA, ISD < 1µA, DFN Package LT3464 LT3467/LT3467A LT3471 LT3479 85mA (ISW), High Efficiency Step-Up DC/DC Converter VIN: 2.3V to 10V, VOUT(MAX) = 34V, IQ = 25µA, ISD < 1µA, with Integrated Schottky and PNP Disconnect ThinSOT Package 1.1A (ISW), 1.3MHz/2.1MHz, High Efficiency Step-Up DC/DC Converter with Soft-Start Dual Output, Boost/Inverter, 1.3A (ISW), 1.2MHz, High Efficiency Boost-Inverting DC/DC Converter 3A (ISW), 3.5MHz, 42V Step-Up DC/DC Converter VIN: 2.4V to 16V, VOUT(MAX) = 40V, IQ = 1.2mA, ISD < 1µA, ThinSOT Package VIN: 2.4V to 16V, VOUT(MAX) = ±40V, IQ = 2.5mA, ISD < 1µA, DFN Package VIN: 2.5V to 24V, VOUT(MAX) = 40V, IQ = 5mA, ISD < 1µA, DFN, TSSOP-16E Packages ThinSOT is a trademark of Linear Technology Corporation. 3473f 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U Efficiency VOUT 25V 80mA 80 VIN = 3.6V VOUT = 25V VOUT = 20V VOUT = 15V COUT 2.2µF 75 70 65 60 55 0 20 60 80 40 LOAD CURRENT IO (mA) 100 3473 TA02b LT/TP 0205 1K • PRINTED IN THE USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005