LT3682

LT3682 1A Micropower Step-Down Switching Regulator FEATURES n DESCRIPTION The LT®3682 is an adjustable frequency (250kHz to 2.2MHz) monolithic buck switching regulator that accepts input voltages up to 36V. A high efficiency 0.5Ω switch is included on the device along with a boost diode and the necessary oscillator, control, and logic circuitry. Current mode topology is used for fast transient response and good loop stability. A SYNC pin allows the user to synchronize the part to an external clock, and to choose between Low Ripple Burst Mode operation and standard PWM operation. The Low Ripple Burst Mode maintains high efficiency at low output currents while keeping output ripple below 15mV in typical applications. Shutdown reduces input supply current to less than 1μA while a resistor and capacitor on the RUN/SS pin provide a controlled output voltage ramp (soft-start). A power good flag signals when VOUT reaches 90% of the programmed output voltage. Protection circuitry senses the current in the power switch and external Schottky catch diode to protect the LT3682 against short-circuit conditions. Frequency foldback and thermal shutdown provide additional protection. The LT3682 is available in a 12-Pin 3mm × 3mm DFN with exposed pad for low thermal resistance. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. n n n n n n n n n n Wide Input Range: Operation from 3.6V to 36V Overvoltage Lockout Protects Circuits through 60V Transients 1A Output Current Low Ripple Burst Mode® Operation IQ = 75μA at 12VIN to 3.3VOUT Output Ripple < 15mVP-P Adjustable Switching Frequency: 250kHz to 2.2MHz Short-Circuit Protected Synchronizable Between 300kHz and 2.2MHz 0.8V Feedback Reference Voltage Output Voltage 0.8V to 20V Soft-Start Capability Power Good Flag Small 12-Pin Thermally Enhanced 3mm × 3mm DFN Package APPLICATIONS n n n n n Automotive Battery Regulation Automotive Entertainment Systems Industrial Supplies Power for Portable Products Distributed Supply Regulation TYPICAL APPLICATION 5V Step-Down Converter VIN 6.9V TO 36V TRANSIENT TO 60V VIN ON OFF 2.2μF 16.2k 40.2k 470pF RUN/SS VC RT PG SYNC GND PGND LT3682 SW DA FB 102k f = 800kHz 3682 TA01 Efficiency VOUT 5V 0.9A, VIN 6.9V 1A, VIN 12V EFFICIENCY (%) 100 VOUT = 5V 90 VOUT = 3.3V BD BOOST 0.22μF 10μH 80 70 536k 10μF 60 VIN = 12V L = 10µH f = 800 kHz 0 0.2 0.4 0.6 LOAD CURRENT (A) 0.8 1 3682 TA01b 50 3682f 1 LT3682 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW VC FB PG GND BD BOOST 1 2 3 4 5 6 13 12 VIN 11 SYNC 10 RT 9 RUN/SS 8 SW 7 DA VIN, RUN/SS Voltage (Note 2) …….……………. ....60V BOOST Pin Voltage …………………………..…….50V BOOST Pin Above SW Pin …………………..……..30V FB, RT, VC Voltage ......................................................5V SYNC …………………………….………….……. 20V BD and PG Voltage ..…….………………..……….. 30V Operating Junction Temperature Range (Notes 3 and 6) LT3682E ……………….………….. . −40°C to 125°C LT3682I ……………………………. −40°C to 125°C Storage Temperature Range ………….. −65°C to 150°C DD PACKAGE 12-LEAD (3mm 3mm) PLASTIC DFN θJA = 43°C/W EXPOSED PAD (PIN 13) IS PGND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH LT3682EDD#PBF LT3682IDD#PBF TAPE AND REEL LT3682EDD#TRPBF LT3682IDD#TRPBF PART MARKING* LFDW LFDW PACKAGE DESCRIPTION 12-Lead (3mm × 3mm) Plastic DFN 12-Lead (3mm × 3mm) Plastic DFN TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS PARAMETER Minimum Operating Voltage VIN Overvoltage Lockout Quiescent Current from VIN The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 10V, VRUN/SS = 10V, VBD = 3.3V unless otherwise noted. (Note 3) CONDITIONS VBD = 3.3V VBD < 3.0V VRUN/SS = 0.2V VRUN/SS = 10V, VBD = 3.3V, Not Switching VRUN/SS = 10V, VBD = 0V, Not Switching VRUN/SS = 0.2V VRUN/SS = 10V, VBD = 3.3V, Not Switching VRUN/SS = 10V, VBD = 0V, Not Switching l l l l MIN TYP 3.4 3.4 MAX 3.6 4.3 41 0.5 60 160 0.5 100 5 3 808 812 80 0.005 UNITS V V V μA μA μA μA μA μA V mV mV nA %/V μS V/V 36 39 0.01 35 90 0.01 55 0 2.8 Quiescent Current from BD Pin l Minimum BD Pin Voltage Feedback Voltage FB Pin Bias Current (Note 4) FB Voltage Line Regulation Error Amp gm Error Amp Voltage Gain FB Pin Voltage = 800mV 3.6V < VIN < 36V IVC = ±1.5μA l l 792 780 800 800 5 0.001 430 1300 3682f 2 LT3682 ELECTRICAL CHARACTERISTICS PARAMETER VC Source Current VC Sink Current VC Pin to Switch Current Gain VC Switching Threshold VC Clamp Voltage Switching Frequency RRT = 8.06kΩ RRT = 29.4kΩ RRT = 158kΩ l The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 10V, VRUN/SS = 10V, VBD = 3.3V unless otherwise noted. (Note 3) CONDITIONS MIN TYP 50 50 1.25 0.5 1.98 0.9 225 1.45 1.18 1.25 VSW = 0V, VIN = 60V IBSD = 50mA VSW = 10V, VBD = 0 l MAX UNITS μA μA A/V 0.6 2 2.2 1 250 130 1.7 1.4 460 1.6 0.01 720 0.1 1.7 10.5 12 0.7 2.42 1.1 275 210 2 1.66 1.95 1 850 1 2.5 17.5 20 0.2 V V MHz MHz kHz ns A A mV A μA mV μA V mA μA V V μA μA V mV mV MHz Minimum Switch Off-Time Switch Current Limit (Note 7) Switch VCESAT DA Pin Current to Stop OSC Switch Leakage Current Boost Schottky Diode Voltage Drop Boost Schottky Diode Reverse Leakage Minimum Boost Voltage (Note 5) BOOST Pin Current RUN/SS Pin Current RUN/SS Input Voltage High RUN/SS Input Voltage Low PG Leakage Current PG Sink Current PG Threshold as % of VFB PG Threshold Hysteresis SYNC Threshold Voltage SYNC Input Frequency Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect the device reliability and lifetime. Note 2: Absolute Maximum Voltage at VIN and RUN/SS pins is 60V for nonrepetitive 1 second transients, and 36V for continuous operation. Note 3: The LT3682E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the −40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3682I is guaranteed over the full −40°C to 125°C operating junction temperature range. VPG = 5V VPG = 0.4V Measured at FB pin. FB Pin Voltage Rising Measured at FB Pin ISW = 0.5A VRUN/SS = 10V SYNC = 0V SYNC = 3.3V or Clocked ISW = 1A 2.5 0.1 l 1 92% 800 2.2 100 88% 300 0.3 1000 90% 12 550 Note 4: Bias current flows out of the FB pin. Note 5: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the switch. Note 6: This IC includes over-temperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed the maximum operating junction temperature when over-temperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 7: Current limit guaranteed by design and/or correlation to static test. Slope compensation reduces current limit at higher duty cycles. 3682f 3 LT3682 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency (VOUT = 5V, SYNC = 0V) 90 80 70 EFFICIENCY (%) EFFICIENCY (%) 60 50 40 30 20 10 0.1 1 10 L = 10μH f = 800kHz 100 LOAD CURRENT (mA) 1000 3682 G01 TA = 25°C, unless otherwise noted. Efficiency (VOUT = 3.3V, SYNC = 0V) 90 100 VIN = 12V 90 80 EFFICIENCY (%) 70 60 50 40 30 L = 10μH f = 800kHz 1 100 LOAD CURRENT (mA) 10 1000 3682 G02 Efficiency (VOUT = 3.3V, SYNC = 0V) 1 VIN = 12V 80 70 60 50 40 30 20 10 0.1 0.1 VIN = 34V VIN = 24V VIN = 34V VIN = 24V 0.01 VIN = 12V VOUT = 3.3V L = 10μH f = 800kHz 1 100 LOAD CURRENT (mA) 10 0.001 1000 3682 G03 20 10 0.1 No Load Supply Current 120 VOUT = 3.3V 100 SUPPLY CURRENT (μA) SUPPLY CURRENT (μA) 80 60 40 20 0 1000 900 800 700 600 500 400 300 200 100 0 5 10 15 20 25 30 INPUT VOLTAGE(V) 35 40 0 No Load Supply Current 1.75 CATCH DIODE: DIODES, INC. B150 VIN = 12V VOUT = 3.3V LOAD CURRENT (A) 1.5 1.25 1 0.75 0.5 Maximum Load Current TYPICAL INCREASED SUPPLY CURRENT DUE TO CATCH DIODE LEAKAGE AT HIGH TEMPERATURE MINIMUM VOUT = 3.3V L = 10μH f = 800kHz 35 40 SYNC = 0V SYNC = 3.3V 50 25 0 25 50 75 TEMPERATURE(°C) 100 125 0.25 0 5 10 15 20 25 30 INPUT VOLTAGE (V) 3682 G04 3682 G05 3682 G06 Maximum Load Current 1.5 TYPICAL 1.25 LOAD CURRENT (A) 1.5 Maximum Load Current 1.75 TYPICAL 1.5 LOAD CURRENT (A) 1.25 1 0.75 Maximum Load Current TYPICAL 1.25 LOAD CURRENT (A) 1 1 0.75 MINIMUM 0.5 SYNC = 0V SYNC = 5V 0.25 5 10 15 VOUT = 5V L = 10μH f = 800kHz 35 40 0.75 MINIMUM 0.5 SYNC = 0V SYNC = 5V 0.25 8 10 14 16 INPUT VOLTAGE (V) 12 VOUT = 5V L = 4.7μH f = 2MHz 18 20 3682 G08 MINIMUM 0.50 0.25 SYNC = 0V SYNC = 3.3V 0 5 10 VOUT = 1.8V L = 10μH f = 500kHz 35 40 20 25 30 INPUT VOLTAGE (V) 15 20 25 30 INPUT VOLTAGE (V) 3682 G07 3682 G09 3682f 4 POWER LOSS(W) LT3682 TYPICAL PERFORMANCE CHARACTERISTICS Switch Current Limit 1.9 1.7 SWITCH CURRENT LIMIT (A) SWITCH CURRENT LIMIT (A) SYNC < 0.3V 1.5 1.3 1.1 0.9 0.7 0.5 SYNC > 0.8V OR CLOCKED 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 DC = 90% DC = 10% TA = 25°C, unless otherwise noted. Switch Current Limit (SYNC Pin Grounded) 700 600 VOLTAGE DROP (mV) 500 400 300 200 100 0 Switch Voltage Drop 0 20 60 DUTY CYCLE (%) 40 80 100 3682 G10 50 25 0 25 50 75 TEMPERATURE (°C) 100 125 0 0.25 0.5 0.75 1 SWITCH CURRENT (A) 1.25 3682 G12 3682 G11 Boost Pin Current 35 30 BOOST PIN CURRENT (mA) FEEDBACK VOLTAGE (mV) 810 Feedback Voltage 1.20 1.15 800 FREQUENCY (MHz) 1.10 1.05 1 0.95 0.90 0.85 Switching Frequency RRT = 29.4k 25 20 15 10 5 0 790 780 0 0.25 0.75 1 SWITCH CURRENT (A) 0.5 1.25 3682 G13 770 50 25 0 25 50 75 TEMPERATURE(°C) 100 125 0.80 50 25 0 25 50 75 TEMPERATURE(°C) 100 125 3682 G14 3682 G15 Frequency Foldback 1200 RRT = 29.4k MINIMUM SWITCH ON TIME (ns) 1000 FREQUENCY (kHz) 800 600 400 200 0 0 100 200 300 400 500 600 700 800 900 FB PIN VOLTAGE (mV) 3682 G16 Minimum Switch On-Time 120 100 80 60 40 20 0 2 1.8 SWITCH CURRENT LIMIT (A) 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 50 25 0 0 25 50 75 TEMPERATURE (°C) 100 125 Soft-Start 0 0.5 1 1.5 2 2.5 RUN/SS PIN VOLTAGE (V) 3 3.5 3682 G18 3682 G17 3682f 5 LT3682 TYPICAL PERFORMANCE CHARACTERISTICS RUN/SS Pin Current 12 10 RUN/SS PIN CURRENT (μA) 8 6 4 2 0 0 5 10 15 20 25 30 RUN/SS PIN VOLTAGE (V) 35 40 BOOST DIODE Vf (V) 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 0.25 0.5 0.75 BOOST DIODE CURRENT (A) 1 3682 G20 TA = 25°C, unless otherwise noted. Boost Diode Forward Voltage 60 50 40 VC PIN CURRENT (μA) 30 20 10 0 10 20 30 40 50 60 Error Amplifier Output Current 200 100 0 100 FB PIN ERROR VOLTAGE (mV) 200 3682 G21 3682 G19 Minimum Input Voltage 5 4.5 INPUT VOLTAGE (V) 4 3.5 3 2.5 2 VOUT = 3.3V L = 10μH f = 800kHz 1 10 100 LOAD CURRENT (mA) 1000 3682 G22 Minimum Input Voltage 6.5 40 35 6 INPUT VOLTAGE (V) 30 VIN (V) 5.5 25 20 Maximum VIN for Full Frequency TA = 85˚C 5 TA = 25˚C 15 VOUT = 5V L = 10μH f = 800kHz 1 10 100 LOAD CURRENT (mA) 1000 3682 G23 4.5 10 5 VOUT = 3.3V L = 10μH f = 800kHz SYNC = 3.3V 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 LOAD CURRENT(A) 1 4 3682 G24 Maximum VIN for Full Frequency 40 35 30 VIN (V) VIN (V) 25 20 TA = 25˚C 15 10 5 VOUT = 5V L = 10μH f = 800kHz SYNC = 5V 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 LOAD CURRENT(A) 1 15 10 5 TA = 85˚C 40 35 30 Maximum VIN for Full Frequency 2.5 TA = 25˚C 2 TA = 85˚C 25 20 VC VOLTAGE (V) VC Voltages CURRENT LIMIT CLAMP 1.5 1 SWITCHING THRESHOLD 0.5 VOUT = 5V L = 4.7μH f = 2MHz SYNC =5V 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 LOAD CURRENT(A) 1 0 50 25 0 25 50 75 TEMPERATURE(°C) 100 125 3682 G25 3682 G26 3682 G27 3682f 6 LT3682 TYPICAL PERFORMANCE CHARACTERISTICS Power Good Threshold 95 VSW 5V/DIV TA = 25°C, unless otherwise noted. Switching Waveforms; Burst Mode THRESTHOLD VOLTAGE (%) 90 85 IL 0.2A/DIV VOUT 20mV/DIV 3682 G29 80 5μs/DIV 70 VIN = 12V; FRONT PAGE APPLICATION ILOAD = 5mA 50 25 0 25 50 75 TEMPERATURE(°C) 100 125 3682 G28 Switching Waveforms; Transition from Burst Mode to Full Frequency VSW 5V/DIV VSW 5V/DIV IL 0.5A/DIV VOUT 20mV/DIV 3682 G30 Switching Waveforms; Full Frequency Continuous Operation IL 0.2A/DIV VOUT 20mV/DIV 1μs/DIV VIN = 12V; FRONT PAGE APPLICATION ILOAD = 55mA 1μs/DIV VIN = 12V; FRONT PAGE APPLICATION ILOAD = 500mA 3682 G31 3682f 7 LT3682 PIN FUNCTIONS VC (Pin 1): The VC pin is the output of the internal error amplifier. The voltage on this pin controls the peak switch current. Tie an RC network from this pin to ground to compensate the control loop. FB (Pin 2): The LT3682 regulates the FB pin to 0.8V. Connect the feedback resistor divider tap to this pin. PG (Pin 3): The PG pin is the open collector output of an internal comparator. PG remains low until the FB pin is within 10% of the final regulation voltage. PG output is valid when VIN is above the minimum input voltage and RUN/SS is high. GND (Pin 4): The GND pin is the ground of all the internal circuitry. Tie directly to the local GND plane. BD (Pin 5): This pin connects to the anode of the boost Schottky diode. BD also supplies current to the LT3682’s internal regulator. BOOST (Pin 6): This pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar NPN power switch. Connect a capacitor (typically 0.22μF) between BOOST and SW. DA (Pin 7): Connect the anode of the catch diode (D1 in Block Diagram) to this pin. Internal circuitry senses the current through the catch diode providing frequency foldback in extreme situations. SW (Pin 8): The SW pin is the output of the internal power switch. Connect this pin to the inductor, catch diode and boost capacitor. RUN/SS (Pin 9): The RUN/SS pin is used to put the LT3682 in shutdown mode. Tie to ground to shut down the LT3682. Tie to 2.5V or more for normal operation. RUN/SS also provides a soft-start function; see the Applications Information section for more information. RT (Pin 10): Oscillator Resistor Input. Connect a resistor from this pin to ground to set the switching frequency. SYNC (Pin 11): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to 0.8V or more for pulse skipping mode operation. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster than 1μs. Note that the maximum load current depends on which mode is chosen. See the Applications Information section for more information. VIN (Pin 12): The VIN pin supplies current to the LT3682’s internal regulator and to the internal power switch. This pin must be locally bypassed. Exposed Pad (Pin 13): PGND. This is the power ground used by the catch diode (D1) when its anode is connected to the DA pin. The exposed pad must be soldered to the PCB. 3682f 8 LT3682 BLOCK DIAGRAM VIN C1 12 VIN OVLO INTERNAL 0.8V REF SLOPE COMP R OUT S Q 10 RT 11 9 3 RT OSCILLATOR 250kHz-2.2MHz OUTB SYNC RUN/SS PG SYNC SOFT START ERROR AMP + – GND 0.720V + – FB R1 4 2 R2 + – BURST MODE DETECT VC CLAMP THERMAL SHUTDOWN BD 5 BOOST 6 C3 L1 8 D1 C2 VOUT SW DISABLE DA 7 + – VC 1 CC RC PGND 13 CF 3682 BD 3682f 9 LT3682 OPERATION The LT3682 is a constant frequency, current mode step-down regulator. An oscillator, with frequency set by RT, enables an RS flip-flop, turning on the internal power switch. An amplifier and comparator monitor the current flowing between the VIN and SW pins, turning the switch off when this current reaches a level determined by the voltage at VC. An error amplifier measures the output voltage through an external resistor divider tied to the FB pin and servos the VC pin. If the error amplifier’s output increases, more current is delivered to the output; if it decreases, less current is delivered. An active clamp on the VC pin provides current limit. The VC pin is also clamped to the voltage on the RUN/SS pin; soft-start is implemented by generating a voltage ramp at the RUN/SS pin using an external resistor and capacitor. An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the VIN pin, but if the BD pin is connected to an external voltage higher than 3V, bias power will be drawn from the external source (typically the regulated output voltage). This improves efficiency. The RUN/SS pin is used to place the LT3682 in shutdown, disconnecting the output and reducing the input current to less than 1μA. The switch driver operates from either the input or from the BOOST pin. An external capacitor and the internal boost diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to fully saturate the internal bipolar NPN power switch for efficient operation. To further optimize efficiency, the LT3682 automatically switches to Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 75μA in a typical application. The oscillator reduces the LT3682’s operating frequency when the voltage at the FB pin is low. This frequency foldback helps to control the output current during startup and overload conditions. Internal circuitry monitors the current flowing through the catch diode via the DA pin and delays the generation of new switch pulses if this current is too high (above 1.6A nominal). This mechanism also protects the part during short-circuit and overload conditions by keeping the current through the inductor under control. The LT3682 contains a power good comparator which trips when the FB pin is at 90% of its regulated value. The PG output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high. Power good is valid when the LT3682 is enabled and VIN is above the minimum input voltage. The LT3682 has an overvoltage protection feature which disables switching action when the VIN goes above 39V typical (36V minimum) during transients. When switching is disabled, the LT3682 can safely sustain transient input voltages up to 60V. 3682f 10 LT3682 APPLICATIONS INFORMATION FB Resistor Network The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the resistor values according to: ⎛V ⎞ R1= R2 ⎜ OUT − 1⎟ ⎝ 0.8 V ⎠ Reference designators refer to the Block Diagram. 1% resistors are recommended to maintain output voltage accuracy. Setting the Switching Frequency The LT3682 uses a constant frequency PWM architecture that can be programmed to switch from 250kHz to 2.2MHz by using a resistor tied from the RT pin to ground. A table showing the necessary RT value for a desired switching frequency is in Figure 1. SWITCHING FREQUENCY (MHz) 0.25 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.2 1.4 1.6 1.8 2.0 2.2 RT VALUE (kΩ) 158 127 90.9 71.5 57.6 47.5 40.2 34 29.4 22.6 18.2 14.7 12.1 9.76 8.06 operation is that smaller inductor and capacitor values may be used. The disadvantages are lower efficiency, lower maximum input voltage, and higher dropout voltage. The highest acceptable switching frequency (fSW(MAX)) for a given application can be calculated as follows: fSW(MAX ) = VOUT + VD tON(MIN)( VIN − VSW + VD ) where VIN is the typical input voltage, VOUT is the output voltage, VD is the catch diode drop (~0.5V) and VSW is the internal switch drop (~0.5V at max load). This equation shows that slower switching frequency is necessary to safely accommodate high VIN/VOUT ratio. Also, as shown in the Input Voltage Range section, lower frequency allows a lower dropout voltage. Input voltage range depends on the switching frequency because the LT3682 switch has finite minimum on and off times. An internal timer forces the switch to be off for at least tOFF(MIN) per cycle; This timer has a maximum value of 210ns over temp. On the other hand, delays associated with turning off the power switch dictate the minimum on time tON(MIN) before the switch can be turned off; tON(MIN) has a maximum value of 150ns over temp. The minimum and maximum duty cycles that can be achieved taking minimum on and off times into account are: DCMIN = fSW tON(MIN) DCMAX = 1− fSW tOFF(MIN) where fSW is the switching frequency, the tON(MIN) is the minimum switch on time (150ns), and the tOFF(MIN) is the minimum switch off time (210ns). These equations show that duty cycle range increases when switching frequency is decreased. A good choice of switching frequency should allow adequate input voltage range (see Input Voltage Range section) and keep the inductor and capacitor values small. Input Voltage Range The minimum input voltage is determined by either the LT3682’s minimum operating voltage of ~3.6V (VBD > 3V) or by its maximum duty cycle (see equation in Operating 3682f Figure 1. Switching Frequency vs. RT Value Operating Frequency Tradeoffs Selection of the operating frequency is a tradeoff between efficiency, component size, minimum dropout voltage, and maximum input voltage. The advantage of high frequency 11 LT3682 APPLICATIONS INFORMATION Frequency Tradeoffs section). The minimum input voltage due to duty cycle is: VIN(MIN) = VOUT + VD −V +V 1− fSW tOFF(MIN) D SW even exceed the maximum current limit of the LT3682, especially in those cases where the switch already operates at minimum on time. The circuitry monitoring the current through the catch diode via the DA pin prevents the switch from turning on again if the inductor valley current is above 1.6A nominal. In these cases, the inductor peak current is therefore the maximum current limit of the LT3682 plus the additional current overshoot during the turn off delay due to minimum on time: IL(PEAK ) = 2A + VIN(MAX ) − VOUTOL L • tON(MIN) where VIN(MIN) is the minimum input voltage, and tOFF(MIN) is the minimum switch off time (210ns). Note that higher switching frequency will increase the minimum input voltage. If a lower dropout voltage is desired, a lower switching frequency should be used. The maximum input voltage for LT3682 applications depends on switching frequency, the Absolute Maximum Ratings of the VIN and BOOST pins, and the operating mode. The LT3682 can operate from continuous input voltages up to 36V. Input voltage transients of up to 60V are also safely withstood. However, note that while VIN>VOVLO (39V typical), the LT3682 will stop switching, allowing the output to fall out of regulation. For a given application where the switching frequency and the output voltage are already fixed, the maximum input voltage that guarantees optimum output voltage ripple for that application can be found by applying the following expression: VIN(MAX ) = VD + VOUT −V +V fSW tON(MIN) D SW where IL(PEAK) is the peak inductor current, VIN(MAX) is the maximum expected input voltage, L is the inductor value, tON(MIN) is the minimum on time and VOUTOL is the output voltage under the overload condition. The part is robust enough to survive prolonged operation under these conditions as long as the peak inductor current does not exceed 3.5A. Inductor current saturation and excessive junction temperature may further limit performance. If the output is in regulation and no short-circuit, startup, or overload events are expected, then input voltage transients of up to VOVLO are acceptable regardless of the switching frequency. In this case, the LT3682 may enter pulse skipping operation where some switching pulses are skipped to maintain output regulation. In this mode the output voltage ripple and inductor current ripple will be higher than in normal operation. Input voltage transients above VOVLO and up to 60V can be tolerated. However, since the part will stop switching during these transients, the output will fall out of regulation and the output capacitor may eventually be completely discharged. This case must be treated then as a start-up condition as soon as VIN returns to values below VOVLO and the part starts switching again. Inductor Selection and Maximum Output Current A good first choice for the inductor value is: L = ( VOUT + VD) • 1.8 fSW where VIN(MAX) is the maximum operating input voltage, VOUT is the output voltage, VD is the catch diode drop (~0.5V), VSW is the internal switch drop (~0.5V at max load), fSW is the switching frequency (set by RT), and tON(MIN) is the minimum switch on time (~150ns). Note that a higher switching frequency will reduce the maximum operating input voltage. Conversely, a lower switching frequency will be necessary to achieve optimum operation at high input voltages. Special attention must be paid when the output is in startup, short-circuit, or other overload conditions. In these cases, the LT3682 tries to bring the output in regulation by driving lots of current into the output load. During these events, the inductor peak current might easily reach and 3682f 12 LT3682 APPLICATIONS INFORMATION where fSW is the switching frequency in MHz, VOUT is the output voltage, VD is the catch diode drop (~0.5V) and L is the inductor value in μH. The inductor’s RMS current rating must be greater than the maximum load current and its saturation current should be about 30% higher. To keep the efficiency high, the series resistance (DCR) should be less than 0.1Ω, and the core material should be intended for high frequency applications. Table 1 lists several vendors and suitable types. For robust operation in fault conditions (start-up or short circuit) and high input voltage (>30V), the saturation current should be chosen high enough to ensure that the inductor peak current does not exceed 3.5A. For example, an application running from an input voltage of 36V using a 10μH inductor with a saturation current of 2.5A will tolerate the mentioned fault conditions. The optimum inductor for a given application may differ from the one indicated by this simple design guide. A larger value inductor provides a higher maximum load current and reduces the output voltage ripple. If your load is lower than the maximum load current, then you can relax the value of the inductor and operate with higher ripple current. This allows you to use a physically smaller inductor, or one with a lower DCR resulting in higher efficiency. Be aware that if the inductance differs from the simple rule above, then the maximum load current will depend on input voltage. In addition, low inductance may result in discontinuous mode operation, which further reduces maximum load current. For details of maximum output current and discontinuous mode operation, see Linear Technology’s Application Note 44. Finally, for duty cycles greater than 50% (VOUT/VIN > 0.5), a minimum inductance is required to avoid sub-harmonic oscillations: L MIN = ( VOUT + VD) • 1.2 fSW The current in the inductor is a triangle wave with an average value equal to the load current. The peak inductor and switch current is: I SW(PEAK ) = IL(PEAK ) = IOUT(MAX ) + ΔIL 2 where IL(PEAK) is the peak inductor current, IOUT(MAX) is the maximum output load current, and ΔIL is the inductor ripple current. The LT3682 limits its switch current in order to protect itself and the system from overload faults. Therefore, the maximum output current that the LT3682 will deliver depends on the switch current limit, the inductor value and the input and output voltages. When the switch is off, the potential across the inductor is the output voltage plus the catch diode drop. This gives the peak-to-peak ripple current in the inductor: ΔIL = (1− DC) •( VOUT + VD) L • fSW where fSW is the switching frequency of the LT3682, DC is the duty cycle and L is the value of the inductor. To maintain output regulation, the inductor peak current must be less than the LT3682’s switch current limit ILIM. If SYNC pin is grounded ILIM is at least 1.45A at low duty cycles and decreases to 1.1A at DC = 90%. If SYNC pin is tied to 0.8V or more or if it is tied to a clock source for synchronization ILIM is at least 1.18A at low duty cycles and decreases to 0.85A at DC = 90%. The maximum output current is also a function of the chosen inductor value and can be approximated by the following expressions depending on the SYNC pin configuration: For SYNC pin grounded: IOUT(MAX ) = ILIM − ΔIL ΔI = 1.45A •(1− 0.24 • DC) − L 2 2 3682f 13 LT3682 APPLICATIONS INFORMATION For SYNC pin tied to 0.8V or more, or tied to a clock source for synchronization: ΔIL ΔI = 1.18 A •(1− 0.29 • DC) − L 2 2 Choosing an inductor value so that the ripple current is small will allow a maximum output current near the switch current limit. IOUT(MAX ) = ILIM − Table 1. Inductor Vendors VENDOR Murata TDK Toko URL www.murata.com PART SERIES LQH55D TYPE Open Shielded Shielded Shielded Shielded Shielded Open Shielded Shielded Open Shielded Shielded Open necessary. This can be provided with a lower performance electrolytic capacitor. Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input capacitor is required to reduce the resulting voltage ripple at the LT3682 and to force this very high frequency switching current into a tight local loop, minimizing EMI. A 2.2μF capacitor is capable of this task, but only if it is placed close to the LT3682 (see the PCB Layout section for more information). A second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT3682. A ceramic input capacitor combined with trace or cable inductance forms a high-Q (underdamped) tank circuit. If the LT3682 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT3682’s voltage rating. For details see Application Note 88. Output Capacitor and Output Ripple The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT3682 to produce the DC output. In this role it determines the output ripple, and low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and stabilize the LT3682’s control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. A good starting value is: COUT = 50 VOUT fSW www.componenttdk.com SLF7045 SLF10145 www.toko.com D62CB D63CB D73C D75F MSS7341 MSS1038 CR54 CDRH74 CDRH6D38 CR75 Coilcraft Sumida www.coilcraft.com www.sumida.com One approach to choosing the inductor is to start with the simple rule given above, look at the available inductors, and choose one to meet cost or space goals. Then use these equations to check that the LT3682 will be able to deliver the required output current. Note again that these equations assume that the inductor current is continuous. Discontinuous operation occurs when IOUT is less than ΔIL/2. Input Capacitor Bypass the input of the LT3682 circuit with a ceramic capacitor of X7R or X5R type. Y5V types have poor performance over temperature and applied voltage, and should not be used. A 2.2μF to 10μF ceramic capacitor is adequate to bypass the LT3682 and will easily handle the ripple current. Note that larger input capacitance is required when a lower switching frequency is used. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be where fSW is in MHz, and COUT is the recommended output capacitance in μF Use X5R or X7R types. This . choice will provide low output ripple and good transient response. Transient performance can be improved with a higher value capacitor if the compensation network is also adjusted to maintain the loop bandwidth. A lower value of output capacitor can be used to save space and cost but transient performance will suffer. See the Frequency Compensation section to choose an appropriate compensation network. 3682f 14 LT3682 APPLICATIONS INFORMATION Table 2. Capacitor Vendors VENDOR Panasonic PHONE (714) 373-7366 URL www.panasonic.com PART SERIES Ceramic, Polymer, Tantalum Ceramic, Tantalum Ceramic, Polymer, Tantalum Ceramic Ceramic, Tantalum Ceramic TPS Series COMMENTS EEF Series Kemet Sanyo (864) 963-6300 (408)749-9714 www.kemet.com www.sanyovideo.com T494, T495 POSCAP Murata AVX Taiyo Yuden (408)436-1300 www.murata.com www.avxcorp.com (864)963-6300 www.taiyo-yuden.com When choosing a capacitor, look carefully through the data sheet to find out what the actual capacitance is under operating conditions (applied voltage and temperature). A physically larger capacitor, or one with a higher voltage rating, may be required. High performance tantalum or electrolytic capacitors can be used for the output capacitor. Low ESR is important, so choose one that is intended for use in switching regulators. The ESR should be specified by the supplier, and should be 0.05Ω or less. Such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low ESR. Table 2 lists several capacitor vendors. Diode Selection The catch diode (D1 from block diagram) conducts current only during switch off time. Average forward current in normal operation can be calculated from: ID( AVG) = IOUT •(1− DC) where DC is the duty cycle. The only reason to consider a diode with larger current rating than necessary for nominal operation is for the case of shorted or overloaded output conditions. For the worst case of shorted output the diode average current will then increase to a value that depends on the following internal parameters: switch current limit, catch diode (DA pin) current threshold and minimum on-time. The worst case (taking maximum values for the above mentioned parameters) is given by the following expression: 1V ID( AVG)MAX = 2A + • IN • 150ns 2L Peak reverse voltage is equal to the regulator input voltage if it is below the overvoltage protection threshold. This feature keeps the switch off for VIN > OVLO (41V maximum). For inputs up to the maximum operating voltage of 36V, use a diode with a reverse voltage rating greater than the input voltage. If transients at the input of up to 60V are expected, use a diode with a reverse voltage rating only higher than the maximum OVLO of 41V. Table 3 lists several Schottky diodes and their manufacturers. If operating at high ambient temperatures, consider using a Schottky with low reverse leakage. Audible Noise Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can sometimes cause problems when used with the LT3682 due to their piezoelectric nature. When in Burst Mode operation, the LT3682’s switching frequency depends on the load current, and at very light loads the LT3682 can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT3682 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet. If this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. 3682f 15 LT3682 APPLICATIONS INFORMATION Table 3. Schottky Diodes PART NUMBER On Semiconducor MBR0520L MBR0540 MBRM120E MBRM140 Diodes Inc. B0530W B0540W B120 B130 B140 B150 B220 B230 B140HB DFLS240L DFLS140 B240 CMSH1 – 40M CMSH1 – 60M CMSH1 – 40ML CMSH2 – 40M CMSH2 – 60M CMSH2 – 40L CMSH2 – 40 CMSH2 – 60 30 40 20 30 40 50 20 30 40 40 40 40 40 60 40 40 60 40 40 60 0.5 0.5 1 1 1 1 2 2 1 2 1.1 2 1 1 1 2 2 2 2 2 500 700 400 550 700 400 500 700 510 500 500 620 500 500 500 700 500 500 VC 3Meg VR (V) 20 40 20 40 IAVE (A) 0.5 0.5 1 1 VF at 1A (mV) VF at 2A (mV) 620 530 550 595 compensation is provided by the components tied to the VC pin, as shown in Figure 2. Generally a capacitor (CC) and a resistor (RC) in series to ground are used. In addition, there may be a lower value capacitor in parallel. This capacitor (CF) is used to filter noise at the switching frequency, and is required only if a phase-lead capacitor (CPL) is used or if the output capacitor has high ESR. LT3682 CURRENT MODE POWER STAGE gm = 1.25S SW R1 CPL OUTPUT FB gm = 420μS CF RC CC Figure 2. Model for Loop Response Central Semiconductor Frequency Compensation The LT3682 uses current mode control to regulate the output. This simplifies loop compensation. In particular, the LT3682 does not require the ESR of the output capacitor for stability, so you are free to use ceramic capacitors to achieve low output ripple and small circuit size. Frequency Loop compensation determines the stability and transient performance. Optimizing the design of the compensation network depends on the application and type of output capacitor. A practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the compensation network to optimize the performance. Stability should then be checked across all operating conditions, including load current, input voltage and temperature. The LT1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. Figure 2 shows an equivalent circuit for the LT3682 control loop. The error amplifier is a transconductance amplifier with finite output impedance. The power section, consisting of the modulator, power switch and inductor, is modeled as a transconductance amplifier generating an output current proportional to the voltage at the VC pin. Note that the output capacitor integrates this current, and that the 16 – + GND 0.8V ESR + POLYMER OR TANTALUM R2 OR ELECTROLITIC 3682 F02 C1 C1 CERAMIC 3682f LT3682 APPLICATIONS INFORMATION capacitor on the VC pin (CC) integrates the error amplifier output current, resulting in two poles in the loop. In most cases a zero is required and comes from either the output capacitor ESR or from a resistor RC in series with CC. This simple model works well as long as the value of the inductor is not too high and the loop crossover frequency is much lower than the switching frequency. A phase lead capacitor (CPL) across the feedback divider may improve the transient response. Figure 3 shows the transient response when the load current is stepped from 300mA to 650mA and back to 300mA. the output power is delivered to the load by the output capacitor. Because the LT3682 delivers power to the output with single, low current pulses, the output ripple is kept below 15mV for a typical application. In addition, VIN and BD quiescent currents are reduced to typically 35μA and 55μA respectively during the sleep time. As the load current decreases towards a no load condition, the percentage of time that the LT3682 operates in sleep mode increases and the average input current is greatly reduced resulting in high efficiency even at very low loads. (See Figure 4). At higher output loads (above about 70mA for the front page application) the LT3682 will be running at the frequency programmed by the RT resistor, and will be operating in standard PWM mode. The transition between PWM and Low Ripple Burst Mode is seamless, and will not disturb the output voltage. If low quiescent current is not required, tie SYNC high to select pulse-skip mode. The benefit of this mode is that the LT3682 will enter full frequency standard PWM operation at a lower output load current than when in Burst Mode. The front page application circuit will switch at full frequency at output loads higher than about 30mA. The maximum load current that the LT3682 can supply is reduced when SYNC is high. VOUT 100mV/DIV ILOAD 0.5A/DIV 20μs/DIV 3682 F03 Figure 3. Transient Load Response of the LT3682. 3.3VOUT Typical Application with VIN = 12V as the Load Current is Stepped from 300mA to 650mA. Low Ripple Burst Mode and Pulse-Skip Mode The LT3682 is capable of operating in either Low Ripple Burst Mode or Pulse-Skip Mode which are selected using the SYNC pin. See the Synchronization section for more information. To enhance efficiency at light loads, the LT3682 can be operated in Low Ripple Burst Mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode operation, the LT3682 delivers single cycle bursts of current to the output capacitor followed by sleep periods where VSW 5V/DIV IL 0.2A/DIV VOUT 20mV/DIV 3682 F04 5μs/DIV VIN = 12V; FRONT PAGE APPLICATION ILOAD = 5mA Figure 4. Burst Mode Operation 3682f 17 LT3682 APPLICATIONS INFORMATION BOOST and BD Pin Considerations Capacitor C3 and the internal boost Schottky diode (see the Block Diagram) are used to generate a boost voltage that is higher than the input voltage. In most cases a 0.22μF capacitor will work well. Figure 5 shows three ways to arrange the boost circuit. The BOOST pin must be more than 2.3V above the SW pin for best efficiency. For outputs of between 3V and 8V, the standard circuit (Figure 5a) is best. For outputs between 2.8V and 3V, use a 1μF boost capacitor. A 2.5V output presents a special case because it is marginally adequate to support the boosted drive stage while using the internal boost diode. For reliable BOOST pin operation with 2.5V outputs use a good external Schottky diode (such as the ON Semi MBR0540), and a 1μF boost capacitor (see Figure 5b). For lower output voltages the boost diode can be tied to the input (Figure 5c), or to another supply greater than 2.8V. Keep in mind that a minimum input voltage of 4.3V is required if the voltage at the BD pin is smaller than 3V. Tying BD to VIN reduces the maximum input voltage to 25V. The circuit in Figure 5a is more efficient because the BOOST pin current and BD pin quiescent current come from a lower voltage source. You must also be sure that the maximum voltage ratings of the BOOST and BD pins are not exceeded. As mentioned, a minimum of 2.5V across the BOOST capacitor is required for proper operation of the internal BOOST circuitry to provide the base current for the power NPN switch. For BD pin voltages higher than 3V, the excess voltage across the BOOST capacitor does not bring an increase in performance but dissipates additional power in the internal BOOST circuitry instead. The BOOST circuitry tolerates reasonable amounts of power, however excessive power dissipation on this circuitry may impair reliability. For reliable operation, use no more than 8V on the BD pin for the circuit in Figure 5a. For higher output voltages, make sure that there is no more than 8V at the BD pin either by connecting it to another available supply higher than 3V or by using a Zener diode between VOUT and BD to maintain the BD pin voltage between 3V and 8V. The minimum operating voltage of an LT3682 application is limited by the minimum input voltage and by the maximum duty cycle as outlined previously. For proper startup, the minimum input voltage is also limited by the boost circuit. If the input voltage is ramped slowly, or the LT3682 is turned on with its RUN/SS pin when the output VOUT BD BOOST VIN VIN LT3682 SW D1 C3 DA GND PGND (5a) For VOUT > 2.8V; VIN(MIN) = 4.3V if VOUT < 3V VOUT BD BOOST VIN VIN LT3682 SW D1 C3 D2 DA GND PGND (5b) For 2.5V < VOUT < 2.8V; VIN(MIN) = 4.3V VOUT BOOST VIN VIN LT3682 SW D1 C3 BD DA GND PGND (5c) For VOUT < 2.5V; VIN(MAX) = 25V 3682 F05 Figure 5. Three Circuits For Generating The Boost Voltage 3682f 18 LT3682 APPLICATIONS INFORMATION is already in regulation, then the boost capacitor may not be fully charged. Because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. This minimum load will depend on input and output voltages, and on the arrangement of the boost circuit. The minimum load generally goes to zero once the circuit has started. Figure 6 shows a plot of minimum load to start and to run as a function of input voltage. In many 6 5.5 5 INPUT VOLTAGE (V) 4.5 4 3.5 3 2.5 2 1 TO RUN VOUT = 3.3V TA = 25˚C L = 10μH f = 800kHz 10 100 LOAD CURRENT (mA) 1000 TO START (WORST CASE) cases the discharged output capacitor will present a load to the switcher, which will allow it to start. The plots show the worst-case situation where VIN is ramping very slowly. For lower start-up voltage, the boost diode can be tied to VIN; however, this restricts the input range to one-half of the absolute maximum rating of the BOOST pin. At light loads, the inductor current becomes discontinuous and the effective duty cycle can be very high. This reduces the minimum input voltage to approximately 300mV above VOUT. At higher load currents, the inductor current is continuous and the duty cycle is limited by the maximum duty cycle of the LT3682, requiring a higher input voltage to maintain regulation. Soft-Start The RUN/SS pin can be used to soft-start the LT3682, reducing the maximum input current during start-up. The RUN/SS pin is driven through an external RC network to create a voltage ramp at this pin. Figure 7 shows the startup and shut-down waveforms with the soft-start circuit. By choosing a large RC time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. Choose the value of the resistor so that it can supply 20μA when the RUN/SS pin reaches 2.5V. 8 7.5 7 INPUT VOLTAGE (V) 6.5 6 5.5 5 TO RUN 4.5 4 3.5 3 2.5 2 1 VOUT = 5V TA = 25˚C L = 10μH f = 800kHz 10 100 LOAD CURRENT(mA) 1000 3682 F06 TO START (WORST CASE) VRUN 5V/DIV RUN 15k RUN/SS 0.22μF GND VOUT 5V/DIV IL 1A/DIV 5ms/DIV 3682 F07 VRUN/SS 5V/DIV Figure 6. The Minimum Input Voltage Depends on Output Voltage, Load Current and Boost Circuit Figure 7. To Soft-Start the LT3682, Add a Resistor and Capacitor to the RUN/SS Pin 3682f 19 LT3682 APPLICATIONS INFORMATION Synchronization To select Low Ripple Burst Mode operation, tie the SYNC pin below 0.3V (this can be ground or a logic output). Synchronizing the LT3682 oscillator to an external frequency can be done by connecting a square wave (with 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys that are below 0.3V and peaks that are above 0.8V (up to 6V). The LT3682 will not enter Burst Mode at low output loads while synchronized to an external clock, but instead will skip pulses to maintain regulation. The maximum load current that the part can supply is reduced when a clock signal is applied to SYNC. The LT3682 may be synchronized over a 300kHz to 2.2MHz range. The RT resistor should be chosen to set the LT3682 switching frequency 20% below the lowest synchronization input. For example, if the synchronization signal will be 360kHz, the RT should be chosen for 300kHz. To assure reliable and safe operation the LT3682 will only synchronize when the output voltage is near regulation as indicated by the PG flag. It is therefore necessary to choose a large enough inductor value to supply the required output current at the frequency set by the RT resistor. See the Inductor Selection section for more information. It is also important to note that slope compensation is set by the RT value: to avoid subharmonics, calculate the minimum inductor value using the frequency determined by RT. Shorted and Reversed Input Protection If the inductor is chosen so that it won’t saturate excessively, the LT3682 will tolerate a shorted output. When operating in short-circuit condition, the LT3682 will reduce its frequency until the valley current is at a typical value of 1.6A (see Figure 8). There is another situation to consider in systems where the output will be held high when the input to the LT3682 is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode OR-ed with the LT3682’s output. If the VIN pin is allowed to float and the RUN/SS pin is held high (either by a logic signal or because it is tied to VIN), then the LT3682’s internal circuitry will pull its quiescent current through its SW pin. This is fine if your system can tolerate a few mA in this state. If you ground the RUN/SS pin, the SW pin current will drop to essentially zero. However, if the VIN pin is grounded while the output is held high, then parasitic diodes inside the LT3682 can pull large currents from the output through the SW pin and the VIN pin. Figure 9 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. D4 MBRS140 VIN VSW 20V/DIV IL 500mA/DIV 0V VIN LT3682 RUN/SS VC SW VOUT BD BOOST DA GND PGND FB BACKUP 0A 2μs/DIV 3682 F08 3682 F09 Figure 8. The LT3682 Reduces its Frequency to Protect Against Shorted Output with 36V Input Figure 9. Diode D4 Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The LT3682 Runs Only When the Input is Present 3682f 20 LT3682 APPLICATIONS INFORMATION PCB Layout For proper operation and minimum EMI, care must be taken during printed circuit board layout. Figure 10 shows the recommended component placement with trace, ground plane and via locations. Note that large, switched currents flow in the LT3682’s VIN, SW and PGND pins, the catch diode and the input capacitor (CIN). The loop formed by these components should be as small as possible. These components, along with the inductor and output capacitor (COUT), should be placed on the same side of the circuit board, and their connections should be made on that layer. All connections to GND should be made at a common star ground point or directly to a local, unbroken ground plane below these components. The SW and BOOST nodes should be laid out carefully to avoid interference. If the part is synchronized externally using the SYNC pin, care must be taken laying out this signal to avoid interference with sensitive nodes, especially VC, FB, and RT. Finally, keep the FB, RT, and VC nodes small so that the ground traces will shield them from the SW and BOOST nodes. The exposed pad Pin 13 on the bottom of the package acts as a heat sink and must be soldered to the ground node. To keep thermal resistance low, extend the ground plane as much as possible and add thermal vias under and near the LT3682 to any additional ground planes within the circuit board and on the bottom side. Keep in mind that the thermal design must keep the junctions of the IC below the specified absolute maximum temperature of 125°C. High Temperature Considerations The PCB must provide heat sinking to keep the LT3682 cool. The exposed pad on the bottom of the package must be soldered to a copper area, which in turn should be tied to large copper layers below with thermal vias; these layers will spread the heat dissipated by the LT3682. Place additional vias to reduce thermal resistance further. With these steps, the thermal resistance from die (or junction) to ambient can be reduced to θJA = 35°C/W or less. With 100 LFPM airflow, this resistance can fall by another 25%. Further increases in airflow will lead to lower thermal resistance. Because of the large output current capability of VOUT L C2 D1 GND C1 VIN GND 3682 F10 Figure 10. A Good PCB Layout Ensures Proper, Low EMI Operation the LT3682, it is possible to dissipate enough heat to raise the junction temperature beyond the absolute maximum of 125°C. When operating at high ambient temperatures, the maximum load current should be derated as the ambient temperature approaches these maximums. If the junction temperature reaches the thermal shutdown threshold, the part will stop switching to prevent internal damage due to overheating. Power dissipation within the LT3682 can be estimated by calculating the total power loss from an efficiency measurement. The die temperature is calculated by multiplying the LT3682 power dissipation by the thermal resistance from junction to ambient. Other Linear Technology Publications Application Notes 19, 35 and 44 contain more detailed descriptions and design information for buck regulators and other switching regulators. The LT1376 data sheet has a more extensive discussion of output ripple, loop compensation and stability testing. Design Note 318 shows how to generate a bipolar output supply using a buck regulator. 3682f 21 LT3682 TYPICAL APPLICATIONS 5V Step-Down Converter VIN 6.9V TO 36V TRANSIENT TO 60V ON OFF 2.2μF 16.2k 40.2k 470pF f = 800kHz VOUT 5V 0.9A, VIN 6.9V 1A, VIN 12V 0.22μF VC RT PG SYNC GND FB PGND 102k 3682 TA02 VIN RUN/SS BD BOOST SW DA D1 B150 536k L 10μH LT3682 10μF 3.3V Step-Down Converter VIN 4.8V TO 28.5V TRANSIENT TO 60V ON OFF 2.2μF 14k 40.2k 470pF f = 800kHz VOUT 3.3V 0.9A, VIN 4.8V 1A, VIN 6.5V 0.22μF VC RT PG SYNC GND FB PGND 102k 3682 TA03 VIN RUN/SS BD BOOST SW DA D1 B150 316k L 10μH LT3682 10μF 1.8V Step-Down Converter VIN 3.6V TO 25V VIN ON OFF 4.7μF 17.4k 71.5k 330pF f = 500kHz RUN/SS VC RT PG SYNC GND FB PGND 102k 3682 TA04 BD BOOST 0.22μF SW DA D1 B140 127k 22μF L 6.8μH VOUT 1.8V 1A LT3682 3682f 22 LT3682 PACKAGE DESCRIPTION DD Package 12-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1725 Rev A) 0.70 0.05 3.50 0.05 2.10 0.05 2.38 0.05 1.65 0.05 PACKAGE OUTLINE 0.25 0.05 0.45 BSC 2.25 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.115 TYP 7 0.40 12 0.10 3.00 0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 2.38 0.10 1.65 0.10 PIN 1 NOTCH R = 0.20 OR 0.25 45 CHAMFER 0.05 6 0.200 REF 0.75 0.05 2.25 REF 0.00 – 0.05 1 0.23 0.45 BSC (DD12) DFN 0106 REV A BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD AND TIE BARS SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3682f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LT3682 TYPICAL APPLICATIONS 5V, 2MHz Step-Down Converter VIN 10V TO 16.5V TRANSIENT TO 36V ON OFF 2.2μF 13.3k 9.76k 680pF f = 2MHz VOUT 5V 0.9A L 4.7μH VIN RUN/SS VC RT PG SYNC GND BD BOOST 0.22μF SW DA FB PGND 102k 3682 TA05 LT3682 D1 B140 536k 10μF RELATED PARTS PART NUMBER LT1766 LT1767 LT1933 LT1936 LT1940 LT1976/LT1967 LT3434/LT3435 LT3437 LT3480 LT3481 LT3493 LT3505 LT3508 LT3684 LT3685 DESCRIPTION 60V, 1.2A (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter 25V, 1.2A (IOUT), 1.2MHz High Efficiency Step-Down DC/DC Converter 500mA (IOUT), 500kHz Step-Down DC/DC Converter 36V, 1.4A (IOUT), 500kHz High Efficiency Step-Down DC/DC Converter Dual 25A, 1.4A (IOUT), 1.1MHz, High Efficiency Step-Down DC/DC Converter 60V, 1.2A (IOUT), 200kHz/500kHz, High Efficiency Step-Down DC/DC Converters with Burst Mode Operation 60V, 2.4A (IOUT), 200kHz/500kHz, High Efficiency Step-Down DC/DC Converters with Burst Mode Operation 60V, 400mA (IOUT), Micropower Step-Down DC/DC Converter with Burst Mode Operation COMMENTS VIN = 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP16E Package VIN = 3V to 25V, VOUT(MIN) = 1.2V, IQ = 1mA, ISD < 6μA, MS8E Package VIN = 3.6V to 36V, VOUT(MIN) = 1.2V, IQ = 1.6mA, ISD < 1μA, TM ThinSOT Package VIN = 3.6V to 36V, VOUT(MIN) = 1.2V, IQ = 1.9mA, ISD < 1μA, MS8E Package VIN = 3.6V to 25V, VOUT(MIN) = 1.2V, IQ = 3.8mA, ISD < 30μA, TSSOP16E Package VIN = 3.3V to 60V, VOUT(MIN) = 1.2V, IQ = 100μA, ISD < 1μA, TSSOP16E Package VIN = 3.3V to 60V, VOUT(MIN) = 1.2V, IQ = 100μA, ISD < 1μA, TSSOP16 Package VIN = 3.3V to 60V, VOUT(MIN) = 1.25V, IQ = 100μA, ISD < 1μA, 3mm × 3mm DFN10 and TSSOP16E Packages 36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz, High VIN = 3.6V to 38V, VOUT(MIN) = 0.78V, IQ = 70μA, ISD < 1μA, Efficiency Step-Down DC/DC Converter with Burst Mode Operation 3mm × 3mm DFN10 and MSOP10E Packages 34V with Transient Protection to 36V, 2A (IOUT), 2.8MHz, High VIN = 3.6V to 34V, VOUT(MIN) = 1.26V, IQ = 50μA, ISD < 1μA, Efficiency Step-Down DC/DC Converter with Burst Mode Operation 3mm × 3mm DFN10 and MSOP10E Packages 36V, 1.4A (IOUT), 750kHz High Efficiency Step-Down DC/DC Converter 36V with Transient Protection to 40V, 1.4A (IOUT), 3MHz, High Efficiency Step-Down DC/DC Converter 36V with Transient Protection to 40V, Dual 1.4A (IOUT), 3MHz, High Efficiency Step-Down DC/DC Converter 34V with Transient Protection to 36V, 2A (IOUT), 2.8MHz, High Efficiency Step-Down DC/DC Converter 36V with Transient Protection to 60V, Dual 2A (IOUT), 2.4MHz, High Efficiency Step-Down DC/DC Converter VIN = 3.6V to 36V, VOUT(MIN) = 0.8V, IQ = 1.9mA, ISD < 1μA, 2mm × 3mm DFN8 and MSOP8E Packages VIN = 3.6V to 34V, VOUT(MIN) = 0.78V, IQ = 2mA, ISD = 2μA, 3mm × 3mm DFN6 Package VIN = 3.7V to 37V, VOUT(MIN) = 0.8V, IQ = 4.6mA, ISD = 1μA, 4mm × 4mm QFN24 and TSSOP16E Packages VIN = 3.6V to 34V, VOUT(MIN) = 1.26V, IQ = 850mA, ISD < 1μA, 3mm × 3mm DFN10 and MSOP10E Packages VIN = 3.6V to 38V, VOUT(MIN) = 0.78V, IQ = 70mA, ISD < 1μA, 3mm × 3mm DFN10 and MSOP10E Packages 3682f ThinSOT is a trademark of Linear Technology Corporation. 24 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 1208 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008