LT3756EMSE-TRPBF

LT3756/LT3756-1 100VIN, 100VOUT LED Controller FEATURES n n n n n n n n n n n n n n n n DESCRIPTION The LT®3756 and LT3756-1 are DC/DC controllers designed to operate as a constant-current source for driving high current LEDs. They drive a low side external N-channel power MOSFET from an internal regulated 7V supply. The fixed frequency, current-mode architecture results in stable operation over a wide range of supply and output voltages. A ground referenced voltage FB pin serves as the input for several LED protection features, and also makes it possible for the converter to operate as a constant-voltage source. A frequency adjust pin allows the user to program the frequency from 100kHz to 1MHz to optimize efficiency, performance or external component size. The LT3756/LT3756-1 sense output current at the high side of the LED string. High side current sensing is the most flexible scheme for driving LEDs, allowing boost, buck mode or buck-boost mode configuration. The PWM input provides LED dimming ratios of up to 3000:1, and the CTRL input provides additional analog dimming capability. Both parts are available in the 16-lead QFN (3mm × 3mm) and MSOP packages. LT, LTC and LTM are registered trademarks of Linear Technology Corporation. True Color PWM is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 7199560 and 7321203. 3000:1 True Color PWMTM Dimming Wide Input Voltage Range: 6V to 100V Output Voltage Up to 100V Constant-Current and Constant-Voltage Regulation 100mV High Side Current Sense Drives LEDs in Boost, Buck Mode, Buck-Boost Mode, SEPIC or Flyback Topology Adjustable Frequency: 100kHz to 1MHz Open LED Protection Programmable Undervoltage Lockout with Hysteresis Open LED Status Pin (LT3756) Frequency Synchronization (LT3756-1) PWM Disconnect Switch Driver CTRL Pin Provides Analog Dimming Low Shutdown Current: 1.2V or ILED = VCTRL –100mV/(10 • RLED). Input bias current is typically 20μA. Below 3V, ISN is an input to the short-circuit protection feature that forces GATE to 0V if ISN is more than 150mV (typ) below ISP . ISP (Pin 4/Pin 14): Connection Point for the Positive Terminal of the Current Feedback Resistor. Input bias current for this pin is typically 30μA. ISP is an input to the shortcircuit protection feature when ISP is less than 3.1V. VC (Pin 5/Pin 15): Transconductance Error Amplifier Output Pin Used to Stabilize the Voltage Loop with an RC Network. This pin is high impedance when PWM is low, a feature that stores the demand current state variable for the next PWM high transition. Connect a capacitor between this pin and GND; a resistor in series with the capacitor is recommended for fast transient response. CTRL (Pin 6/Pin 16): Current Sense Threshold Adjustment Pin. Regulating threshold VISP – VISN is 1/10th VCTRL plus an offset. CTRL linear range is from GND to 1.1V. Connect CTRL to VREF for the 100mV default threshold. Do not leave this pin open. VREF (Pin 7/Pin 1): Voltage Reference Output Pin, Typically 2V. This pin drives a resistor divider for the CTRL pin, either for analog dimming or for temperature limit/compensation of LED load. Can supply up to 100μA. PWM (Pin 8/Pin 2): A signal low turns off switcher, idles oscillator and disconnects VC pin from all internal loads. PWMOUT pin follows PWM pin. PWM has an internal pull-down resistor. If not used, connect to INTVCC. OPENLED (Pin 9/Pin 3, LT3756 Only): An open-drain pull-down on OPENLED asserts if the FB input is greater than the FB regulation threshold minus 50mV (typical). To function, the pin requires an external pull-up resistor. When the PWM input is low and the DC/DC converter is idle, the OPENLED condition is latched to the last valid state when the PWM input was high. When PWM input goes high again, the OPENLED pin will be updated. This pin may be used to report an open LED fault. SYNC (Pin 9/Pin 3, LT3756-1 Only): The SYNC pin is used to synchronize the internal oscillator to an external logic level signal. The RT resistor should be chosen to program an internal switching frequency 20% slower than the SYNC pulse frequency. Gate turn-on occurs a fixed delay after the rising edge of SYNC. For best PWM performance, the PWM rising edge should occur at least 200ns before the SYNC rising edge. Use a 50% duty cycle waveform to drive this pin. This pin replaces OPENLED on LT3756-1 option parts. If not used, tie this pin to GND. SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates oscillator frequency and compensation pin voltage (VC) clamp. The soft-start interval is set with an external capacitor. The pin has a 10μA (typical) pull-up current source to an internal 2.5V rail. The soft-start pin is reset to GND by an undervoltage condition (detected by SHDN/UVLO pin) or thermal limit. RT (Pin 11/Pin 5): Switching Frequency Adjustment Pin. Set the frequency using a resistor to GND (for resistor values, see the Typical Performance curve or Table 1). Do not leave the RT pin open. SHDN/UVLO (Pin 12/Pin 6): Shutdown and Undervoltage Detect Pin. An accurate 1.22V falling threshold with externally programmable hysteresis detects when power is OK to enable switching. Rising hysteresis is generated by the external resistor divider and an accurate internal 2μA 37561f 7 LT3756/LT3756-1 PIN FUNCTIONS pull-down current. Above the 1.24V (nominal) threshold (but below 6V), SHDN/UVLO input bias current is subμA. Below the falling threshold, a 2μA pull-down current is enabled so the user can define the hysteresis with the external resistor selection. An undervoltage condition resets soft-start. Tie to 0.4V, or less, to disable the device and reduce VIN quiescent current below 1μA. Do not tie SHDN/UVLO to a voltage higher than VIN. INTVCC (Pin 13/Pin 7): Regulated Supply for Internal Loads, GATE Driver and PWMOUT Driver. Supplied from VIN and regulates to 7V (typical). INTVCC must be bypassed with a 4.7μF capacitor placed close to the pin. Connect INTVCC directly to VIN if VIN is always less than or equal to 7V. VIN (Pin 14/Pin 8): Input Supply Pin. Must be locally bypassed with a 0.22μF (or larger) capacitor placed close to the IC. SENSE (Pin 15/Pin 9): The current sense input for the control loop. Kelvin connect this pin to the positive terminal of the switch current sense resistor, RSENSE, in the source of the NFET. The negative terminal of the current sense resistor should be connected to the GND plane close to the IC. GATE (Pin 16/Pin 10): N-Channel FET Gate Driver Output. Switches between INTVCC and GND. Driven to GND during shutdown, fault or idle states. Exposed Pad (Pin 17/Pin 17): Ground. This pin also serves as current sense input for control loop, sensing negative terminal of current sense resistor. Solder the Exposed Pad directly to ground plane. BLOCK DIAGRAM 1.22V 2μA A5 10μA AT FB = 1.25V SCILMB SHDN 1.3V OVFB COMPARATOR 1.25V 1.25V SHORT-CIRCUIT DETECT + gm – + – ISN ISP CTRL 150mV + A10 – 5k 10μA SCILMB gm EAMP 10μA AT A1+ = A1– + A1 – Q2 + A2 – R S PWM COMPARATOR 1.1V + + A3 – CTRL BUFFER VC SSCLAMP 50k FAULT LOGIC TSD 10μA 1.25V 100kHz TO 1MHz OSCILLATOR RAMP GENERATOR VREF 140μA + + – 1.2V FREQ PROG FB A7 2V SS RT SYNC (LT3756-1 ONLY) 37561 BD 8 + – + – + – + – SHDN/UVLO A6 FB VC PWMOUT PWM LDO VIN A8 7V INTVCC Q DRIVER ISENSE GATE A4 + – SENSE GND OPENLED (LT3756 ONLY) + – 37561f LT3756/LT3756-1 OPERATION The LT3756 is a constant-frequency, current mode controller with a low side NMOS gate driver. The GATE pin and PWMOUT pin drivers, and other chip loads, are powered from INTVCC, which is an internally regulated supply. In the discussion that follows, it will be helpful to refer to the Block Diagram of the IC. In normal operation, with the PWM pin low, the GATE and PWMOUT pins are driven to GND, the VC pin is high impedance to store the previous switching state on the external compensation capacitor, and the ISP and ISN pin bias currents are reduced to leakage levels. When the PWM pin transitions high, the PWMOUT pin transitions high after a short delay. At the same time, the internal oscillator wakes up and generates a pulse to set the PWM latch, turning on the external power MOSFET switch (GATE goes high). A voltage input proportional to the switch current, sensed by an external current sense resistor between the SENSE and GND input pins, is added to a stabilizing slope compensation ramp and the resulting “switch current sense” signal is fed into the positive terminal of the PWM comparator. The current in the external inductor increases steadily during the time the switch is on. When the switch current sense voltage exceeds the output of the error amplifier, labeled “VC”, the latch is reset and the switch is turned off. During the switch off phase, the inductor current decreases. At the completion of each oscillator cycle, internal signals such as slope compensation return to their starting points and a new cycle begins with the set pulse from the oscillator. Through this repetitive action, the PWM control algorithm establishes a switch duty cycle to regulate a current or voltage in the load. The VC signal is integrated over many switching cycles and is an amplified version of the difference between the LED current sense voltage, measured between ISP and ISN, and the target difference voltage set by the CTRL pin. In this manner, the error amplifier sets the correct peak switch current level to keep the LED current in regulation. If the error amplifier output increases, more current is demanded in the switch; if it decreases, less current is demanded. The switch current is monitored during the on-phase and the voltage across the SENSE pin is not allowed to exceed the current limit threshold of 108mV (typical). If the SENSE pin exceeds the current limit threshold, the SR latch is reset regardless of the output state of the PWM comparator. Likewise, at an ISP/ISN common mode voltage less than 3V, the difference between ISP and ISN is monitored to determine if the output is in a short-circuit condition. If the difference between ISP and ISN is greater than 150mV (typical), the SR latch will be reset regardless of the PWM comparator. These functions are intended to protect the power switch, as well as various external components in the power path of the DC/DC converter. In voltage feedback mode, the operation is similar to that described above, except the voltage at the VC pin is set by the amplified difference of the internal reference of 1.25V (nominal) and the FB pin. If FB is lower than the reference voltage, the switch current will increase; if FB is higher than the reference voltage, the switch demand current will decrease. The LED current sense feedback interacts with the FB voltage feedback so that FB will not exceed the internal reference and the voltage between ISP and ISN will not exceed the threshold set by the CTRL pin. For accurate current or voltage regulation, it is necessary to be sure that under normal operating conditions, the appropriate loop is dominant. To deactivate the voltage loop entirely, FB can be connected to GND. To deactivate the LED current loop entirely, the ISP and ISN should be tied together and the CTRL input tied to VREF . Two LED specific functions featured on the LT3756 are controlled by the voltage feedback pin. First, when the FB pin exceeds a voltage 50mV lower (–4%) than the FB regulation voltage, the pull-down driver on the OPENLED pin is activated. This function provides a status indicator that the load may be disconnected and the constant-voltage feedback loop is taking control of the switching regulator. When the FB pin exceeds the FB regulation voltage by 60mV (5% typical), the PWMOUT pin is driven low, ignoring the state of the PWM input. In the case where the PWMOUT pin drives a disconnect NFET, this action isolates the LED load from GND, preventing excessive current from damaging the LEDs. If the FB input exceeds both the open LED and the overvoltage (OV) thresholds, then an externally driven overvoltage event has caused the FB pin to be too high and the OPENLED pull-down will be deactivated and locked out until the FB pin drops below both thresholds. 37561f 9 LT3756/LT3756-1 APPLICATIONS INFORMATION INTVCC Regulator Bypassing and Operation The INTVCC pin requires a capacitor for stable operation and to store the charge for the large GATE switching currents. Choose a 10V rated low ESR, X7R or X5R ceramic capacitor for best performance. The value of the capacitor is determined primarily by the stability of the regulator rather than the gate charge, QG, of the switching NMOS—a 4.7μF capacitor will be adequate for many applications. Place the capacitor close to the IC to minimize the trace length to the INTVCC pin and also to the IC ground. An internal current limit on the INTVCC output protects the LT3756 from excessive on-chip power dissipation. The minimum value of this current should be considered when choosing the switching NMOS and the operating frequency. IINTVCC can be calculated from the following equation: IINTVCC = QG • fOSC Careful choice of a lower QG FET will allow higher switching frequencies, leading to smaller magnetics. The INTVCC pin has its own undervoltage disable (UVLO) set to 4.3V (typical) to protect the external FETs from excessive power dissipation caused by not being fully enhanced. If the INTVCC pin drops below the UVLO threshold, the GATE and PWMOUT pins will be forced to 0V and the soft-start pin will be reset. If the input voltage, VIN, will not exceed 7V, then the INTVCC pin should be connected to the input supply. Be aware that a small current (typically less than 10μA) will load the INTVCC in shutdown. If VIN is normally above, but occasionally drops below the INTVCC regulation voltage, then the minimum operating VIN will be close to 6V . This value is determined by the dropout voltage of the linear regulator and the 4.5V (4.3V typical) INTVCC undervoltage lockout threshold mentioned above. Programming the Turn-On and Turn-Off Thresholds with the SHDN/UVLO Pin The falling UVLO value can be accurately set by the resistor divider. A small 2μA pull-down current is active when SHDN/UVLO is below the 1.24V threshold. The purpose of this current is to allow the user to program the rising hysteresis. The following equations should be used to determine the values of the resistors: VIN,FALLING = 1.24 • R1 + R2 R2 VIN,RISING HYST = 2μA • R1 VIN LT3756 SHDN/UVLO R2 3756 F01 R1 Figure 1 LED Current Programming The LED current is programmed by placing an appropriate value current sense resistor between the ISP and ISN pins. Typically, sensing of the current should be done at the top of the LED string. If this option is not available, then the current may be sensed at the bottom of the string, but take caution that the minimum ISN value does not fall below 3V, which is the lower limit of the LED current regulation function. The CTRL pin should be tied to a voltage higher than 1.1V to get the full-scale 100mV (typical) threshold across the sense resistor. The CTRL pin can also be used to dim the LED current to zero, although relative accuracy decreases with the decreasing voltage sense threshold. When the CTRL pin voltage is less than 1.1V, the LED current is: ILED = VCTRL − 100mV RLED • 10 37561f 10 LT3756/LT3756-1 APPLICATIONS INFORMATION When VCTRL is higher than 1.1V, the LED current is regulated to: ILED = 100mV RLED operation will not exceed 1.1V. For an LED driver of buck or a buck-boost configuration, the output voltage is typically level-shifted to a signal with respect to GND as illustrated in Figure 3. The output can be expressed as: VOUT = VBE + 1.25 • R1 R2 The LED current programming feature can increase total dimming range by a factor of 10. The CTRL pin should not be left open (tie to VREF if not used). The CTRL pin can also be used in conjunction with a thermistor to provide overtemperature protection for the LED load, or with a resistor divider to VIN to reduce output power and switching current when VIN is low. The presence of a time varying differential voltage signal (ripple) across ISP and ISN at the switching frequency is expected. The amplitude of this signal is increased by high LED load current, low switching frequency and/or a smaller value output filter capacitor. Some level of ripple signal is acceptable: the compensation capacitor on the VC pin filters the signal so the average difference between ISP and ISN is regulated to the user-programmed value. Ripple voltage amplitude (peak-to-peak) in excess of 20mV should not cause misoperation, but may lead to noticeable offset between the average value and the user-programmed value. Programming Output Voltage (Constant-Voltage Regulation) or Open LED/Overvoltage Threshold For a boost or SEPIC application, the output voltage can be set by selecting the values of R1 and R2 (see Figure 2) according to the following equation: VOUT = 1.25 • R1 + R2 R2 ISP/ISN Short-Circuit Protection Feature The ISP and ISN pins have a protection feature independent of the LED current sense feature that operates at ISN below 3V. The purpose of this feature is to provide continuous current sensing when ISN is below the LED current sense common mode range (during start-up or an output short-circuit fault) to prevent the development of excessive switching currents that could damage the power components. The action threshold (150mV, typ) is above the default LED current sense threshold, so that no interference will occur over the ISN voltage range where these two functions overlap. This feature acts in the same manner as SENSE current limit — it prevents GATE from going high (switch turn-on) until the ISP/ISN difference falls below the threshold. Dimming Control There are two methods to control the current source for dimming using the LT3756. One method uses the CTRL pin to adjust the current regulated in the LEDs. A second method uses the PWM pin to modulate the current source between zero and full current to achieve a precisely programmed average current. To make this method of current control more accurate, the switch demand current is stored on the VC node during the quiescent phase when PWM is low. This feature minimizes recovery time when the PWM R1 For a boost type LED driver, set the resistor from the output to the FB pin such that the expected VFB during normal VIN LT3756 FB R2 3756 F02 + VOUT RSEN(EXT) LED ARRAY R1 LT3756 FB R2 3756 F03 – 100k Figure 2. Feedback Resistor Connection for Boost or SEPIC LED Drivers Figure 3. Feedback Resistor Connection for Buck Mode or Buck-Boost Mode LED Driver 37561f 11 LT3756/LT3756-1 APPLICATIONS INFORMATION signal goes high. To further improve the recovery time, a disconnect switch may be used in the LED current path to prevent the ISP node from discharging during the PWM signal low phase. The minimum PWM on or off time will depend on the choice of operating frequency through the RT input. For best current accuracy, the minimum PWM low or high time should be at least six switching cycles (6μs for fSW = 1MHz). Maximum PWM period is determined by the system and is unlikely to be longer than 12ms. The maximum PWM dimming ratio (PWM(RATIO)) can be calculated from the maximum PWM period (tMAX) and the minimum PWM pulse width (tMIN) as follows: PWMRATIO = tMAX tMIN resistor from the RT pin to GND is required—do not leave this pin open. Table 1. Switching Frequency vs RT Value (1% Resistors) fOSC (kHz) 1000 400 200 100 RT (kΩ) 10 28.7 53.6 100 Duty Cycle Considerations Switching duty cycle is a key variable defining converter operation, therefore, its limits must be considered when programming the switching frequency for a particular application. The fixed minimum on-time and minimum off-time (see Figure 5) and the switching frequency define the minimum and maximum duty cycle of the switch, respectively. The following equations express the minimum/maximum duty cycle: Min Duty Cycle = (minimum on-time) • switching frequency Max Duty Cycle = 1 – (minimum off-time) • switching frequency When calculating the operating limits, the typical values for on/off-time in the data sheet should be increased by at least 100ns to allow margin for PWM control latitude, GATE rise/fall times and SW node rise/fall times. tMAX = 9ms, tMIN = 6μs (fSW = 1MHz) PWMRATIO = 9ms/6μs = 1500:1 Programming the Switching Frequency The RT frequency adjust pin allows the user to program the switching frequency from 100kHz to 1MHz to optimize efficiency/performance or external component size. Higher frequency operation yields smaller component size but increases switching losses and gate driving current, and may not allow sufficiently high or low duty cycle operation. Lower frequency operation gives better performance at the cost of larger external component size. For an appropriate RT resistor value see Table 1 or Figure 4. An external 10000 300 250 MINIMUM ON-TIME SWITCHING FREQUENCY (kHz) 1000 TIME (ns) 200 MINIMUM OFF-TIME 150 100 50 100 10 10 RT (k) 100 37561 F04 0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 37561 F05 Figure 4. Switching Frequency vs RT Figure 5. Typical Minimum On and Off Pulse Width vs Temperature 37561f 12 LT3756/LT3756-1 APPLICATIONS INFORMATION Thermal Considerations The LT3756 and LT3756-1 are rated to a maximum input voltage of 100V. Careful attention must be paid to the internal power dissipation of the IC at higher input voltages to ensure that a junction temperature of 125°C is not exceeded. This junction limit is especially important when operating at high ambient temperatures. The majority of the power dissipation in the IC comes from the supply current needed to drive the gate capacitance of the external power MOSFET. This gate drive current can be calculated as: IGATE = fSW • QG A low QG power MOSFET should always be used when operating at high input voltages, and the switching frequency should also be chosen carefully to ensure that the IC does not exceed a safe junction temperature. The internal junction temperature of the IC can be estimated by: TJ = TA + [VIN (IQ + fSW • QG) • θJA] where TA is the ambient temperature, IQ is the quiescent current of the part (maximum 1.5mA) and θJA is the package thermal impedance (68°C/W for the 3mm × 3mm QFN package). For example, an application with TA(MAX) = 85°C, VIN(MAX) = 60V, fSW = 400kHz, and having a FET with QG = 20nC, the maximum IC junction temperature will be approximately: TJ = 85°C + [60V (1.5mA + 400kHz • 20nC) • 68°C/W] = 124°C The Exposed Pad on the bottom of the package must be soldered to a ground plane. This ground should then be connected to an internal copper ground plane with thermal vias placed directly under the package to spread out the heat dissipated by the IC. Frequency Synchronization (LT3756-1 Only) The LT3756-1 switching frequency can be synchronized to an external clock using the SYNC pin. For proper operation, the RT resistor should be chosen for a switching frequency 20% lower than the external clock frequency. The SYNC pin is disabled during the soft-start period. Observation of the following guidelines about the SYNC waveform will ensure proper operation of this feature. Driving SYNC with a 50% duty cycle waveform is always a good choice, otherwise, maintain the duty cycle between 20% and 60%. When using both PWM and SYNC features, the PWM signal rising edge should occur at least 200ns before the SYNC rising edge (VIH) for optimal PWM performance. If the SYNC pin is not used, it should be connected to GND. Open LED Detection (LT3756 Only) The LT3756 provides an open-drain status pin, OPENLED, that pulls low when the FB pin is within ~50mV of its 1.25V regulated voltage. If the open LED clamp voltage is programmed correctly using the FB pin, then the FB pin should never exceed 1.1V when LEDs are connected, therefore, the only way for the FB pin to be within 50mV of the 1.24V regulation voltage is for an open LED event to have occurred. When an open LED fault occurs, the output may initially overshoot the FB regulation point by several percent, due to slew rate limitations on VC and the absence of any load on the output. In order to ensure the voltage on switching components remains below programmed limits, and to guarantee accurate reporting of the open LED fault, adding a silicon diode between OPENLED and SS is recommended, as well as a 10k resistor in series with the soft-start capacitor, if one is used. Input Capacitor Selection The input capacitor supplies the transient input current for the power inductor of the converter and must be placed and sized according to the transient current requirements. The switching frequency, output current and tolerable input voltage ripple are key inputs to estimating the capacitor value. An X7R type ceramic capacitor is usually the best choice since it has the least variation with temperature and DC bias. Typically, boost and SEPIC converters require a lower value capacitor than a buck mode converter. Assuming that a 100mV input voltage ripple is acceptable, the required capacitor value for a boost converter can be estimated as follows: 1μ F V CIN(μF ) = ILED( A ) • OUT • TSW(μs) • VIN A • μs Therefore, a 4.7μF capacitor is an appropriate selection for a 400kHz boost regulator with 12V input, 48V output and 1A load. 37561f 13 LT3756/LT3756-1 APPLICATIONS INFORMATION With the same VIN voltage ripple of 100mV, the input capacitor for a buck converter can be estimated as follows: 4 . 7 μF CIN(μF ) = ILED( A ) • TSW (μs) • A • μs A 10μF input capacitor is an appropriate selection for a 400kHz buck mode converter with a 1A load. In the buck mode configuration, the input capacitor has large pulsed currents due to the current returned through the Schottky diode when the switch is off. In this buck converter case it is important to place the capacitor as close as possible to the Schottky diode and to the GND return of the switch (i.e., the sense resistor). It is also important to consider the ripple current rating of the capacitor. For best reliability, this capacitor should have low ESR and ESL and have an adequate ripple current rating. The RMS input current for a buck mode LED driver is: IIN(RMS) = ILED • Soft-Start Capacitor Selection For many applications, it is important to minimize the inrush current at start-up. The built-in soft-start circuit significantly reduces the start-up current spike and output voltage overshoot. The soft-start interval is set by the softstart capacitor selection according to the equation: TSS = CSS • 2V 10μA A typical value for the soft-start capacitor is 0.01μF The . soft-start pin reduces the oscillator frequency and the maximum current in the switch. The soft-start capacitor is discharged when SHDN/UVLO falls below its threshold, during an overtemperature event or during an INTVCC undervoltage event. During start-up with SHDN/UVLO, charging of the soft-start capacitor is enabled after the first PWM high period. Power MOSFET Selection For applications operating at high input or output voltages, the power NMOS FET switch is typically chosen for drain voltage VDS rating and low gate charge QG. Consideration of switch on-resistance, RDS(ON), is usually secondary because switching losses dominate power loss. The INTVCC regulator on the LT3756 has a fixed current limit to protect the IC from excessive power dissipation at high VIN, so the FET should be chosen so that the product of QG at 7V and switching frequency does not exceed the INTVCC current limit. For driving LEDs be careful to choose a switch with a VDS rating that exceeds the threshold set by the FB pin in case of an open-load fault. Several MOSFET vendors are listed in Table 3. The MOSFETs used in the application circuits in this datasheet have been found to work well with the LT3756. Consult factory applications for other recommended MOSFETs. Table 3. MOSFET Manufacturers VENDOR Vishay Siliconix Fairchild International Rectifier PHONE 402-563-6866 972-910-8000 310-252-7105 WEB www.vishay.com www.fairchildsemi.com www.irf.com ( 1 – D) • D where D is the switch duty cycle. Table 2. Recommended Ceramic Capacitor Manufacturers MANUFACTURER TDK Kemet Murata Taiyo Yuden PHONE 516-535-2600 408-986-0424 814-237-1431 408-573-4150 WEB www.tdk.com www.kemet.com www.murata.com www.t-yuden.com Output Capacitor Selection The selection of the output capacitor depends on the load and converter configuration, i.e., step-up or step-down and the operating frequency. For LED applications, the equivalent resistance of the LED is typically low and the output filter capacitor should be sized to attenuate the current ripple. Use of an X7R type ceramic capacitor is recommended. To achieve the same LED ripple current, the required filter capacitor is larger in the boost and buck-boost mode applications than that in the buck mode applications. Lower operating frequencies will require proportionately higher capacitor values. 37561f 14 LT3756/LT3756-1 APPLICATIONS INFORMATION Schottky Rectifier Selection The power Schottky diode conducts current during the interval when the switch is turned off. Select a diode rated for the maximum SW voltage. If using the PWM feature for dimming, it is important to consider diode leakage, which increases with the temperature, from the output during the PWM low interval. Therefore, choose the Schottky diode with sufficiently low leakage current. Table 4 has some recommended component vendors. Table 4. Schottky Rectifier Manufacturers VENDOR On Semiconductor Diodes, Inc. Central Semiconductor PHONE 888-743-7826 805-446-4800 631-435-1110 WEB www.onsemi.com www.diodes.com www.centralsemi.com Inductor Selection The inductor used with the LT3756 should have a saturation current rating appropriate to the maximum switch current selected with the RSENSE resistor. Choose an inductor value based on operating frequency, input and output voltage to provide a current mode signal on SENSE of approximately 20mV magnitude. The following equations are useful to estimate the inductor value (TSW = 1/fOSC): LBUCK = TSW • RSENSE • VLED ( VIN – VLED ) VIN • 0.02V TSW • RSENSE • VLED • VIN ( VLED + VIN ) • 0.02V LBUCK-BOOST = LBOOST = Sense Resistor Selection The resistor, RSENSE, between the source of the external NMOS FET and GND should be selected to provide adequate switch current to drive the application without exceeding the 108mV (typical) current limit threshold on the SENSE pin of LT3756. For buck mode applications, select a resistor that gives a switch current at least 30% greater than the required LED current. For buck mode, select a resistor according to: RSENSE,BUCK ≤ 0.07 V ILED TSW • RSENSE • VIN ( VLED – VIN) VLED • 0.02V Table 5 provides some recommended inductor vendors. Table 5. Inductor Manufacturers VENDOR Sumida Würth Elektronik Coiltronics Vishay Coilcraft PHONE 408-321-9660 605-886-4385 561-998-4100 402-563-6866 847-639-6400 WEB www.sumida.com www.we-online.com www.cooperet.com www.vishay.com www.coilcraft.com Loop Compensation VIN • 0.07 V ( VIN + VLED )ILED The LT3756 uses an internal transconductance error amplifier whose VC output compensates the control loop. The external inductor, output capacitor and the compensation resistor and capacitor determine the loop stability. The inductor and output capacitor are chosen based on performance, size and cost. The compensation resistor and capacitor at VC are selected to optimize control loop response and stability. For typical LED applications, a 2.2nF compensation capacitor at VC is adequate, and a series resistor should always be used to increase the slew rate on the VC pin to maintain tighter regulation of LED current during fast transients on the input supply to the converter. For buck-boost, select a resistor according to: RSENSE,BUCK-BOOST ≤ For boost, select a resistor according to: RSENSE,BOOST ≤ VIN • 0.07 V VLED • ILED The placement of RSENSE should be close to the source of the NMOS FET and GND of the LT3756. The SENSE input to LT3756 should be a Kelvin connection to the positive terminal of RSENSE. 37561f 15 LT3756/LT3756-1 APPLICATIONS INFORMATION Board Layout The high speed operation of the LT3756 demands careful attention to board layout and component placement. The Exposed Pad of the package is the only GND terminal of the IC and is also important for thermal management of the IC. It is crucial to achieve a good electrical and thermal contact between the Exposed Pad and the ground plane of the board. To reduce electromagnetic interference (EMI), it is important to minimize the area of the high dV/dt switching node between the inductor, switch drain and anode of the Schottky rectifier. Use a ground plane under the switching node to eliminate interplane coupling to sensitive signals. The lengths of the high dI/dt traces: 1) from the switch node through the switch and sense resistor to GND, and 2) from the switch node through the Schottky rectifier and filter capacitor to GND should be minimized. The ground points of these two switching current traces should come to a common point then connect to the ground plane under the LT3756. Likewise, the ground terminal of the bypass capacitor for the INTVCC regulator should be placed near the GND of the switching path. Typically, this requirement will result in the external switch being closest to the IC, along with the INTVCC bypass capacitor. The ground for the compensation network and other DC control signals should be star connected to the underside of the IC. Do not extensively route high impedance signals such as FB and VC, as they may pick up switching noise. In particular, avoid routing FB and PWMOUT in parallel for more than a few millimeters on the board. Since there is a small variable DC input bias current to the ISN and ISP inputs, resistance in series with these pins should be minimized to avoid creating an offset in the current sense threshold. Likewise, minimize resistance in series with the SENSE input to avoid changes (most likely reduction) to the switch current limit threshold. TYPICAL APPLICATIONS 30W White LED Headlamp Driver with Thermal Derating VIN 8V TO 60V (100V TRANSIENT) 4.7μF 1M VREF 16.9k CTRL INTVCC 100k D2 0.01μF RT VC M1: VISHAY SILICONIX Si7454DP D1: DIODES INC PDS5100 L1: COILTRONICS DR127-220 RT1: MURATA NCP18WM104J M2: VISHAY SILICONIX Si2328DS D2: IN4448HWT 28.7k 400kHz 10k 10k 0.001μF 100k NTC RT1 OPENLED PWM SS ISN GATE SENSE 0.018Ω PWMOUT GND INTVCC 4.7μF 10V M2 3756 TA02a VISP-VISN vs Temperature for NTC Resistor Divider 120 1M 4.7μF VISP – VISN (mV) 100 80 60 40 20 0 25 45 65 85 TEMPERATURE (°C) 105 125 37551 TA02b L1, 22μH VIN SHDN/UVLO FB ISP LT3756 D1 332k 14k 0.27Ω 370mA 30W LED STRING M1 37561f 16 LT3756/LT3756-1 TYPICAL APPLICATIONS Buck-Boost Mode LED Driver VIN 9V TO 65V L1 68μH C1 4.7μF VIN SHDN/UVLO 185k VREF LT3756 CTRL INTVCC 100k ISN GATE SENSE OPENLED PWM SS RT PWMOUT VC GND INTVCC 36.5k 300kHz 4700pF L1: COILCRAFT MSS1038-683 D1: ON SEMICONDUCTOR MBRS3100T3 M1: VISHAY SILICONIX Si2328DS M2: VISHAY SILICONIX Si2328DS M3: ZETEX ZXM6IP03F 39k C2 2.2μF 10V M1 24V TO 32V LED STRING 100mA FB ISP 1Ω 13k D1 VOUT 1M 1μF 100V 1M VIN EFFICIENCY (%) C3 4.7μF 90 100 Efficiency vs VIN 80 70 0.068Ω 60 0.1μF 10k 50 1.5k M3 VIN M2 1k 3756 TA03a 0 20 40 VIN (V) 60 80 37561 TA03b 90% Efficient, 20W SEPIC LED Driver VIN 8V TO 80V L1A 33μH C1 4.7μF 100V 1:1 1M VREF CTRL INTVCC 100k LT3756 ISN GATE OPENLED PWM SENSE SS RT PWMOUT VC GND INTVCC 28.7k 400kHz 10k 30k 0.001μF C2 4.7μF 10V M1 20W LED STRING 84 ISP 0.1Ω 1A VIN SHDN/UVLO 185k FB 25k 511k L1B C4 1μF D1 C3 10μF 2 35V EFFICIENCY (%) 100 Efficiency vs VIN 96 92 88 0.01μF 0.033Ω 80 0 20 40 VIN (V) 60 80 37561 TA04b M2 3756 TA04a L1: COILCRAFT MSD1278T-333 M1: VISHAY SILICONIX Si7430DP D1: ON SEMICONDUCTOR MBRS3200T M2: ZETEX ZXM61N03F 37561f 17 LT3756/LT3756-1 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP Exposed Die Pad , (Reference LTC DWG # 05-08-1667 Rev Ø) BOTTOM VIEW OF EXPOSED PAD OPTION 3.556 (.140 2.845 (.112 1 0.102 .004) 0.102 .004) 8 3.835 (.151 0.102 .004) 0.889 (.035 0.127 .005) 5.23 (.206) MIN 2.159 (.085 0.102 3.20 – 3.45 .004) (.126 – .136) 1.651 (.065 0.102 1.905 .004) (.075 0.102 .004) 0.305 0.038 (.0120 .0015) TYP 0.50 (.0197) BSC 16 4.039 0.102 (.159 .004) (NOTE 3) 9 RECOMMENDED SOLDER PAD LAYOUT 16151413121110 9 0.280 0.076 (.011 .003) REF 0.254 (.010) GAUGE PLANE DETAIL “A” 0 – 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4) 0.53 0.152 (.021 .006) DETAIL “A” 0.18 (.007) 12345678 1.10 (.043) MAX 0.86 (.034) REF SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC 0.1016 (.004 0.0508 .002) MSOP (MSE16) 0907 REV Ø 37561f 18 LT3756/LT3756-1 PACKAGE DESCRIPTION UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) 0.70 ± 0.05 3.50 ± 0.05 1.45 ± 0.05 2.10 ± 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.75 ± 0.05 BOTTOM VIEW—EXPOSED PAD R = 0.115 TYP 15 16 0.40 ± 0.10 1 1.45 ± 0.10 (4-SIDES) 2 PIN 1 NOTCH R = 0.20 TYP OR 0.25 × 45° CHAMFER 3.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) (UD16) QFN 0904 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.25 ± 0.05 0.50 BSC 37561f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT3756/LT3756-1 TYPICAL APPLICATION Buck Mode 1A LED Driver with High Dimming Ratio and Open LED Reporting VIN 24V TO 80V C1 1μF Efficiency vs VIN 100 C3 4.7μF EFFICIENCY (%) 1M 61.9k VREF CTRL PWM VIN SHDN/UVLO ISP 1.5k ISN FB M3 PWMOUT M2 1k 0.1Ω 1A 365k + 22V – 100k 96 92 22.1k 88 INTVCC 100k LT3756 5 WHITE LEDs 20W 84 L1 100μH OPENLED SS GATE SENSE GND INTVCC C2 4.7μF M1: VISHAY SILICONIX Si3430DV D1: DIODES INC B1100/B L1: COILCRAFT MSS1246-101 M2: VISHAY SILICONIX Si2328DS M3: ZETEX ZXM61P03F M1 D1 VIN C4 4.7μF 80 20 30 40 50 VIN (V) 60 70 80 37561 TA05b 0.1μF 10k 28.7k 400kHz RT VC 47k 0.043Ω 0.001μF 3756 TA05a RELATED PARTS PART NUMBER LT3474 LT3475 LT3476 LT3477 LT3478/LT3478-1 LT3486 LT3496 LT3517 LT3518 LT3755/LT3755-1 LTC®3783 DESCRIPTION 36V, 1A (ILED), 2MHz, Step-Down LED Driver Dual 1.5A (ILED), 36V, 2MHz Step-Down LED Driver COMMENTS VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 400:1, ISD < 1μA, TSSOP16E Package VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 3000:1, ISD < 1μA, TSSOP20E Package Quad Output 1.5A, 36V, 2MHz High Current LED Driver VIN: 2.8V to 16V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1, ISD < 10μA, 5mm × 7mm QFN Package with 1000:1 Dimming 3A, 42V, 3MHz Boost, Buck-Boost, Buck LED Driver 4.5A, 42V, 2.5MHz High Current LED Driver with 3000:1 Dimming Dual 1.3A, 2MHz High Current LED Driver Triple 0.75A, 2.1MHz, 45V LED Driver 1.5A, 2.5MHz, 45V LED Driver 2.3A, 2.5MHz, 45V LED Driver 40VIN , 60VOUT, Full Featured LED Controller High Current LED Controller VIN: 2.5V to 25V, VOUT(MAX) = 40V, Dimming = Analog/PWM, ISD < 1μA, QFN and TSSOP20E Packages VIN: 2.8V to 36V, VOUT(MAX) = 42V, True Color PWM Dimming = 3000:1, ISD < 3μA, TSSOP16E Package VIN: 2.5V to 24V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1, ISD < 1μA, 5mm × 3mm DFN and TSSOP16E Packages VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1μA, 4mm × 5mm QFN and TSSOP16E Packages VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1μA, 4mm × 4mm QFN and TSSOP16E Packages VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1μA, 4mm × 4mm QFN and TSSOP16E Packages VIN: 4.5V to 40V, VOUT(MAX) = 60V, True Color PWM Dimming = 3000:1, ISD < 1μA, 3mm × 3mm QFN-16 and MS16E Packages VIN: 3V to 36V, VOUT(MAX) = Ext FET, True Color PWM Dimming = 3000:1, ISD < 20μA, 5mm × 4mm QFN10 and TSSOP16E Packages 37561f 20 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0808 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008