LT3845_1

FEATURES ■ ■ ■ ■ ■ LT3845 High Voltage Synchronous Current Mode Step-Down Controller with Adjustable Operating Frequency DESCRIPTION The LT®3845 is a high voltage, synchronous, current mode controller used for medium to high power, high efficiency supplies. It offers a wide 4V to 60V input range (7.5V minimum start-up voltage). An onboard regulator simplifies the biasing requirements by providing IC power directly from VIN. Burst Mode® operation maintains high efficiency at light loads by reducing IC quiescent current to 120μA. Light load efficiency is also improved with the reverse inductor current inhibit function which supports discontinuous operation. Additional features include adjustable fixed operating frequency that can be synchronized to an external clock for noise sensitive applications, gate drivers capable of driving large N-channel MOSFETs, a precision undervoltage lockout, 10μA shutdown current, short-circuit protection and a programmable soft-start. The LT3845 is available in a 16-lead thermally enhanced TSSOP package and 16-pin through hole N package. L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.. Protected by U.S. Patents, including 5481178, 6611131, 6304066, 6498466, 6580258. ■ ■ ■ ■ ■ ■ ■ ■ ■ High Voltage Operation: Up to 60V Synchronizable Up to 600kHz Adjustable Constant Frequency: 100kHz to 500kHz Output Voltages Up to 36V Adaptive Nonoverlap Circuitry Prevents Switch Shoot-Through Reverse Inductor Current Inhibit for Discontinuous Operation Improves Efficiency with Light Loads Programmable Soft-Start 120μA No Load Quiescent Current 10μA Shutdown Supply Current 1% Regulation Accuracy Standard Gate N-Channel Power MOSFETs Current Limit Unaffected by Duty Cycle Reverse Overcurrent Protection 16-Lead Thermally Enhanced TSSOP Package, 16-Pin PDIP APPLICATIONS ■ ■ ■ ■ 12V and 42V Automotive and Heavy Equipment 48V Telecom Power Supplies Avionics and Industrial Control Systems Distributed Power Converters TYPICAL APPLICATION High Voltage Step-Down Regulator 48V to 12V at 75W VIN 20V TO 55V 100 2.2μF 100V 47μF 63V 82.5k 1500pF 0.1μF 1M VIN SHDN CSS LT3845 BOOST TG SW VCC BG PGND SENSE+ SENSE– SGND 1μF 1N4148 3845 TA01a Efficiency and Power Loss vs Load Current VIN = 48V 7 6 5 4 3 2 LOSS 70 65 0.1 1 0 1 LOAD CURENT (A) 10 3845 TA01b 95 Si7370DP EFFICIENCY(%) 0.01Ω BAS521 Si7370DP 15μH B160 VOUT 12V 75W 33μF ×3 90 85 80 75 POWER LOSS (W) BURST_EN 20k 16.2k 2200pF 143k 49.9k 100pF SYNC fSET VFB VC 3845fd 1 LT3845 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (VIN) ........................................65V Boosted Supply Voltage (BOOST) .............................80V Switch Voltage (SW) (Note 8) ....................... 65V to –2V Differential Boost Voltage (BOOST to SW).....................................................24V Bias Supply Voltage (VCC) .........................................24V SENSE+ and SENSE– Voltages ..................................40V Differential Sense Voltage (SENSE+ to SENSE–)................................... 1V to –1V BURST_EN Voltage ...................................................24V SYNC, VC, VFB, CSS, and SHDN Voltages ....................5V SHDN Pin Currents ..................................................1mA Operating Junction Temperature Range (Note 2) LT3845E (Note 3) ............................... –40°C to 125°C LT3845I .............................................. –40°C to 125°C LT3845MP.......................................... –55°C to 125°C Storage Temperature.............................. –65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C PIN CONFIGURATION TOP VIEW VIN SHDN CSS BURST_EN VFB VC SYNC fSET 1 2 3 4 5 6 7 8 17 16 BOOST 15 TG 14 SW 13 VCC 12 BG 11 PGND 10 SENSE+ 9 SENSE– VFB VC fSET SGND SENSE– SENSE+ PGND BG 1 2 3 4 5 6 7 8 N PACKAGE 16-LEAD PDIP TJMAX = 125°C, θJA = 70°C/W, θJC = 34°C/W TOP VIEW 16 BURST_EN 15 CSS 14 SHDN 13 VIN 12 BOOST 11 TG 10 SW 9 VCC FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 40°C/W, θJC = 10°C/W EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH LT3845EFE#PBF LT3845IFE#PBF LT3845MPFE#PBF LT3845EN#PBF TAPE AND REEL LT3845EFE#TRPBF LT3845IFE#TRPBF LT3845MPFE#TRPBF LT3845EN#TRPBF PART MARKING* 3845FE 3845FE 3845FE 3845N PACKAGE DESCRIPTION 16-Lead Plastic TSSOP 16-Lead Plastic TSSOP 16-Lead Plastic TSSOP 16-Lead PDIP TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C –55°C to 125°C –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3845fd 2 LT3845 ELECTRICAL CHARACTERISTICS PARAMETER VIN Operating Voltage Range (Note 4) VIN Minimum Start Voltage VIN UVLO Threshold (Falling) VIN UVLO Threshold Hysteresis VIN Supply Current VIN Burst Mode Current VIN Shutdown Current BOOST Operating Voltage Range BOOST Operating Voltage Range (Note 5) BOOST UVLO Threshold (Rising) BOOST UVLO Threshold Hysteresis BOOST Supply Current (Note 6) BOOST Burst Mode Current BOOST Shutdown Current VCC Operating Voltage Range (Note 5) VCC Output Voltage VCC UVLO Threshold (Rising) VCC UVLO Threshold Hysteresis VCC Supply Current (Note 6) VCC Burst Mode Current VCC Shutdown Current VCC Current Limit Error Amp Reference Voltage VFB Pin Input Current SHDN Enable Threshold (Rising) SHDN Threshold Hysteresis Sense Pins Common Mode Range Current Limit Sense Voltage Reverse Protect Sense Voltage Reverse Current Inhibit Offset Input Current (ISENSE+ + ISENSE–) VSENSE+ – VSENSE– VSENSE+ – VSENSE–, VBURST_EN = VCC VBURST_EN = 0V or VBURST_EN = VFB VSENSE(CM) = 0V VSENSE(CM) = 2V VSENSE(CM) > 4V ● ● ● ● The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 20V, VCC = BOOST = BURST_EN = 10V, SHDN = 2V, RSET = 49.9kΩ, SENSE – = SENSE+ = 10V, SGND = PGND = SW = SYNC = 0V, unless otherwise noted. CONDITIONS ● ● ● MIN 4 3.6 TYP MAX 60 7.5 4 UNITS V V V mV μA μA μA V V V mV mA μA μA 3.8 670 20 20 9 VCC > 9V VBURST_EN = 0V, VFB = 1.35V VSHDN = 0V VBOOST – VSW VBOOST – VSW VBOOST – VSW VBURST_EN = 0V VSHDN = 0V Over Full Line and Load Range ● ● ● 15 75 20 5 400 1.4 0.1 0.1 ● ● 8 6.25 500 3 100 20 –150 1.231 25 20 8.3 V V V mV mA μA μA mA V V nA V mV V mV mV mV μA μA μA ● 3.7 VBURST_EN = 0V VSHDN = 0V Measured at VFB Pin VFB = 1.231V ● ● –40 1.224 1.215 1.3 0 90 1.238 1.245 1.4 36 115 ● ● ● 1.35 120 100 –100 10 800 –20 –300 Operating Frequency Minimum Programmable Frequency Maximum Programmable Frequency External Sync Frequency Range SYNC Input Resistance SYNC Voltage Threshold Soft-Start Capacitor Control Current Error Amp Transconductance Error Amp DC Voltage Gain Error Amp Sink/Source Current 270 500 100 300 330 100 600 kHz kHz kHz kHz kΩ V μA μS dB μA 40 ● 1.4 2 270 340 62 ±30 2 410 ● 3845fd 3 LT3845 ELECTRICAL CHARACTERISTICS PARAMETER TG, BG Drive On Voltage (Note 7) TG, BG Drive Off Voltage TG, BG Drive Rise/Fall Time Minimum TG Off Time Minimum TG On Time Gate Drive Nonoverlap Time TG Fall to BG Rise BG Fall to TG Rise The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 20V, VCC = BOOST = BURST_EN = 10V, SHDN = 2V, RSET = 49.9kΩ, SENSE – = SENSE+ = 10V, SGND = PGND = SW = SYNC = 0V, unless otherwise noted. CONDITIONS CLOAD = 3300pF CLOAD = 3300pF 10% to 90% or 90% to 10%, CLOAD = 3300pF ● ● MIN TYP 9.8 0.1 50 350 250 200 150 MAX UNITS V V ns 650 400 ns ns ns ns Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3845 includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 3: The LT3845E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the – 40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3845I is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT3845MP is 100% tested and guaranteed over the –55°C to 125°C temperature range. Note 4: VIN voltages below the start-up threshold (7.5V) are only supported when the VCC is externally driven above 6.5V. Note 5: Operating range is dictated by MOSFET absolute maximum VGS. Note 6: Supply current specification does not include switch drive currents. Actual supply currents will be higher. Note 7: DC measurement of gate drive output “ON” voltage is typically 8.6V. Internal dynamic bootstrap operation yields typical gate “ON” voltages of 9.8V during standard switching operation. Standard operation gate “ON” voltage is not tested but guaranteed by design. Note 8: The –2V absolute maximum on the SW pin is a transient condition. It is guaranteed by design and not subject to test. 3845fd 4 LT3845 TYPICAL PERFORMANCE CHARACTERISTICS Shutdown Threshold (Rising) vs Temperature 1.38 SHUTDOWN THRESHOLD, FALLING (V) SHUTDOWN THRESHOLD, RISING (V) 1.37 1.36 1.35 1.34 1.33 1.32 –50 –25 1.26 1.25 1.24 1.23 1.22 1.21 1.20 –50 –25 VCC (V) Shutdown Threshold (Falling) vs Temperature 8.2 8.1 8.0 7.9 7.8 7.7 7.6 VCC vs Temperature ICC = 20mA 0 25 50 75 TEMPERATURE (°C) 100 125 0 25 50 75 TEMPERATURE (°C) 100 125 7.5 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 3845 G01 3845 G02 3845 G03 VCC vs ICC(LOAD) 8.05 TA = 25°C 9 8 8.00 7 VCC (V) 7.95 VCC (V) 6 5 7.90 4 7.85 3 VCC vs VIN ICC = 20mA TA = 25°C ICC CURRENT LIMIT (mA) 225 200 175 150 125 100 75 ICC Current Limit vs Temperature 0 5 10 15 20 25 ICC(LOAD) (mA) 30 35 40 4 5 6 7 8 VIN (V) 9 10 11 12 50 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 3845 G04 3845 G05 3845 G06 VCC UVLO Threshold (Rising) vs Temperature 6.5 VCC UVLO THRESHOLD, RISING (V) 25 ICC vs VCC (SHDN = 0V) ERROR AMP TRANSCONDUCTANCE (μS) TA = 25°C 350 345 340 335 330 325 Error Amp Transconductance vs Temperature 6.4 20 6.2 ICC (μA) 6.3 15 10 6.1 5 6.0 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 0 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 3845 G08 320 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3845 G07 3845 G09 3845fd 5 LT3845 TYPICAL PERFORMANCE CHARACTERISTICS I(SENSE+ + SENSE–) vs VSENSE(CM) 800 600 I(SENSE+ + SENSE–) (μA) 400 200 0 –200 –400 TA = 25°C OPERATING FREQUENCY (kHz) 308 306 304 302 300 298 296 294 292 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VSENSE(CM) (V) 3845 G10 Operating Frequency vs Temperature 1.234 1.233 ERROR AMP REFERENCE (V) 1.232 1.231 1.230 1.229 1.228 Error Amp Reference vs Temperature 290 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 1.227 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3845 G11 3845 G12 Maximum Current Sense Threshold vs Temperature 106 CURRENT SENSE THRESHOLD (mV) VIN UVLO THRESHOLD, RISING (V) 104 102 100 98 96 94 –50 –25 4.54 4.52 4.50 4.48 4.46 4.44 4.42 VIN UVLO Threshold (Rising) vs Temperature 3.86 VIN UVLO THRESHOLD, FALLING (V) 50 25 75 0 TEMPERATURE (°C) 100 125 VIN UVLO Threshold (Falling) vs Temperature 3.84 3.82 3.80 3.78 50 25 75 0 TEMPERATURE (°C) 100 125 4.40 –50 –25 3.76 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3845 G13 3845 G14 3845 G15 3845fd 6 LT3845 PIN FUNCTIONS BG: The BG pin is the gate drive for the bottom N-channel MOSFET. Since very fast high currents are driven from this pin, connect it to the gate of the power MOSFET with a short and wide, typically 0.02" width, PCB trace to minimize inductance. BOOST: The BOOST pin is the supply for the bootstrapped gate drive and is externally connected to a low ESR ceramic boost capacitor referenced to SW pin. The recommended value of the BOOST capacitor, CBOOST, is at least 50 times greater than the total gate capacitance of the topside MOSFET. In most applications 0.1μF is adequate. The maximum voltage that this pin sees is VIN + VCC, ground referred. BURST_EN: Burst Mode Operation Enable Pin. This pin also controls reverse-current inhibit mode of operation. When the pin voltage is below 0.5V, Burst Mode operation and reverse-current inhibit functions are enabled. When the pin voltage is above 0.5V, Burst Mode operation is disabled, but reverse-current inhibit operation is maintained. In this mode of operation (BURST_EN = VFB) there is a 1mA minimum load requirement. Reverse-current inhibit is disabled when the pin voltage is above 2.5V. This pin is typically shorted to ground to enable Burst Mode operation and reverse-current inhibit, shorted to VFB to disable Burst Mode operation while enabling reverse-current inhibit, and connected to VCC pin to disable both functions. See Applications Information section. CSS: The soft-start pin is used to program the supply softstart function. Use the following formula to calculate CSS for a given output voltage slew rate: CSS = 2μA(tSS/1.231V) The pin should be left unconnected when not using the soft-start function. fSET: The fSET pin programs the oscillator frequency with an external resistor, RSET. The resistor is required even when supplying external sync clock signal. See the Applications Information section for resistor value selection details. PGND: The PGND pin is the high-current ground reference for internal low side switch driver and the VCC regulator circuit. Connect the pin directly to the negative terminal of the VCC decoupling capacitor. See the Application Information section for helpful hints on PCB layout of grounds. SENSE–: The SENSE– pin is the negative input for the current sense amplifier and is connected to the VOUT side of the sense resistor for step-down applications. The sensed inductor current limit is set to ±100mV across the SENSE inputs. SENSE+: The SENSE+ pin is the positive input for the current sense amplifier and is connected to the inductor side of the sense resistor for step-down applications. The sensed inductor current limit is set to ±100mV across the SENSE inputs. SGND: The SGND pin is the low noise ground reference. It should be connected to the –VOUT side of the output capacitors. Careful layout of the PCB is necessary to keep high currents away from this SGND connection. See the Application Information section for helpful hints on PCB layout of grounds. SHDN: The SHDN pin has a precision IC enable threshold of 1.35V (rising) with 120mV of hysteresis. It is used to implement an undervoltage lockout (UVLO) circuit. See Application Information section for implementing a UVLO function. When the SHDN pin is pulled below a transistor VBE (0.7V), a low current shutdown mode is entered, all internal circuitry is disabled and the VIN supply current is reduced to approximately 9μA. Typical pin input bias current is VOUT • 2DCMAX – 1 RSENSE • 8.33 • DCMAX fSW balancing the transition losses with the conduction losses is a good idea while the bottom MOSFET is dominated by the conduction loss, which is worse during a short-circit condition or at a very low duty cycle. Calculate the maximum conduction losses of the MOSFETs: PCOND(TOP) = IOUT(MAX)2 • PCOND(BOT) = IOUT(MAX)2 • VOUT •RDS(ON) VIN VIN – VOUT •RDS(ON) VIN The magnetics vendors specify either the saturation current, the RMS current or both. When selecting an inductor based on inductor saturation current, use the peak current through the inductor, IOUT(MAX) + ΔIL/2. The inductor saturation current specification is the current at which the inductance, measured at zero current, decreases by a specified amount, typically 30%. When selecting an inductor based on RMS current rating, use the average current through the inductor, IOUT(MAX). The RMS current specification is the RMS current at which the part has a specific temperature rise, typically 40°C, above 25°C ambient. After calculating the minimum inductance value, the volt-second product, the saturation current and the RMS current for your design, select an off-the-shelf inductor. Contact the Application group at Linear Technology for further support. For more detailed information on selecting an inductor, please see the “Inductor Selection” section of Linear Technology Application Note 44. MOSFET Selection The selection criteria of the external N-channel standard level power MOSFETs include on resistance (RDS(ON)), reverse transfer capacitance (CRSS), maximum drain source voltage (VDSS), total gate charge (QG) and maximum continuous drain current. For maximum efficiency, minimize RDS(ON) and CRSS. Low RDS(ON) minimizes conduction losses while low CRSS minimizes transition losses. The problem is that RDS(ON) is inversely related to CRSS. In selecting the top MOSFET Note that RDS(ON) has a large positive temperature dependence. The MOSFET manufacturer’s data sheet contains a curve, RDS(ON) vs Temperature. In the main MOSFET, transition losses are proportional to VIN2 and can be considerably large in high voltage applications (VIN > 20V). Calculate the maximum transition losses: PTRAN(TOP) = k • VIN2 • IOUT(MAX) • CRSS • fSW where k is a constant inversely related to the gate driver current, approximated by k = 2 for LT3845 applications. The total maximum power dissipations of the MOSFET are: PTOP(TOTAL) = PCOND(MAIN) + PTRAN(MAIN) PBOT(TOTAL) = PCOND(SYNC) To achieve high supply efficiency, keep the total power dissipation in each switch to less than 3% of the total output power. Also, complete a thermal analysis to ensure that the MOSFET junction temperature is not exceeded. TJ = TA + P(TOTAL) • θJA where θJA is the package thermal resistance and TA is the ambient temperature. Keep the calculated TJ below the maximum specified junction temperature, typically 150°C. Note that when VIN is high and fSW is high, the transition losses may dominate. A MOSFET with higher RDS(ON) and lower CRSS may provide higher efficiency. MOSFETs with higher voltage VDSS specification usually have higher RDS(ON) and lower CRSS. 3845fd 15 LT3845 APPLICATIONS INFORMATION Choose the MOSFET VDSS specification to exceed the maximum voltage across the drain to the source of the MOSFET, which is VIN(MAX) plus any additional ringing on the switch node. Ringing on the switch node can be greatly reduced with good PCB layout and, if necessary, an RC snubber. In some applications, parasitic FET capacitances couple the negative going switch node transient onto the bottom gate drive pin of the LT3845, causing a negative voltage in excess of the Absolute Maximum Rating to be imposed on that pin. Connection of a catch Schottky diode from this pin to ground will eliminate this effect. A 1A current rating is typically sufficient of the diode. The internal VCC regulator is capable of sourcing up to 40mA limiting the maximum total MOSFET gate charge, QG, to 35mA/fSW. The QG vs VGS specification is typically provided in the MOSFET data sheet. Use QG at VGS of 8V. If VCC is back driven from an external supply, the MOSFET drive current is not sourced from the internal regulator of the LT3845 and the QG of the MOSFET is not limited by the IC. However, note that the MOSFET drive current is supplied by the internal regulator when the external supply back driving VCC is not available such as during start-up or short circuit. The manufacturer’s maximum continuous drain current specification should exceed the peak switch current, IOUT(MAX) + ΔIL/2. During the supply start-up, the gate drive levels are set by the VCC voltage regulator, which is approximately 8V. Once the supply is up and running, the VCC can be back driven by an auxiliary supply such as VOUT. It is important not to exceed the manufacturer’s maximum VGS specification. A standard level threshold MOSFET typically has a VGS maximum of 20V. Input Capacitor Selection A local input bypass capacitor is required for buck converters because the input current is pulsed with fast rise and fall times. The input capacitor selection criteria are based on the bulk capacitance and RMS current capability. The bulk capacitance will determine the supply input ripple voltage. The RMS current capability is used to prevent overheating the capacitor. The bulk capacitance is calculated based on maximum input ripple, ΔVIN: CIN(BULK) = IOUT(MAX) • VOUT ΔVIN • fSW • VIN(MIN) ΔVIN is typically chosen at a level acceptable to the user. 100mV to 200mV is a good starting point. Aluminum electrolytic capacitors are a good choice for high voltage, bulk capacitance due to their high capacitance per unit area. The capacitor’s RMS current is: ICIN(RMS) = IOUT VOUT (VIN – VOUT ) (VIN )2 If applicable, calculate it at the worst case condition, VIN = 2VOUT. The RMS current rating of the capacitor is specified by the manufacturer and should exceed the calculated ICIN(RMS). Due to their low ESR (Equivalent Series Resistance), ceramic capacitors are a good choice for high voltage, high RMS current handling. Note that the ripple current ratings from aluminum electrolytic capacitor manufacturers are based on 2000 hours of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. The combination of aluminum electrolytic capacitors and ceramic capacitors is an economical approach to meeting the input capacitor requirements. The capacitor voltage rating must be rated greater than VIN(MAX). Multiple capacitors may also be paralleled to meet size or height requirements in the design. Locate the capacitor very close to the MOSFET switch and use short, wide PCB traces to minimize parasitic inductance. Output Capacitor Selection The output capacitance, COUT, selection is based on the design’s output voltage ripple, ΔVOUT and transient load requirements. ΔVOUT is a function of ΔIL and the COUT ESR. It is calculated by: VOUT = IL • ESR + 1 (8 • fSW • COUT ) 3845fd 16 LT3845 APPLICATIONS INFORMATION The maximum ESR required to meet a ΔVOUT design requirement can be calculated by: ESR(MAX) = ( VOUT )(L)(fSW) VOUT • 1– VOUT VIN(MAX) The VFB pin input bias current is typically 25nA, so use of extremely high value feedback resistors could cause a converter output that is slightly higher than expected. Bias current error at the output can be estimated as: ΔVOUT(BIAS) = 25nA • R2 Supply UVLO and Shutdown Worst-case ΔVOUT occurs at highest input voltage. Use paralleled multiple capacitors to meet the ESR requirements. Increasing the inductance is an option to lower the ESR requirements. For extremely low ΔVOUT, an additional LC filter stage can be added to the output of the supply. Application Note 44 has some good tips on sizing an additional output filter. Output Voltage Programming A resistive divider sets the DC output voltage according to the following formula: R2 = R1 VOUT –1 1.231V The SHDN pin has a precision voltage threshold with hysteresis which can be used as an undervoltage lockout threshold (UVLO) for the power supply. Undervoltage lockout keeps the LT3845 in shutdown until the supply input voltage is above a certain voltage programmed by the user. The hysteresis voltage prevents noise from falsely tripping UVLO. Resistors are chosen by first selecting RB. Then RA = RB • VSUPPLY(ON) 1.35V –1 VSUPPLY(ON) is the input voltage at which the undervoltage lockout is disabled and the supply turns on. Example: Select RB = 49.9kΩ, VSUPPLY(ON) = 14.5V (based on a 15V minimum input voltage) R A = 49.9k • = 486.1k use 86.6k 1% 14.5V –1 1.35V (499k resistor is selected) The external resistor divider is connected to the output of the converter as shown in Figure 3. Tolerance of the feedback resistors will add additional error to the output voltage. Example: VOUT = 12V; R1 = 10kΩ R2 = 10k 12V 1 = 87.48k 1.231V L1 VOUT R2 VFB PIN R1 3845 F03 VSUPPLY RA SHDN PIN RB 3845 F04 COUT Figure 3. Output Voltage Feedback Divider Figure 4. Undervoltage Feedback Divider 3845fd 17 LT3845 APPLICATIONS INFORMATION If low supply current in standby mode is required, select a higher value of RB. The supply turn off voltage is 9% below turn on. In the example the VSUPPLY(OFF) would be 13.2V. If additional hysteresis is desired for the enable function, an external positive feedback resistor can be used from the LT3845 regulator output. The shutdown function can be disabled by connecting the SHDN pin to the VIN through a large value pull-up resistor. This pin contains a low impedance clamp at 6V, so the SHDN pin will sink current from the pull-up resistor(RPU): ISHDN = VIN – 6V RPU It is recommended that the SYNC pin be driven with a square wave that has amplitude greater than 2V, pulse width greater than 1μs and rise time less than 500ns. The rising edge of the sync wave form triggers the discharge of the internal oscillator capacitor. The SYNC pin is not available in the N-Package. Minimum On-Time Considerations (Buck Mode) Minimum on-time tON(MIN) is the smallest amount of time that the LT3845 is capable of turning the top MOSFET on and off again. It is determined by internal timing delays and the amount of gate charge required turning on the top MOSFET. Low duty cycle applications may approach this minimum on-time limit and care should be taken to ensure that: t ON = VOUT >t VIN • fSW ON(MIN) Because this arrangement will clamp the SHDN pin to the 6V, it will violate the 5V absolute maximum voltage rating of the pin. This is permitted, however, as long as the absolute maximum input current rating of 1mA is not exceeded. Input SHDN pin currents of