LT5520 1.3GHz to 2.3GHz High Linearity Upconverting Mixer
FEATURES
s s s s s s s s s s s
DESCRIPTIO
Wide RF Output Frequency Range: 1.3GHz to 2.3GHz 15.9dBm Typical Input IP3 at 1.9GHz On-Chip RF Output Transformer No External LO or RF Matching Required Single-Ended LO and RF Operation Integrated LO Buffer: –5dBm Drive Level Low LO to RF Leakage: – 41dBm Typical Wide IF Frequency Range: DC to 400MHz Enable Function with Low Off-State Leakage Current Single 5V Supply Small 16-Lead QFN Plastic Package
The LT®5520 mixer is designed to meet the high linearity requirements of wireless and cable infrastructure transmission applications. A high-speed, internally matched, LO amplifier drives a double-balanced mixer core, allowing the use of a low power, single-ended LO source. An RF output transformer is integrated, thus eliminating the need for external matching components at the RF output, while reducing system cost, component count, board area and system-level variations. The IF port can be easily matched to a broad range of frequencies for use in many different applications. The LT5520 mixer delivers 15.9dBm typical input 3rd order intercept point at 1.9GHz with IF input signal levels of –10dBm. The input 1dB compression point is typically 4dBm. The IC requires only a single 5V supply.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Wireless Infrastructure Cable Downlink Infrastructure Point-to-Point Data Communications High Linearity Frequency Conversion
TYPICAL APPLICATIO
5VDC 1µF 1000pF
39nH EN BPF IF INPUT 4:1 IF + 15pF IF – 220pF 100Ω RF – BPF PA RF OUTPUT RF + 100Ω BIAS VCC1 VCC2 VCC3
POUT, IM3 (dBm/TONE)
220pF
10pF
GND 5pF (OPTIONAL) LO INPUT –5dBm LO+ 85Ω 5pF LO – LT5520
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Figure 1. Frequency Conversion in Wireless Infrastructure Transmitter
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RF Output Power and Output IM3 vs IF Input Power (Two Input Tones)
10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –16 IM3 PLO = –5dBm fLO = 1760MHz fIF1 = 140MHz fIF2 = 141MHz fRF = 1900MHz TA = 25°C 4
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POUT
–12 –4 0 –8 IF INPUT POWER (dBm/TONE)
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LT5520
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
Supply Voltage ....................................................... 5.5V Enable Voltage ............................. –0.3V to (VCC + 0.3V) LO Input Power (Differential) .............................. 10dBm RF+ to RF – Differential DC Voltage...................... ±0.13V RF Output DC Common Mode Voltage ......... –1V to VCC IF Input Power (Differential) ............................... 10dBm IF+, IF – DC Currents .............................................. 25mA LO+ to LO– Differential DC Voltage .......................... ±1V LO Input DC Common Mode Voltage ............ –1V to VCC Operating Temperature Range .................–40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C Junction Temperature (TJ).................................... 125°C
ORDER PART NUMBER
12 GND 11 RF + 10 RF – 9 GND
GND
16 15 14 13 GND 1 IF + 2 IF – 3 GND 4 5 6 7 8 17
GND
LO–
LO+
LT5520EUF
UF PACKAGE 16-LEAD (4mm × 4mm) PLASTIC QFN EXPOSED PAD IS GND (PIN 17), MUST BE SOLDERED TO PCB
UF PART MARKING 5520
VCC1
VCC2
TJMAX = 125°C, θJA = 37°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER IF Input Frequency Range LO Input Frequency Range RF Output Frequency Range CONDITIONS MIN TYP DC to 400 900 to 2700 1300 to 2300 MAX UNITS MHz MHz MHz
1900MHz Application: VCC = 5VDC, EN = High, TA = 25°C, IF input = 140MHz at –10dBm, LO input = 1.76GHz at –5dBm, RF output measured at 1900MHz, unless otherwise noted. Test circuit shown in Figure 2. (Notes 2, 3)
PARAMETER IF Input Return Loss LO Input Return Loss RF Output Return Loss LO Input Power Conversion Gain Input 3rd Order Intercept Input 2nd Order Intercept LO to RF Leakage LO to IF Leakage Input 1dB Compression IF Common Mode Voltage Noise Figure Internally Biased Single Side Band –10dBm/Tone, ∆f = 1MHz –10dBm, Single-Tone CONDITIONS ZO = 50Ω, with External Matching Z O = 50 Ω Z O = 50 Ω MIN TYP 20 16 20 –10 to 0 –1 15.9 45 –41 –35 4 1.77 15 MAX UNITS dB dB dB dBm dB dBm dBm dBm dBm dBm VDC dB
DC ELECTRICAL CHARACTERISTICS
(Test Circuit Shown in Figure 2) VCC = 5VDC, EN = High , TA = 25°C (Note 3), unless otherwise noted.
PARAMETER Enable (EN) Low = Off, High = On Turn-On Time (Note 4) Turn-Off Time (Note 4) Input Current VENABLE = 5VDC 2 6 1 10 µs µs µA
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CONDITIONS
VCC3
EN
MIN
TYP
MAX
UNITS
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LT5520
DC ELECTRICAL CHARACTERISTICS
(Test Circuit Shown in Figure 2) VCC = 5VDC, EN = High , TA = 25°C (Note 3), unless otherwise noted.
PARAMETER Enable = High (On) Enable = Low (Off) Power Supply Requirements (VCC) Supply Voltage Supply Current Shutdown Current VCC = 5VDC EN = Low 4.5 to 5.25 60 1 70 100 VDC mA µA CONDITIONS MIN 3 0.5 TYP MAX UNITS VDC VDC
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: External components on the final test circuit are optimized for operation at fRF = 1900MHz, fLO = 1.76GHz and fIF = 140MHz.
Note 3: Specifications over the –40°C to 85°C temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Turn-On and Turn-Off times are based on the rise and fall times of the RF output envelope from full power to –40dBm with an IF input power of –10dBm.
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
66 64
SUPPLY CURRENT (mA)
62 60 58 56 54 52 50 4.0 4.25 4.5 4.75 5.0 SUPPLY VOLTAGE (V) 5.25 5.5 TA = – 40°C TA = 25°C
SHUTDOWN CURRENT (µA)
TA = 85°C
VCC = 5VDC, EN = High, TA = 25°C, IF input = 140MHz at –10dBm, LO input = 1.76GHz at –5dBm, RF output measured at 1900MHz, unless otherwise noted. For 2-tone inputs: 2nd IF input = 141MHz at –10dBm. (Test Circuit Shown in Figure 2.) Conversion Gain and SSB Noise Figure vs RF Output Frequency
18 16 HIGH SIDE LO 14 12
GAIN, NF (dB)
LOW SIDE LO SSB NF
IIP3 (dBm)
10 8 6 4 2 0 –2 –4 1300 1500 1700 1900 2100 2300 2500 RF OUTPUT FREQUENCY (MHz)
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24 22 20 18 IIP3 LOW SIDE LO HIGH SIDE LO
HIGH SIDE LO
35 30 25 20 15 10 5 2500
LO LEAKAGE (dBm)
GAIN
LOW SIDE AND HIGH SIDE LO
UW
(Test Circuit Shown in Figure 2) Shutdown Current vs Supply Voltage
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 4.0 4.25 TA = 25°C TA = – 40°C 5.25 4.5 4.75 5.0 SUPPLY VOLTAGE (V) 5.5 TA = 85°C
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32 30 28 26
IIP3 and IIP2 vs RF Output Frequency
LOW SIDE LO IIP2
55 50 45 40
IIP2 (dBm)
LO-RF Leakage vs RF Output Frequency
–10
–20
–30 HIGH SIDE LO –40
16 14
–50
LOW SIDE LO
12 1300
1500 1700 1900 2100 2300 RF OUTPUT FREQUENCY (MHz)
–60 1300
1500 1700 1900 2100 2300 RF OUTPUT FREQUENCY (MHz)
2500
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LT5520
VCC = 5VDC, EN = High , TA = 25°C, IF input = 140MHz at –10dBm, LO input = 1.76GHz at –5dBm, RF output measured at 1900MHz, unless otherwise noted. For 2-tone inputs: 2nd IF Input = 141MHz at –10dBm. (Test Circuit Shown in Figure 2.) Conversion Gain and SSB Noise Figure vs LO Input Power
16 14 12 10 GAIN (dB) 8 6 4 2 0 –2 –4 –16 TA = 85°C –12 –8 –4 0 LO INPUT POWER (dBm) 4
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TYPICAL PERFOR A CE CHARACTERISTICS
IIP3 and IIP2 vs LO Input Power
20 TA = 85°C 18 SSB NF 16 14 TA = 25°C TA = –40°C 12 10 8 GAIN TA = –40°C TA = 25°C 6 4 2 0 IIP3, IIP2 (dBm) NF (dB) 50 45 40 35 30 25 20 15 10 5 0 –16 IIP3 TA = 25°C, TA = – 40°C TA = 85°C IIP2 TA = – 40°C TA = 25°C
LO LEAKAGE (dBm)
IIP3 and IIP2 vs LO Input Power
50 LOW SIDE LO 45 40 IIP3, IIP2 (dBm) 35 30 25 20 15 10 5 0 –16 0 –8 –12 –4 LO INPUT POWER (dBm) 4
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POUT, IM3 (dBm/TONE)
–20 –30 –40 –50 –60 –70 –80
POUT, IM2 (dBm/TONE)
IIP2
HIGH SIDE LO
IIP3 HIGH SIDE LO LOW SIDE LO
Conversion Gain vs IF Input Power (One Input Tone)
4 3 2 RETURN LOSS (dB) 1 GAIN (dB) 0 –1 –2 –3 –4 –5 –6 –16 –25 –12 0 –8 –4 IF INPUT POWER (dBm) 4
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TA = – 40°C TA = 25°C TA = 85°C
GAIN (dB)
4
UW
LO-RF Leakage vs LO Input Power
–10
TA = 85°C
–20
–30 TA = – 40°C –40 TA = 25°C –50 TA = 85°C
0 –8 –12 –4 LO INPUT POWER (dBm)
4
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–60 –16
0 –8 –12 –4 LO INPUT POWER (dBm)
4
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RF Output Power and Output IM3 vs IF Input Power (Two Input Tones)
10 0 –10 TA = – 40°C TA = 85°C POUT TA = 25°C 10 0 –10 –20 –30 –40 –50
RF Output Power and Output IM2 vs IF Input Power (Two Input Tones)
TA = – 40°C TA = 85°C POUT TA = – 40°C TA = 25°C
TA = – 40°C IM3
TA = 85°C
IM2 –60 –70
TA = 85°C
TA = 25°C
–90 –16
0 –8 –12 –4 IF INPUT POWER (dBm/TONE)
4
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–80 –16
0 –8 –12 –4 IF INPUT POWER (dBm/TONE)
4
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IF, LO and RF Port Return Loss vs Frequency
0 8 7 –5 6 5 –10 4 3 2 1 0 IF PORT 0 500 RF PORT 1000 1500 2000 FREQUENCY (MHz) 2500 3000 –1
Conversion Gain, IIP3 and IIP2 vs Supply Voltage
50 LOW SIDE LO HIGH SIDE LO 45 40 IIP2 35 30 25 IIP3 HIGH SIDE LO LOW SIDE LO GAIN LOW SIDE AND HIGH SIDE LO 4.25 5.25 4.5 4.75 5.0 SUPPLY VOLTAGE (V) 20 15 10 5 0 5.5 IIP3, IIP2 (dBm)
–15 LO PORT –20
–2 4.0
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LT5520
PI FU CTIO S
GND (Pins 1, 4, 9, 12, 13, 16): Internal Grounds. These pins are used to improve isolation and are not intended as DC or RF grounds for the IC. Connect these pins to low impedance grounds for best performance. IF+, IF – (Pins 2, 3): Differential IF Signal Inputs. A differential signal must be applied to these pins through DC blocking capacitors. The pins must be connected to ground with 100Ω resistors (the grounds must each be capable of sinking about 18mA). For best LO leakage performance, these pins should be DC isolated from each other. An impedance transformation is required to match the IF input to the desired source impedance (typically 50Ω or 75Ω). EN (Pin 5): Enable Pin. When the applied voltage is greater than 3V, the IC is enabled. When the applied voltage is less than 0.5V, the IC is disabled and the DC current drops to about 1µA. VCC1 (Pin 6): Power Supply Pin for the Bias Circuits. Typical current consumption is about 2mA. This pin should be externally connected to VCC and have appropriate RF bypass capacitors. VCC2 (Pin 7): Power Supply Pin for the LO Buffer Circuits. Typical current consumption is about 22mA. This pin should have appropriate RF bypass capacitors as shown in Figure 2. The 1000pF capacitor should be located as close to the pins as possible. VCC3 (Pin 8): Power Supply Pin for the Internal Mixer. Typical current consumption is about 36mA. This pin should be externally connected to VCC through an inductor. A 39nH inductor is used in Figure 2, though the value is not critical. RF –, RF+ (Pins 10, 11): Differential RF Outputs. One pin may be DC connected to a low impedance ground to realize a 50Ω single-ended output. No external matching components are required. A DC voltage should not be applied across these pins, as they are internally connected through a transformer winding. LO+, LO – (Pins 14, 15): Differential Local Oscillator Inputs. The LT5520 works well with a single-ended source driving the LO+ pin and the LO– pin connected to a low impedance ground. No external matching components are required. An internal resistor is connected across these pins; therefore, a DC voltage should not be applied across the inputs. GROUND (Pin 17, Exposed Pad): DC and RF ground return for the entire IC. This must be soldered to the printed circuit board low impedance ground plane.
BLOCK DIAGRA
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BACKSIDE GROUND GND 17 12 GND 13 5pF LO+ 14 85Ω LO – 15 5pF GND 16 HIGH SPEED LO BUFFER
RF + 11
RF – 10
GND 9
8 VCC3 10pF DOUBLEBALANCED MIXER 6 VCC1 BIAS 5 EN
7 VCC2
1 GND
2 IF +
3 IF –
4 GND
5520 BD
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LT5520
TEST CIRCUIT
LOIN 1760MHz 16 1 GND GND IFIN 140MHz 1 2 3 4 C2 R2 R1 T1 5 C3 3 IF – C1 2 IF + LT5520 RF – 10 RFOUT 1900MHz RF + 11 15 LO – 14 LO+ 13 GND 12 GND
REF DES C1, C2 C3 C4 C5 L1 R1, R2 T1
5520 TC01
VALUE 220pF 15pF 1000pF 1µF 39nH 100Ω, 0.1% 4:1
SIZE 0402 0402 0402 0603 0402 0603 SM-22
PART NUMBER AVX 04023C221KAT2A AVX 04023A150KAT2A AVX 04023A102KAT2A Taiyo Yuden LMK107BJ105MA Toko LL1005-FH39NJ IRC PFC-W0603R-03-10R1-B M/A-COM ETC4-1-2
4
0.018" 0.062" 0.018"
ER = 4.4
RF GND DC GND
GND EN 5
VCC1 6
VCC2 7
GND VCC3 8
9
EN VCC C5 C4
L1
Figure 2. Test Schematic for the LT5520
APPLICATIO S I FOR ATIO
The LT5520 consists of a double-balanced mixer, a highperformance LO buffer, and bias/enable circuits. The RF and LO ports may be driven differentially; however, they are intended to be used in single-ended mode by connecting one input of each pair to ground. The IF input ports must be DC-isolated from the source and driven differentially. The IF input should be impedance-matched for the desired input frequency. The LO input has an internal broadband 50Ω match with return loss better than 10dB at frequencies up to 3000MHz. The RF output band ranges from 1300MHz to 2300MHz, with an internal RF transformer providing a 50Ω impedance match across the band. Low side or high side LO injection can be used. IF Input Port The IF inputs are connected to the emitters of the doublebalanced mixer transistors, as shown in Figure 3. These pins are internally biased and an external resistor must be connected from each IF pin to ground to set the current through the mixer core. The circuit has been optimized to work with 100Ω resistors, which will result in approximately 18mA of DC current per side. For best LO leakage performance, the resistors should be well matched; thus
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resistors with 0.1%, tolerance are recommended. If LO leakage is not a concern, then lesser tolerance resistors can be used. The symmetry of the layout is also important for achieving optimum LO isolation. The capacitors shown in Figure 3, C1 and C2, serve two purposes. They provide DC isolation between the IF+ and IF – ports, thus preventing DC interactions that could cause unpredictable variations in LO leakage. They also improve the impedance match by canceling excess inductance in the package and transformer. The input capacitor value required to realize an impedance match at desired frequency, f, can be estimated as follows: C1 = C2 = 1 (2πf)2 (LIN + LEXT ) where; f is in units of Hz, LIN and LEXT are in H, and C1, C2 are in farad. LIN is the differential input inductance of the LT5520, and is approximately 1.67nH. LEXT represents the combined inductances of differential external components and transmission lines. For the evaluation board shown in Figure 10, LEXT = 4.21nH. Thus, for f = 140MHz, the above formula gives C1 = C2 = 220pF.
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LT5520
APPLICATIO S I FOR ATIO
C1 IFIN 50Ω T1 4:1 C3 100Ω 0.1% 2 18mA
VCC
3 C2 100Ω 0.1% 18mA LT5520
5520 F03
Figure 3. IF Input with External Matching
Table 1 lists the differential IF input impedance and reflection coefficient for several frequencies. A 4:1 balun can be used to transform the impedance up to about 50Ω.
Table 1. IF Input Differential Impedance
Frequency (MHz) 10 44 70 140 170 240 360 500 Differential Input Impedance 10.1 + j0.117 10.1 + j0.476 10.1 + j0.751 10.2 + j1.47 10.2 + j1.78 10.2 + j2.53 10.2 + j3.81 10.2 + j5.31 Differential S11 Mag Angle 0.663 0.663 0.663 0.663 0.663 0.663 0.663 0.663 180 179 178 177 176 174 171 167
LO Input Port The simplified circuit for the LO buffer input is shown in Figure 4. The LO buffer amplifier consists of high-speed limiting differential amplifiers, optimized to drive the mixer quad for high linearity. The LO + and LO – ports can be driven differentially; however, they are intended to be driven by a single-ended source. An internal resistor connected across the LO + and LO – inputs provides a broadband 50Ω impedance match. Because of the resistive match, a DC voltage at the LO input is not recommended. If the LO signal source output is not AC coupled, then a DC blocking capacitor should be used at the LO input.
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LOIN 50Ω 14 LO+ 5pF 220Ω 85Ω 220Ω VCC 15 LO – 5pF LT5520
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Figure 4. LO Input Circuit
Though the LO input is internally 50Ω matched, there may be some cases, particularly at higher frequencies or with different source impedances, where a further optimized match is desired. Table 2 includes the single -ended input impedance and reflection coefficient vs frequency for the LO input for use in such cases.
Table 2. Single-Ended LO Input Impedance
Frequency (MHz) 1300 1500 1700 1900 2100 2300 2500 2700 Input Impedance 62.8 – j9.14 62.2 – j11.4 61.5 – j13.4 60.0 – j15.2 58.4 – j16.9 56.5 – j17.9 54.9 – j18.8 53.7 – j18.8 S11 Mag 0.139 0.148 0.157 0.164 0.172 0.176 0.182 0.182 Angle –30.9 –37.1 – 42.4 – 48.9 –54.7 –60.4 –65.1 –68.5
RF Output Port An internal RF transformer, shown in Figure 5, reduces the mixer-core impedance to provide an impedance of 50Ω across the RF + and RF – pins. The LT5520 is designed and tested with the outputs configured for single-ended operation, as shown in the Figure 5; however, the outputs can be used differentially as well. A center-tap in the transformer provides the DC connection to the mixer core and the transformer provides DC isolation at the RF output. The RF + and RF – pins are connected together through the secondary windings of the transformer, thus a DC voltage should not be applied across these pins.
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LT5520
APPLICATIO S I FOR ATIO
The impedance data for the RF output, listed in Table 3, can be used to develop matching networks for different load impedances.
Table 3. Single-Ended RF Output Impedance
Frequency (MHz) 1300 1500 1700 1900 2100 2300 2500 2700 Input Impedance 26.9 + j38.2 44.2 + j35.7 53.9 + j20.6 49.5 + j7.97 42.8 + j4.14 38.9 + j5.41 38.7 + j7.78 41.1 – j9.51 S11 Mag 0.520 0.359 0.198 0.080 0.089 0.139 0.154 0.142 Angle 94.7 78.4 68.0 88.9
GAIN (dB)
RF+
11
VCC
RF– 8 VCC LT5520
10
5520 F05
Operation at Different Input Frequencies On the evaluation board shown in Figure 10, the input of the LT5520 can be easily matched for different frequencies by changing the input capacitors, C1 and C2. Table 4 lists some actual values used at selected frequencies.
Table 4. Input Capacitor Values vs Frequency
Frequency (MHz) 70 140 240 480 650 Capacitance (C1, C2) (pF) 820 220 68 18 12
NF (dB)
Figure 5. RF Output Circuit
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The performance was evaluated with the input tuned for each of these frequencies and the results are summarized in Figures 6-8. The same IF input balun transformer was used for all measurements. In each case, the LO input frequency was adjusted to maintain an RF output frequency of 1900 MHz.
5 4 3 2 1 0 GAIN –1 –2 –3 –4 –5 0 100 200 300 400 500 600 INPUT FREQUENCY (MHz) HIGH SIDE LO LOW SIDE LO IIP3 LOW SIDE LO HIGH SIDE LO 20 18 16 14 12 10 8 6 4 2 0 700
IIP3 (dBm)
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148 151 140 127
5520 F06
Figure 6. Conversion Gain and IIP3 vs Tuned IF Input Frequency
RFOUT 50Ω
18 PLO = –5dBm 17 HIGH SIDE LO
16
15 LOW SIDE LO 14 PLO = 0dBm
13 0 100 200 300 400 500 600 INPUT FREQUENCY (MHz) 700
5520 F07
Figure 7. SSB Noise Figure vs Tuned IF Input Frequency
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LT5520
APPLICATIO S I FOR ATIO U
Low Frequency Matching of the RF Output Port Without any external components on the RF output, the internal transformer of the LT5520 provides a good 50Ω impedance match for RF frequencies above approximately 1600MHz. At frequencies lower than this, the return loss drops below 10dB and degrades the conversion gain. The addition of a single 3.3pF capacitor in series with the RF output improves the match at lower RF frequencies, shifting the 10dB return loss point to about 1300MHz, as demonstrated in Figure 9. This change also results in an improvement of the conversion gain, as shown in Figure 9.
1 LOW SIDE LO 0 –1 –2 HIGH SIDE LO COUT = 3.3pF NO COUT –5 GAIN 0
Figures 6-8 illustrate the performance versus tuned IF input frequency with both high side and low side LO injection. Figure 6 shows the measured conversion gain and IIP3. The noise figure is plotted in Figure 7 for LO power levels of –5dBm and 0dBm. At lower input frequencies, the LO power level has little impact on noise figure. However, for higher frequencies, an increased LO drive level may be utilized to achieve better noise figure. The single-tone IIP2 behavior is illustrated in Figure 8.
60 50 40
IIP2 (dBm)
30 20 10 0
GAIN (dB)
0
100
200 300 400 500 600 INPUT FREQUENCY (MHz)
Figure 8. IIP2 vs Tuned IF Input Frequency
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RETURN LOSS (dB)
–3 –4 –5 –6 –7 –8 NO COUT 2200 COUT = 3.3pF –9 1200 1400 1600 1800 2000 FREQUENCY (MHz) RETURN LOSS
–10
–15
–20
700
–25 2400
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5520 F09
Figure 9. Conversion Gain and Return Loss vs Output Frequency
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LT5520
APPLICATIO S I FOR ATIO U
(10b) Top Layer Metal
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(10a) Top Layer Silkscreen
10
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Figure 10. Evaluation Board Layout
LT5520
PACKAGE DESCRIPTIO
4.35 ± 0.05 2.15 ± 0.05 2.90 ± 0.05 (4 SIDES)
0.30 ± 0.05 0.65 BCS RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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UF Package 16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
BOTTOM VIEW—EXPOSED PAD 4.00 ± 0.10 (4 SIDES) 0.72 ± 0.05 PIN 1 TOP MARK 1 2.15 ± 0.10 (4-SIDES) 2 0.75 ± 0.05 R = 0.115 TYP 0.55 ± 0.20 15 16 PACKAGE OUTLINE 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED
(UF) QFN 0802
0.30 ± 0.05 0.65 BSC
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LT5520
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1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator 20dBm IIP3,Integrated LO Quadrature Generator 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 21.5dBm IIP3,Integrated LO Quadrature Generator 600MHz to 2.7GHz High Signal Level Downconverting Mixer 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50Ω Single-Ended RF and LO Ports
RF Receiver Building Blocks
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
LT/TP 1103 1K • PRINTED IN USA
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