LT5522

LT5522 400MHz to 2.7GHz High Signal Level Downconverting Mixer FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Internal On-Chip RF Input Transformer 50Ω Single-Ended RF and LO Ports High Input IP3: +25dBm at 900MHz +21.5dBm at 1900MHz Low Power Consumption: 280mW Typical Integrated LO Buffer: Low LO Drive Level High LO-RF and LO-IF Isolation Wide RF Frequency Range: 0.4GHz to 2.7GHz* Very Few External Components Enable Function 4.5V to 5.25V Supply Voltage Range 16-Lead (4mm × 4mm) QFN Package The LT®5522 active downconverting mixer is optimized for high linearity downconverter applications including cable and wireless infrastructure. The IC includes a high speed differential LO buffer amplifier driving a double-balanced mixer. The LO buffer is internally matched for wideband, single-ended operation with no external components. The RF input port incorporates an integrated RF transformer and is internally matched over the 1.2GHz to 2.3GHz frequency range with no external components. The RF input match can be shifted down to 400MHz, or up to 2.7GHz, with a single shunt capacitor or inductor, respectively. The high level of integration minimizes the total solution cost, board space and system-level variation. The LT5522 delivers high performance and small size without excessive power consumption. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. *Operation over a wider frequency range is possible with reduced performance. Consult factory for information and assistance. APPLICATIO S ■ ■ ■ ■ Cellular, PCS and UMTS Band Infrastructure CATV Downlink Infrastructure 2.4GHz ISM High Linearity Downmixer Applications TYPICAL APPLICATIO LT5522 LO+ LO INPUT –5dBm LO– GC, SSB NF (dB), IIP3 (dBm) IF+ 1850MHz TO 1910MHz LNA RF+ 2.7pF 100pF 150nH 140MHz (TYP) VGA RF– BIAS/ CONTROL EN VCC1 VCC2 5V 0.01µF 3.3µF 150nH IF– LTC1748 ADC 5522 F01 Figure 1. High Signal Level Downmixer for Wireless Infrastructure 5522fa U 1.9GHz Conversion Gain, IIP3, SSB NF and LO-RF Leakage vs LO Power 24 22 20 18 16 14 12 10 8 6 4 2 0 –11 LO-RF –50 IF = 140MHz LOW-SIDE LO –60 TA = 25°C VCC = 5V –70 –1 1 –9 –7 –5 –3 LO INPUT POWER (dBm) 5522 TA01 U U –10 IIP3 –20 LO-RF LEAKAGE (dBm) SSB NF –30 –40 1 LT5522 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW Supply Voltage ...................................................... 5.5V Enable Voltage ............................... –0.3V to VCC + 0.3V LO Input Power ............................................... +10dBm LO+ to LO– Differential DC Voltage ......................... ±1V LO Input DC Common Mode Voltage ...................... ±1V RF Input Power ................................................ +10dBm RF+ to RF– Differential DC Voltage ........................ ±0.2V RF Input DC Common Mode Voltage ...................... ±1V Operating Temperature Range ................ –40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C Junction Temperature (TJ).................................... 125°C LO+ LO– NC 16 15 14 13 NC 1 RF + 2 RF – 3 17 12 GND 11 IF+ 10 IF – 9 GND 5 6 7 8 NC 4 EN UF PACKAGE 16-LEAD (4mm × 4mm) PLASTIC QFN TJMAX = 125°C, θJA = 37°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB VCC2 VCC1 ORDER PART NUMBER LT5522EUF NC NC UF PART MARKING 5522 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. DC ELECTRICAL CHARACTERISTICS (Test circuit shown in Figure 2) VCC = 5VDC, EN = high, TA = 25°C, unless otherwise noted. (Note 3) PARAMETER Power Supply Requirements (VCC) Supply Voltage Supply Current Shutdown Current Enable (EN) Low = Off, High = On Input High Voltage (On) Input Low Voltage (Off) Enable Pin Input Current Turn On Time Turn Off Time EN = 5VDC CONDITIONS MIN 4.5 VCC = 5V EN = Low 3 0.3 55 3 5 75 TYP 5 56 MAX 5.25 68 100 UNITS VDC mA µA VDC VDC µA µs µs AC ELECTRICAL CHARACTERISTICS PARAMETER RF Input Frequency Range (Notes 2, 3) (Test circuit shown in Figure 2). MIN 400 TYP 1200 to 2300 2700 400 0.1 to 1000 15 13 –10 18 –5 >45 0 2700 MAX UNITS MHz MHz MHz MHz MHz dB dB dB dBm dB 5522fa CONDITIONS Shunt Capacitor on Pin 3 (Low Band) No External Matching (Mid Band) Shunt Inductor on Pin 3 (High Band) No External Matching Requires Appropriate IF Matching Z O = 50 Ω Z O = 50 Ω Z O = 50 Ω 50MHz to 2700MHz LO Input Frequency Range IF Output Frequency Range RF Input Return Loss LO Input Return Loss IF Output Return Loss LO Input Power RF to LO Isolation 2 U W U U WW W LT5522 AC ELECTRICAL CHARACTERISTICS PARAMETER Conversion Gain CONDITIONS RF = 450MHz, High Side LO RF = 900MHz RF = 1800MHz RF = 1900MHz RF = 2100MHz RF = 2450MHz TA = – 40°C to 85°C RF = 450MHz, High Side LO RF = 900MHz RF = 1800MHz RF = 1900MHz RF = 2100MHz RF = 2450MHz RF = 900MHz RF = 1800MHz RF = 2100MHz RF = 2450MHz fLO = 400MHz to 2700MHz fLO = 400MHz to 2700MHz 900MHz: fRF = 830MHz at –12dBm 1900MHz: fRF = 1830MHz at –12dBm 900MHz: fRF = 806.67MHz at –12dBm 1900MHz: fRF = 1806.67MHz at –12dBm RF = 450MHz, High Side LO RF = 900MHz RF = 1900MHz Cellular/PCS/UMTS downmixer application: VCC = 5V, EN = high, TA = 25°C, PRF = – 7dBm (–7dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF – 140MHz, PLO = – 5dBm, IF output measured at 140MHz, unless otherwise noted. (Notes 2, 3) (Test circuit shown in Figure 2). MIN TYP –2.0 –0.5 –0.2 –0.1 0.2 –0.7 –0.02 22.3 25.0 21.8 21.5 20.0 16.8 12.5 13.9 14.3 15.6 ≤ –50 ≤ –49 –73 –60 –72 –65 12.0 10.8 8.0 MAX UNITS dB dB dB dB dB dB dB/°C dBm dBm dBm dBm dBm dBm dB dB dB dB dBm dBm dBc dBc dBc dBc dBm dBm dBm –2 Conversion Gain vs Temperature Input 3rd Order Intercept Single Sideband Noise Figure (Note 4) LO to RF Leakage LO to IF Leakage 2RF-2LO Output Spurious Product (fRF = fLO + fIF/2) 3RF-3LO Output Spurious Product (fRF = fLO + fIF/3) Input 1dB Compression 1150MHz CATV infrastructure application: VCC = 5V, EN = high, TA = 25°C, RF input = 1150MHz at –12dBm (–12dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), LO input swept from 1200MHz to 2200MHz, PLO = – 5dBm, IF output measured from 50MHz to 1050MHz unless otherwise noted. (Note 3) (Test circuit shown in Figure 3). PARAMETER Conversion Gain Input 3rd Order Intercept Single Sideband Noise Figure (Note 4) LO to RF Leakage LO to IF Leakage 2RF – LO Output Spurious Product 2RF1 – LO Output Spurious Product 2RF2 – LO Output Spurious Product (RF1 + RF2) – LO Output Spurious Product RF Input Return Loss LO Input Return Loss IF Output Return Loss CONDITIONS fLO = 1650MHz, fIF = 500MHz fLO = 1650MHz, fIF = 500MHz fLO = 1650MHz, fIF = 500MHz fLO = 1200MHz to 2200MHz fLO = 1200MHz to 2200MHz PRF = –12dBm (Single Tone), 50MHz ≤ fIF ≤ 900MHz 2-Tone 2nd Order Spurious Outputs 2 RF1 = 1147MHz, RF2 = 1153MHz, –15dBm/Tone LO = 1650MHz, Spurs at 644MHz, 656MHz and 650MHz 950MHz to 1350MHz, ZO = 50Ω 1200MHz to 2200MHz, ZO = 50Ω 50MHz to 1050MHz, ZO = 50Ω MIN TYP –0.6 23 14.3 ≤ –51 ≤ –45 ≤ –63 –68 –68 –63 >15 13 10 MAX UNITS dB dBm dB dBm dBm dBc dBc dBc dBc dB dB dB Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: 450MHz, 900MHz and 2450MHz performance measured with the following external RF input matching. 450MHz: C5 = 8.2pF, 5mm away from Pin 3 on the 50Ω input line. 900MHz: C5 = 2.2pF at Pin 3. 2450MHz: L3 = 3.9nH at Pin 3. See Figure 2. Note 3: Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: SSB Noise Figure measurements performed with a small-signal noise source and bandpass filter on RF input, and no other RF signal applied. 5522fa 3 LT5522 TYPICAL AC PERFOR A CE CHARACTERISTICS Conv Gain, IIP3 and SSB NF vs RF Frequency (Low Side LO) 23 21 GC AND SSB NF (dB), IIP3 (dBm) 19 17 15 13 11 9 7 5 3 1 –1 1300 1500 GC 1900 2100 1700 RF FREQUENCY (MHz) 2300 5522 G01 Mid-band RF (no external RF matching) VCC = 5V, EN = High, TA = 25°C, PRF = – 7dBm (–7dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), PLO = – 5dBm, IF output measured at 140MHz, unless otherwise noted. (Test circuit shown in Figure 2). Conv Gain, IIP3 and SSB NF vs RF Frequency (High Side LO) 23 GC AND SSB NF (dB), IIP3 (dBm) IIP3 SSB NF TA = 25°C fIF = 140MHz 15 13 11 9 7 5 3 1 –1 1300 1500 SSB NF LO LEAKAGE (dBm) Conv Gain and IIP3 vs Temperature (RF = 1800MHz) 22 20 18 16 GC (dB), IIP3 (dBm) 14 12 10 8 6 4 2 GC 0 fIF = 140MHz –2 0 25 50 –50 –25 TEMPERATURE (°C) LOW SIDE LO HIGH SIDE LO 75 100 5522 G04 GC AND SSB NF (dB), IIP3 (dBm) IIP3 LOW SIDE LO HIGH SIDE LO GC (dB), IIP3 (dBm) Conv Gain and IIP3 vs Temperature (RF = 2100MHz) 20 18 LOW SIDE LO GC AND SSB NF (dB), IIP3 (dBm) 16 GC (dB), IIP3 (dBm) 14 12 10 8 6 4 2 0 GC LOW SIDE LO HIGH SIDE LO HIGH SIDE LO IIP3 20 18 16 14 12 10 8 6 4 2 0 75 100 5522 G07 SSB NF 25°C 85°C –40°C fLO = 1960MHz fIF = 140MHz GC OUTPUT POWER (dBm) fIF = 140MHz –2 –50 0 25 50 –25 TEMPERATURE (°C) 4 UW LO Leakage vs LO Frequency T = 25°C –35 f A = 140MHz IF –40 –45 –50 –55 –60 –65 –70 –75 –80 LO-IF LO-RF –30 21 19 17 IIP3 TA = 25°C fIF = 140MHz GC 1900 2100 1700 RF FREQUENCY (MHz) 2300 5522 G02 –85 –90 1100 1300 1500 1700 1900 2100 2300 2500 LO FREQUENCY (MHz) 5522 G03 Conv Gain, IIP3 and SSB NF vs LO Power (RF = 1800MHz) 22 20 18 16 14 12 10 8 6 4 2 0 –2 –11 –9 –1 –7 –5 –3 LO INPUT POWER (dBm) 1 5522 G05 Conv Gain and IIP3 vs Supply Voltage (RF = 1800MHz) 22 20 18 16 14 12 10 8 6 4 2 0 –2 4.5 5 5.25 4.75 SUPPLY VOLTAGE (V) 5.5 5522 G06 IIP3 SSB NF 25°C 85°C –40°C fLO = 1660MHz fIF = 140MHz GC IIP3 25°C 85°C –40°C fLO = 1660MHz fIF = 140MHz GC Conv Gain, IIP3 and SSB NF vs LO Power (RF = 2100MHz) 10 IF OUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power (Single Tone) 0 –10 –20 –30 –40 –50 –60 –70 –80 2RF-2LO (RF = 1830MHz) TA = 25°C fLO = 1760MHz fIF = 140MHz 6 9 3RF-3LO (RF = 1806.67MHz) IF OUT (RF = 1900MHz) IIP3 –2 –11 –9 –1 –7 –5 –3 LO INPUT POWER (dBm) 1 5522 G08 –90 –21 –18 –15 –12 –9 –6 –3 0 3 RF INPUT POWER (dBm) 5522 G09 5522fa LT5522 TYPICAL AC PERFOR A CE CHARACTERISTICS Low Band Conv Gain, IIP3 and SSB NF vs RF Frequency 18 16 14 12 GC (dB) 10 8 6 4 2 0 –2 600 LOW SIDE LO GC 700 900 1000 1100 800 RF FREQUENCY (MHz) HIGH SIDE LO TA = 25°C fIF = 140MHz SSB NF HIGH SIDE LO LOW SIDE LO IIP3 26 24 22 SSB NF (dB), IIP3 (dBm) 20 18 16 14 12 10 8 6 1200 17 15 13 11 GC (dB) 9 7 5 3 1 –1 –3 –50 fIF = 140MHz –25 25 50 0 TEMPERATURE (°C) 75 GC LOW SIDE LO HIGH SIDE LO HIGH SIDE LO IIP3 Low-band RF (C5 = 2.2pF) and high-band RF (L3 = 3.9nH) VCC = 5V, EN = High, TA = 25°C, PRF = – 7dBm (–7dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), PLO = – 5dBm, IF output measured at 140MHz, unless otherwise noted. (Test circuit shown in Figure 2). Low Band Conv Gain and IIP3 vs Temperature (RF = 900MHz) LOW SIDE LO 26 24 22 OUTPUT POWER (dBm) 20 18 16 14 12 10 8 6 100 5522 G11 5522 G10 Low Band Conv Gain, IIP3 and SSB NF vs LO Power (RF = 900MHz) 17 15 13 11 GC (dB) 9 7 5 3 1 –1 –3 –11 –9 –5 –3 –1 –7 LO INPUT POWER (dBm) 1 5522 G13 IIP3 25°C 85°C –40°C fLO = 760MHz fIF = 140MHz LO LEAKAGE (dBm) 16 14 12 10 8 6 –60 –65 –70 –75 –80 –85 –90 400 600 1000 1200 800 LO FREQUENCY (MHz) 1400 5522 G14 GC (dB) SSB NF GC High Band Conv Gain, IIP3, SSB NF and LO Leakage vs RF Frequency 20 18 IIP3 SSB NF LO-RF 0 –10 –20 GC (dB), IIP3 (dBm) –30 –40 –50 –60 –70 TA = 25°C fIF = 140MHz LOW SIDE LO GC 2300 2500 2600 2400 RF FREQUENCY (MHz) –80 –90 –100 –110 2700 5522 G16 GC AND SSB NF (dB), IIP3 (dBm) 16 14 12 10 8 6 4 2 0 –2 2200 GC (dB), IIP3 (dBm) LO-IF UW 26 24 22 SSB NF (dB), IIP3 (dBm) 20 18 Low Band IF OUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power (Single Tone) 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 2RF-2LO (RF = 830MHz) TA = 25°C fLO = 760MHz 9 12 3RF-3LO (RF = 806.67MHz) IF OUT (RF = 900MHz) IIP3 (dBm) –100 –18 –15 –12 –9 –6 –3 0 3 6 RF INPUT POWER (dBm) 5522 G12 LO Leakage vs LO Frequency (Low Band RF Match) –30 TA = 25°C –35 f = 140MHz IF –40 PLO = – 5dBm –45 –50 –55 LO-IF 17 15 13 11 9 7 5 3 1 –1 –3 Low Band Conv Gain and IIP3 vs Supply Voltage (RF = 900MHz) 26 IIP3 24 22 20 25°C 85°C –40°C fLO = 760MHz fIF = 140MHz GC 18 16 14 12 10 8 4.5 4.75 5 5.25 SUPPLY VOLTAGE (V) 6 5.5 5522 G15 IIP3 (dBm) LO-RF High Band Conv Gain and IIP3 vs Temperature (RF = 2450MHz) 17 15 13 11 9 7 5 3 1 –1 –3 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 5522 G17 High Band Conv Gain, IIP3 and SSB NF vs LO Power (RF = 2450MHz) 18 20 IIP3 19 18 17 SSB NF 25°C 85°C –40°C fLO = 2310MHz fIF = 140MHz SSB NF (dB) 16 15 14 13 12 11 10 –9 –5 –3 –1 –7 LO INPUT POWER (dBm) 1 5522 G18 IIP3 16 14 12 10 8 6 4 2 0 –2 –11 LO LEAKAGE (dBm) fLO = 2310MHz fIF = 140MHz GC GC 5522fa 5 LT5522 TYPICAL AC PERFOR A CE CHARACTERISTICS Conv Gain, IIP3 and SSB NF vs IF Output Frequency 26 24 22 20 18 16 14 12 10 8 6 4 2 0 –2 –4 –50 IIP3 RELATIVE SPUR LEVEL (dBc) CATV infrastructure downmixer VCC = 5V, EN = High, TA = 25°C, PRF = 1150MHz at –12dBm (–12dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), LO swept from 1200MHz to 2200MHz, PLO = – 5dBm, IF output measured from 50MHz to 1050MHz, unless otherwise noted. (Test circuit shown in Figure 3) 2RF-LO Spur vs IF Output Frequency (PRF = –12dBm) –10 –20 PLO = –8, –5 AND –2dBm 25°C LO LEAKAGE (dBm) GC AND SSB NF (dB), IIP3 (dBm) SSB NF 25°C 85°C –40°C fRF = 1150MHz PLO = – 5dBm GC 50 450 650 250 850 IF OUTPUT FREQUENCY (MHz) 5522 G19 Conv Gain, IIP3 and SSB NF vs LO Power (IF = 500MHz) 25 23 21 IIP3 19 17 15 13 11 9 7 5 3G C 1 –1 –3 –9 –11 GC AND SSB NF (dB), IIP3 (dBm) SSB NF 25°C 85°C –40°C fLO = 1650MHz fRF = 1150MHz GC AND SSB NF (dB), IIP3 (dBm) –1 –7 –3 –5 LO INPUT POWER (dBm) IF Output Power and Spurious Products vs RF Input Power (Single Tone) 10 10 IF OUT (500MHz) TA = 25°C fLO = 1650MHz fRF = 1150MHz 0 IF OUTPUT POWER AND SPURIOUS (dBm) 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 OUTPUT POWER (dBm/TONE) 2RF-2LO (1000MHz) 2RF-LO (650MHz) 3RF-2LO (150MHz) –17 –5 –13 –9 –1 RF INPUT POWER (dBm) 3 7 5522 G24 –100 –21 6 UW 1050 LO Leakage vs LO Frequency TA = 25°C PLO = –5dBm –55 –60 –65 –70 –40°C –75 –80 50 250 450 650 850 IF OUTPUT FREQUENCY (MHz) 1050 5522 G20 85°C –30 –40 –50 –60 –70 1200 LO-RF LO-IF 1400 1600 1800 2000 LO FREQUENCY (MHz) 2200 5522 G21 Conv Gain, IIP3 and SSB NF vs Temperature (IF = 500MHz) 23 21 19 17 15 13 11 9 7 5 3 1 –1 –3 –50 IIP3 SSB NF fLO = 1650MHz PLO = – 5dBm fRF = 1150MHz GC 1 5522 G22 –25 0 25 50 TEMPERATURE (°C) 75 100 5522 G23 IF Output Power, IM3 and IM5 vs RF Input Power (Two Input Tones) TA = 25°C fLO = 1650MHz fRF = 1150MHz IF OUT –10 –20 –30 –40 –50 –60 –70 –80 IM3 IM5 –90 –21 –18 –15 –12 –9 –6 –3 0 RF INPUT POWER (dBm/TONE) 3 5522 G25 5522fa LT5522 TYPICAL AC PERFOR A CE CHARACTERISTICS 450MHz Application (C5 = 8.2pF, 5mm away from Pin 3) VCC = 5V, EN = High, TA = 25°C, PRF = –7dBm (–7dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), PLO = – 5dBm, IF output measured at 140MHz, unless otherwise noted. (Test circuit shown in Figure 2) Single Tone IF Output Power and Conv Gain vs RF Input Power (RF = 450MHz) 10 Conv Gain, IIP3 and SSB NF vs RF Frequency (High Side LO) 24 22 IIP3 20 18 16 14 SSB NF 12 10 8 6 HIGH SIDE LO 4 TA = 25°C 2 fIF = 140MHz GC 0 –2 –4 350 370 390 410 430 450 470 490 510 530 550 RF INPUT FREQUENCY (MHz) 5522 G26 IF OUTPUT POWER (dBm), GC (dB) IFOUT 4 1 –2 –5 –8 –11 –14 –12 –9 HIGH SIDE LO TA = 25°C fIF = 140MHz –6 –3 0 3 6 RF INPUT POWER (dBm) 9 12 GC GC (dB), IIP3 (dBm), SSB NF (dB) GC (dB), IIP3 (dBm) TYPICAL DC PERFOR A CE CHARACTERISTICS Supply Current vs Supply Voltage 57.0 56.5 SHUTDOWN CURRENT (µA) SUPPLY CURRENT (mA) 56.0 25°C 55.5 55.0 54.5 54.0 53.5 53.0 4.5 85°C –40°C 5 4.75 5.25 SUPPLY VOLTAGE (V) UW UW Conv Gain, IIP3 and SSB NF vs LO Input Power (RF = 450MHz) 24 22 IIP3 20 18 16 14 12 10 8 6 4 2 GC 0 –2 –4 –11 –9 7 SSB NF 25°C 85°C –40°C HIGH SIDE LO TA = 25°C fIF = 140MHz –7 –5 –3 –1 1 5522 G28 LO INPUT POWER (dBm) 5522 G27 (Test circuit shown in Figure 2) Shutdown Current vs Supply Voltage 100 85°C 10 25°C 1 –40°C 0.1 5.5 5522 G29 4.5 4.75 5 5.25 SUPPLY VOLTAGE (V) 5.5 5522 G30 5522fa 7 LT5522 PI FU CTIO S NC (Pins 1, 4, 8, 13, 16): Not Connected Internally. These pins should be grounded on the circuit board for improved LO to RF and LO to IF isolation. RF+, RF– (Pins 2, 3): Differential Inputs for the RF Signal. The RF input signal should be applied to the RF– pin (Pin 3) and the RF+ pin (Pin 2) must be connected to ground. These pins are the primary side of the RF input balun which has low DC resistance. If the RF source is not DC blocked, then a series blocking capacitor must be used. EN (Pin 5): Enable Pin. When the input enable voltage is higher than 3V, the mixer circuits supplied through Pins 6, 7, 10 and 11 are enabled. When the input enable voltage is less than 0.3V, all circuits are disabled. Typical input EN pin current is 55µA for EN = 5V and 0µA when EN = 0V. The EN pin should not be left floating. Under no conditions should the EN pin voltage exceed VCC + 0.3V, even at start-up. VCC1 (Pin 6): Power Supply Pin for the LO Buffer Circuits. Typical current consumption is 22mA. This pin should be externally connected to the VCC2 pin and decoupled with 0.01µF and 3.3µF capacitors. VCC2 (Pin 7): Power Supply Pin for the Bias Circuits. Typical current consumption is 4mA. This pin should be externally connected to the VCC1 pin and decoupled with 0.01µF and 3.3µF capacitors. GND (Pins 9, 12): Ground. These pins are internally connected to the backside ground for improved isolation. They should be connected to RF ground on the circuit board, although they are not intended to replace the primary grounding through the backside contact of the package. IF–, IF+ (Pins 10, 11): Differential Outputs for the IF Signal. An impedance transformation may be required to match the outputs. These pins must be connected to VCC through impedance matching inductors, RF chokes or a transformer center-tap. LO–, LO+ (Pins 14, 15): Differential Inputs for the Local Oscillator Signal. The LO input can also be driven single ended by connecting one input to ground. These pins are internally matched for 50Ω single-ended operation. If the LO source is not AC-coupled, then a series blocking capacitor must be used. Exposed Pad (Pin 17): Circuit Ground Return for the Entire IC. This must be soldered to the printed circuit board ground plane. BLOCK DIAGRA 2 3 15 14 8 W U U U RF+ RF – LINEAR AMPLIFIER DOUBLE BALANCED MIXER GND 12 IF + IF– GND 11 10 9 LIMITER HIGH SPEED LO BUFFER LO+ LO– BIAS EN VCC1 EXPOSED PAD 17 7 VCC2 5522 BD 5 6 5522fa LT5522 TEST CIRCUITS LO IN 400MHz TO 2700MHz 16 1 NC RF+ LT5522 3 L3 (HIGH BAND) C5 OR (LOW BAND) RF– IF– 10 NC LO 15 + 0.018 14 LO – 13 NC GND IF+ 12 L1 C4 0.062 0.018 εR = 4.4 RF GND BIAS GND 2 RF IN 400MHz TO 2700MHz OPTIONAL SHUNT REACTANCE USED FOR LOW BAND OR HIGH BAND RF MATCH ONLY 11 3 T1 4 C3 2 1 • • 5 IF OUT 140MHz L2 4 NC EN 5 EN VCC1 VCC2 6 C1 7 NC 8 GND 9 VCC C2 GND 5522 F02 REF DES C1 C2 C3 C4 VALUE 0.01µF 3.3µF 100pF 1.5pF SIZE 0402 1206 0402 0402 PART NUMBER Murata GRP155R71C103K Taiyo Yuden LMK316BJ475ML Murata GRP1555C1H101J Murata GRP1555C1H1R5C REF DES L1, L2 T1 C5 L3 VALUE 82nH 4:1 2.2pF 3.9nH SIZE 0603 0402 0402 PART NUMBER Coilcraft 0603CS-82NX M/A-Com ETC4-1-2 (2-800MHz) Murata GRP1555C1H1R5C (For Low Band Operation Only) Coilcraft 0402CS-3N9X (For High Band Operation Only) Figure 2. Test Schematic for Downmixer Application (140MHz IF) (DC689A) LO IN 1200MHz TO 2200MHz 16 1 NC RF+ LT5522 3 C5 RF– IF– GND 10 L2 4 NC 9 EN 5 EN C1 C2 GND 5522 F03 15 LO+ 14 LO– 13 NC GND 12 L1 C3 2 C7 1 5 IF OUT 50MHz TO 1000MHz T1 3 4 C6 NC 2 RF IN 1150MHz (TYP) 11 IF+ VCC1 VCC2 6 7 NC 8 VCC REF DES C1 C2 C3, C6, C7 VALUE 0.01µF 3.3µF 330pF SIZE 0402 1206 0402 PART NUMBER Murata GRP155R71C103K Taiyo Yuden LMK316BJ475ML Murata GRP155R71H331K REF DES C5 L1, L2 T1 VALUE 1.5pF 18nH 4:1 SIZE 0402 PART NUMBER Murata GRP1555C1H1R5C Toko LL1005-FH18NJ M/A-Com MABAES0054 (5-1000MHz) Figure 3. Test Schematic for CATV Infrastructure Downmixer Application (50MHz to 1000MHz IF) (DC651A) 5522fa 9 LT5522 APPLICATIO S I FOR ATIO Introduction The LT5522 consists of a high linearity double-balanced mixer, RF buffer amplifier, high speed limiting LO buffer amplifier and bias/enable circuits. The IC has been optimized for downconverter applications where the RF input signal is in the 400MHz to 2.7GHz range and the LO signal is in the 400MHz to 2.7GHz range. Operation over a wider RF input frequency range is possible with reduced performance. The IF output can be matched for IF frequencies as low as 100kHz or as high as 1GHz. The RF, LO and IF ports are all differential, although the RF and LO ports are internally matched for single-ended drive as shown in Figure 2. The LT5522 is characterized and production-tested with singleended RF and LO drive. Low side or high side LO injection can be used. Two evaluation boards are available. The standard board is intended for most applications, including cellular, PCS, UMTS and 2.4GHz. A schematic is shown in Figure 2 and the board layout is shown in Figure 18. The 140MHz IF output frequency on the standard board is easily changed by modifying the IF matching elements. The second board, intended for CATV applications, incorporates a wideband IF output balun. The CATV evaluation schematic is shown in Figure 3 and the board layout is shown in Figure 19. LT5522 2 RF IN 3 C5 RF+ RF – TO MIXER PORT RETURN LOSS (dB) OPTIONAL SHUNT REACTANCE FOR LOW BAND OR HIGH BAND MATCHING (C5 OR L3) Figure 4. RF Input Schematic 10 U RF Input Port The mixer’s RF input, shown in Figure 4, consists of an integrated balun and a high linearity differential amplifier. The primary terminals of the balun are connected to the RF+ and RF– pins (Pins 2 and 3, respectively). The secondary side of the balun is internally connected to the amplifier’s differential inputs. For single-ended operation, the RF+ pin is grounded and the RF– pin becomes the RF input. It is also possible to ground the RF– pin and drive the RF+ pin, although the LO to RF isolation will degrade slightly. The RF source must be AC-coupled since one terminal of the balun’s primary is grounded. If the RF source has DC voltage present, then a coupling capacitor must be used in series with the RF input pin. As shown in Figure 5, the RF input return loss, with no external matching, is greater than 10dB from 1.2GHz to 2.4GHz. The RF input match can be shifted down in frequency by adding a shunt capacitor at the RF input. Two examples are plotted in Figure 5. A 2.2pF capacitor, located near Pin 3, produces a 900MHz match. An 8.2pF capacitor, located 5mm away from Pin 3 (on the 50Ω line), produces a 450MHz match. The RF input match can also be shifted up in frequency by adding a shunt inductor near Pin 3. One example is plotted in Figure 5, where a 3.9nH inductor produces a 2.3GHz to 2.8GHz match. 0 –5 –10 –15 –20 –25 5522 F04 W UU L3 = 3.9nH (HIGH BAND) C5 = 8.2pF L = 5mm (450MHz) C5 = 2.2pF (900MHz) 0.7 NO EXTERNAL MATCH 3.2 3.7 5522 F05 –30 0.2 2.7 1.2 1.7 2.2 RF FREQUENCY(GHz) Figure 5. RF Input Return Loss 5522fa LT5522 APPLICATIO S I FOR ATIO RF input impedance and S11 versus frequency are shown in Table 1. The listed data is referenced to the RF– pin with the RF+ pin grounded (no external matching). This information can be used to simulate board-level interfacing to an input filter, or to design a broadband input matching network. A broadband RF input match is easily realized using the shunt inductor/series capacitor network shown in Figure 6. This network provides good return loss at low and high frequencies simultaneously, with reasonable midband return loss. As shown in Figure 7, the RF input return loss is greater than 12dB from 715MHz to 2.3GHz using the element values shown in Figure 6. The input match is optimum at 850MHz and 1900MHz, ideal for triband GSM applications. Table 1. RF Port Input Impedance vs Frequency FREQUENCY (MHZ) 50 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 3000 INPUT IMPEDANCE 10.4 + j2.6 19.5 + j20.6 24.1 + j24.2 28.6 + j26.1 33.7 + j26.2 39.5 + j24.3 45.6 + j18.9 50.2 + j9.7 50.5 – j2.2 45.6 – j13.2 38.0 – j19.9 30.4 – j22.8 24.5 – j23.0 18.7 – j20.9 S11 MAG 0.660 0.507 0.454 0.407 0.353 0.285 0.199 0.096 0.023 0.143 0.259 0.360 0.440 0.525 ANGLE 173.5 129.5 118.7 111.1 104.4 98.2 92.0 83.0 –76.0 –100.7 –108.3 –114.8 –120.7 –129.4 LO – LO+ 480Ω 15pF TO MIXER LT5522 PORT RETURN LOSS (dB) LT5522 2 RFIN 3 L3 10nH C5 3.3pF RF+ RF – LO IN 5522 F06 Figure 6. Wideband RF Input Matching U 0 –5 –10 –15 –20 –25 1E8 1E9 RF FREQUENCY (Hz) 5E9 5522 F07 W UU Figure 7. RF Input Return Loss Using Wideband Matching Network LO Input Port The LO buffer amplifier consists of high speed limiting differential amplifiers, designed to drive the mixer quad for high linearity. The LO+ and LO– pins are designed for single-ended drive, although differential drive can be used if a differential LO source is available. A schematic is shown in Figure 8. Measured return loss is shown in Figure 9. The LO source must be AC-coupled to avoid forward biasing the ESD diodes. If the LO source has DC voltage present, then a coupling capacitor must be used in series with the LO input pin. LO input impedance and S11 versus frequency are shown in Table 2. The listed data is referenced to the LO+ pin with the LO– pin grounded. 14 15pF 15 5522 F08 Figure 8. LO Input Schematic 5522fa 11 LT5522 APPLICATIO S I FOR ATIO 0 –5 PORT RETURN LOSS (dB) –10 –15 –20 –25 –30 1E8 1E9 LO FREQUENCY (Hz) 5E9 5522 F09 Figure 9. LO Input Return Loss Table 2. LO Port Input Impedance vs Frequency FREQUENCY (MHZ) 100 250 500 1000 1500 2000 2500 3000 INPUT IMPEDANCE 200.5 – j181.0 55.9 – j61.6 44.6 – j27.7 37.9 – j7.8 33.6 – j1.8 31.0 – j0.3 30.6 – j0.4 31.8 – j1.0 S11 MAG 0.763 0.505 0.286 0.163 0.197 0.234 0.240 0.223 ANGLE –14.3 –54.4 –84.8 –142.1 –172.3 –178.9 –178.4 –176.0 8 IF Output Port The IF outputs, IF+ and IF–, are internally connected to the collectors of the mixer switching transistors (see Figure 10). Both pins must be biased at the supply voltage, which can be applied through the center-tap of a transformer or through matching inductors. Each IF pin draws 15mA of supply current (30mA total). For optimum single-ended performance, these differential outputs should be combined externally through an IF transformer. Both evaluation boards include IF transformers for impedance transformation and differential to singleended transformation. The IF output impedance can be modeled as 400Ω in parallel with 1pF. An equivalent small-signal model (including bondwire inductance) is shown in Figure 11. For most applications, the bondwire inductance can be ignored. GC (dB) 12 U For IF frequencies below 140MHz, an 8:1 transformer connected across the IF pins will perform impedance transformation and provide a single-ended 50Ω output. No other matching is required. Measured performance using this technique is shown in Figure 12. Output return loss is shown in Figure 13. LT5522 460Ω 0.5pF 10 VCC IF– 5522 F10 W UU IF+ 11 15mA 4:1 L1 C4 L2 15mA VCC IF OUT Figure 10. IF Output with External Matching + 0.7nH IF 11 LT5522 RS 400Ω 1pF 0.7nH 10 IF– 5522 F11 Figure 11. IF Output Small-Signal Model 24 RF = 900MHz RF = 1800MHz IIP3 20 18 22 7 6 5 4 3 2 1 0 –1 0 20 IIP3 (dBm) LOW SIDE LO PLO = –5dBm 16 14 12 RF = 1800MHz RF = 900MHz 40 60 80 100 IF FREQUENCY (MHz) 10 GC 8 120 6 140 5522 F12 Figure 12. Typical Conversion Gain and IIP3 Using an 8:1 IF Transformer 5522fa LT5522 APPLICATIO S I FOR ATIO Higher linearity and lower LO-IF leakage can be realized by using the simple, three element lowpass matching network shown in Figure 10. Matching elements C4, L1 and L2 form a 400Ω to 200Ω lowpass matching network which is tuned to the desired IF frequency. The 4:1 transformer then transforms the 200Ω differential output to 50Ω single-ended. The value of C4 is reduced by 1pF to account for the equivalent internal capacitance. For optimum linearity, C4 must be located close to the IF pins. Excessive trace length or inductance between the IF pins and C4 will increase the amplitude of the image output and reduce voltage swing headroom for the desired IF frequency. High Q wire-wound chip inductors (L1 and L2) improve the mixer’s conversion gain by a few tenths of a dB, but have little effect on linearity. This matching network is most suitable for IF frequencies of 40MHz or above. Below 40MHz, the value of the series inductors (L1 and L2) is high, and could cause stability problems, depending on the inductor value and parasitics. Therefore, the 8:1 transformer technique is recommended for low IF frequencies. Suggested matching network values for several IF frequencies are listed in Table 3. Measured output return losses for the 140MHz match and the wideband CATV match are plotted in Figure 13. Table 3. IF Matching Element Values (See Figure 10) IF FREQUENCY (MHz) 2-140 70 140 240 380 50-1000 (CATV) L1, L2 (nH) Short 220 82 56 39 18 C4 (pF) — 4.7 1.5 0.5 — — MABAES0054 (4:1) IF TRANSFORMER TC8-1 (8:1) ETC4-1-2 (4:1) PORT RETURN LOSS (dB) For fully differential IF architectures, the IF transformer can be eliminated. As shown in Figure 14, supply voltage to the mixer’s IF pins is applied through matching inductors in a bandpass IF matching network. The values of L1, L2 and C4 are calculated to resonate at the desired IF frequency with a quality factor that satisfies the required IF bandwidth. The L and C values are then adjusted to U 0 –5 –10 –15 –20 –25 1E7 1E8 IF FREQUENCY (Hz) 1E9 5522 F13 W UU 240MHz MATCH LUMPED ELEMENT BRIDGE BALUN LOW FREQ MATCH (NO IF MATCHING) 8:1 BALUN 140MHz MATCH (82nH/1.5pF) 4:1 BALUN 50MHz TO 1000MHz (18nH/0pF) 4:1 CATV BALUN Figure 13. Typical IF Output Return Losses for Various Matching Techniques IF + C3 C4 L1 SAW FILTER IF AMP IF– L2 5522 F14 VCC Figure 14. Bandpass IF Matching for Differential IF Architectures account for the mixer’s internal 1pF capacitance and the SAW filter’s input capacitance. In this case, the differential IF output impedance is 400Ω, since the bandpass network does not transform the impedance. For low cost applications, it is possible to replace the IF transformer with a lumped-element network which produces a single-ended 50Ω output. One approach is shown in Figure 15, where L1, L2, C4 and C6 form a narrowband bridge balun. The L and C values are calculated to realize a 180 degree phase shift at the desired IF frequency using the equations listed below. Inductor L4 is calculated to cancel the internal 1pF capacitance. L3 also supplies bias voltage to the IF+ pin. Low cost multilayer chip inductors are adequate for L1 and L2. A high Q wire-wound chip 5522fa 13 LT5522 APPLICATIO S I FOR ATIO IF+ C4 L1 4.7pF 100nH L4 390nH C6 4.7pF C7 1000pF IF OUT 50Ω GC (dB), IIP3 (dBm), SSB NF (dB) IF – L2 100nH VCC C3 1000pF 5522 F15 Figure 15. Narrowband Bridge IF Balun (240MHz Example) inductor is recommended for L4 to preserve conversion gain and minimize DC voltage drop to the IF+ pin. C7 is a DC blocking capacitor and C3 is a bypass capacitor. L1, L2 = ZIF • ZOUT (ZIF = 400) ω 1 C4, C6 = ω • ZIF • ZOUT GC (dB), IIP3 (dBm), SSB NF (dB) The narrowband bridge IF balun delivers good conversion gain, linearity and noise figure over a limited IF bandwidth. LO-IF leakage is approximately –32dBm, which is 17dB worse than that obtained with a transformer. Typical IF output return loss is plotted in Figure 13 for comparison with other matching methods. Typical mixer performance versus RF input frequency for 240MHz IF matching is shown in Figure 16. Typical performance versus IF output frequency for the same circuit is shown in Figure 17. The results in Figure 17 show that the usable IF bandwidth is approximately ±25MHz, assuming tight tolerance matching components. Contact the factory for application assistance with this circuit. 14 U 24 20 16 12 LO-IF 8 4 GC 0 1600 LOW SIDE LO PLO = –5dBm IF = 240MHz VCC = 5VDC TA = 25°C 1700 1800 1900 2000 2100 RF INPUT FREQUENCY (MHz) –50 –70 IIP3 30 10 W UU LO-IF LEAKAGE (dBm) SSB NF –10 –30 –90 2200 5522 F16 Figure 16. Typical Performance Using a Narrowband Bridge Balun (Swept RF) 21 19 17 15 13 11 9 7 5 3 1 GC LO-IF SSB NF IIP3 10 0 –10 –20 –30 –40 LOW SIDE LO –50 PLO = –5dBm RF = 1900MHz –60 VCC = 5VDC –70 TA = 25°C –80 –90 –1 –100 190 200 210 220 230 240 250 260 270 280 290 IF OUTPUT FREQUENCY (MHz) 5522 F17 LO-IF LEAKAGE (dBm) 5522fa Figure 17. Typical Performance Using a Narrowband Bridge Balun (Swept IF) LT5522 PACKAGE DESCRIPTIO U UF Package 16-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1692) 0.72 ± 0.05 PACKAGE OUTLINE 0.30 ± 0.05 0.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD 4.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) 2.15 ± 0.10 (4-SIDES) 0.75 ± 0.05 R = 0.115 TYP PIN 1 NOTCH R = 0.20 TYP OR 0.35 × 45° CHAMFER 15 16 0.55 ± 0.20 1 2 (UF16) QFN 10-04 4.35 ± 0.05 2.15 ± 0.05 2.90 ± 0.05 (4 SIDES) 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.30 ± 0.05 0.65 BSC 5522fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT5522 APPLICATIO S I FOR ATIO U Figure 19. CATV Evaluation Board Layout COMMENTS 76.3dB SNR, 90dB SFDR Low Power 775MHz BW S/H, 61dB SNR, 75dB SFDR ±0.5V or ±1V Input 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.5V Supply >40dB Dynamic Range, Temperature Compensated, 2.7V to 6V Supply 1.8V to 5.25V Supply, 40MHz to 500MHz IF, –4dB to 57dB Linear Power Gain 48dB Dynamic Range, Temperature Compensated, 2.7V to 6V Supply SC70 Package 36dB Dynamic Range, SC70 Package RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer 1kHz-3GHz, 20dBm IIP3, Integrated LO Buffer, HF/VHF/UHF Optimized 21.5dBm IIP3, Integrated LO Quadrature Generator 3.7GHz Operation, +24.2dBm IIP3, 12.5dB NF, –42dBm LO Leakage, Supply Voltage = 3.15V to 5V On-Chip Transformer for Single-Ended LO and RF Ports, +17.6dBm IIP3, Integrated LO Buffer 23.5dBm IIP3 at 1.9GHz, NF = 12.5dB, Single-Ended RF and LO Ports Precision VOUT Offset Control, Adjustable Gain and Offset Voltage 60dB Dynamic Range, Superb Temperature Stability, Tiny 2mm × 2mm SC70 Package, Low Power Consumption 5522fa LT 1105 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2003 Figure 18. Standard Evaluation Board Layout RELATED PARTS PART NUMBER LTC 1748 LT5504 LTC5505 LT5506 LTC5507 LTC5508 LTC5509 LT5511 LT5512 LT5515 LT5516 LT5521 LT5525 LT5527 LT5528 LTC5532 LTC5534 ® DESCRIPTION 14-Bit, 80Msps, Low Noise ADC 800MHz to 2.7GHz RF Measuring Receiver 300MHz to 3.5GHz RF Power Detector 500MHz Quadrature IF Demodulator with VGA 100kHz to 1GHz RF Power Detector 300MHz to 7GHz RF Power Detector 300MHz to 3GHz RF Power Detector High Signal Level Up Converting Mixer High Signal Level Active Mixer 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator Very High Linearity Up Converting Mixer 0.8GHz to 2.5GHz Low Power Down Converting Mixer 400MHz to 3.7GHz High Signal Level Downconverting Mixer LTC2222/LTC2223 12-Bit, 105Msps/80Msps ADC 1.5GHz to 2.5GHz Direct Conversion Demodulator 20dBm IIP3, Integrated LO Quadrature Generator 2GHz High Linearity Direct Quadrature Modulator OIP3 = 21.8dBm, –159dBm/Hz Noise Floor, –66dBc Four Channel ACPR, 50Ω Single-End RF Output 300MHz to 7GHz Precision RF Power Detector 50MHz to 3GHz Log-Linear RF Power Detector 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● W UU www.linear.com