LT5526

LT5526 High Linearity, Low Power Downconverting Mixer FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Operation up to 2GHz Broadband RF, LO and IF Operation High Input IP3: +16.5dBm at 900MHz Typical Conversion Gain: 0.6dB at 900MHz SSB Noise Figure: 11dB at 900MHz On-Chip 50Ω LO Match Integrated LO Buffer: –5dBm Drive Level High LO-RF and LO-IF Isolation Low Supply Current: 28mA Typ Enable Function Single 5V Supply 16-Lead QFN (4mm × 4mm) Package The LT®5526 is a low power broadband mixer optimized for high linearity applications such as point-to-point data transmission, cable infrastructure and wireless infrastructure systems. The device includes an internally matched high speed LO amplifier driving a double-balanced active mixer core. An integrated RF buffer amplifier provides excellent LO-RF isolation. The RF and IF ports can be easily matched across a broad range of frequencies for use in a wide variety of applications. The LT5526 offers a high performance alternative to passive mixers. Unlike passive mixers which have conversion loss and require high LO drive levels, the LT5526 delivers conversion gain at significantly lower LO input levels and is much less sensitive to LO power level variations. , LTC and LT are registered trademarks of Linear Technology Corporation. APPLICATIO S ■ ■ ■ ■ Point-to-Point Data Communication Systems Wireless Infrastructure Cable Downlink Infrastructure High Linearity Receiver Applications TYPICAL APPLICATIO High Signal Level Frequency Downconversion VCC 5V DC EN BIAS OUTPUT POWER (dBm/TONE) VCC2 VCC1 900MHz LNA 900MHz RF + 140MHz IF + VGA ADC RF – IF – GND LT5526 LO+ LO – LO INPUT –5dBm 5526 TA01 U IF Output Power and IM3 vs RF Input Power (Two Input Tones) 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –20 IM3 TA = 25°C fIF = 140MHz fRF = 900MHz fLO = 760MHz PLO = – 5dBm –10 –15 –5 RF INPUT POWER (dBm/TONE) 0 5526 TA02 U U POUT 5526f 1 LT5526 ABSOLUTE MAXIMUM RATINGS (Note 1) PACKAGE/ORDER INFORMATION TOP VIEW LO+ LO– NC NC Supply Voltage ...................................................... 5.5V Enable Voltage ............................... –0.3V to VCC + 0.3V LO Input Power ............................................... +10dBm LO+ to LO– Differential DC Voltage ......................... ±1V RF Input Power ................................................ +10dBm RF+ to RF– Differential DC Voltage ....................... ±0.7V Operating Temperature Range ................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C Junction Temperature (TJ)................................... 125°C ORDER PART NUMBER 12 GND 16 15 14 13 NC 1 RF + 2 RF – 3 NC 4 5 EN LT5526EUF 17 11 IF+ 10 IF– 9 GND 6 VCC1 7 VCC2 8 NC UF PART MARKING 5526 UF PACKAGE 16-LEAD (4mm × 4mm) PLASTIC QFN TJMAX = 125°C, θJA = 37°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB. NC PINS SHOULD BE GROUNDED Consult LTC Marketing for parts specified with wider operating temperature ranges. DC ELECTRICAL CHARACTERISTICS VCC = 5V, EN = 3V, TA = 25°C (Note 3), unless otherwise noted. Test circuit shown in Figure 1. PARAMETER Power Supply Requirements (VCC) Supply Voltage Supply Current Shutdown Current Enable (EN) Low = Off, High = On EN Input High Voltage (On) EN Input Low Voltage (Off) Enable Pin Input Current Turn-On Time (Note 5) Turn-Off Time (Note 5) EN = 5V EN = 0V 55 0.01 3 6 3 0.3 V V µA µA µs µs VCC = 5V EN = Low 3.6 5 28 5.3 33 100 V mA µA CONDITIONS MIN TYP MAX UNITS AC ELECTRICAL CHARACTERISTICS PARAMETER RF Input Frequency Range (Note 4) LO Input Frequency Range (Note 4) IF Output Frequency Range (Note 4) (Notes 2, 3) MIN TYP 0.1 to 2000 0.1 to 2500 0.1 to 1000 MAX UNITS MHz MHz MHz CONDITIONS Requires RF Matching Requires DC Blocks Requires IF Matching VCC = 5V, EN = 3V, TA = 25°C. Test circuits shown in Figures 1 and 2. (Notes 2, 3) PARAMETER RF Input Return Loss LO Input Return Loss IF Output Return Loss LO Input Power CONDITIONS ZO = 50Ω, External Match ZO = 50Ω, External DC Blocks ZO = 50Ω, External Match MIN TYP 15 15 15 –10 to 0 MAX UNITS dB dB dB dBm 5526f 2 U W U U WW W LT5526 AC ELECTRICAL CHARACTERISTICS PARAMETER RF to LO Isolation CONDITIONS VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dBm (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), PLO = –5dBm, unless otherwise noted. Test circuits shown in Figures 1 and 2. (Notes 2, 3) MIN TYP 69 55 50 0.6 0.6 0.4 –0.013 15.2 16.5 14.1 12.7 11.0 13.7 –65 –65 –55 –56 –74 –37 –75 –72 –48 –65 –68 –56 5 5 1 MAX UNITS dB dB dB dB dB dB dB/°C dBm dBm dBm dB dB dB dBm dBm dBm dBm dBm dBm dBc dBc dBc dBc dBc dBc dBm dBm dBm fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz TA = – 40°C to 85°C fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz 350MHz: fRF = 385MHz at –15dBm, fLO = 420MHz 900MHZ: fRF = 830MHz at –15dBm, fLO = 760MHz 1900MHz: fRF = 1830MHz at –15dBm, fLO = 1760MHz 350MHz: fRF = 396.67MHz at –15dBm, fLO = 420MHz 900MHZ: fRF = 806.67MHz at –15dBm, fLO = 760MHz 1900MHz: fRF = 1806.67MHz at –15dBm, fLO = 1760MHz fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz Conversion Gain Conversion Gain vs Temperature Input 3rd Order Intercept Single Sideband Noise Figure LO to RF Leakage LO to IF Leakage 2RF-2LO Output Spurious Product (fRF = fLO ± fIF/2) 3RF-3LO Output Spurious Product (fRF = fLO ± fIF/3) Input 1dB Compression Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The 900MHz and 1900MHz performance is measured with the test circuit shown in Figure 1. The 350MHz performance is measured using the test circuit in Figure 2. Note 3: Specifications over the –40°C to 85°C temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Operation over a wider frequency range is possible with reduced performance. Consult the factory for information and assistance. Note 5: Turn-on and turn-off times correspond to a change in the output level by 40dB. 5526f 3 LT5526 900MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF – 140MHz, PLO = –5dBm, IF output measured at 140MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain, IIP3 and SSB NF vs RF Frequency (Low Side LO) 20 18 16 14 12 10 8 6 4 2 0 GAIN SSB NF IIP3 20 TA = 25°C fIF = 140MHz GAIN AND NF (dB), IIP3 (dBm) 18 16 14 12 10 8 6 4 2 0 800 1000 1200 RF FREQUENCY (MHz) 1400 5526 G01 TYPICAL AC PERFOR A CE CHARACTERISTICS GAIN AND NF (dB), IIP3 (dBm) GAIN AND NF (dB), IIP3 (dBm) –2 600 Conversion Gain and IIP3 vs LO Input Power 25 20 fLO = 760MHz fIF = 140MHz GAIN (dB), IIP3 (dBm) IIP3 10 5 GAIN 0 –5 –12 –10 25°C 85°C –40°C 13 12 11 10 9 8 –12 –10 –8 –4 –2 –6 LO INPUT POWER (dBm) 0 2 5526 G05 LEAKAGE (dBm) 15 NOISE FIGURE (dB) –6 –4 –2 –8 LO INPUT POWER (dBm) 0 5526 G04 Conversion Gain and IIP3 vs Supply Voltage 25 20 fLO = 760MHz fIF = 140MHz 0 OUTPUT POWER (dBm/TONE) GAIN (dB), IIP3 (dBm) RETURN LOSS (dB) 15 10 5 GAIN 0 –5 2.8 25°C 85°C –40°C IIP3 3.2 4.8 3.6 4.0 4.4 SUPPLY VOLTAGE (V) 5.2 5526 G07 4 UW 2 Conversion Gain, IIP3 and SSB NF vs RF Frequency (High Side LO) IIP3 TA = 25°C fIF = 140MHz Conversion Gain, IIP3 and SSB NF vs Temperature 25 20 IIP3 15 SSB NF 10 5 GAIN 0 –5 –50 –30 LOW AND HIGH SIDE LO HIGH SIDE LO HIGH SIDE LO LOW SIDE LO fIF = 140MHz LOW SIDE LO SSB NF GAIN –2 600 800 1000 1200 RF FREQUENCY (MHz) 1400 5526 G02 30 50 –10 10 TEMPERATURE (°C) 70 90 5526 G03 SSB Noise Figure vs LO Input Power 16 fLO = 760MHz 15 fIF = 140MHz 14 25°C 85°C –40°C LO-IF and LO-RF Leakage vs LO Input Frequency 0 TA = 25°C –10 fIF = 140MHz –20 –30 –40 –50 –60 –70 –80 –90 –100 500 700 1100 1300 900 LO FREQUENCY (MHz) 1500 5526 G06 LO-IF LO-RF RF, LO and IF Port Return Loss vs Frequency 0 IF Output Power and IM3 vs RF Input Power (Two Input Tones) –10 –20 –30 –40 –50 –60 –70 –80 –90 IM3 fLO = 760MHz fIF = 140MHz 25°C 85°C –40°C –10 –15 –5 RF INPUT POWER (dBm/TONE) 0 5526 G09 RF PORT –5 –10 IF PORT –15 –20 LO PORT –25 –30 5.6 0 500 1000 1500 FREQUENCY (MHz) 2000 5526 G08 POUT –100 –20 5526f LT5526 900MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF – 140MHz, PLO = –5dBm, IF output measured at 140MHz, unless otherwise noted. Test circuit shown in Figure 1. IFOUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power 10 0 –10 –30 IF OUT fRF = 900MHz OUTPUT POWER (dBm) TYPICAL AC PERFOR A CE CHARACTERISTICS OUTPUT POWER (dBm) –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –20 2RF-2LO fRF = 830MHz TA = 25°C fLO = 760MHz fIF = 140MHz –10 –15 –5 RF INPUT POWER (dBm) 0 5526 G10 1900MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF – 140MHz, PLO = –5dBm, IF output measured at 140MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain and IIP3 vs RF Frequency 20 18 16 GAIN (dB), IIP3 (dBm) 14 12 10 8 6 4 2 0 –2 1400 1600 1800 2000 RF FREQUENCY (MHz) 2200 5526 G12 IIP3 fLO = fRF – fIF fIF = 140MHz OUTPUT POWER (dBm) NOISE FIGURE (dB) 25°C 85°C –40°C GAIN Conversion Gain and IIP3 vs LO Input Power 20 16 fLO = 1760MHz 18 fIF = 140MHz GAIN (dB), IIP3 (dBm) NOISE FIGURE (dB) 14 12 10 8 6 4 2 0 –2 –12 –10 –6 –4 –8 –2 LO INPUT POWER (dBm) 0 2 5526 G15 IIP3 25°C 85°C –40°C GAIN 15 14 13 12 11 10 –12 –10 –8 –4 –2 –6 LO INPUT POWER (dBm) 0 2 5526 G16 LEAKAGE (dBm) UW 2 × 2 and 3 × 3 Spurs vs LO Input Power TA = 25°C –40 fLO = 760MHz fIF = 140MHz –50 PRF = –15dBm –60 –70 –80 –90 –100 –110 –16 –12 2RF-2LO fRF = 830MHz 3RF-3LO fRF = 806.67MHz 3RF-3LO fRF = 806.67MHz –8 0 –4 LO INPUT POWER (dBm) 4 5526 G11 SSB Noise Figure vs RF Frequency 18 10 IFOUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power 25°C 85°C –40°C 0 –10 –20 –30 –40 –50 2RF-2LO –60 fRF = 1830MHz –70 –80 –90 TA = 25°C fLO = 1760MHz fIF = 140MHz –15 –10 –5 RF INPUT POWER (dBm) 0 5526 G14 fLO = fRF – fIF 17 fIF = 140MHz 16 15 14 13 12 11 10 1400 1800 1600 2000 RF FREQUENCY (MHz) IF OUT fRF = 1900MHz 3RF-3LO fRF = 1806.67MHz 2200 5526 G13 –100 –20 SSB Noise Figure vs LO Input Power 18 fLO = 1760MHz 17 fIF = 140MHz 16 LO-IF and LO-RF Leakage vs LO Frequency 0 TA = 25°C –10 fIF = 140MHz –20 –30 –40 –50 –60 –70 –80 –90 LO-RF LO-IF 25°C 85°C –40°C –100 900 1100 1300 1500 1700 1900 2100 2300 2500 LO FREQUENCY (MHz) 5526 G17 5526f 5 LT5526 350MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF + 70MHz, PLO = –5dBm, IF output measured at 70MHz, unless otherwise noted. Test circuit shown in Figure 2. Conversion Gain and IIP3 vs RF Frequency 20 18 16 GAIN (dB), IIP3 (dBm) TYPICAL AC PERFOR A CE CHARACTERISTICS SSB Noise Figure vs RF Frequency fLO = fRF + fIF 17 fIF = 70MHz 16 NOISE FIGURE (dB) 15 14 13 12 GAIN fLO = fRF + fIF fIF = 70MHz IIP3 14 12 10 8 6 4 2 0 OUTPUT POWER (dBm) 25°C 85°C –40°C –2 200 250 300 350 400 RF FREQUENCY (MHz) 450 5526 G18 Conversion Gain and IIP3 vs LO Input Power 20 16 fLO = 420MHz 18 fIF = 70MHz 20 GAIN (dB), IIP3 (dBm) 12 10 8 6 4 2 0 16 15 14 13 12 11 LEAKAGE (dBm) IIP3 NOISE FIGURE (dB) 14 25°C 85°C –40°C GAIN –2 –12 –10 –6 –4 –8 –2 LO INPUT POWER (dBm) 0 5526 G21 TYPICAL DC PERFOR A CE CHARACTERISTICS Supply Current vs Supply Voltage 32 30 SUPPLY CURRENT (mA) 14 12 28 26 24 22 20 18 16 14 2.8 3.2 3.6 4.0 4.4 4.8 SUPPLY VOLTAGE (V) 25°C 85°C –40°C 5.2 5.6 SHUTDOWN CURRENT (µA) 6 UW UW 500 IFOUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power 20 18 25°C 85°C –40°C 0 –20 –40 –60 –80 –100 –120 –20 IF OUT fRF = 350MHz 3RF-3LO fRF = 396.67MHz 2RF-2LO fRF = 385MHz TA = 25°C fLO = 420MHz fIF = 70MHz –15 –10 –5 RF INPUT POWER (dBm) 0 5526 G20 11 10 300 320 380 360 RF FREQUENCY (MHz) 340 400 5526 G19 SSB Noise Figure vs LO Input Power fLO = 420MHz 19 fIF = 70MHz 18 17 25°C 85°C –40°C LO-IF and LO-RF Leakage vs LO Frequency 0 TA = 25°C –10 fIF = 70MHz –20 –30 –40 –50 –60 –70 –80 –90 LO-RF LO-IF 2 10 –12 –10 –6 –4 –8 –2 LO INPUT POWER (dBm) 0 2 5526 G22 –100 150 200 250 300 350 400 450 500 550 LO FREQUENCY (MHz) 5526 G23 Test circuit shown in Figure 1. Shutdown Current vs Supply Voltage 25°C 85°C –40°C 10 8 6 4 2 0 2.8 3.2 3.6 4.0 4.4 4.8 SUPPLY VOLTAGE (V) 5.2 5.6 5526 G24 5526 G25 5526f LT5526 PI FU CTIO S NC (Pins 1, 4, 8, 13, 16): Not Connected Internally. These pins should be grounded on the circuit board for improved LO-to-RF and LO-to-IF isolation. RF+, RF– (Pins 2, 3): Differential Inputs for the RF Signal. These pins must be driven with a differential signal. Each pin must also be connected to a DC ground capable of sinking 7.5mA (15mA total). This DC bias return can be accomplished through the center-tap of a balun or with shunt inductors. An impedance transformation is required to match the RF input to 50Ω (or 75Ω). EN (Pin 5): Enable Pin. When the input voltage is higher than 3V, the mixer circuits supplied through Pins 6, 7, 10 and 11 are enabled. When the input voltage is less than 0.3V, all circuits are disabled. Typical enable pin input current is 55µA for EN = 5V and 0.01µA when EN = 0V. VCC1 (Pin 6): Power Supply Pin for the LO Buffer Circuits. Typical current consumption is 11mA. This pin should be externally connected to the other VCC pins and decoupled with 100pF and 0.01µF capacitors. VCC2 (Pin 7): Power Supply Pin for the Bias Circuits. Typical current consumption is 2.5mA. This pin should be externally connected to the other VCC pins and decoupled with 100pF and 0.01µF capacitors. GND (Pins 9, 12): Ground. These pins are internally connected to the Exposed Pad for better isolation. They should be connected to ground on the circuit board, though they are not intended to replace the primary grounding through the Exposed Pad of the package. IF– and IF+ (Pins 10, 11): Differential Outputs for the IF Signal. An impedance transformation may be required to match the outputs. These pins must be connected to VCC through impedance matching inductors, RF chokes or a transformer center-tap. LO–, LO+ (Pins 14, 15): Differential Inputs for the Local Oscillator Signal. The LO input is internally matched to 50Ω; however, external DC blocking capacitors are required because these pins are internally biased to approximately 1.7V DC. Either LO input can be driven with a single-ended source while connecting the unused input to ground through a DC blocking capacitor. Exposed Pad (Pin 17): Circuit Ground Return for the Entire IC. This must be soldered to the printed circuit board ground plane. BLOCK DIAGRA W U U U 17 EXPOSED PAD 15 LO+ 14 LO– HIGH SPEED LO BUFFER LINEAR AMPLIFIER GND IF+ IF– DOUBLEBALANCED MIXER BIAS EN 5 7 VCC2 6 VCC1 5526 BD 12 11 10 9 2 3 RF+ RF– GND 5526f 7 LT5526 TEST CIRCUITS C6 LOIN 760MHz 16 1 6 3 1 4 C1 TL1 2 17 NC NC RF + C5 0.018" 0.062" ER = 4.4 RF GND DC 15 LO + 14 LO– 13 NC GND IF 12 L3 0.018" GND T1 RFIN 900MHz 2 T2 C4 1 2 3 4 IFOUT 140MHz 5 + 11 TL2 LT5526 3 4 RF – NC EN 5 6 7 IF – GND 10 9 C3 L2 1900MHz INPUT MATCHING: C1: 1.5pF T1: LDB311G9010C-440 VCC1 VCC2 NC 8 5526 F01 EN VCC C2 C8 REF DES C1 C2 C3 C4, C5, C6 C8 VALUE 2.7pF 0.01µF 1.2pF 100pF 1µF SIZE 0402 0402 0402 0402 0603 PART NUMBER AVX 04025A2R7CAT AVX 04023C103JAT AVX 04025A1R2BAT AVX 04025A101JAT Taiyo Yuden LMK107BJ105MA REF DES L2, L3 T1 T2 TL1, TL2 VALUE 150nH 1:1 4:1 Z O = 80 SIZE 1608 1206 SM-22 L = 1.25mm PART NUMBER Toko LL1608-FSR15J Murata LDB31900M05C-417 M/A-COM ETC4-1-2 Figure 1. Test Schematic for 900MHz Application. For 1900MHz or Other Applications, Component Values Are as Indicated in Figure 1 and in Applications Section C6 LOIN 420MHz 16 L1 1 2 L5 L4 C9 17 NC NC RF + C5 0.018" 0.062" ER = 4.4 RF GND DC 15 LO + 14 LO– 13 NC GND IF 12 L3 0.018" GND C7 RFIN 350MHz T2 C4 1 2 3 4 IFOUT 70MHz 5 + 11 LT5526 3 4 RF – NC EN EN 5 6 7 IF – GND 10 9 C3 L2 VCC1 VCC2 NC 8 5526 F02 VCC C2 C8 REF DES C2 C3 C4, C5, C6 C8 C7, C9 VALUE 0.01pF 3.9pF 100pF 1µF 10pF SIZE 0402 0402 0402 0603 0402 PART NUMBER AVX 04023C103JAT AVX 04025A3R9BAT AVX 04025A101JAT Taiyo Yuden LMK107BJ105MA AVX 04025A100JAT REF DES L1, L4 L2, L3 L5 T2 VALUE 15nH 270nH 100nH 4:1 SIZE 1005 1608 1005 SM-22 PART NUMBER Toko LL1005-FH15NJ Toko LL1608-FSR27J Toko LL1005-FHR10J M/A-COM ETC4-1-2 Figure 2. Test Schematic for 350MHz Applications 5526f 8 LT5526 APPLICATIO S I FOR ATIO The LT5526 consists of a double-balanced mixer, RF buffer amplifier, high speed limiting LO buffer and bias/enable circuits. The IC has been optimized for downconverter applications with RF input signals to 2GHz and LO signals to 2.5GHz. With proper matching, the IF output can be tuned for operation at frequencies from 0.1MHz to 1GHz. Operation over a wider input frequency range is possible, though with reduced performance. The RF, LO and IF ports are all differential, though the LO port is internally matched for single-ended drive (with external DC blocking capacitors). The LT5526 is characterized and production tested using single-ended LO drive. Low side or high side LO injection can be used. RF Input Port Figure 3 shows a simplified schematic of the internal RF input circuit and example external impedance matching components for a 900MHz application. Each RF input pin requires a low resistance DC return to ground capable of handling 7.5mA. The DC ground can be realized using the center-tap of an input transformer (T1), as shown, or through matching inductors or bias chokes connected from Pins 2 and 3 to ground. RFIN 900MHz T1 2 1:1 6 3 1 4 T1: LDB31900M05C-417 Figure 3. RF Input with External Matching for 900MHz Application U A lowpass impedance matching network is used to transform the differential input impedance at Pins 2 and 3 to the optimum value for the balun output, as illustrated in Figures 3 and 4. To assist in matching, Table 1 lists the differential input impedance and reflection coefficient at Pins 2 and 3 for several RF frequencies. The following example demonstrates how to design a lowpass impedance transformation network for the RF input. From Table 1, the differential input impedance at 900MHz is: RRF + jXRF = 31.3 + j8.41Ω. The 8.41Ω reactance is divided into two halves, with one half on each side of the 31.3Ω internal load resistor, as shown in Figure 4. The matching network consists of additional external series inductance and a capacitor (C1) in parallel with the desired source impedance (50Ω in this example). The external capacitance and inductance are calculated as follows: n = RS/RRF = 50/31.3 = 1.597 Q = √(n – 1) = 0.773 XC = RS/Q = 64.7Ω C1 = 1/(ω • XC) = 2.74pF XL = RRF • Q = 24.2Ω XEXT = XL – XRF = 15.8Ω LEXT = XEXT/ω = 2.79nH TL1 Z0 = 80Ω LNG = 1.25mm 2 C1 2.7pF TL2 Z0 = 80Ω LNG = 1.25mm 3 7.5mA RF+ LT5526 RF– 7.5mA VBIAS 5526 F03 W UU 5526f 9 LT5526 APPLICATIO S I FOR ATIO The external inductance is split in half (1.4nH), with each half connected between the pin and C1 as shown in Figure 4. The inductance may be realized with short, high impedance printed transmission lines, as in Figure 3, which provides a compact board layout and reduced component count. A 1:1 transformer (T1 in Figure 3) converts the 50Ω differential impedance to a 50Ω singleended input. LT5526 1/2 XEXT 2 RS 50Ω C1 1/2 XEXT 3 RF+ 1/2 XRF RRF RF– 1/2 XRF 5526 F04 Figure 4. RF Input Impedance Matching Topology Table 1. RF Input Differential Impedance FREQUENCY (MHz) 70 140 240 360 450 750 900 1500 1900 INPUT IMPEDANCE 28.0 + j1.34 28.2 + j2.46 28.4 + j3.30 28.4 + j4.75 28.6 + j5.42 29.9 + j7.39 31.3 + j8.41 38.3 + j17.9 42.5 + j24.6 REFLECTION COEFFICIENT MAG ANGLE 0.282 0.280 0.278 0.282 0.280 0.268 0.251 0.237 0.269 176 172 169 164 162 155 112 92.2 150 RETURN LOSS (dB) An alternative method of driving the RF input is to use a lumped-element balun configuration, as shown in Figure 5. This type of network may provide a more costeffective solution for narrow band applications (fractional bandwidths < 30%). The actual balun is composed of components C7, C9, L1 and L4, and their values may be estimated as follows: 10 U RFIN 50Ω C7 L1 2 L5 L4 3 C9 5526 F05 W UU LT5526 RF+ 1/2 XRF RRF RF– 1/2 XRF Figure 5. Schematic of Lumped Element Input Balun L1 = L 4 = C7 = C9 = RS • RRF ω 1 ω RS • RRF Where RS is the source resistance (50Ω) and RRF is the mixer input resistance from Table 1. The computed values are only approximate, as they don’t factor in the effects of XRF or the parasitics of the external components. Actual component values for several frequencies are listed in Table 2, and measured return loss vs. frequency is plotted for each example in Figure 6. 0 –5 –10 –15 –20 –25 100 300 500 700 900 FREQUENCY (MHz) 1100 1300 5526 F06 Figure 6. Input Return Loss with Lumped Element Baluns Using Values from Table 2 5526f LT5526 APPLICATIO S I FOR ATIO The purpose of L5 is to provide a DC return path for Pin 3. (Another possible placement for L5 would be across Pins 2 and 3, thus using L1 as part of the DC return path.) The inductance and resonant frequency of L5 should be large enough that they don’t significantly affect the input impedance and performance of the balun. Either multilayer or wire-wound inductors may be used. The impact of L5 on input matching can be reduced by adding a capacitor in parallel with it. In this case, the capacitor value should be the same as C7 and C9, while L5 should have the same value as L1 and L4. Table 2. Component Values for Lumped Balun on RF Input FREQUENCY (MHz) 240 380 680 900 1100 L (nH) 27 15 6.8 6.8 3.9 C (pF) 18 10 4.7 3.9 2.7 L5 (nH) 100 100 47 18 15 BANDWIDTH (MHz) 100 130 215 230 230 RETURN LOSS (dB) LO Input Port The LO buffer amplifier consists of high speed limiting differential amplifiers designed to drive the mixer core for high linearity. The LO+ and LO– pins are designed for singleended drive, though differential drive can be used if desired. The LO input is internally matched to 50Ω; however, external DC blocking capacitors are required because the LO pins are internally biased to approximately 1.7V DC. A simplified schematic for the LO input is shown in Figure 7. C5 100pF 14 LO– LT5526 C6 100pF LOIN 50Ω 15 VCC LO + 50Ω Figure 7. LO Input Schematic U External 100pF DC blocking capacitors provide a broadband match from about 110MHz to 2.7GHz, as shown in the plot of return loss vs frequency in Figure 8. The LO input match can be improved at lower frequencies by increasing the values of C5 and C6. 0 –5 –10 –15 –20 –25 –30 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 5526 F08 W UU Figure 8. Typical LO Input Return Loss with 100pF DC Blocking Capacitors Table 3. Single-Ended LO Input Impedance FREQUENCY (MHz) 400 600 800 1000 1200 1400 1600 1800 INPUT IMPEDANCE 63.4 – j12.0 61.6 – j8.38 61.8 – j6.86 62.4 – j7.09 62.8 – j8.32 62.6 – j10.3 61.9 – j12.6 60.5 – j14.4 REFLECTION COEFFICIENT MAG ANGLE 0.158 0.128 0.122 0.127 0.135 0.144 0.154 0.160 –35.8 –31.5 –26.6 –26.1 –28.8 –34.0 –40.3 –46.2 IF Output Port A simplified schematic of the IF output circuit is shown in Figure 9. The output pins, IF+ and IF–, are internally connected to the collectors of the mixer switching transistors. Both pins must be biased at the supply voltage, which can be applied through the center-tap of a transformer or 5526 F07 5526f 11 LT5526 APPLICATIO S I FOR ATIO through impedance-matching inductors. Each IF pin draws about 7.5mA of supply current (15mA total). For optimum single-ended performance, these differential outputs must be combined externally through an IF transformer or balun. LT5526 IF+ 575Ω 0.7pF IF– VCC 5526 F09 L3 11 C3 VCC L2 10 Figure 9. IF Output with External Matching An equivalent small-signal model for the output is shown in Figure 10. The output impedance can be modeled as a 575Ω resistor in parallel with a 0.7pF capacitor. For most applications, the bond-wire inductance (0.7nH per side) can be ignored. LT5526 0.7nH IF+ L3 11 C3 0.7nH IF– L2 10 RL 200Ω RIF 574Ω CIF 0.7pF 5526 F10 Figure 10. IF Output Small-Signal Model The external components, C3, L2 and L3 form an impedance transformation network to match the mixer output impedance to the input impedance of transformer T2. The values for these components can be estimated using the same equations that were used for the input matching 12 U network, along with the impedance values listed in Table 4. As an example, at an IF frequency of 140MHz and RL = 200Ω (using a 4:1 transformer for T2), n = RIF/RL = 574/200 = 2.87 Q = √(n – 1) = 1.368 XC = RIF/Q = 420Ω C = 1/(ω • XC) = 2.71pF C3 = C – CIF = 2.01pF XL = RL • Q = 274Ω L2 = L3 = XL/2ω = 156nH Table 4. IF Differential Impedance (Parallel Equivalent) FREQUENCY (MHz) 70 140 240 450 750 860 1000 1250 1500 OUTPUT IMPEDANCE 575|| – j3.39k 574|| – j1.67k 572|| – j977 561|| – j519 537|| – j309 525|| – j267 509|| – j229 474|| – j181 435|| – j147 REFLECTION COEFFICIENT MAG ANGLE 0.840 0.840 0.840 0.838 0.834 0.831 0.829 0.822 0.814 –1.8 –3.5 –5.9 –11.1 –18.6 –21.3 –24.8 –31.3 –38.0 T2 4:1 IFOUT W UU Low Cost Output Match For low cost applications in which the required fractional bandwidth of the IF output is less than 25%, it may be possible to replace the output transformer with a lumpedelement network similar to that discussed earlier for the RF input. This circuit is shown in Figure 11, where L11, L12, C11 and C12 form a narrowband bridge balun. These element values are selected to realize a 180° phase shift at the desired IF frequency and can be estimated by using the equations below. In this case, RIF is the mixer output resistance and RL is the load resistance (50Ω). 5526f LT5526 APPLICATIO S I FOR ATIO R •R L11 = L12 = IF L ω 1 C11 = C12 = ω RIF • RL RETURN LOSS (dB) Inductors L13 and L14 provide a DC path between V CC and the IF+ pin. Only one of these inductors is required. Low cost multilayer chip inductors are adequate for L11, L12 and L13. If L14 is used instead of L13, a larger value is usually required, which may require the use of a wirewound inductor. Capacitor C13 is a DC block which can also be used to adjust the impedance match. Capacitor C14 is a bypass capacitor. IF+ C12 L11 C13 C11 L13 OPT C14 L14 OPT IFOUT 50Ω GAIN (dB), IIP3 (dBm) IF– L12 VCC 5526 F11 Figure 11. Narrowband Bridge IF Balun Typical return loss of the IF output port is plotted versus frequency in Figure 12 for a 240MHz balun design. For this example, L11 = L12 = 100nH, C11 = C12 = 3.9pF, L14 = 560nH and C13 = 100pF. Performance versus IF output frequency is shown in Figure 13 in the case of a 1900MHz RF input. These results show that the usable IF bandwidth is greater than 60MHz, assuming tight tolerance matching components. Contact the factory for applications assistance with this circuit. U 0 –5 –10 –15 –20 –25 100 150 200 250 300 FREQUENCY (MHz) 350 400 5526 F12 W UU Figure 12. Typical Return Loss Performance with a 240MHz Narrowband Bridge IF Balun (Swept IF) 20 15 IIP3 10 TA = 25°C fRF = 1900MHz fLO = fRF – fIF PLO = –5dBm 5 GAIN 0 –5 190 210 250 270 230 IF FREQUENCY (MHz) 290 5526 F13 Figure 13. Typical Gain and IIP3 Performance with a 240MHz Narrowband Bridge IF Balun (Swept IF) 5526f 13 LT5526 TYPICAL APPLICATIO S Evaluation Board Layouts Top Layer Silkscreen 14 U Top Layer Metal 5526f LT5526 PACKAGE DESCRIPTIO 4.35 ± 0.05 2.15 ± 0.05 2.90 ± 0.05 (4 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD 4.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) 0.75 ± 0.05 R = 0.115 TYP 0.55 ± 0.20 15 16 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U UF Package 16-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1692) 0.72 ± 0.05 PACKAGE OUTLINE 0.30 ± 0.05 0.65 BSC 1 2.15 ± 0.10 (4-SIDES) 2 (UF) QFN 1103 0.200 REF 0.00 – 0.05 0.30 ± 0.05 0.65 BSC 5526f 15 LT5526 RELATED PARTS PART NUMBER Infrastructure LT5511 LT5512 LT5514 LT5515 LT5516 LT5517 LT5519 LT5520 LT5521 LT5522 High Linearity Upconverting Mixer DC-3GHz High Signal Level Downconverting Mixer Ultralow Distortion, IF Amplifier/ADC Driver with Digitally Controlled Gain 1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 40MHz to 900MHz Quadrature Demodulator 0.7GHz to 1.4GHz High Linearity Upconverting Mixer 1.3GHz to 2.3GHz High Linearity Upconverting Mixer 3.7GHz Very High Linearity Mixer 600MHz to 2.7GHz High Signal Level Downconverting Mixer RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer DC to 3GHz, 21dBm IIP3, Integrated LO Buffer 850MHz Bandwidth, 47dBm OIP3 at 100MHz, 10.5dB to 33dB Gain Control Range 20dBm IIP3, Integrated LO Quadrature Generator 21.5dBm IIP3, Integrated LO Quadrature Generator 21dBm IIP3, Integrated LO Quadrature Generator 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50Ω Matching, Single-Ended LO and RF Ports Operation 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50Ω Matching, Single-Ended LO and RF Ports Operation 24.2dBm IIP3 at 1.95GHz, 12.5dB SSBNF, –42dBm LO Leakage, Supply Voltage = 3.15V to 5.25V 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50Ω Single-Ended RF and LO Ports 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.25V Supply 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply 100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply 44dB Dynamic Range, Temperature Compensated, SC70 Package 36dB Dynamic Range, Low Power Consumption, SC70 Package Precision VOUT Offset Control, Shutdown, Adjustable Gain Precision VOUT Offset Control, Shutdown, Adjustable Offset Precision VOUT Offset Control, Adjustable Gain and Offset ±1dB Output Variation over Temperature, 38ns Response Time 1.8V to 5.25V Supply, Dual-Gain LNA, Mixer, LO Buffer 1.8V to 5.25V Supply, 70MHz to 400MHz IF, 84dB Limiting Gain, 90dB RSSI Range 1.8V to 5.25V Supply, Four-Step RF Power Control, 120MHz Modulation Bandwidth 1.8V to 5.25V Supply, 40MHz to 500MHz IF, –4dB to 57dB Linear Power Gain, 8.8MHz Baseband Bandwidth 17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V Supply, –7dB to 56dB Linear Power Gain 500MHz BW S/H, 71.8dB SNR, 87dB SFDR 500MHz BW S/H, 75.5dB SNR, 90dB SFDR, 2.25VP-P or 1.35VP-P Input Ranges DESCRIPTION COMMENTS RF Power Detectors LT5504 LTC®5505 LTC5507 LTC5508 LTC5509 LTC5530 LTC5531 LTC5532 LT5534 LT5500 LT5502 LT5503 LT5506 LT5546 800MHz to 2.7GHz RF Measuring Receiver RF Power Detectors with >40dB Dynamic Range 100kHz to 1000MHz RF Power Detector 300MHz to 7GHz RF Power Detector 300MHz to 3GHz RF Power Detector 300MHz to 7GHz Precision RF Power Detector 300MHz to 7GHz Precision RF Power Detector 300MHz to 7GHz Precision RF Power Detector 50MHz to 3GHz RF Power Detector with 60dB Dynamic Range 1.8GHz to 2.7GHz Receiver Front End 400MHz Quadrature IF Demodulator with RSSI 1.2GHz to 2.7GHz Direct IQ Modulator and Upconverting Mixer 500MHz Quadrature IF Demodulator with VGA 500MHz Ouadrature IF Demodulator with VGA and 17MHz Baseband Bandwidth 12-Bit, 80Msps 14-Bit, 80Msps Low Voltage RF Building Blocks Wide Bandwidth ADCs LT1749 LT1750 5526f 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● LT/TP 0704 1K • PRINTED IN THE USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2004