LT5554IUH-PBF

FEATURES n n n n n n n n n n n LT5554 Broadband Ultra Low Distortion 7-Bit Digitally Controlled VGA DESCRIPTION The LT®5554 is a 7-bit digitally controlled programmable gain (PG) amplifier with 16dB gain control range. It consists of a 50Ω input variable attenuator, followed by a high linearity variable transconductance amplifier. The coarse 4dB input attenuator step is implemented via 2-bits of digital control (PG5, PG6). The fine transconductance amplifier 0.125dB step within 3.875dB gain control range is set via 5-bits digital control (PG0 to PG4). The LT5554 gain control inputs (PGx) and the STROBE input can be directly coupled to TTL or ECL drivers. The seven parallel gain control inputs time skew can be eliminated by using the STROBE input positive transition. The internal output resistor RO = 400Ω limits the maximum overall gain to 36dB for open outputs. The internal circuitry of open output collectors enables the LT5554 to be unconditionally stable over any loading conditions (including external SAW filters) and provides –80dB reverse isolation at 300MHz. The LT5554 is internally protected during overdrive and has an on-chip power supply regulator. With 0.125dB step resolution and 5ns settling time, the LT5554 is suitable in applications where continuous gain control is required. 1GHz Bandwidth at all Gains 48dBm OIP3 at 200MHz, 2VP-P into 50Ω, ROUT = 100Ω –88dBc IMD3 at 200MHz, 2VP-P into 50Ω, ROUT = 100Ω 1.4nV/√Hz Input-Referred-Noise (RTI) 20dBm Output P1dB at 70MHz, ROUT = 130Ω 2dB to 18dB Gain Range (ROUT = 50Ω) 0.125dB Gain Step Size 30ps Group Delay Variation 5ns Fast Gain Settling Time 5ns Fast Overdrive Recovery –80dB Reverse Isolation APPLICATIONS n n n n n Differential ADC Driver IF Sampling Receivers VGA IF Power Amplifier 50Ω Driver Instrumentation L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION OIP3 and SFDR vs Frequency 132 5V VCC 0.1μF SFDR (dBm/Hz) IN+ RF INPUT LO IF BPF IF AMPLIFIER DEC IN– 0.1μF CDEC 0.1μF MODE 130 46 OIP3 (dBm) ROUT = 50Ω 49 – LT5554 BPF ADC OIP3 + 7 BITS PGx GAIN CONTROL STROBE 5554 TA01 128 SFDR 43 126 0 50 100 150 FREQUENCY (MHz) 40 200 5554 TA01b 5554f 1 LT5554 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) PIN CONFIGURATION TOP VIEW GND GND GND GND GND 24 VCC 23 ENB 22 GND 33 21 OUT– 20 OUT+ 19 GND 18 MODE 17 VCC 9 10 11 12 13 14 15 16 PG5 PG6 PG0 STROBE GND GND GND PG1 PG2 PG3 PG4 32 31 30 29 28 27 26 25 GND GND DEC IN+ IN– DEC GND GND 1 2 3 4 5 6 7 8 Supply Voltage VCC..........................................................................6V Pin Voltages and Currents OUT+, OUT– ............................................................7V STROBE, PGx..........................................–0.5V to VCC ENB, MODE.............................................–0.5V to VCC IN+, IN–, DEC ........................................... –0.5V to 4V Operating Ambient Temperature Range LT5554 ............................................... –40°C to +85°C Junction Temperature ........................................... 125°C Storage Temperature Range................. –65°C to +150°C UH PACKAGE 32-LEAD (5mm 5mm) PLASTIC QFN TJMAX = 150°C, θJA = 34°C/W, θJC = 3°C/W EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH LT5554IUH#PBF TAPE AND REEL LT5554IUH#TRPBF PART MARKING 5554 PACKAGE DESCRIPTION 32-Lead (5mm × 5mm) Plastic QFN TEMPERATURE RANGE –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 5554f 2 LT5554 AC ELECTRICAL CHARACTERISTICS SYMBOL BW OP1dB GM CMRR S12 PARAMETER Large Signal –3dB Bandwidth Output 1dB Compression Point Amplifier Transconductance at GMAX Common Mode Gain to Single-Ended Output Reverse Isolation Overdrive Recovery Time IIP3 OIP3 IMD3 OIP3 OIP3 HD3 VONOISE NF RTI SFDR Input Third Order Intercept Point Output Third Order Intercept Point for Max-Gain Intermodulation Product for Max-Gain Output Third Order Intercept Point for –3.875dB STEP Output Third Order Intercept Point Third Harmonic Distortion Output Noise Noise Spectral Density Noise Figure Input Referred Noise Spectral Density (RMS) (Note 5) Spurious Free Dynamic Range in 1Hz BW. Maximum Voltage and Power Gain Minimum Voltage and Power Gain Gain Step Size (Note 9) Group Delay Step Accuracy Input Resistance Input Capacitance Output Resistance Output Capacitance CONDITIONS All Gain Settings (Note 7) All Gain Settings, ROUT = 130Ω, 70MHz FIN = 100MHz FIN = 100MHz, Figure 19 FIN = 100MHz FIN = 400MHz 5ns Input Pulse, VOUT within ±10% GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz FIN = 100MHz FIN = 200MHz FIN = 100MHz FIN = 200MHz FIN = 100MHz FIN = 200MHz GMAX, F1 = 88MHz, F2 = 112MHz GMAX –3.875dB, F1 = 88MHz, F2 = 112MHz Pout = 10dBm, FIN = 100MHz, GMAX GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz FIN = 112MHz FIN = 100MHz Except For –4dB, –8dB, –12dB Steps For –4dB, –8dB, –12dB Steps FIN = 100MHz FIN = 100MHz, GMAX to GMAX –3.875dB FIN = 100MHz, GMAX –4dB to GMIN FIN = 100MHz FIN = 100MHz FIN = 100MHz 15.3 40.5 38 Dynamic Performance LF – 1000 20 0.15 –6 –86 –78 5 27 30 45 46 –82 –84 44 40 47 44 –62 10.7 7.3 10 10.5 1.34 1.42 128 129 17.6 1.725 0.125 10 43 47 2.8 400 1.9 0.25 0.35 19.7 MHz dBm S dB dB dB ns dBm dBm dBm dBm dBc dBc dBm dBm dBm dBm dBc nV/√Hz nV/√Hz dB dB nV/√Hz nV/√Hz dBm/Hz dBm/Hz dB dB dB dB ps Ω Ω pF Ω pF (ROUT = 50Ω) Specifications are at TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 2.2V, VIH = 2.2V, VIL = 0.6V, maximum gain (Notes 3, 6), (Test circuits shown in Figure 16), unless otherwise noted. MIN TYP MAX UNIT Noise/Linearity Performance Two Tones, POUT = 4dBm/Tone (2VP-P into 50Ω), Δf = 200kHz Amplifier Voltage Gain and Gain Step GMAX GMIN GSTEP GDERROR RIN CIN RO CO AMPLIFIER I/O Differential IMPEDANCE 5554f 3 LT5554 AC ELECTRICAL CHARACTERISTICS SYMBOL IIP3 OIP3 IMD3 VONOISE NF RTI SFDR GVMAX GPMAX PARAMETER Input Third Order Intercept Point Output Third Order Intercept Point for Max-Gain Intermodulation Product for Max-Gain Output Noise Noise Spectral Density Noise Figure Input Referred Noise Spectral Density (RMS) (Note 5) Spurious Free Dynamic Range in 1Hz BW. Maximum Voltage Gain Maximum Power Gain CONDITIONS GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz FIN = 100MHz FIN = 200MHz FIN = 100MHz FIN = 200MHz GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz GMAX, FIN = 200MHz GMAX –3.875dB, FIN = 200MHz GMAX, FIN = 200MHz FIN = 100MHz FIN = 100MHz (ROUT = 100Ω) Specifications are at TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 2.2V, VIH = 2.2V, VIL = 0.6V, maximum gain (Notes 3, 8), (Test circuits shown in Figure 16), unless otherwise noted. MIN TYP 27 27 48 48 –88 –88 21.4 14.5 10 10.5 1.34 1.42 128 23.6 20.6 MAX UNIT dBm dBm dBm dBm dBc dBc nV/√Hz nV/√Hz dB dB nV/√Hz nV/√Hz dBm/Hz dB dB Noise/Linearity Performance Two Tones, POUT = 4dBm/Tone (2VP-P into 50Ω), Δf = 200kHz AC ELECTRICAL CHARACTERISTICS (Timing Diagram) SYMBOL TSU THOLD TPW TR TLATENCY TGLITCH AGLITCH PARAMETER Setup Time PGx vs STROBE Hold Time PGx vs STROBE STROBE Pulse Width STROBE Period Latency Time of the Previous Gain State Time Between Previous Stable Gain State to Next Stable State Max Glitch Amplitude Output Settles within 1% Output Settles within 1% VIN = 0 (No Signal or STROBE Transition During Output Signal Zero Crossing) STROBE Transition when Output Power is at Peak + 10dBm Power CONDITIONS PGx and Strobe Timing Characteristics (ROUT = 50Ω) Specifications are at TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V, maximum gain (Test circuit shown in Figure 16), unless otherwise noted. MIN TYP 0 1 2 4 4 5 1 3 MAX UNIT ns ns ns ns ns ns mV dB 5554f 4 LT5554 AC ELECTRICAL CHARACTERISTICS (Timing Diagram) Timing Diagram PG0, 1, 2, 3, 4, 5, 6 INPUTS TSU THOLD TPW STROBE INPUTS DATA TRANSPARENT DATA LATCH TGLITCH TLATENCY OUT SIGNAL STATE (i) STATE (i + 1) STATE (i + 2) 5554 TD01 DC ELECTRICAL CHARACTERISTICS SYMBOL VCC VCCO PARAMETER Supply Voltage OUT+, OUT– Output Pin DC Common Mode Voltage Shutdown DC Characteristics, ENB = 0.6V VIN(BIAS) IIL(PG) IIH(PG) IOUT ICC VIL(EN) VIH(EN) IIL(EN) IIH(EN) IIH(EN) DEC, IN+, IN– Bias Voltage PGx, STR Input Current PGx, STR Input Current OUT+, OUT– Current VCC Supply Current ENB Input LOW Voltage ENB Input HIGH Voltage ENB Input Current ENB Input Current ENB Input Current Disable Enable VIN = 0.6V VIN = 3V VIN = 5V VIN = 0.6V VIN = 5V (Note 4) Normal Operating Conditions Specifications are at TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, unless otherwise noted. (Note 3) (Test circuit shown in Figure 16), unless otherwise noted. CONDITIONS MIN 4.75 TYP 5 5 MAX 5.25 6 UNIT V V 2 0 210 2.15 V μA μA 20 4 5.1 0.6 3 70 220 300 VCC 20 μA mA V V μA μA μA Enable Input DC Characteristics 5554f 5 LT5554 DC ELECTRICAL CHARACTERISTICS SYMBOL IIH(DEC) IIL(DEC) VIL(MODE) VOPEN(MODE) VIH(MODE) IIL(MODE) IIH(MODE) VIL VIH IIL(DC) IIH(DC) VIN(AC) VIN(AC)P-P VIN(AC)MAX IIL(AC) IIH(AC) VIN(DEC) VIN(BIAS) RIN GM IODC IOUT(OFFSET) ICC PARAMETER DEC Pin Source Current DEC Pin Sink Current MODE Input LOW Voltage for AC-Couple MODE Input OPEN MODE Input HIGH Voltage MODE Input Current MODE Input Current Input LOW Voltage Input HIGH Voltage Input Current Input Current Input Pulse Range Input Pulse Amplitude Maximum Input Noise Amplitude Input Current Input Current DEC IN+, IN– Bias Voltage INPUT Differential Resistance Amplifier Transconductance OUT+, OUT– Quiescent Current Output Current Mismatch VCC Supply Current VIN = 0.6V VIN = 5V Instantaneous Input Voltage Rise and Fall Time 80ns No LT5554 Gain Update VIN = 0V VIN = 5V GMAX GMAX GMAX GMIN GMAX VOUT = 5V IN+, IN– Open GMAX, MODE = 0V GMIN, MODE = 0V GMAX, MODE = 5V GMIN, MODE = 5V ICC + 2 • IODC (GMAX) 78 77 75 75 33 –210 310 1.85 1.8 125 0 600 300 100 –155 420 2 2.04 48 50 0.15 47 200 110 109 106 106 200 132 131 127 127 57 –100 530 2.25 2.2 170 2.2 30 220 4.6 DEC External Capacitor Charge/Discharge CURRENT VDEC = 4V VDEC = 1.8V PGx AC-Coupled, STROBE AC-Coupled PGx AC-Coupled, STROBE DC-Coupled PGx DC-Coupled, STROBE DC-Coupled VMODE = 0V VMODE = 5V 27 –70 0 1.7 VCC – 0.4 –42 43 OPEN VCC –31 72 –23 100 0.6 50 –38 70 –14 0.6 2.3 mA mA V V V μA μA V V μA μA V mVP-P mVP-P mVP-P μA μA V V Ω Ω S mA μA mA mA mA mA mA Specifications are at TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, unless otherwise noted. (Note 3) (Test circuit shown in Figure 16), unless otherwise noted. CONDITIONS MIN TYP MAX UNIT Mode Input Three-State DC Characteristics PGx (MODE = VCC) and STROBE (MODE = OPEN or MODE = VCC) INPUTS for DC-Coupled PGx (MODE = 0V or MODE = OPEN) and STROBE (MODE = 0V) INPUTS for AC-Coupled Amplifier DC Characteristics ICC(TOTAL) Total Supply Current Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to GND ground. Note 3: RS = RIN = 50Ω Input matching is assumed. PIN is the available input power. POUT is the power into ROUT. ROUT = RO || RLOAD is the total output resistance at amplifier open-collectors outputs (used in GV, GP gain calculation). RO = 400Ω is LT5554 internal output impedance. RLOAD is load resistance as seen at OUT+, OUT– pins. All dBm figures are with respect to 50Ω. Specifications refer to differential inputs and differential outputs. Note 4: An external power supply equal to VCCO is used for choke inductors or center-tap transformer output interfaces. Whenever OUT+, OUT– pins are biased via resistors, the voltage drop produced by the DCoutput current (IODC = 45mA typical) may require a larger output external power supply. However, care must be taken not to exceed the OUT+, OUT– absolute maximum rating when the LT5554 is disabled. 5554f 6 LT5554 ELECTRICAL CHARACTERISTICS Note 5: RTI (Referred-To-Input) stands for the total input-referred noise voltage source. RTI is close to output noise voltage divided by voltage gain (the exact equation is given in Definition of Specification section). The equivalent noise source eN is twice the RTI value. Note 6: The external loading at LT5554 OUT+/OUT– pins is RLOAD = 57Ω. ROUT = RLOAD || RO = 50Ω. Note 7: The IN+, IN–, DEC pins are internally biased. The time-constant of input coupling capacitor sets the low frequency corner (LF) at input. The output coupling capacitors or the transformer sets the low frequency corner (LF) at the output. The LT5554 operates internally down to DC. Note 8: The external loading at OUT+/OUT– pins is RLOAD = 133Ω. ROUT = RLOAD || RO = 100Ω. Note 9: Depending on the actual input matching conditions and frequency of operation, the LT5554 steps involving the input attenuator tap change may show less than 0.125dB change. These steps are GMAX –4dB, GMAX –8dB, GMAX –12dB, and the code is given in the Programmable Gain Table. The LT5554 monotonic operation for 0.125dB step resolution can still be obtained by skipping any such code with a gain error excedding 0.125dB. (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16), unless otherwise noted. Gain vs Frequency for 0.5dB Steps, Figure 17 20 18 16 GAIN ERROR (dB) 14 GAIN (dB) 12 10 8 6 4 2 0 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 5554 G01 TYPICAL PERFORMANCE CHARACTERISTICS Differential Gain Error vs Frequency at –40°C 0.3 Differential Gain Error vs Frequency at 85°C 0.3 0.2 GAIN ERROR (dB) 12dB 0.1 4dB 8dB 0 0.2 12dB 0.1 4dB 8dB 0 –0.1 –0.1 –0.2 50 75 100 125 150 FREQUENCY (MHz) 175 200 5554 G02 –0.2 50 75 100 125 150 FREQUENCY (MHz) 175 200 5554 G03 Differential Gain Error vs Attenuation at 50MHz 0.3 –40°C 25°C 85°C GAIN ERROR (dB) 0.3 Differential Gain Error vs Attenuation at 100MHz –40°C 25°C 85°C GAIN ERROR (dB) 0.3 Differential Gain Error vs Attenuation at 200MHz –40°C 25°C 85°C 0.2 GAIN ERROR (dB) 0.2 0.2 0.1 0.1 0.1 0 0 0 –0.1 –0.1 –0.1 –0.2 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G04 –0.2 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G05 –0.2 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G06 5554f 7 LT5554 TYPICAL PERFORMANCE CHARACTERISTICS Integral Gain Error vs Attenuation at 50MHz 0.4 –40°C 25°C 85°C GAIN ERROR (dB) 0.4 (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16), unless otherwise noted. Integral Gain Error vs Attenuation at 100MHz –40°C 25°C 85°C GAIN ERROR (dB) 0.4 Integral Gain Error vs Attenuation at 200MHz –40°C 25°C 85°C 0.3 GAIN ERROR (dB) 0.3 0.3 0.2 0.2 0.2 0.1 0.1 0.1 0 0 0 –0.1 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G07 –0.1 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G08 –0.1 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G09 Maximum Gain vs Temperature 18.0 24 POUT vs PIN at Maximum Gain 70MHz 140MHz 200MHz 24 POUT vs PIN at GMAX – 3.875dB 70MHz 140MHz 200MHz 17.8 50MHz POUT (dBm) 100MHz 200MHz 16 16 GMAX (dB) 17.6 8 POUT (dBm) –25 –15 –5 PIN (dBm) 5 15 5554 G11 8 17.4 0 0 17.2 –8 –8 17.0 –40 –20 0 20 40 60 TEMPERATURE (°C) 80 5554 G10 –16 –35 –16 –35 –25 –15 –5 PIN (dBm) 5 15 5554 G12 (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16) POUT = 4dBm/tone (2VP-P into 50Ω), Δf = 200kHz, unless otherwise noted. Two-Tone OIP3 vs Frequency at Max Gain, Three Temperatures 49 85°C –76 Two-Tone IMD3 vs Frequency at Max Gain, Three Temperatures 32 IIP3 vs Frequency at Max Gain, Three Temperatures 85°C 25°C 46 OIP3 (dBm) IMD3 (dBc) –79 IIP3 (dBm) –40°C –82 25°C 30 25°C 28 –40°C –40°C 43 –85 85°C 40 –88 26 0 50 100 150 FREQUENCY (MHz) 200 5554 G13 0 50 100 150 FREQUENCY (MHz) 200 5554 G14 24 0 50 100 150 FREQUENCY (MHz) 200 5554 G15 5554f 8 LT5554 (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16) POUT = 4dBm/tone (2VP-P into 50Ω), Δf = 200kHz, unless otherwise noted. Two-Tone OIP3 vs Frequency for GMAX and Critical Gain Steps 49 –70 TYPICAL PERFORMANCE CHARACTERISTICS Two-Tone IMD3 vs Frequency for GMAX and Critical Gain Steps 32 IIP3 vs Frequency for GMAX and GMAX –3.875dB GMAX – 3.875dB 30 GMAX – 12dB 46 OIP3 (dBm) GMAX GMAX – 15.875dB 43 GMAX – 3.875dB –76 IMD3 (dBc) IIP3 (dBm) GMAX – 3.875dB GMAX – 15.875dB 28 GMAX –82 GMAX – 12dB GMAX 26 40 50 100 150 FREQUENCY (MHz) 200 5554 G16 –88 24 50 100 150 FREQUENCY (MHz) 200 5554 G17 50 100 150 FREQUENCY (MHz) 200 5554 G18 Two-Tone IMD3 and OIP3 vs Attenuation at 50MHz –70 OIP3 48 –70 Two-Tone IMD3 and OIP3 vs Attenuation at 70MHz 48 OIP3 –74 IMD3 (dBc) 46 OIP3 (dBm) IMD3 (dBc) –74 46 OIP3 (dBm) –78 44 –78 IMD3 44 IMD3 –82 42 –82 42 –86 0 –4 –8 –12 ATTENUATION (dB) 40 –16 5554 G19 –86 0 –4 –8 –12 ATTENUATION (dB) 40 –16 5554 G20 Two-Tone IMD3 and OIP3 vs Attenuation at 100MHz –70 48 –70 Two-Tone IMD3 and OIP3 vs Attenuation at 140MHz 48 OIP3 –74 IMD3 (dBc) OIP3 46 OIP3 (dBm) IMD3 (dBc) –74 46 OIP3 (dBm) –78 44 –78 44 –82 IMD3 –86 42 –82 IMD3 42 0 –4 –8 –12 ATTENUATION (dB) 40 –16 5554 G21 –86 0 –4 –8 –12 ATTENUATION (dB) 40 –16 5554 G22 5554f 9 LT5554 (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16) POUT = 4dBm/tone (2VP-P into 50Ω), Δf = 200kHz, unless otherwise noted. Two-Tone IMD3 and OIP3 vs Attenuation at 200MHz –70 IMD3 –74 IMD3 (dBc) 46 44 OIP3 (dBm) OIP3 (dBm) OIP3 (dBm) –78 OIP3 –82 42 44 44 50MHz 70MHz 100MHz 140MHz 200MHz 48 47 TYPICAL PERFORMANCE CHARACTERISTICS Two-Tone OIP3 vs Tone Power at Max-Gain 47 Two-Tone OIP3 vs Tone Power at Min-Gain 41 41 50MHz 70MHz 100MHz 140MHz 200MHz 0 6 9 3 OUTPUT TONE POWER (dBm) 12 5554 G24 –86 0 –4 –8 –12 ATTENUATION (dB) 40 –16 5554 G23 38 38 0 3 6 9 OUTPUT TONE POWER (dBm) 12 5554 G25 Two-Tone OIP3 vs ROUT, for GMAX 50 48 Two-Tone OIP3 vs VCCO, for GMAX 48 Two-Tone OIP3 vs VCCO, for GMAX –3.875dB 45 48 OIP3 (dBm) OIP3 (dBm) 42 OIP3 (dBm) 25MHz 70MHz 140MHz 200MHz 2 3 4 5 OUTPUT COMMON MODE VOLTAGE (V) 6 45 42 46 25MHz 70MHz 140MHz 200MHz 50 75 ROUT (Ω) 100 5554 G52 39 39 44 36 36 25MHz 70MHz 140MHz 200MHz 2 3 4 5 OUTPUT COMMON MODE VOLTAGE (V) 6 5554 G28 5554 G30 Harmonic Distortion vs Attenuation, 50MHz, POUT = 10dBm, Figure 17 –70 –75 –80 –85 –90 –95 –100 HD5 –105 35 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G27 OIP3 vs Frequency for GMAX and GMIN, POUT = 10dBm 50 HARMONIC DISTORTION (dBc) OIP3 (dBm) HD3 45 GMIN 40 GMAX 50 100 150 FREQUENCY (MHz) 200 5554 G29 5554f 10 LT5554 (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16) POUT = 4dBm/tone (2VP-P into 50Ω), Δf = 200kHz, unless otherwise noted. HD3 vs Frequency for GMAX and GMIN, POUT = 10dBm, Figure 17 –50 –70 TYPICAL PERFORMANCE CHARACTERISTICS HD5 vs Frequency for GMAX and GMIN, POUT = 10dBm, Figure 17 HARMONIC DISTORTION (dBc) –56 HARMONIC DISTORTION (dBc) GMAX –76 GMAX –62 GMIN –68 –82 GMIN –88 –74 –94 –80 50 100 150 FREQUENCY (MHz) 200 5554 G31 –100 50 100 150 FREQUENCY (MHz) 200 5554 G32 (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16), maximum gain, unless otherwise noted. HD3 and HD5 vs POUT for GMAX, Figure 17 –40 –45 HARMONIC DISTORTION (dBc) –50 –55 –60 –65 –70 –75 –80 7 10 13 OUTPUT POWER (dBm) HD5 0 0 5 5 HD3 HD5 HD3 NF (dB) 10 70MHz 140MHz 20 Noise Figure vs Frequency 20 Single-Ended Output NF vs Frequency, Figure 18 15 GMAX –3.875 NF (dB) GMAX 15 GMAX –3.875 GMAX 10 16 5554 G33 0 200 400 600 FREQUENCY (MHz) 800 5554 G34 0 200 400 600 FREQUENCY (MHz) 800 5554 G35 Noise Figure vs Attenuation, 140MHz 25 6 Input Referred Noise vs Attenuation, 140MHz 12 Output Noise Density vs Attenuation, 140MHz 20 9 15 VONOISE (nV/√Hz) 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G37 RTI (nV/√Hz) 4 NF (dB) 6 10 2 5 3 0 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G36 0 0 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G38 5554f 11 LT5554 ( ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16), maximum gain, unless otherwise noted. Single-Ended Output Current vs Attenuation 98 215 85°C 208 CURRENT (mA) 25°C 200 TYPICAL PERFORMANCE CHARACTERISTICS Total ICC Current vs Attenuation –40°C CURRENT (mA) 96 25°C 85°C 94 193 –40°C 92 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G39 185 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G40 ICC Shutdown Current vs VCC, ENB = 0.6V 5 85°C –40°C CURRENT (mA) 3 25°C 2 VIN(BIAS) (V) 2.2 VIN(BIAS) vs Attenuation 4 –40°C 2.1 85°C 1 25°C 0 4.7 4.9 5.1 VCC (V) 5.3 5.5 5554 G41 2.0 0 –4 –8 –12 ATTENUATION (dB) –16 5554 G42 5554f 12 LT5554 (ROUT = 50Ω) TA = 25°C. VCC = 5V, VCCO = 5V, ENB = 3V, MODE = 5V, STROBE = 3V, VIH = 2.2V, VIL = 0.6V (Test circuit shown in Figure 16), maximum gain, unless otherwise noted. 2dB-Step Response (PG4) 120MHz Signal 8dB-Step Response (PG6) 120MHz Signal 8dB-Step Response (PG6) 120MHz Pulse Signal TYPICAL PERFORMANCE CHARACTERISTICS 0.1V/DIV 0.1V/DIV 0.2V/DIV 10ns/DIV MODE = HIGH 5554 G46 10ns/DIV MODE = HIGH 5554 G47 5ns/DIV MODE = HIGH 5554 G48 8dB-Step (PG6) 120MHz Pulse Signal for 8dB Overdrive 8dB-Step (PG6) 120MHz Sinusoidal Signal for 2dB Overdrive 8dB-Step (PG6) 120MHz Sinusoidal Signal for 8dB Overdrive 1V/DIV 1V/DIV 1V/DIV 5ns/DIV MODE = HIGH 5554 G49 5ns/DIV MODE = HIGH 5554 G50 10ns/DIV MODE = HIGH 5554 G51 PIN FUNCTIONS GND (Pins 1, 2, 7, 8, 10, 13, 15, 16, 19, 22, 25, 26, 28, 31): Ground Pins. DEC (Pins 3, 6): Decoupling Pin for the Internal DC Bias Voltage for the Differential Inputs, IN+ and IN–. It is also connected to the ‘virtual ground’ of the input resistive attenuator. Capacitive de-coupling to ground is recommended in order to preserve linearity performance when IN+, IN– inputs are driven with up to 3dB imbalance. IN+ (Pin 4): Positive Signal Input Pin with Internal DC Bias to 2V. IN– (Pin 5): Negative Signal Input Pin with Internal DC Bias to 2V. PG5 (Pin 9): 4dB Step Amplifier Programmable Gain Control Input Pin. Input levels are controlled by MODE pin. PG6 (Pin 11): 8dB Step Amplifier Programmable Gain Control Input Pin. Input levels are controlled by the MODE pin. PG0 (Pin 12): 0.125dB Step Amplifier Programmable Gain Control Input Pin. Input levels are controlled by MODE pin. STROBE (Pin 14): Strobe Pin for the Programmable Gain Control Inputs (PGx). With STROBE in Low-state, the Amplifier Gain is not changed by PGx state changes (latch mode). With STROBE in High-state, the Amplifier Gain is asynchronously set by PGx inputs transitions (transparent-mode). A positive STROBE transition updates the PGx state. Low-state and High-state depends on MODE pin level (Table1). VCC (Pins 17, 24): Power Supply Pins. These pins are internally connected together. MODE (Pin 18): PGx and STROBE Functionality and Level Control Pin. When MODE is higher than VCC – 0.4V, the PGx and STROBE are DC-coupled. When the MODE pin is lower than 0.6V, the PGx and STROBE are AC-coupled. 5554f 13 LT5554 PIN FUNCTIONS When the MODE pin is left open, the PGx inputs are ACcouple and the STROBE input is DC-coupled. In DC-coupled mode, the PGx and STROBE inputs levels are 0.6V and 2.2V. In AC-coupled mode, the PGx and STROBE inputs are driven with 0.6VP-P minimum amplitude (with rise and fall time 140Ω, in which case the instantaneous voltage at each OUT+ and OUT– outputs is either 8V. The output OP1dB = 20dBm can be achieved when ROUT = 130Ω. In this case, the LT5554 outputs reach both current and voltage limiting for maximum output power. Gain Control Interface The MODE pin selects the interface to the LT5554 gain control pins. The PGx and STROBE control inputs can be configured to be either DC-coupled (for TTL interface) or AC-coupled (for ECL or low-voltage CMOS interfaces). In addition, the STROBE input can be driven such that the LT5554 gain state is updated asynchronously (PGx latch control in transparent-mode) or controlled by positive STROBE transition (PGx latch control in strobed-mode). There are several options available for coupling type and latch control which are given in the following tables: 10 50 100 ROUT (Ω) 400 1000 5554 F07 Table1. MODE Input Options MODE (State) LOW OPEN OPEN HIGH HIGH COUPLING TYPE STROBE AC Positive Transition DC >2.2V 0.6 to 2.2V DC >2.2V 0.6 to 2.2V PGx AC AC AC DC DC PGx (Latch Control) Strobe Transparent Strobe Transparent Strobe Figure 7. Maximum Voltage and Power Gain vs ROUT The gain vs ROUT relationship is given by the following equations: GV = 20log(GM • ROUT) in dB GP = 10log(RIN • GM2 • ROUT) in dB Where RIN = 50Ω and GM = 0.15 siemens at GMAX For wide band applications, the amplifier bandwidth can be extended by inductive peaking technique. The inductor in series with the LT5554 outputs (OUT+ OUT–) can have a value up to some tens of nH depending on ROUT value and board capacitance. The current limiting will occur with ROUT 6V. If disabled, the VCCO will be applied at OUT+, OUT– exceeding the absolute maximum 6V limit with possible LT5554 failure. J1 50 T1 1:1 • • IN– RIN 50Ω RO 400Ω • • OUT+ ETC1-1-13 MACOM C5 1μF ROUT = 50Ω ETC1-1-13 5554 F17 VCC = 5V VCCO = 7V Figure 17. Single Ended Test Board (Simplified Schematic) 5554f 24 LT5554 APPLICATIONS INFORMATION J5, 40 PINS SMT-TB 1, 3, 5, 7 9 11 ENB 13 15 17 19 21 23 25 27 29 VPG R26 10k PG6 C9 0.1μF C18 0.1μF C19 4.7μF J3 50 100Ω MATCHING C10 47nF 31 MODE 33, 35, 37, 38 VCCO 2, 4, ...40 VCC VDEC PG0 PG1 PG2 PG3 PG4 PG5 PG6 STROBE R20 10k PG0 C4 0.1μF C8 0.1μF IN+ R21 10k PG1 R22 10k PG2 R23 10k PG3 R24 10k PG4 R25 10k PG5 C3 0.1μF OUT– LT5554 R5 66.5Ω R6 66.5Ω J1 50 T1 1:1 • • IN– RIN 50Ω RO 400Ω OUT+ RO 400Ω RLOAD 57Ω ETC1-1-13 MACOM C5 1μF ROUT = 50Ω J33 50 C12 47nF 5554 F18 VCC = 5V VCCO = 8V ENB = 5V Figure 18. Wideband Differential Output Test Board (Simplified Schematic) Common mode characterization for the LT5554 was performed with input circuit shown in Figure 19. C1 47nF J1 50 25Ω 25Ω 25Ω CDEC 47nF DEC IN– IN+ OUT– – LT5554 + OUT+ 5554 F19 source is applied at J6 connector and 50Ω terminated by R16 and R33 resistors. C66 decouple R33 to ground while C16 provides DC-decoupling between referenced to ground pulse source and the PG6 DC-voltage. A supply connected to PG6 turret will set the PG6 DC-voltage in 0V to 5V range. All other (untested) PGx DC-voltage can be independently be applied at VPG turret decoupled by C88. Strobe-mode operation is tested with a pulse source applied at J7 connector as shown in Figure 20. Applying similar modifications around J2 and J4 connectors shown in Figure 21, other PGx inputs can be evaluated. As described in Table 1 and Table 2, the MODE pin will select the desired state. Figure 19. Common Mode Input Interface Timing characterization and AC-coupled gain control inputs are tested on evaluation board. The required circuit modifications are shown in the Figure 20 simplified schematic and detailed below for PG6 (8dB step). The PG6 pulse 5554f 25 LT5554 APPLICATIONS INFORMATION R21 10k PG1 PG2 R28 0Ω 32 R8 0Ω VDEC 1 2 3 4 5 6 7 8 C5 1μF GND GND DEC IN+ IN – R22 10k R23 10k R24 10k C88 47nF PG4 PG3 VPG R29 0Ω 31 30 29 R30 0Ω 28 R31 0Ω 27 PG4 26 25 VCC ENB GND OUT – 24 23 22 21 20 19 18 17 C4 0.1μF PG1 GND PG2 PG3 GND GND GND VCC ENABLE LT5554 OUT + DEC GND GND 9 10 11 12 13 14 15 GND MODE VCC 16 PG5 GND PG6 PG0 GND STROBE GND GND C8 0.1μF MODE C6 47nF R16 100Ω J6 C16 47nF PG5 R32 0Ω PG6 C27 47nF R33 100Ω R27 R34 0Ω 100Ω PG0 C17 47nF R17 100Ω J7 C28 47nF R26 10k R20 10k STROBE 5554 F20 R25 10k Figure 20. Timing Test for PG6 and STROBE (Simplified Schematic) Evaluation Board Figure 21 shows the schematic of the LT5554 evaluation board. Transformer T2 is TC2-1T and resistor R5 + R6 = 134Ω (ROUT = 50Ω GP(J3) = 13.2dB). The silkscreen and layout are shown in Figures 22 through Figure 27. The board control J5 edge connector (40PINS SMT-TB) allows easy access to LT5554 component pins. Alternatively or combined with J5, 14 test points (turrets) for signals and two for GND are also available. The board is powered with a single supply in 4.75V to 5.25V at VCC and VCCO (either J5 connector or turrets). Connecting the ENABLE pin to VCC supply enables the LT5554 part. PGx gain control and STROBE inputs will have TTL levels (DC-coupled) when MODE = 5V (same power supply). To set LT5554 for maximum gain (GMAX) in transparent-mode, all seven PGx and STROBE can be connected to 5V supply. Alternatively, a 2.2V power supply at VPG pin and STROBE turret will set same GMAX state. J1 (input) and J3 (output) are the default board signal ports for evaluation with 50Ω single ended test system. For differential evaluation, the board J11 and J33 connectors must be reconfigured. 5554f 26 LT5554 APPLICATIONS INFORMATION 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 J5, 40 PINS SMT-TB VCC 1 VCC 3 VCC 5 VCC VDEC ENB 7 9 11 PG0 PG1 PG2 PG3 PG4 PG5 PG6 STROBE VPG MODE 13 15 17 19 21 23 25 27 29 31 VCCO VCCO VCCO VCCO 33 35 37 39 VDEC ENB VCC PG0 PG1 PG2 PG3 PG4 PG5 PG6 STROBE VPG MODE VCCO PG1 PG4 R31 0Ω PG2 PG3 R29 0Ω R30 0Ω C14 47nF VPG R20 10k NOT MOUNTED J4 C21 0.1μF PG0 C22 0.1μF R21 10k PG1 C23 0.1μF R22 10k PG2 C24 0.1μF R23 10k PG3 C25 0.1μF R24 10k PG4 C26 0.1μF R25 10k PG5 C27 0.1μF R26 10k PG6 NOT MOUNTED J2 C11 47nF R28 0Ω NOT MOUNTED NOT MOUNTED R12 C12 47nF NOT MOUNTED C13 47nF NOT MOUNTED R14 C21 THROUGH C27 ARE NOT MOUNTED NOT MOUNTED 32 R8 0Ω 1 2 3 GND GND DEC IN+ IN– DEC GND GND 9 NOT MOUNTED R33 0Ω R27 0Ω R34 0Ω 10 11 12 13 14 LT5554 31 30 29 28 27 NOT MOUNTED 26 25 VCCO C4 24 23 22 21 20 19 18 17 C8 0.1μF MODE C6 47nF R4 0Ω R6 681Ω C9 0.1μF C18 0.1μF MINICIRCUITS R2 0Ω NOT MOUNTED R7 NC VCC ENABLE R3 0Ω C3 0.1μF R5 68.1Ω T2 – TC2-1T OUT 2:1 C19 4.7μF PG1 GND PG2 PG3 GND PG4 GND GND VCC ENB GND OUT– OUT+ GND MODE VCC 15 16 VDEC J1 IN+ T1 1:1 J3 • IN– • 4 5 6 • • • OUT+ J11 ETC1-1-13 MACOM R1 0Ω 7 8 C5 1μF J33 NOT MOUNTED PG5 GND PG6 PG0 GND STROBE GND GND NOT MOUNTED R16 NOT MOUNTED 5554 F21 R17 NOT MOUNTED NOT MOUNTED J7 C16 47nF NOT MOUNTED R32 0Ω PG5 C17 47nF NOT MOUNTED J6 PG6 PG0 STROBE C15 47nF Figure 21. Evaluation Circuit Schematic 5554f 27 LT5554 APPLICATIONS INFORMATION Figure 22. Top Side Figure 23. Inner Layer 2 GND 5554f 28 LT5554 APPLICATIONS INFORMATION Figure 24. Inner Layer 3 Power Figure 25. Bottom Side 5554f 29 LT5554 APPLICATIONS INFORMATION Figure 26. Silkscreen Top Figure 27. Silkscreen Bottom 5554f 30 LT5554 PACKAGE DESCRIPTION UH Package 32-Lead Plastic QFN (5mm × 5mm) (Reference LTC DWG # 05-08-1693 Rev D) 0.70 ± 0.05 5.50 ± 0.05 4.10 ± 0.05 3.50 REF (4 SIDES) 3.45 ± 0.05 3.45 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) 0.75 ± 0.05 R = 0.05 TYP 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD R = 0.115 TYP 31 32 0.40 ± 0.10 1 2 3.45 ± 0.10 PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 3.50 REF (4-SIDES) 3.45 ± 0.10 (UH32) QFN 0406 REV D 0.200 REF NOTE: 1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE M0-220 VARIATION WHHD-(X) (TO BE APPROVED) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.25 ± 0.05 0.50 BSC 5554f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 31 LT5554 RELATED PARTS PART NUMBER DESCRIPTION Infrastructure LT5514 LT5517 LT5518 LT5519 LT5520 LT5521 LT5522 LT5524 LT5525 LT5526 LT5527 LT5528 LT5557 LT5560 LT5568 LT5572 LT5575 LT5579 Ultralow Distortion, IF Amplifier/ADC Driver with Digitally Controlled Gain 40MHz to 900MHz Quadrature Demodulator 1.5GHz to 2.4GHz High Linearity Direct Quadrature Modulator 0.7GHz to 1.4GHz High Linearity Upconverting Mixer 1.3GHz to 2.3GHz High Linearity Upconverting Mixer 10MHz to 3700MHz High Linearity Upconverting Mixer 600 MHz to 2.7GHz High Signal Level Downconverting Mixer Low Power, Low Distortion ADC Driver with Digitally Programmable Gain High Linearity, Low Power Downconverting Mixer High Linearity, Low Power Downconverting Mixer 400MHz to 3.7GHz High Signal Level Downconverting Mixer 1.5GHz to 2.4GHz High Linearity Direct Quadrature Modulator 400MHz to 3.8GHz, 3.3V High Signal Level Downconverting Mixer Ultra-Low Power Active Mixer 700MHz to 1050MHz High Linearity Direct Quadrature Modulator 1.5GHz to 2.5GHz High Linearity Direct Quadrature Modulator 800MHz to 2.7GHz High Linearity Direct Conversion I/Q Demodulator 1.5GHz to 3.8GHz High Linearity Upconverting Mixer 850MHz Bandwidth, 47 dBm OIP3 at 100MHz, 10.5dB to 33dB Gain Control Range 21dBm IIP3, Integrated LO Quadrature Generator 22.8dBm OIP3 at 2GHz, –158.2dBm/Hz Noise Floor, 50Ω Single-Ended RF and LO Ports, 4-Channel W-CDMA ACPR = –64dBc at 2.14GHz 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50Ω Matching, Single-Ended LO and RF Ports Operation 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50Ω Matching, Single-Ended LO and RF Ports Operation 24.2dBm IIP3 at 1.95GHz, NF = 12.5dB, 3.15V to 5.25V Supply, Single-Ended LO Port Operation 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50Ω Single-Ended RF and LO Ports 450MHz Bandwidth, 40dBm OIP3, 4.5dB to 27dB Gain Control Single-Ended 50Ω RF and LO Ports, 17.6dBm IIP3 at 1900MHz, ICC = 28A 3V to 5.3V Supply, 16.5dBm IIP3, 100kHz to 2GHz RF NF = 11dB, , ICC = 28mA, –65dBm LO-RF Leakage IIP3 = 23.5dBm and NF = 12.5dBm at 1900MHz, 4.5V to 5.25V Supply, ICC = 78mA, Conversion Gain = 2dB 21.8dBm OIP3 at 2GHz, –159.3dBm/Hz Noise Floor, 50Ω, 0.5VDC Baseband Interface, 4-Channel W-CDMA ACPR = –66dBc at 2.14GHz IIP3 = 23.7dBm at 2600MHz, 23.5dBm at 3600MHz, ICC = 82A at 3.3V 10mA Supply Current, 10dBm IIP3, 10dB NF Usable as Up- or Down-Converter. , 22.9dBm OIP3 at 850MHz, –160.3dBm/Hz Noise Floor, 50Ω, 0.5VDC Baseband Interface, 3-Ch CDMA2000 ACPR = –71.4dBc at 850MHz 21.6dBm OIP3 at 2GHz, –158.6dBm/Hz Noise Floor, High-Ohmic 0.5VDC Baseband Interface, 4-Ch W-CDMA ACPR = –67.7dBc at 2.14GHz 50Ω, Single-Ended RF and LO Inputs. 28dBm IIP3 at 900MHz, 13.2dBm P1dB, 0.04dB I/Q Gain Mismatch, 0.4° I/Q Phase Mismatch 27.3dBm OIP3 at 2.14GHz, 9.9dB Noise Floor, 2.6dB Conversion Gain, –35dBm LO Leakage 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply 100kHz to 1GHz, Temperature Compensated, 2.7 to 6V Supply 44dB Dynamic Range, Temperature Compensated, SC70 Package 36dB Dynamic Range, Low Power Consumption, SC70 Package Precision VOUT Offset Control, Shutdown, Adjustable Gain Precision VOUT Offset Control, Shutdown, Adjustable Offset Precision VOUT Offset Control, Adjustable Gain and Offset ±1dB Output Variation over Temperature, 38ns Response Time, Log Linear Response 25ns Response Time, Comparator Reference Input, Latch Enable Input, –26dBm to 12dBm Input Range Low Frequency to 1GHz, 83dB Log Linear Dynamic Range 75dB Dynamic Range, ±1dB Output Variation Over Temperature Fast Responding, up to 60dB Dynamic Range, ±0.3dB Accuracy Over Temperature 5554f COMMENTS RF Power Detectors LTC®5505 LTC5507 LTC5508 LTC5509 LTC5530 LTC5531 LTC5532 LT5534 LTC5536 LT5537 LT5538 LT5570 RF Power Detectors with >40dB Dynamic Range 100kHz to 1000MHz RF Power Detector 300MHz to 7GHz RF Power Detector 300MHz to 3GHz RF Power Detector 300MHz to 7GHz Precision RF Power Detector 300MHz to 7GHz Precision RF Power Detector 300MHz to 7GHz Precision RF Power Detector 50MHz to 3GHz Log RF Power Detector with 60dB Dynamic Range Precision 600Mhz to 7GHz RF Power Detector with Fast Comparator Output Wide Dynamic Range Log RF/IF Detector 3.8GHz Wide Dynamic Range Log Detector 2.7GHz RMS Power Detector 32 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0708 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008