LTC1045CSW

LTC1045 Programmable Micropower Hex Translator/ Receiver/Driver FEATURES s s s s s s s s DESCRIPTION The LTC®1045 is a hex level translator manufactured using Linear Technology’s enhanced LTCMOSTM silicon gate process. It consists of six high speed comparators with output latches and three-state capability. Each comparator’s plus input is brought out separately. The minus inputs of comparators 1 to 4 are tied to VTRIP1 while 5 and 6 are tied to VTRIP2. The ISET pin has several functions. When taken to V + the outputs are latched and power is completely shut off. Power/speed can be programmed by connecting ISET to V – through an external resistor. Efficiently Translate Voltage Levels Internal Hysteresis for Noise Immunity Output Latches Included Three-State Outputs Programmable Power/Speed Power Can Be Completely Shut Off ± 50V on Inputs with External 100k Limit Resistor 1.2µs Response at 100µA Supply Current APPLICATIONS s s s s s TTL/CMOS to ± 5V Analog Switch Drive TTL to CMOS (3V to 15V VCC) ECL to CMOS (3V to 15V VCC) Ground Isolation Buffer Low Power RS232 Line Receiver , LTC and LT are registered trademarks of Linear Technology Corporation. LTCMOS is a trademark of Linear Technology Corporation. TYPICAL APPLICATION 5V Flat Ribbon Cable Driver/Receiver 5V 20 TTL IN XMT IN + – V V+ 1 VOH VOL DIS 13 11 20 XMT OUT 66-FT FLAT RIBBON CABLE ZO = 150Ω ADJACENT CONDUCTORS 150Ω 0.5V RCV IN V+ 1 VOH VOL DIS 13 11 RCV OUT 1.4V ISET 12 10 – XMT IN (5V/DIV) XMT OUT (1V/DIV) RCV IN (1V/DIV) RCV OUT (5V/DIV) 100ns/DIV 045 TA01a U U U + – TTL OUT ISET 12 V– 10 1045 TA01 1 LTC1045 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) PACKAGE/ORDER INFORMATION TOP VIEW VOH IN1 IN2 IN3 IN4 IN5 IN6 VTRIP2 VTRIP1 1 2 3 4 5 6 7 8 9 20 V + 19 OUT1 18 OUT2 17 OUT3 16 OUT4 15 OUT5 14 OUT6 13 DISABLE 12 ISET 11 VOL Total Supply Voltage (V +, VOH to V –, VOL) .............. 18V Output High Voltage (VOH) ...................................... ≤ V + Input Voltage ....................................18V to (V – – 0.3V) Output Short-Circuit Duration (VOH – VOL ≤ 10V) ................................... Continuous ESD (MIL-STD-883, Method 3015) .................... 2000V Operating Temperature Range ................. –40°C to 85°C Storage Temperature Range ................. – 55°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER LTC1045CJ LTC1045CN LTC1045CSW V – 10 J PACKAGE N PACKAGE SW PACKAGE 20-LEAD CERDIP 20-LEAD PDIP 20-LEAD SO WIDE TJMAX = 150° C, θJA = 70°C/ W (J) TJMAX = 110°C, θJA = 90°C/ W (N) TJMAX = 110° C, θJA = 90°C/ W (SW) Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER IB Input Bias Current Trip Voltage Range (Pins 8, 9) V + to V – Supply Current V + to V – Supply Current in Shutdown Voltage on ISET (Pin 12) TTL Output High Voltage TTL Output Low Voltage Output Short-Circuit Sink Current Output Short-Circuit Source Current Three-State Leakage Current Output Resistance to VOH Output Resistance to VOL ISET Voltage for Shutdown DISABLE Input Logic Levels VIH VIL Input Supply Differential (V + – V –) (Note 3) Output Supply Differential (VOH – VOL) (Note 3) V + = VOH = 5V, V – = VOL = 0V, TA = 25°C, unless otherwise specified. (Note 3) CONDITIONS V – ≤ VIN ≤ V + q q MIN TYP ±1 MAX 0.5 V+ – 2 3.5 4.5 1 V– 2.5 IS IOFF VREF VOH VOL ISINK ISOURCE IOZ ROH ROL DISABLE = V +, RSET = 10k q DISABLE = ISET = V + q 10 0.9 q RSET = 10k IOUT = – 360µA, IOUT = 1.6mA, V + = 4.5V VIN = VTRIP – 100mV, VOUT = V + V + = 4.5V VIN = VTRIP + 100mV, VOUT = V – q q q q 0.6 2.4 7.5 5.5 4.0 3.2 1.25 4.4 0.2 15 8.0 0.005 0.4 DISABLE = V +, VOL ≤ VOUT ≤ VOH q IOUT ≤ 100µA q 260 100 q q IOUT ≤ 100µA V + – 0.5 2.0 4.5 3 1 475 600 180 250 UNITS nA µA V mA mA nA µA V V V V mA mA mA mA µA µA Ω Ω Ω Ω V V V V V V + = 4.5V, V – = 0V V + = 5.5V, V – = 0V q q q q 0.8 15 15 2 U W U U WW W LTC1045 AC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER td tSETUP tHOLD tACC tIH, tOH Response Time Time Before Rising Edge of ISET that Data Must Be Present Time After Rising Edge of ISET that Data Must Be Present Falling Edge of DISABLE to Logic Level (from Hi-Z State) Rising Edge of DISABLE to Hi-Z State CONDITIONS V + = VOH = 5V, V – = VOL = 0V, TA = 25°C, unless otherwise specified. MIN q TYP MAX 250 350 UNITS ns ns ns ns ns ns Test Circuit Figure 1 RSET = 10k, ± 100mV Drive Test Circuit Figure 2 Test Circuit Figure 2 Test Circuit Figure 3 Test Circuit Figure 3 80 0 165 200 The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The maximum differential voltage between any two power pins (V +, V –, VOH and VOL) must not exceed 18V. The maximum recommended operating differential is 15V. Note 3: During operation near the maximum supply voltage limit, care should be taken to avoid or suppress power supply turn-on and turn-off transients, power supply ripple or ground noise; any of these conditions must not cause a supply differential to exceed the absolute maximum rating. TYPICAL PERFORMANCE CHARACTERISTICS I + vs Temperature 5 V + = 5V 4 V + TO V – CURRENT (mA) V + TO V – CURRENT (mA) DELAY TIME (µs) 3 RSET = 0 2 RSET = 10k 1 RSET = 1M 0 –50 –25 75 50 0 25 TEMPERATURE (°C) 100 125 VREF vs Temperature 2.5 V + = 5V COMPARATOR HYSTERESIS (mV) VOLTAGE ON ISET PIN (V) 2.0 RSET = 1M 1.5 1.0 0.5 0.1 –50 –25 UW 1045 G01 I + vs RSET 5 TA = 25°C V + = VOH = 5V V – = VOL = 0V 1.2 1.0 0.8 0.6 0.4 0.2 Delay Time vs RSET TA = 25°C V + = VOH = 5V V – = VOL = 0V VIN = VTRIP ± 100mV 4 3 2 1 0 100 1k 10k RSET (Ω) 100k 1M 1045 G02 0 100 1k 10k RSET (Ω) 100k 1M 1045 G03 Hysteresis vs RSET 20 18 16 14 12 10 8 6 4 2 V + = 5V RSET = 10k 75 50 0 25 TEMPERATURE (°C) 100 125 0 100 1k 10k RSET (Ω) 100k 1M 1045 G05 1045 G04 3 LTC1045 PIN FUNCTIONS VOH (Pin 1): High Level to which the Output Switches. IN1 to IN7 (Pins 2 to 7): Six Comparator Inputs; Voltage Range = V – to V – + 18V. VTRIP2 (Pin 8): Trip Point for Last Two Comparators (Inputs 5,6); Voltage Range = V – to V + – 2V. VTRIP1 (Pin 9): Trip Point for First Four Comparators (Inputs 1 to 4); Voltage Range = V – to V + – 2V. V – (Pin 10): Comparator Negative Supply. VOL (Pin 11): Low Level to which the Output Switches. ISET (Pin 12): This has three functions: 1) RSET from this pin to V – sets bias current, 2) when forced to V + power is shut off completely and 3) when forced to V + outputs are latched. DISABLE (Pin 13): When high, outputs are Hi-Z. OUT6 to OUT1 (Pins 14 to 19): Six Driver Outputs. V + (Pin 20): Comparator Positive Supply. TEST CIRCUITS 5V 5V t r ≤ 10ns VIN + – V+ VOH VOL OUTPUT 50pF V+ VTRIP = 1.2V V– tr 1.3V VIN 1.2V 1.1V 10% td 5V OUTPUT 2.5V 0V 90% 90% Figure 1. Response Time Test Circuit VIN + – VTRIP = 1.2V 100mV VIN VTRIP –100mV t HOLD 5V ISET 0V t SETUP 50% 5V ISET 0V 50% 1045 F02 Figure 2. Latch Test Circuit 4 U U U t IH + OUTPUT 5V DISABLE 0V 10% 90% 50% t IH – tf DISABLE 10pF 10k OUTPUTS 5V 90% t r = t f ≤ 10ns 10% td VOL –5V 1045 F03a t r ≤ 10ns t OH 1045 F01 VOH DISABLE 10k OUTPUT 10% 90% 50% t OH 5V OUTPUTS V+ 10pF DISABLE –5V 10% 1045 F03b t r ≤ 10ns t ACC OUTPUT 50pF 90% DISABLE 50% 10% tACC 5V OUTPUTS DISABLE –5V 1045 F03c Figure 3. Three-State Output Test Circuit Conditions: V + = VOH = 5V, V – = VOL = 0V LTC1045 BLOCK DIAGRAM W V+ 20 V OH 1 V+ V OH IN1 2 + LEVEL SHIFT LATCH DIS V BIAS V– LE VOL 19 OUT1 – V+ IN2 3 + – VBIAS V– V+ IN3 4 + – VBIAS V– V+ IN4 5 + – VBIAS V– V+ IN5 6 + – VBIAS V– V+ IN6 7 + – VBIAS V– VREF ≈ 1.6V VBIAS BIAS GENERATOR SHUTDOWN 8 VTRIP2 10 V– 12 ISET ∼ 8k V OH 18 OUT2 DIS LE V OL V OH 17 OUT3 DIS LE V OL V OH 16 OUT4 DIS LE V OL V OH 15 OUT5 DIS LE V OL V OH 14 OUT6 DIS LE V OL 13 DISABLE VTRIP1 9 LATCH ENABLE 11 VOL 1045 BD RSET 5 LTC1045 APPLICATIONS INFORMATION The LTC1045 consists of six voltage translators and associated control circuitry (see Block Diagram). Each translator has a linear comparator input stage with the positive input brought out separately. The negative inputs of the first four comparators are tied in common to VTRIP1 and the negative inputs of the last two comparators are tied in common to VTRIP2. With these inputs the switching point of the comparators can be set anywhere within the common mode range of V – to V + – 2V. To improve noise immunity each comparator has a small built-in hysteresis. Hysteresis varies with bias current from 7mV at low bias current to 20mV at high bias current (see typical curve of Hysteresis vs RSET). Setting the Bias Current Unlike CMOS logic, any linear CMOS circuit must draw some quiescent current. The bias generator (Block Diagram) allows the quiescent current of the comparators to be varied. Bias current is programmed with an external resistor (see typical curve of I + vs RSET). As the bias current is decreased, the LTC1045 slows down (see typical curve of Delay Time vs RSET). Shutting Power Off and Latching the Outputs In addition to setting the bias current, the ISET pin shuts power completely off and latches the translator outputs. To do this, the ISET pin must be forced to V + – 0.5V. As shown in Figure 4, a CMOS gate or a TTL gate with a resistor pull-up does this quite nicely. Even though power V+ 4.5V TO 15V 20 V+ 20 4.5V TO 5.5V V+ DISABLE LTC1045 LTC1045 12 10 10 12 DISABLE (A) CMOS (B) TTL Figure 4. Driving the ISET Pin with Logic 6 U W U U is turned off to the linear circuitry, the CMOS output logic is powered and maintains the output state. With no DC load on the output, power dissipation, for all practical purposes, is zero. Latching the output is fast—typically 80ns from the rising edge of ISET. Going from the latched to flow-through state is much slower—typically 1.5µs from the falling edge of ISET. This time is set by the comparator’s power-up time. During the power-up time, the output can assume false states. To avoid problems, the output should not be considered valid until 2µs to 5µs after the falling edge of ISET. Putting the Outputs in Hi-Z State A DISABLE input sets the six outputs to a high impedance state. This allows the LTC1045 to be interfaced to a data bus. When DISABLE = “1” the outputs are high impedance and when DISABLE = “0” they are active. With TTL supplies, V + = 4.5V to 5.5V and V – = GND, the DISABLE input is TTL compatible. Power Supplies There are four power supplies on the LTC1045: V +, V –, VOH and VOL. They can be connected almost arbitrarily, but there are a few restrictions. A minimum differential must exist between V + and V – and VOH and VOL. The V + to V – differential must be at least 4.5V and the VOH to VOL differential must be at least 3V. Another restriction is caused by the internal parasitic diode D1 (see Figure 5). VOH D1 V+ 100k VOL V+ P1 OUTPUT PIN DATA N1 1045 F05 VOL 1045 F04 VOL Figure 5. Output Driver LTC1045 APPLICATIONS INFORMATION Because of this diode, VOH must not be greater than V +. Lastly, the maximum voltage between any two power supply pins must not exceed 15V operating or 18V absolute maximum. For example, if V + = 5V, V – or VOL should be no more negative than – 10V. Note that VOL should not be more negative than – 10V even if the VOH to VOL differential does not exceed the 15V maximum. In this case the V + to VOL differential sets the limit. Input Voltage The LTC1045 has no upper clamp diodes as do conventional CMOS circuits. This allows the inputs to exceed the V + supply. The inputs will break down approximately 30V above the V – supply. If the input current is limited with 100kΩ, the input voltage can be driven to at least ± 50V with no adverse effects for any combination of allowed ROH /[ROH AT (VOH – VOL) = 5V AND (V + – VOH) = 0V] 4 3 ROL/[ROL AT (VOH – VOL) = 5V] VOH – VOL = 3V 2 VOH – VOL = 4V VOH – VOL = 5V 1 SPECIFIED POINT VOH – VOL = 10V 0 0 2 4 8 6 10 V + – VOH (V) 12 14 16 1045 F06 Figure 6. Relative Output Sourcing Resistance (ROH) vs V + – VOH U W U U power supply voltages. Output levels will be correct even under these conditions (i.e., if the input voltage is above the trip point, the output will be high and if it is below, the output will be low). Output Drive Output drive characteristics of the LTC1045 will vary with the power supply voltages that are chosen. Output impedance is affected by V +, VOH and VOL. V – has no effect on output impedance. Guaranteed drive characteristics are specified in the table of electrical characteristics for V + = VOH = 5V and V – = VOL = 0V. Figures 6 and 7 show relative output impedance for other supply combinations. In general, output impedance is minimized if V + to VOH is minimized and VOH to VOL is maximized. 2 SPECIFIED POINT 1 0 0 2 4 8 6 10 VOH – VOL (V) 12 14 16 1045 F07 Figure 7. Relative Output Sinking Resistance (ROL) vs VOH – VOL 7 LTC1045 TYPICAL APPLICATIONS ECL to CMOS/TTL Logic 5V ECL IN ~ –1.3V 10k –5.2V TTL/CMOS (VCC = 5V) CMOS (VCC = 15V) ~2.5V 10k 8 U V+ V OH THREESTATE BUFFER IN + COMP LATCH OUT VTRIP – V– ISET VOL DIS CMOS/TTL (VCC = 5V) 30k 1045 TA02 TTL/CMOS (VCC = 5V) to High Voltage CMOS (VCC = 15V) 15V V+ V OH THREESTATE BUFFER IN + COMP LATCH OUT VTRIP – V– ISET ~1.4V 20k VOL DIS CMOS (VCC = 15V) 1045 TA03 High Voltage CMOS (VCC = 15V) to TTL/CMOS (VCC = 5V) 5V V+ 10k V OH THREESTATE BUFFER IN + COMP LATCH OUT VTRIP – V– ISET VOL DIS TTL/CMOS (VCC = 5V) 1045 TA04 LTC1045 TYPICAL APPLICATIONS TTL/CMOS (VCC = 5V) to Low Voltage CMOS (VCC = 3V) 5V V+ 3V V OH THREESTATE BUFFER COMP VTRIP LATCH OUT CMOS (VCC = 3V) TTL/CMOS (VCC = 5V) TTL/CMOS (VCC = 5V) IN VTRIP TTL/CMOS (VCC = 5V) U + – IN + – V– ISET ~1.5V 100k VOL DIS 1045 TA05 TTL/CMOS Logic Levels to ± 5V Analog Switch Driver 5V V+ V OH THREESTATE BUFFER ± 5V IN OUT VDD SW ± 5V OUT COMP LATCH VSS CMOS ANALOG SWITCH (CD4016 FOR EXAMPLE) 1045 TA06 V– ISET ~1.4V 20k VOL DIS –5V TTL/CMOS (VCC = 5V) to 10V/– 5V Clock Driver 10V V+ V OH THREESTATE BUFFER IN + COMP LATCH OUT 10V TO –5V CLOCK DRIVER VTRIP – V– ISET ~1.4V 20k –5V VOL DIS 1045 TA07 9 LTC1045 TYPICAL APPLICATIONS Logic Ground Isolation when Two Grounds are within LTC1045 Common Mode Range SYSTEM A SYSTEM B VCC B = 5V VCC A = 5V V+ V OH THREESTATE BUFFER COMP VTRIP 1k SETS LOGIC THRESHOLD REFERRED TO GND A V– ISET VOL DIS LATCH OUT LOGIC OUT TTL/CMOS LOGIC IN 2.7k VTRIP = 1.35V GND A 5V 20 TTL IN XMT IN + – V V+ 1 VOH VOL DIS 13 11 XMT OUT 30-FT RG 174 COAX CABLE 50Ω 0.2V 20 RCV IN V+ 1 VOH VOL DIS 13 11 RCV OUT 50pF 1.4V ISET 12 10 – RCV OUT (5V/DIV) RCV IN (1V/DIV) XMT OUT (1V/DIV) XMT IN (5V/DIV) 10 U + – V – = – 5V GND B 1045 TA08 (GND B – V – + VTRIP) ≤ GND A ≤ (GND B + VCC B – 2V – VTRIP) Coax Cable Driver/Receiver 5V + – V TTL OUT ISET – 12 1045 TA10 10 200ns/DIV 1045 TA10a LTC1045 TYPICAL APPLICATIONS 5V 5V 1 V+ 20 1 OUT1 19 13 3 OUT2 18 5 8 OUT3 17 6 10 OUT4 16 12 7 OUT5 15 –5V OUT6 14 1045 TA09 8 VTRIP2 9 VTRIP1 10 V– – + 7 IN6 – + 6 IN5 – + 5 IN4 – TTL OR CMOS LOGIC INPUTS + 4 IN3 – + 3 IN2 – + U ± 5V Analog Switch Driver 14 CD4016 SW A 2 ± 5V VOH LTC1045 2 IN1 SW B 4 ± 5V SW C 9 ± 5V SW D 11 ± 5V DIS 13 ISET VOL 12 ~1.5V 100k 11 –5V 11 LTC1045 TYPICAL APPLICATIONS Logic Systems DC Isolation SYSTEM A SYSTEM B POWER SUPPLY SYSTEM A POWER SUPPLY VTRIP* 1µF 8 VTRIP2 9 VTRIP1 1µF** 10 100k SYSTEM A GND * SET V TRIP TO HALF WAY BETWEEN V OH AND VOL OF SYSTEM A ** SHUNTS COMMON MODE SIGNAL † PROVIDES LEAKAGE PATH FOR TOTALLY ISOLATED SYSTEMS SYSTEM B GND † V– 12 – + 7 IN6 – + 6 IN5 – + 5 IN4 – TTL OR CMOS + 4 IN3 – + 3 IN2 – + U SYSTEM B 1V OH 2 IN1 LTC1045 V+ 20 OUT1 19 OUT2 18 OUT3 17 CMOS OR TTL OUT4 16 OUT5 15 OUT6 14 DIS 13 THREE-STATE CONTROL ISET VOL 12 11 1045 TA11 LTC1045 TYPICAL APPLICATIONS 24V Relay Supply from 12V/15V Supply V+ 10k 10k 8 VTRIP2 9 VTRIP1 10 V– 1000pF RS232 Receiver 5V 30V –30V 100k 2 9 0.9V NOTE: INPUTS HAVE NO INTERNAL PULL-DOWN – + V+ 10k 7 IN6 – + 6 IN5 – + 5 IN4 – + 4 IN3 – + 3 IN2 – + U 1V OH 2 IN1 LTC1045 V+ 20 OUT1 19 OUT2 18 OUT3 17 V+ OUT4 16 1N4148 OUT5 15 1µF OUT6 14 1N4148 24V + 10µF RL ≥ 1k DIS 13 ISET VOL 12 11 100k 10k 1045 TA13 20 + – V+ 1 VOH 19 VOL LTC1045 DIS 11 ISET 13 V– 12 10 10k TTL OUT 1045 TA12 13 LTC1045 TYPICAL APPLICATIONS LED Driver V+ 5V TO 15V 8 VTRIP2 9 VTRIP1 10 V– ≈ 1.5V V+ 5V 100Ω 3 + 1 358 2N2222 2 – ≈ 1.5V R (ADJUSTS LED CURRENT) 1045 TA14 14 + 5 – REF LED – + 7 IN6 – + 6 IN5 – + 5 IN4 – LOW TURNS LED ON + 4 IN3 – + 3 IN2 – + U 1V OH 2 IN1 LTC1045 V+ 20 OUT1 19 OUT2 18 OUT3 17 OUT4 16 TO LEDs OUT5 15 OUT6 14 DIS 13 ISET VOL 12 11 100k 6 8 358 4 7 2N2905 (USE HEAT SINK) REGULATES LED CURRENT LTC1045 TYPICAL APPLICATIONS Multiwindow Comparator and Display V + VREF R VH 10k 10k 5 IN4 10k 6 IN5 10k 7 IN6 8 VTRIP2 9 VTRIP1 VIN 10 V– 1 10k VOH LTC1045 + 2 IN1 10k 3 IN2 10k 4 IN3 10k 5 IN4 10k 6 IN5 10k 7 IN6 VL 8 VTRIP2 9 VTRIP1 10 V– V– – – – – – – – – – – + 4 IN3 – + 3 IN2 – + + + + + + + + + U 5V 1V OH 2 IN1 V+ 20 LTC1045 OUT1 19 VIN > VREF OUT2 18 OUT3 17 OUT4 16 OUT5 15 OUT6 14 GI MV 57164* BAR GRAPH DISPLAY 5V DIS 13 ISET VOL 12 11 V+ 20 OUT1 19 OUT2 18 OUT3 17 OUT4 16 OUT5 15 OUT6 14 VIN < VL DIS 13 * FOR LED CURRENT CONTROL SEE LTC1045 LED DRIVER 12 VIN ≤ V + – 2 100(VREF – VH) R= (VH – VL) EACH WINDOW BETWEEN VH AND VL EQUALS 1/10(VH – VL) (VH – VL) ≥ 0.5V ISET VOL 11 1045 TA15 15 LTC1045 TYPICAL APPLICATIONS ECL to CMOS from Single 5V Supply ECL IN ECL IN ECL IN ECL IN 10k 5V 10k 10k 8 VTRIP2 DIS 13 9 VTRIP1 10 ISET VOL 12 V– 11 22k ≈ – 3.3V ≈ –1.29V 51k 10k 1000pF NEGATIVE SUPPLY GENERATOR 16 + – + 7 IN6 – + 6 IN5 – + 5 IN4 – + 4 IN3 – + 3 IN2 – + U 5V 1V OH 2 IN1 LTC1045 V+ 20 OUT1 19 CMOS OUT OUT2 18 CMOS OUT OUT3 17 CMOS OUT OUT4 16 CMOS OUT OUT5 15 1µF 1N4148 OUT6 14 1N4148 10µF 0.01µF 33k 1045 TA16 LTC1045 PACKAGE DESCRIPTION U Dimensions in inches (millimeters) unless otherwise noted. J Package 20-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) CORNER LEADS OPTION (4 PLCS) 20 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION 0.300 BSC (0.762 BSC) 0.015 – 0.060 (0.381 – 1.524) 19 18 17 1.060 (26.924) MAX 16 15 14 13 12 11 0.220 – 0.310 0.025 (5.588 – 7.874) (0.635) RAD TYP 1 2 0.005 (0.127) MIN 3 4 5 6 7 8 9 10 0.200 (5.080) MAX 0.008 – 0.018 (0.203 – 0.457) 0.385 ± 0.025 (9.779 ± 0.635) 0° – 15° 0.125 (3.175) MIN 0.045 – 0.068 (1.143 – 1.727) 0.014 – 0.026 (0.356 – 0.660) 0.100 ± 0.010 (2.540 ± 0.254) J20 0694 NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS. 17 LTC1045 PACKAGE DESCRIPTION U Dimensions in inches (millimeters) unless otherwise noted. N Package 20-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 1.040* (26.416) MAX 20 19 18 17 16 15 14 13 12 11 0.255 ± 0.015* (6.477 ± 0.381) 1 0.300 – 0.325 (7.620 – 8.255) 0.130 ± 0.005 (3.302 ± 0.127) 0.015 (0.381) MIN 2 3 4 5 6 7 8 9 10 0.045 – 0.065 (1.143 – 1.651) 0.009 – 0.015 (0.229 – 0.381) 0.065 (1.651) TYP 0.125 (3.175) MIN 0.018 ± 0.003 (0.457 ± 0.076) N20 0695 0.005 (0.127) MIN 0.100 ± 0.010 (2.540 ± 0.254) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) ( +0.025 0.325 –0.015 +0.635 8.255 –0.381 ) 18 LTC1045 PACKAGE DESCRIPTION U Dimensions in inches (millimeters) unless otherwise noted. SW Package 20-Lead Plastic Small Outline (Wide 0.300) (LTC DWG # 05-08-1620) 0.496 – 0.512* (12.598 – 13.005) 20 19 18 17 16 15 14 13 12 11 NOTE 1 0.394 – 0.419 (10.007 – 10.643) 0.291 – 0.299** (7.391 – 7.595) 0.010 – 0.029 × 45° (0.254 – 0.737) 1 0.093 – 0.104 (2.362 – 2.642) 2 3 4 5 6 7 8 9 10 0.037 – 0.045 (0.940 – 1.143) 0° – 8° TYP 0.009 – 0.013 (0.229 – 0.330) NOTE 1 0.016 – 0.050 (0.406 – 1.270) 0.050 (1.270) TYP 0.014 – 0.019 (0.356 – 0.482) TYP 0.004 – 0.012 (0.102 – 0.305) S20 (WIDE) 0396 NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC1045 TYPICAL APPLICATION Power MOSFET Driver Low Power Consumption Stepper Motor Driver +VM 1V OH ∅1 2 IN1 5V 6 IN5 51k ≈ 1.4V 20k STEP A CLOCK C 8 VTRIP2 7 IN6 RP 0.1µF 9 VTRIP1 10 V– ≈ 0.2V RELATED PARTS PART NUMBER LT1016 LT1039 LTC1440/LTC1441/LTC1442 DESCRIPTION Ultrafast Precision Comparator Triple RS232 Driver/Receiver with Shutdown Ultralow Power, Single/Dual Comparator with Reference COMMENTS 10ns Propagation Delay ±12V Supply, No Supply Current in Shutdown 2.8µA Supply Current 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417q (408)432-1900 FAX: (408) 434-0507q TELEX: 499-3977 q www.linear-tech.com – – – + ∅2 5 IN4 – + ∅2 4 IN3 – TTL STEPPER MOTOR PHASE SIGNALS + ∅1 3 IN2 – + + + U LTC1045 V+ 20 B BUZ171 RH ** OUT1 19 4-PHASE BIFILAR STEPPER MOTOR OUT2 18 OUT3 17 OUT4 16 BUZ71A OUT5 15 * BUZ71A BUZ71A * BUZ71A ** ** ** ** OUT6 14 DIS 13 MOTOR GND ISET VOL 12 A 11 B 1k tON tHOLD FULL STEP DRIVER (5V ≤ VM ≤ 15V) t ON ≈ 3RPC RpC = L/R L IS WINDING INDUCTANCE R = RWINDING + RDS(ON)P + RDS(ON)N IHOLD ≈ VM /RH *VARISTOR GE V24ZA50 **FOR VM ≥ 10V ADD 470Ω IN SERIES WITH LTC1045 OUTPUTS 1045 TA17 1045fb LT/TP 1097 REV B 4K • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1988