LTC1051/LTC1053 Dual/Quad Precision Zero-Drift Operational Amplifiers With Internal Capacitors DESCRIPTIO
The LTC®1051/LTC1053 are high performance, low cost dual/quad zero-drift operational amplifiers. The unique achievement of the LTC1051/LTC1053 is that they integrate on chip the sample-and-hold capacitors usually required externally by other chopper amplifiers. Further, the LTC1051/LTC1053 offer better combined overall DC and AC performance than is available from other chopper stabilized amplifiers with or without internal sample/hold capacitors. The LTC1051/LTC1053 have an offset voltage of 0.5µV, drift of 0.01µV/°C, DC to 10Hz, input noise voltage typically 1.5µVP-P and typical voltage gain of 140dB. The slew rate of 4V/µs and gain bandwidth product of 2.5MHz are achieved with only 1mA of supply current per op amp. Overload recover times from positive and negative saturation conditions are 1.5ms and 3ms respectively, about a 100 or more times improvement over chopper amplifiers using external capacitors. The LTC1051 is available in an 8-lead standard plastic dual-in-line package as well as a 16-pin SW package. The LTC1053 is available in a standard 14-pin plastic package and an 18-pin SO. The LTC1051/LTC1053 are plug in replacements for most standard dual/quad op amps with improved performance.
FEATURES
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
Dual/Quad Low Cost Precision Op Amp No External Components Required Maximum Offset Voltage: 5µV Maximum Offset Voltage Drift: 0.05µV/°C Low Noise 1.5µVP-P (0.1Hz to 10Hz) Minimum Voltage Gain: 120dB Minimum PSRR: 120dB Minimum CMRR: 114dB Low Supply Current: 1mA/Op Amp Single Supply Operation: 4.75V to 16V Input Common Mode Range Includes Ground Output Swings to Ground Typical Overload Recovery Time: 3ms Pin Compatible with Industry Standard Dual and Quad Op Amps
APPLICATIO S
■ ■ ■ ■ ■ ■
Thermocouple Amplifiers Electronic Scales Medical Instrumentation Strain Gauge Amplifiers High Resolution Data Acquisition DC Accurate R C Active Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
R1 5V R2 2
High Performance Low Cost Instrumentation Amplifier
120 R2
VOLTAGE NOISE DENSITY (nV√Hz)
LTC1051 Noise Spectrum
100
– +
8 1 R1 6
VIN
3
1/2 LTC1051
80
–
1/2 LTC1051 7
R1 = 499Ω, 0.1% R2 = 100k, 0.1% GAIN = 201 MEASURED CMRR ~ 120dB AT DC MEASURED INPUT VOS 3µV MEASURED INPUT NOISE 2µVP-P (DC – 10Hz)
VIN
5
60
+
4 – 5V
40
20
1051/53 TA01a
10
U
U
U
100 1k FREQUENCY (Hz)
10k
1051/53 TA01b
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LTC1051/LTC1053
ABSOLUTE AXI U RATI GS
Total Supply Voltage (V + to V –) ............................ 16.5V Input Voltage ........................ (V + + 0.3V) to (V – – 0.3V) Output Short-Circuit Duration .......................... Indefinite
PACKAGE/ORDER I FOR ATIO
TOP VIEW OUT A 1 – IN A 2 +IN A 3 V– 4 N8 PACKAGE 8-LEAD PDIP 8 7 6 5 V+ OUT B –IN B +IN B
ORDER PART NUMBER LTC1051CN8 LTC1051MJ8 LTC1051CJ8 LTC1051AMJ8 LTC1051ACJ8 ORDER PART NUMBER LTC1051CSW
TJMAX = 150°C, θJA = 110°C/W
J8 PACKAGE 8-LEAD CERDIP
OBSOLETE PACKAGE
Consider the N8 Package as an Alternate Source
TOP VIEW NC 1 NC 2 OUT A 3 –IN A 4 +IN A 5 V– 6 NC 7 NC 8 SW PACKAGE 16-LEAD PLASTIC SO 16 NC 15 NC 14 V + 13 OUT B 12 –IN B 11 +IN B 10 NC 9 NC
TJMAX = 150°C, θJA = 90°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER Input Offset Voltage Average Input Offset Drift Long Term Offset Drift Input Bias Current CONDITIONS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ± 5V unless otherwise noted.
LTC1051/LTC1053 MIN TYP MAX ±0.5
●
LTC1051C/LTC1053C Input Offset Current Input Noise Voltage (Note 2) (All Grades)
RS = 100Ω, DC to 10Hz RS = 100Ω, DC to 1Hz
2
U
U
W
WW U
W
(Note 1)
Operating Temperature Range LTC1051M, LTC1051AM (OBSOLETE) .. –55°C to 125°C LTC1051C/LTC1053C ......................... – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW OUT A – IN A +IN A V+ +IN B – IN B OUT B 1 2 3 4 5 6 7 N PACKAGE 14-LEAD PDIP 14 OUT D 13 – IN D 12 +IN D 11 V – 10 +IN C 9 8 – IN C OUT C
ORDER PART NUMBER LTC1053CN
TJMAX = 150°C, θJA = 65°C/W
TOP VIEW NC 1 OUT A 2 –IN A 3 +IN A 4 V+ 5 +IN B 6 –IN B 7 OUT B 8 NC 9 SW PACKAGE 18-LEAD PLASTIC SO 18 NC 17 OUT D 16 –IN D 15 +IN D 14 V – 13 +IN C 12 –IN C 11 OUT C 10 NC
ORDER PART NUMBER LTC1053CSW
TJMAX = 150°C, θJA = 85°C/W
MIN
LTC1051A TYP ±0.5 ±0.0 50 ± 15 ±30 1.5 0.4
MAX ±5 ±0.05 ± 50 ±100 ±100 ±150 2
UNITS µV µV/°C nV/√Mo pA pA pA pA µVP-P µVP-P
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±5 ±0.05 ± 65 ±135 ±125 ±175
±0.0 50 ± 15
●
± 30
●
1.5 0.4
LTC1051/LTC1053
ELECTRICAL CHARACTERISTICS
PARAMETER Input Noise Current Common Mode Rejection Ratio, CMRR Differential CMRR LTC1051, LTC1053 (Note 3) Power Supply Rejection Ratio Large Signal Voltage Gain Maximum Output Voltage Swing Slew Rate Gain Bandwidth Product Supply Current/Op Amp Internal Sampling Frequency No Load CONDITIONS f = 10Hz VCM = V– to 2.7V
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ± 5V unless otherwise noted.
LTC1051/LTC1053 MIN TYP MAX 2.2
●
MIN 114 110 112
LTC1051A TYP 2.2 130
MAX
UNITS fA/√Hz dB dB dB
106 100 112
130
VCM = V – to 2.7V VS = ± 2.375V to ±8V RL = 10k, VOUT = ±4V RL = 10k RL = 100k RL = 10k, CL = 50pF
● ● ●
116 116 ±4.5 ±4.5
140 160 ±4.85 ±4.95 4 2.5 1 2 2.5
120 120 ±4.7
140 160 ±4.85 ±4.95 4 2.5 1 3.3 2 2.5
dB dB V V V/µs MHz mA mA kHz
●
3.3
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±5V unless otherwise noted.VS = 5V, GND unless otherwise noted.
PARAMETER Input Offset Voltage Input Offset Drift Input Bias Current Input Offset Current Input Noise Voltage Supply Current/Op Amp DC to 10Hz No Load
●
CONDITIONS
MIN
LTC1051A/LTC1051/LTC1053 TYP MAX ±0.5 ±0.01 ± 10 ± 20 1.8 1.5 ±5 ±0.05 ± 50 ± 80
UNITS µV µV/°C pA pA µVP-P mA
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: For guaranteed noise specification contact LTC Marketing.
Note 3: Differential CMRR for the LTC1053 is measured between amplifiers A and D, and amplifiers B and C.
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LTC1051/LTC1053 TYPICAL PERFOR A CE CHARACTERISTICS
Common Mode Input Range vs Supply Voltage
8
SAMPLING FREQUENCY, fS (kHz)
4 2 0 –2 –4 –6 –8 0 1 2 3 4 5 6 SUPPLY VOLTAGE (±V) 7 8 VCM = V –
3.5
SAMPLING FREQUENCY, fS (kHz)
6
COMMON MODE RANGE (V)
Supply Current vs Supply Voltage Per Op Amp
1.50 TA = 25°C 1.25 SUPPLY CURRENT, IS (mA) SUPPLY CURRENT, IS (mA) 1.00 0.75 0.50 0.25 0
2.0 1.8 1.6
VOLTAGE GAIN (dB)
4
14 8 10 12 6 TOTAL SUPPLY VOLTAGE V + TO V – (V)
Output Short-Circuit Current vs Supply Voltage
SHORT-CIRCUIT OUTPUT CURRENT, IOUT (mA)
6 VOUT = V – 4 ISOURCE 2
VOLTAGE GAIN (dB)
CMRR (dB)
0 – 10 – 20 ISINK – 30 4 14 16 8 10 12 6 TOTAL SUPPLY VOLTAGE, V + TO V – (V)
1051/53 G07
VOUT = V +
4
UW
1051/53 G01
Sampling Frequency vs Supply Voltage
4.0 TA = 25°C
Sampling Frequency vs Temperature
5 VS = ± 5V
4
3.0
3
2
2.5
1
2.0 4 14 16 6 8 10 12 TOTAL SUPPLY VOLTAGE, V + TO V – (V)
1051/53 G02
–50
50 25 0 75 100 –25 AMBIENT TEMPERATURE, TA (°C)
125
1051/53 G03
Supply Current vs Temperature Per Op Amp
VS = ± 5V 120 100 80 60 40 20 0 – 20 50 25 0 75 100 –25 AMBIENT TEMPERATURE, TA (°C) 125
Gain/Phase vs Frequency
60 VS = ± 5V CL = 100pF 80 RL ≥ 1k TA = 25°C 100 120 140 160 180 200 10k 100k FREQUENCY (Hz) 220 10M
1051/53 G06
PHASE SHIFT (DEGREES)
1.4 1.2 1.0 0.8 0.6 0.4 0.2
16
0 –50
– 40 100
1k
1M
1051/53 G04
1051/53 G05
CMRR vs Frequency
160 140 120 100 80 60 40 20 0 1 10 100 1k FREQUENCY (Hz) 10k 100k VS = ± 5V TA = 25°C AC COMMON MODE IN = 0.5VP-P
Gain/Phase vs Frequency
120 100 80 60 40 20 0 – 20 – 40 100 1k 10k 100k FREQUENCY (Hz) 1M – 60 VS = ± 2.5V CL = 100pF – 80 RL ≥ 1k TA = 25°C –100 –120 –140 –160 –180 –200 –220 10M
1051/53 G09
PHASE SHIFT (DEGREES)
1051/53 G08
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LTC1051/LTC1053 TYPICAL PERFOR A CE CHARACTERISTICS
Overload Recovery
400mV INPUT 0
OUTPUT 50mV /DIV
0 OUTPUT – 5V
INPUT 100mV
AV = –100 VS = ± 5V
LTC1051/LTC1053 DC to 10Hz Noise
VS = ±5V TA = 25°C
1µV
TEST CIRCUITS
Electrical Characteristics Test Circuit
1M V+ 1k 2 100k
– +
8 6 OUTPUT
3
1/2 LTC1051 4 V–
UW
0.5ms
RL
Small Signal Transient Response
Large Signal Transient Response
OUTPUT 2V/DIV
INPUT 6V
2µs/DIV AV = 1, RL = 10k, CL = 100pF VS = ± 5V, TA = 25°C
1051/53 G10
1051/53 G11
2µs/DIV AV = 1, RL = 10k, CL = 100pF VS = ± 5V, TA = 25°C
1051/53 G12
1.4µVP-P
10 SEC 1 SEC
DC 10Hz Noise Test Circuit
475k 0.01µF 10Ω 2
–
1/2 LTC1051 6
158k
316k
475k
–
LT1012 TO X-Y RECORDER
3
+
0.1µF
0.01µF
+
1051/53 TC01
FOR 1Hz NOISE BW INCREASE ALL THE CAPACITORS BY A FACTOR OF 10.
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LTC1051/LTC1053
APPLICATIO S I FOR ATIO
Picoamperes
ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE
In order to realize the picoampere level of accuracy of the LTC1051/LTC1053, proper care must be exercised. Leakage currents in circuitry external to the amplifier can significantly degrade performance. High quality insulation should be used (e.g., Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be necessary —particularly for high temperature performance. Surface coating may be necessary to provide a moisture barrier in high humidity environments. Board leakage can be minimized by encircling the input connections with a guard ring operated at a potential close to that of the inputs: in inverting configurations, the guard ring should be tied to ground; in noninverting connections, to the inverting input. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width. Microvolts Thermocouple effects must be considered if the LTC1051/ LTC1053’s ultra low drift op amps are to be fully utilized. Any connection of dissimilar metals forms a thermoelectric junction producing an electric potential which varies with temperature (Seebeck effect.) As temperature sensors, thermocouples exploit this phenomenon to produce useful information. In low drift amplifier circuits, this effect is a primary source of error. Connectors, switches, relay contacts, sockets, resistors, solder, and even copper wire are all candidates for thermal EMF generation. Junctions of copper wire from different manufacturers can generate thermal EMFs of 200nV/°C— 4 times the maximum drift specification of the LTC1051/ LTC1053. The copper/kovar junction, formed when wire or printed circuit traces contact a package lead, has a thermal EMF of approximately 35µV/°C—700 times the maximum drift specification of the LTC1051/LTC1053. Minimizing thermal EMF-induced errors is possible if judicious attention is given to circuit board layout and component selection. It is good practice to minimize the number of junctions in the amplifier’s input signal path.
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Avoid connectors, sockets, switches and relays where possible. In instances where this is not possible, attempt to balance the number and type of junctions so that differential cancellation occurs. Doing this may involve deliberately introducing junctions to offset unavoidable junctions. When connectors, switches, relays and/or sockets are necessary, they should be selected for low thermal EMF activity. The same techniques of thermally balancing and coupling the matching junctions are effective in reducing the thermal EMF errors of these components. Resistors are another source of thermal EMF errors. Table 1 shows the thermal EMF generated for different resistors. The temperature gradient across the resistor is important, not the ambient temperature. There are two junctions formed at each end of the resistor and if these junctions are at the same temperature, their thermal EMFs will cancel each other. The thermal EMF numbers are approximate and vary with resistor value. High values give higher thermal EMF.
Table 1. Resistor Thermal EMF
RESISTOR TYPE Tin Oxide Carbon Composition Metal Film Wire Wound Evenohm Manganin THERMAL EMF/°C GRADIENT ~mV/°C ~450µV/°C ~20µV/°C ~2µV/°C ~2µV/°C
W
UU
Input Bias Current, Clock Feedthrough At ambient temperatures below 60°C, the input bias current of the LTC1051/LTC1053 op amps’ is dominated by the small amount of charge injection occurring during the sampling and holding of the op amps’ input offset voltage. The average value of the resulting current pulses is 10pA to 15pA with sign convention shown in Figure 1.
IB+
+
IB–
TA < 60°C
IB+
+
IB–
TA > 85°C 1/2 LTC1051
1/2 LTC1051
– (a)
– (b)
1051/53 F01
Figure 1. LTC1051 Bias Current
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LTC1051/LTC1053
APPLICATIO S I FOR ATIO
RS = 0, AV =11V/V 20mV/DIV
RS = 100k, AV =11V/V 20mV/DIV
RS = 0, AV =101V/V 20mV/DIV
RS = 100k, AV =101V/V 20mV/DIV
100µs/DIV
(a)
As the ambient temperature rises, the leakage current of the input protection devices increases, while the charge injection component of the bias current, for all practical purposes, stays constant. At elevated temperatures (above 85°C) the leakage current dominates and the bias current of both inputs assumes the same sign. The charge injection at the op amp input pins will cause small output spikes. This phenomenon is often referred to as “clock feedthrough” and can be easily observed when the closed-loop gain exceeds 10V/V (Figure 2). The magnitude of the clock feedthrough is temperature independent but it increases when the closed-loop gain goes up, when the source resistance increases and when the gain setting resistors increase (Figure 2a, 2b). It is important to note that the output small spikes are centered at 0V level and do not add to the output offset error budget. For instance, with RS = 1MΩ, the typical output offset voltage of Figure 2c is: VOS(OUT) ≈ 108 • IB+ + 101VOS(IN) A 10pA bias current will yield an output of 1mV ±100µV. The output clock feedthrough can be attenuated by lowering the value of the gain setting resistors, i.e. R2 = 10k, R1 = 100Ω, instead of 100k and 1k (Figure 2). Clock feedthrough can also be attenuated by adding a capacitor across the feedback resistor to limit the circuit bandwidth below the internal sampling frequency (Figure 3). Input Capacitance The input capacitance of the LTC1051/LTC1053 op amps is approximately 12pF. When the LTC1051/LTC1053 op amps are used with feedback factors approaching unity,
R S = 1 MΩ AV =101V/V
20mV/DIV
U
R2 100k R1 1k
W
UU
–
1/2 LTC1051
RS
+
100µs/DIV
1051/53 F02
(b)
(c)
Figure 2. Clock Feedthrough
the feedback resistor value should not exceed 7k for industrial temperature range and 5k for military temperature range. If a higher feedback resistor value is required, a feedback capacitor of 20pF should be placed across the feedback resistor. Note that the most common circuits with feedback factors approaching unity are unity gain followers and instrumentation amplifier front ends. (See Figure 4.)
RS = 100k AV =101V/V
100µs/DIV
C 1000pF R1 1k 2
– +
R2 100k 1/2 LTC1051 1
RS
3
1051/53 F03
Figure 3. Adding a Feedback Capacitor to Eliminate Clock Feedthrough
R2 < 7k, IF R1 > >R2 R1 2
–
1/2 LTC1051 1
3
+
1051/53 F04
Figure 4. Operating the LTC1051 with Feedback Factors Approaching Unity
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LTC1051/LTC1053
APPLICATIO S I FOR ATIO
LTC1051/LTC1053 as AC Amplifiers
Although initially chopper stabilized op amps were designed to minimize DC offsets and offset drifts, the LTC1051/LTC1053 family, on top of its outstanding DC characteristics, presents efficient AC performance. For instance, at single 5V supply, each op amp typically consumes 0.5mA and still provides 1.8MHz gain bandwidth product and 3V/µs slew rate. This, combined with almost distortionless swing to the supply rails (Figure 8), makes the LTC1051/LTC1053 op amps nearly general purpose. To further expand this idea (the “aliasing” phenomenon) which can occur under AC conditions, should be described and properly evaluated.
B: MAG RANGE: 9dBV 20dBV
15dB /DIV
–100
START: 100Hz X: 1825Hz
BW: 47.742Hz Y: – 70.72dBV
fIN = 750Hz
fCLK – fIN
2fIN
Figure 5a. Output Voltage Spectrum of 1/2 LTC1051 Operating as an Inverting Amplifier with Gain of 10, and Amplifying a 750Hz/800mV, Input AC Signal
A: MAG RANGE: 11dBV 20dBV STATUS: PAUSED RMS: 25
15dB /DIV
–100
CENTER: 10 000Hz X: 5550Hz
6fCLK – fIN
Figure 5b. Same as Figure 5a, but the AC Input Signal is 900mV, 10kHz
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Aliasing The LTC1051/LTC1053 are equipped with internal circuitry to minimize aliasing. Aliasing, no matter how small, occurs when the input signal approaches and exceeds the internal sampling rate. Aliasing is caused by the sampled data nature of the chopper op amps. A generalized study of this phenomenon is beyond the scope of a data sheet; however, a set of rules of thumb can answer many questions: 1. Alias signals can be generally defined as output AC signals at a frequency of nfCLK ± mfIN. The nfCLK term is the internal sampling frequency of the chopper stabilized op amps and its harmonics; mfIN is the frequency of the input signal and its harmonics, if any.
STATUS: PAUSED RMS: 25 R2 10k 5V 80dB R1 1k fIN 0.8VP-P STOP: 5 100Hz – 5V 2fCLK – fIN 0.1µF 2
W
UU
–
1/2 LTC1051 1 VOUT 50pF
3
+
0.1µF
1051/53 F05a
74dB
BW: 95.485Hz Y: – 63.91dBV
SPAN: 10 000Hz
fIN = 10kHz
LTC1051/LTC1053
APPLICATIO S I FOR ATIO
2. If we arbitrarily accept that “aliasing” occurs when output alias signals reach an amplitude of 0.01% or more of the output signal, then: the approximate minimum frequency of an AC input signal which will cause aliasing is equal to the internal clock frequency multiplied by the square root of the op amp feedback factor. For instance, with closed-loop gain of –10, the feedback factor is 1/11 and if fCLK = 2.6kHz, alias signals can be detected when the frequency of the input signal exceeds 750Hz to 800Hz (Figure 5a). 3. The number of alias signals increases when the input signal frequency increases (Figure 5b).
13dBV B: MAG RANGE: 9dBV
15dB /DIV
–107
CENTER: 2 625Hz X: 2535Hz
BW: 19.097Hz Y: – 74.16dBV fIN = 2.685kHz
NOTE: THE fCLK – fIN = 85Hz ALIAS FREQUENCY IS 95dB 2fCLK – fIN DOWN FROM THE OUTPUT LEVEL
fCLK
Figure 6a. Output Voltage Spectrum of 1/2 LTC1051 Operating as a Unity-Gain Inverting Amplifier. VS = ± 5V, RL = 10k, CL = 50pF, VIN = 8VP-P, 2.685kHz
B: MAG RANGE: 9dBV 13dBV STATUS: PAUSED RMS: 50
15dB 80dB 15dB /DIV
–107
CENTER: 10 000Hz X: 10000Hz
5fCLK – fIN fIN – 2fCLK
2 • fCLK 6fCLK – fIN
NOTE: ALL ALIAS FREQUENCY 80dB TO 84dB DOWN FROM OUTPUT
Figure 6b. Output Voltage Spectrum of 1/2 LTC1051 Operating as a Unity-Gain Inverting Amplifier. VS = ±5V, RL = 10k, CL = 50pF, VIN = 8VP-P, 10kHz
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4. When the frequency, fIN, of the input signal is less than fCLOCK, the alias signal(s) amplitude(s) directly scale with the amplitude of the incoming signal. The output “signal to alias ratio” cannot be increased by just boosting the input signal amplitude. However, when the input AC signal frequency well exceeds the clock frequency, the amplitude of the alias signals does not directly scale with the input amplitude. The “signal to alias ratio” increases when the output swings closely to the rails. (See Figure 5b and Figure 7.) It is important to note that the LTC1051/ LTC1053 op amps, under light loads (RL ≥ 10k), swing closely to the supply rails without generating harmonic distortion (Figure 8).
STATUS: PAUSED RMS: 25 10k 5V 83.5dB 0.1µF 10k
W
UU
–
1/2 LTC1051
+
SPAN: 2 000Hz VIN = 10kHz 8VP-P 0.1µF – 5V
50pF
1051/53 F05a
BW: 95.485Hz Y: 7.98dBV
SPAN: 10 000Hz 1kHz
fIN – fCLK
fIN = 10kHz
9
LTC1051/LTC1053
APPLICATIO S I FOR ATIO
5. For unity-gain inverting configuration, all the alias frequencies are 80dB to 84dB down from the output signal (Figures 6a, 6b). Combined with excellent THD under wide swing, the LTC1051/LTC1053 op amps make efficient unity gain inverters. For gain higher than –1, the “signal to alias” ratio decreases at an approximate rate of –6dB per decade of closed-loop gain (Figure 9). 6. For closed-loop gains of –10 or higher, the “signal to alias” ratio degrades when the value of the feedback gain setting resistor increases beyond 50k. For instance, the
SYSTEM BUSY, ONLY ABORT COMMANDS ALLOWED RANGE: 11dBV 20dBV
15dB /DIV
–100
CENTER: 10 000Hz X: 5475Hz
BW: 95.485Hz Y: –58.05dBV
6fCLK – fIN
fIN =10kHz
Figure 7. Output Voltage Spectrum of 1/2 LTC1051 Operating as an Inverting Amplifier with a Gain of –100 and Amplifiying a 90mVP-P, 10kHz Input Signal. With a 9VP-P Output Swing the Measured 2nd Harmonic (20kHz) was 75 Down from the 10kHz Input Signal
10 9 8 VOUT ± SWING (±V) 7 6 5 4 3 2 1 0 0 NEGATIVE SWING POSITIVE SWING 1k 2k 3k 4k 5k 6k 7k 8k 9k 10k RL (LOAD RESISTANCE,Ω)
1051/53 G08
OUTPUT SIGNAL TO ALIAS SIGNAL(S) RATIO (dB)
VS = ± 8V, TA ≤ 85°C
VS = ±5V, TA ≤ 85°C
VS = ±2.5V, TA ≤ 85°C
Figure 8. Output Voltage Swing vs Load
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68dB value of Figure 7 decreases to 56dB if a (1k, 100k) resistor set is used to set the gain of –100. 7. When the LTC1051/LTC1053 are used as noninverting amplifiers, all the previous approximate rules of thumb apply with the following exceptions: when the closed-loop gain is 10(V/V) and below, the “signal to alias” ratio is 1dB to 3dB less than the inverting case; when the closed-loop gain is 100(V/V), the degradation can be up to 9dB, especially when the input signal is much higher than the clock frequency (i.e. fIN = 10kHz). 8. The signal/alias ratio performance improves when the op amp has bandlimited loop gain.
STATUS: PAUSED R2 10k 5V 68dB R1 100Ω 90mVP-P
10kHz
W
UU
0.1µF
–
1/2 LTC1051 VOUT 50pF
+
0.1µF – 5V
SPAN: 10 000Hz
1051/53 F07
90 80 70 60 50 40 30 20 10 1
VS = ± 5V fIN ≤10kHz
10 INVERTING CLOSED-LOOP GAIN
100
1051/53 G09
Figure 9. Signal to Alias Ratio vs Closed-Loop Gain
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LTC1051/LTC1053
TYPICAL APPLICATIO S
Obtaining Ultralow VOS Drift and Low Noise
B
+
5 2
+ –
–
3
1/2 LTC1051 5V
1
R4
6
1/2 LTC1051 C1 C2
+
R1 1
R5 R2 R3
3
+
A1
8
6
OUT
–
A
2
–
A1 LT1007 LT1012*
R1 3k 750Ω
R2 2k 57Ω
R3 340k 250k
* Interchange connections A and B . ** Noise measured in a 10 sec window. Peak-to-peak noise was also measured for 10 continuous minutes: With the LT1007 op amp the recorded noise was less than 0.2µVP-P for both DC-1Hz and DC-10Hz.
VS = ±5V
0.2µV/DIV
U
7
OUT
The dual chopper op amp buffers the inputs of A1 and corrects its offset voltage and offset voltage drift. With the R, C values shown, the power-up warm up time is typically 20 seconds. The step response of the composite amplifier does not present settling tails. The LT1007 should be used when extremely low noise; VOS and VOS drift are sought when the input source resistance is low—for instance a 350Ω strain gauge bridge. The LT1012 or equivalent should be used when low bias current (100pA) is also required in conjunction with DC to 10Hz low noise and low VOS and VOS drift. The measured typical input offset voltages were less than 2µV.
1051/53 AC01a
R4 10k 10k
R5 100k 100k
C1 0.01µF 0.01µF
C2 0.001µF 0.001µF
eOUT(DC – 1Hz)** 0.1µVP-P 0.3µVP-P
eOUT(DC – 10Hz)** 0.15µVP-P 0.4µVP-P
LTC1051/LT1007 Peak-to-Peak Noise
DC TO 1Hz NOISE
DC TO 10Hz NOISE
1 SEC/DIV
1051/53 AC01b
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LTC1051/LTC1053
TYPICAL APPLICATIO S
Paralleling Choppers to Improve Noise
R2 NOTE: THIS CIRCUIT CAN ALSO BE USED AS A DIFFERENCE AMPLIFIER FOR STRAIN GAUGES. CONNECT R2/3 AND R1/3 FROM NONINVERTING INPUTS, SHORTED TOGETHER, TO GROUND AND TO SOURCE RESPECTIVELY. 1 R R
R1 VIN
2
–
1/4 LTC1053
3
+
R2
R1
6
–
1/4 LTC1053 7
R 12
5
+
R2
R1
9
–
1/4 LTC1053 8
R VOUT/ VIN = 3(R2/R1); INPUT DC – 10Hz NOISE ≅ 0.8µVP-P = NOISE OF EACH PARALLELED OP AMP/√3
1051/53 AC02
10
+
5V 2 K LT1025A 7 TYPE K – + 0.1µF
GND 4
R– 5 1k
12
U
– –
Differential Voltage to Current Converter
0.1µF V1 3
+
1/4 LTC1053 1 20k 5V 10k 10k 10k 0.1µF 10k 5 20k 9
2
–
5V
RG
0.1µF 13
– +
4 1/4 LTC1053 11 0.1µF 10k 8
– +
4 1/4 LTC1053 11 0.1µF 14
–
1/4 LTC1053 7
13
VOUT
–
1/4 LTC1053 14
20k
10
10k
6
+
V2
12
+
• IOUT = 2(V2 – V1)/RG • BW = 100Hz • IOUTMAX = 1mA 10k 10k
–5V
–5V
0.1µF
IOUT
RLOAD
1051/53 AC03
Multiplexed Differential Thermometer
100Ω 255k
1k 0.068µF 2
–
1/4 LTC1053
1
T2
TYPE K + 0.1µF 100Ω
3
ABSOLUTE TEMPERATURE ABSOLUTE TEMPERATURE
+
255k
10k
1k 0.068µF 6 5V 10k 1/4 LTC1053 7 T1 S1 10k 13
– +
– +
4 1/4 LTC1053 14 OUTPUT (DIFFERENTIAL TEMPERATURE)
5
12 10k
11
100Ω
255k
0.068µF 9
–
1/4 LTC1053 8
TREF ALL FIXED RESISTORS ARE 1% METAL FILM OUTPUT = TREF – T1 OR TREF – T2(10mV PER °C) ACCURACY = (±0.1% FROM 25°C TO 150°C)
TYPE K + 0.1µF
10
+
1051/53 AC04
10513fa
LTC1051/LTC1053
TYPICAL APPLICATIO S
Dual Instrumentation Amplifier
+
LTC1043 7 8 1µF 11
5V 0.0022µF Q1 Q1 22pF 0.1µF 3k 0.1% 2 7 8 1/2 LTC1051 4 0.1µF –5V 2.5M 0.1% 2.5V 5V
Six Decade Log Amplifier
INPUT 1
VIN
–
1/2 LTC1051 1
2M
1N4148
1nA < IIN 100dB VOS ≅ 3µV INPUT REFERRED NOISE ≅ 2µVP-P
1051/53 AC06
4 6 5 1µF 6 1µF 3 8.06k* 15 1/2 LTC1043 16 17 18 1k
+
1/2 LTC1051
0V TO 4V = 0°C TO 400°C ±0.05°C 7
2
–
1k GAIN ADJUST 5k
1051/53 AC07
10513fa
13
LTC1051/LTC1053
PACKAGE DESCRIPTIO
.300 BSC (7.62 BSC)
CORNER LEADS OPTION (4 PLCS)
.008 – .018 (0.203 – 0.457)
0° – 15°
.045 – .068 (1.143 – 1.650) FULL LEAD OPTION
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS
.300 – .325 (7.620 – 8.255)
.008 – .015 (0.203 – 0.381) +.035 .325 –.015 +0.889 8.255 –0.381
.065 (1.651) TYP .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076)
N8 1002
(
)
INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
NOTE: 1. DIMENSIONS ARE
.770* (19.558) MAX 14 13 12 11 10 9 8
.255 ± .015* (6.477 ± 0.381)
1
2
3
4
5
6
14
U
J Package 8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
.200 (5.080) MAX .015 – .060 (0.381 – 1.524) .005 (0.127) MIN .405 (10.287) MAX 8 7 6 5 .023 – .045 (0.584 – 1.143) HALF LEAD OPTION .025 (0.635) RAD TYP 1 .045 – .065 (1.143 – 1.651) .014 – .026 (0.360 – 0.660) .100 (2.54) BSC .125 3.175 MIN
J8 0801
.220 – .310 (5.588 – 7.874)
2
3
4
OBSOLETE PACKAGE
N Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.045 – .065 (1.143 – 1.651) .130 ± .005 (3.302 ± 0.127) .400* (10.160) MAX 8 7 6 5
.255 ± .015* (6.477 ± 0.381)
.100 (2.54) BSC
1
2
3
4
N Package 14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.300 – .325 (7.620 – 8.255) .130 ± .005 (3.302 ± 0.127) .020 (0.508) MIN .045 – .065 (1.143 – 1.651)
.008 – .015 (0.203 – 0.381) +.035 .325 –.015 7
.065 (1.651) TYP .120 (3.048) MIN .005 (0.125) .100 MIN (2.54) BSC .018 ± .003 (0.457 ± 0.076)
INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
NOTE: 1. DIMENSIONS ARE
(
8.255
+0.889 –0.381
)
N14 1002
10513fa
LTC1051/LTC1053
PACKAGE DESCRIPTIO U
SW Package 16-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
.030 ±.005 TYP
N
.050 BSC .045 ±.005
.398 – .413 (10.109 – 10.490) NOTE 4 16 15 14 13 12 11 10 9
N
.420 MIN .325 ±.005
NOTE 3
.394 – .419 (10.007 – 10.643)
NOTE: 1. DIMENSIONS IN
1
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.005 (0.127) RAD MIN
.291 – .299 (7.391 – 7.595) NOTE 4 .010 – .029 × 45° (0.254 – 0.737)
0° – 8° TYP
1
2
3
4
5
6
7
8
.093 – .104 (2.362 – 2.642)
.037 – .045 (0.940 – 1.143)
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.009 – .013 (0.229 – 0.330)
NOTE 3 .016 – .050 (0.406 – 1.270)
.050 (1.270) BSC
.004 – .012 (0.102 – 0.305)
S16 (WIDE) 0502
.014 – .019 (0.356 – 0.482) TYP
SW Package 18-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
.030 ±.005 TYP N 18 17 16 .050 BSC .045 ±.005 .447 – .463 (11.354 – 11.760) NOTE 4 15 14 13 12 11 10
N .420 MIN .325 ±.005
NOTE 3
.394 – .419 (10.007 – 10.643) NOTE: 1. DIMENSIONS IN
1
2
3
N/2 N/2
RECOMMENDED SOLDER PAD LAYOUT .291 – .299 (7.391 – 7.595) NOTE 4 .010 – .029 × 45° (0.254 – 0.737)
0° – 8° TYP
1 .093 – .104 (2.362 – 2.642)
2
3
4
5
6
7
8
9 .037 – .045 (0.940 – 1.143)
.005 (0.127) RAD MIN
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.009 – .013 (0.229 – 0.330)
NOTE 3 .016 – .050 (0.406 – 1.270)
.050 (1.270) BSC
.004 – .012 (0.102 – 0.305)
S18 (WIDE) 0502
.014 – .019 (0.356 – 0.482) TYP
10513fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC1051/LTC1053
TYPICAL APPLICATIO S
DC Accurate, 3rd Order, 100Hz, Butterworth Antialiasing Filter
C1 0.1µF
THD + NOISE (%)
R1 16.5k VIN C 0.1µF
R2 118k
R3 21k C2 0.1µF
2
+
1/2 LTC1051 1 VOUT
3
–
–8V WIDEBAND NOISE 9µVRMS THD + NOISE ≅ 0.0012%, 1VRMS < VIN < 2VRMS, VS = ±8V VOS(OUT) < 5µV
DC Accurate, 18-Bit, 4th Order Antialiasing Bessel (Linear Phase), 100Hz, Lowpass Filter
R2A 10k R1A 10k VIN R3A 26.7k C1A 0.022µF R2B 50k C1B 0.0022µF 0.1
THD + NOISE (%)
–
CA 0.22µF 1/2 LTC1051
R1B 50k
+
CB 0.022µF
WIDEBAND RMS NOISE 4.5µVRMS THD + NOISE ≅ 0.0005% (= 106dB DYNAMIC RANGE), 2VRMS ≤ VIN ≤ 3VRMS VOS OUT < 10µV
RELATED PARTS
PART NUMBER LTC1047 LTC1049 LTC1050 LTC2050/LTC2051/LTC2052 LTC2053 DESCRIPTION Dual µPower Zero-Drift 0p Amp Low Power Zero-Drift 0p Amp Precision Zero-Drift Op Amp with Internal Capacitors Single/Dual/Quad Zero-Drift 0p Amps Zero-Drift Instrumentation Amp COMMENTS IS = 80µA/0p Amp, 16-Lead SW Package IS = 200µA, SO-8 Package VOS (Max) = 5µV, VSUPPLY (Max) = 16.5V SOT-23/MS8/GN16 Packages Resistor Programmable Gain, R-R
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
U
Dynamic Range
0.1 60dB
8V
0.1µF
0.01
VS = ± 5V
80dB
0.001
VS = ± 8V 100dB
0.1µF
0.0001 0.1
1051/53 AC08
1.0 VIN (VRMS), fIN = 30Hz
120dB 5.0
1051/53 AC09
Dynamic Range
60dB
0.01
VS = ± 5V
80dB
R3B 412k
–
1/2 LTC1051 VOUT
0.001
VS = ± 8V
100dB
+
0.0001 0.1
1051/53 AC10
1.0 VIN (VRMS), fIN = 30Hz
120dB 5.0
1051/53 AC11
10513fa LW/TP 1202 1K REV A • PRINTED IN USA
www.linear.com
LINEAR TECHNOLOGY CORPORATION 1990