LTC1060AMJ

LTC1060 Universal Dual Filter Building Block FEATURES ■ ■ ■ ■ ■ ■ DESCRIPTIO ■ ■ ■ ■ Guaranteed Filter Specification for ±2.37V and ±5V Supply Operates Up to 30kHz Low Power and 88dB Dynamic Range at ± 2.5V Supply Center Frequency Q Product Up to 1.6MHz Guaranteed Offset Voltages Guaranteed Clock-to-Center Frequency Accuracy Over Temperature: 0.3% for LTC1060A 0.8% for LTC1060 Guaranteed Q Accuracy Over Temperature Low Temperature Coefficient of Q and Center Frequency Low Crosstalk, 70dB Clock Inputs TTL and CMOS Compatible The LTC®1060 consists of two high performance, switched capacitor filters. Each filter, together with 2 to 5 resistors, can produce various 2nd order filter functions such as lowpass, bandpass, highpass notch and allpass. The center frequency of these functions can be tuned by an external clock or by an external clock and resistor ratio. Up to 4th order full biquadratic functions can be achieved by cascading the two filter blocks. Any of the classical filter configurations (like Butterworth, Chebyshev, Bessel, Cauer) can be formed. The LTC1060 operates with either a single or dual supply from ± 2.37V to ± 8V. When used with low supply (i.e. single 5V supply), the filter typically consumes 12mW and can operate with center frequencies up to 10kHz. With ±5V supply, the frequency range extends to 30kHz and very high Q values can also be obtained. The LTC1060 is manufactured by using Linear Technology’s enhanced LTCMOS™ silicon gate process. Because of this, low offsets, high dynamic range, high center frequency Q product and excellent temperature stability are obtained. The LTC1060 is pinout compatible with MF10. , LTC and LT are registered trademarks of Linear Technology Corporation. LTCMOS trademark of Linear Technology Corporation. APPLICATIO S ■ ■ ■ ■ Single 5V Supply Medium Frequency Filters Very High Q and High Dynamic Range Bandpass, Notch Filters Tracking Filters Telecom Filters TYPICAL APPLICATIO 3.16k 1 100k VIN 1mV(RMS) 3.16k 2k 2 3 4 5 6 5V 7 8 9 10 CLOCK IN 17.5kHz Single 5V, Gain of 1000 4th Order Bandpass Filter 70 20 19 18 17 16 LTC1060 15 14 13 12 11 1k 1k 100k 2k 5V 0.1µF GAIN (dB) OUTPUT Amplitude Response 60 50 40 30 20 10 0 –10 0 100 125 150 175 200 225 250 275 INPUT FREQUENCY (Hz) LTC1060 • TA02 LTC1060 • TA01 U 1060fb U U 1 LTC1060 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW LPA BPA N/AP/HPA INVA S1A SA/B VA + Supply Voltage ........................................................ 18V Power Dissipation .............................................. 500mW Operating Temperature Range LTC1060AC/LTC1060C ................ – 40°C ≤ TA ≤ 85°C LTC1060AM/LTC1060M ............ – 55°C ≤ TA ≤ 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C 1 2 3 4 5 6 7 8 9 20 LPB 19 BPB 18 N/AP/HPB 17 INVB 16 S1B 15 AGND 14 VA– 13 VD– 12 50/100/HOLD 11 CLKB ORDER PART NUMBER LTC1060ACN LTC1060CN LTC1060CSW VD+ LSh CLKA 10 N PACKAGE SW PACKAGE 20-LEAD PDIP 20-LEAD PLASTIC SO WIDE TJMAX = 100°C, θJA = 100°C/W (N) TJMAX = 150°C, θJA = 80°C/W (SW) J PACKAGE 20-LEAD CERDIP TJMAX = 150°C, θJA = 70°C/W OBSOLETE PACKAGE Consider the N20 and SW20 Package for Alternate Source LTC1060ACJ LTC1060MJ LTC1060AMJ LTC1060CJ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS PARAMETER Center Frequency Range (See Applications Information) Clock-to-Center Frequency Ratio LTC1060A LTC1060 LTC1060A LTC1060 Q Accuracy LTC1060A LTC1060 f0 Temperature Coefficient Q Temperature Coefficient DC Offset VOS1 VOS2 VOS2 VOS2 VOS2 VOS3 VOS3 DC Lowpass Gain Accuracy BP Gain Accuracy at f0 Clock Feedthrough Max Clock Frequency Power Supply Current Crosstalk The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Complete Filter) Vs = ± 5V, unless otherwise noted. CONDITIONS f0 • Q ≤ 400kHz, Mode 1, Figure 4 f0 • Q ≤ 1.6MHz, Mode 1, Figure 4 Mode 1, 50:1, fCLK = 250kHz, Q = 10 Mode 1, 50:1, fCLK = 250kHz, Q = 10 Mode 1, 100:1, fCLK = 500kHz, Q = 10 Mode 1, 100:1, fCLK = 500kHz, Q = 10 Mode 1, 50:1 or 100:1, f0 = 5kHz, Q=10 Mode 1, 50:1 or 100:1, f0 = 5kHz, Q=10 Mode 1, fCLK < 500kHz Mode 1, fCLK < 500kHz, Q = 10 fCLK = 250kHz, 50:1, SA/B = High fCLK = 500kHz, 100:1, SA/B = High fCLK = 250kHz, 50:1, SA/B = Low fCLK = 500kHz, 100:1, SA/B = Low fCLK = 250kHz, 50:1, SA/B = Low fCLK = 500kHz, 100:1, SA/B = Low Mode 1, R1 = R2 = 50k Mode 1, Q = 10, f0 = 5kHz fCLK ≤ 1MHz ● ● ● ● ● ● MIN TYP 0.1 to 20k 0.1 to 16k MAX UNITS Hz Hz 50 ± 0.3% 50 ± 0.8% 100 ± 0.3% 100 ± 0.8% ±0.5 ±0.5 –10 20 2 3 6 2 4 2 4 ±0.1 ±0.1 10 1.5 5 70 3 5 % % ppm/°c ppm/°c mV mV mV mV mV mV mV % % mV(P-P) MHz mA mA dB 1060fb ● ● ● ● ● ● ● 15 40 80 30 60 30 60 2 3 ● 8 12 2 U W U U WW W LTC1060 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Complete Filter) VS = ±2.37V. PARAMETER Center Frequency Range Clock-to-Center Frequency Ratio LTC1060A LTC1060 LTC1060A LTC1060 Q Accuracy LTC1060A LTC1060 Max Clock Frequency Power Supply Current CONDITIONS f0 • Q ≤ 100kHz Mode 1, 50:1, fCLK = 250kHz, Q = 10 Mode 1, 50:1, fCLK = 250kHz, Q = 10 Mode 1, 100:1, fCLK = 250kHz, Q = 10 Mode 1, 100:1, fCLK = 250kHz, Q = 10 Mode1, 50:1 or 100:1, f0 = 2.5kHz, Q = 10 Mode1, 50:1 or 100:1, f0 = 2.5kHz, Q = 10 ● ● MIN TYP 0.1 to 10k MAX UNITS Hz 50 ± 0.5% 50 ± 0.8% 100 ± 0.5% 100 ± 0.8% ±2 ±4 500 2.5 4 % % kHz mA The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Internal Op Amps). PARAMETER Supply Voltage Range Voltage Swings LTC1060A LTC01060 LTC01060, LTC01060A Output Short-Circuit Current Source Sink Op Amp GBW Product Op Amp Slew Rate Op Amp DC Open Loop Gain CONDITIONS MIN ± 2.37 ±4 ± 3.8 ± 3.6 ±4 ±4 ±4 25 3 VS = ± 5V VS = ± 5V RL = 10k, VS = ±5V 2 7 85 TYP MAX ±8 UNITS V V V V mA mA MHz V/µs dB VS = ± 5V, RL = 5k (Pins 1,2,19,20) RL = 3.5k (Pins 3,18) VS = ± 5V ● Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. BLOCK DIAGRA W INVA 4 AGND 15 CLKA 10 50/100/HOLD 12 LEVEL SHIFT 9 CLKB 11 TO AGND INVB 17 VD+ VA+ 8 7 N/AP/HPA S1A 3 5 BPA 2 LPA 1 – + + ∑ – – ∫ ∫ S2A LEVEL SHIFT NON-OVERLAP CLOCK CONTROL LEVEL SHIFT NON-OVERLAP CLOCK S2B 6 SAB + – 13 14 VD– VA– 18 +– ∑ – ∫ ∫ 16 19 BPB 20 LPB LTC1060 • BD01 N/AP/HPB S1B 1060fb 3 LTC1060 TYPICAL PERFOR A CE CHARACTERISTICS Graph 1. Mode 1: (fCLK/f0) Deviation vs Q VS = ± 5V 0.4 TA = 25°C = 250kHz f 0 CLK % DEVIATION (fCLK/f0 ) 0.1 –0.4 –0.8 –1.2 –1.6 –2.0 –2.4 fCLK = 50 (TEST POINT) f0 0 – 0.1 – 0.2 – 0.3 – 0.4 – 0.5 – 0.6 DEVIATION FROM IDEAL Q (%) % DEVIATION (fCLK/f0 ) 0.1 1 IDEAL Q 10 Graph 4. Mode 1: Q Error vs Clock Frequency VS = ± 7.5V TA = 25°C fCLK = 100:1 f0 50 10 100 200 400 DEVIATION FROM IDEAL Q (%) DEVIATION FROM IDEAL Q (%) 20 10 0 0 85°C 125°C 20 fCLK = 50:1 f0 0 –20 0.2 TA = 25°C – 55°C DEVIATION FROM 100:1 (%) 100 20 10 0 50 fCLK = 50:1 f0 400 200 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 fCLK (MHz) LTC1060 • TPC04 Graph 7. Mode 1: (fCLK/f0) vs fCLK and Q 0.8 0.6 DEVIATION FROM 50:1 (%) DEVIATION FROM 100:1 (%) 0.4 0.2 0 Q = 10 –0.2 Q=5 –0.4 0 0.2 0.4 0.6 0.8 fCLK (MHz) 1.0 1.2 1.4 Q = 50 Q = 20 0.6 0.4 0.2 0 –0.2 0.2 –55°C DEVIATION FROM 50:1 (%) VS = ± 5V TA = 25°C fCLK = 50:1 f0 4 UW Q=5 Graph 2. Mode 1: (fCLK/f0) Deviation vs Q VS = ± 5V TA = 25°C fCLK = 500kHz fCLK fCLK = 100 (TEST POINT) f0 Graph 3. Mode 1: Q Error vs Clock Frequency VS = ± 5V TA = 25°C VS = ± 2.5V 50 20 10 10 Q = 5 50 20 100 20 10 0 20 10 0 Q=5 fCLK = 100:1 f0 VS = ± 2.5V VS = ± 5V Q=5 fCLK = 50:1 f0 20 10 Q = 5 50 20 10 50 100 100 LT1060 • TPC01 0.1 1 IDEAL Q 10 100 LT1060 • TPC02 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 fCLK (MHz) LTC1060 • TPC03 Graph 5. Mode 1: Measured Q vs fCLK and Temperature VS = ± 5V Q = 10 20 fCLK = 100:1 f0 Graph 6. Mode 1: (fCLK/f0) vs fCLK and Q 0.8 VS = ± 5V TA = 25°C fCLK = 100:1 f0 85°C 125°C TA = 25°C –55°C Q=5 0.6 0.4 0.2 Q = 20 Q = 50 0 Q = 10 –0.2 Q = 5 –0.4 0 0.2 0.4 0.6 0.8 fCLK (MHz) 1.0 1.2 1.4 0.4 0.6 0.8 1.0 1.2 fCLK (MHz) 1.4 1.6 1.8 LTC1060 • TPC05 LTC1060 • TPC06 Graph 8. Mode 1: (fCLK/f0) vs fCLK and Temperature 1.0 VS = ±5V Q = 10 0.8 fCLK = 100:1 f0 125°C 85°C TA = 25°C 1.0 Graph 9. Mode 1: (fCLK/f0) vs fCLK and Temperature VS = ± 5V Q = 10 125°C 0.8 fCLK = 50:1 f0 0.6 0.4 0.2 0 –0.2 0.2 –55°C 85°C TA= 25°C 0.4 0.6 0.8 1.0 1.2 fCLK (MHz) 1.4 1.6 1.8 0.4 0.6 0.8 1.0 1.2 fCLK (MHz) 1.4 1.6 1.8 LTC1060 • TPC09 LTC1060 • TPC07 LTC1060 • TPC08 1060fb LTC1060 TYPICAL PERFOR A CE CHARACTERISTICS Graph 10. Mode 1: (fCLK/f0) vs fCLK and Q 1.0 0.8 0.6 0.4 Q = 20 0.2 0 –0.2 0 Q=5 100 200 Q = 10 Q = 50 VS = ± 2.5V TA = 25°C fCLK = 100:1 f0 DEVIATION FROM 100:1 (%) DEVIATION FROM 100:1 (%) DEVIATION FROM 50:1 (%) 300 400 500 fCLK (MHz) Graph 13. Mode 1: (fCLK/f0) vs fCLK and Temperature 1.0 0.8 DEVIATION FROM 50:1 (%) 0.6 0.4 125°C 0.2 0 –0.2 0 0.2 0.4 0.6 0.8 fCLK (kHz) VS = ± 2.5V Q = 10 fCLK = 50:1 f0 1.0 1.2 TA = 25°C 85°C –55°C NOTCH DEPTH (dB) 120 100 80 60 40 20 0 fCLK DEVIATION OF f WITH RESPECT TO O Q = 10 MEASUREMENT (%) Graph 16. Mode 3: Q Error vs Clock Frequency VS = ±2.5V DEVIATION FROM IDEAL Q (%) VS = ±5V 50 20 10 DEVIATION FROM IDEAL Q (%) 20 10 0 20 10 0 10 20 Q = 5 TA = 25°C fCLK = 100:1 f0 Q=5 Q ERROR (%) 50 VS = ±2.5V VS = ±5V 10 Q = 5 20 20 50 10 Q = 5 50 fCLK = 50:1 f0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 fCLK (MHz) LTC1060 • TPC16 UW 600 Graph 11. Mode 1: (fCLK/f0) vs fCLK and Q 0.8 0.6 0.4 0.2 0 Q = 10 – 0.2 Q=5 –0.4 700 Graph 12. Mode 1: (fCLK/f0) vs fCLK and Temperature 1 VS = ± 2.5V Q = 10 fCLK = 100:1 f0 –55°C VS = ±2.5V TA = 25°C fCLK = 50:1 f0 0.8 0.6 0.4 0.2 0 85°C TA = 25°C 125°C Q = 50 Q = 20 0 100 200 300 400 500 fCLK (MHz) 600 700 0 0.2 0.4 0.6 0.8 fCLK (kHz) 1.0 1.2 LTC1060 • TPC10 LTC1060 • TPC11 LTC1060 • TPC12 Graph 14. Mode 1: Notch Depth vs Clock Frequency Q = 10 100:1 Q = 1 100:1 VS = ± 5V TA = 25°C VIN = 1VRMS Graph 15. Mode 3: Deviation of (fCLK/f0) with Respect to Q = 10 Measurement VS = ±5V TA = 25°C PIN 12 AT 100:1 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 0.1 1 IDEAL Q 10 100 LTC1060 • TPC15 fCLK = 500: 1 fO R2 1 = R4 5 (A) R2 1 = R4 2 (B) fCLK = 200: 1 fO Q = 10 50:1 0 0.2 0.4 0.6 0.8 1.0 fCLK (MHz) 1.2 1.4 1.6 LTC1060 • TPC13 LTC1060 • TPC14 Graph 17. Mode 3 (R2 = R4): Q Error vs Clock Frequency 40 Graph 18. Mode 3 (R2 = R4): Measured Q vs fCLK and Temperature VS = ± 5V 125°C Q = 10 20 fCLK = 100:1 f0 0 125°C –20 40 fCLK = 50:1 f0 20 85°C 0 –20 0.2 20 10 0 20 10 0 VS = ±7.5V TA = 25°C fCLK = 100:1 f0 50 10 Q=5 85°C TA = 25°C –55°C 10 50 Q=5 fCLK = 50:1 f0 TA = 25°C –55°C 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 fCLK (MHz) LTC1060 • TPC17 0.4 0.6 0.8 1.0 1.2 fCLK (MHz) 1.4 1.6 1.8 LTC1060 • TPC18 1060fb 5 LTC1060 TYPICAL PERFOR A CE CHARACTERISTICS Graph 19. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Q 0.8 0.6 0.4 0.2 0 –0.2 –0.4 Q = 20, Q = 40, Q = 50 VS = ± 5V TA = 25°C fCLK = 100:1 f0 DEVIATION FROM 100:1 (%) DEVIATION FROM100:1 (%) DEVIATION FROM 50:1 (%) Q = 10 Q=5 0 0.2 0.4 0.6 0.8 fCLK (MHz) 1.0 1.2 1.4 Graph 22. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Temperature 1.0 VS = ±5V Q = 10 fCLK 0.8 = 100:1 f0 0.6 0.4 0.2 0 125°C 85°C TA = 25°C –55°C 0.8 0.6 DEVIATION FROM 100:1 (%) DEVIATION FROM 50:1 (%) DEVIATION FROM 50:1 (%) 0.2 0.4 0.6 1.2 0.8 1 fCLK (MHz) Graph 25. Mode 1c (R5 = 0), Mode 2 (R2 = R4) Q Error vs Clock Frequency VS = ± 5V TA = 25°C fCLK 70.7 = 1 f0 DEVIATION FROM IDEAL Q (%) 20 10 0 20 10 0 0 SUPPLY CURRENT (mA) fCLK 35.37 1 f0 0.2 0.4 6 UW 1.4 1.6 MODE 2 R2 = R4 0.6 0.8 fCLK (MHz) Graph 20. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Q 0.8 0.6 0.4 Q = 50 0.2 Q = 10 0 –0.2 Q = 5 –0.4 0 0.2 0.4 0.6 0.8 fCLK (MHz) 1.0 1.2 1.4 VS = ± 5V TA = 25°C fCLK = 50:1 f0 Q = 20 1.0 Graph 21. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Temperature VS = ± 5V Q = 10 0.8 fCLK = 100:1 f0 0.6 0.4 TA = 25°C 0.2 0 –0.2 0.2 85°C 125°C –55°C 0.4 0.6 0.8 1.0 1.2 fCLK (MHz) 1.4 1.6 1.8 LTC1060 • TPC19 LTC1060 • TPC20 LTC1060 • TPC21 Graph 23. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Temperature VS = ± 2.5V Q = 10 fCLK = 100:1 f0 85°C 125°C 1.0 –55°C TA = 25°C 0.8 Graph 24. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Temperature – 55°C 85°C 0.6 125°C 0.4 0.2 0 VS = ± 2.5V Q = 10 fCLK = 100:1 f0 0 0.2 0.4 0.6 0.8 fCLK (MHz) 1.0 LTC1060 • TPC24 0.4 0.2 0 –0.2 –0.4 TA = 25°C 1.8 0 0.2 0.4 0.6 0.8 fCLK (MHz) 1.0 1.2 LTC1060 • TPC22 LTC1060 • TPC23 Graph 26.Supply Current vs Supply Voltage 20 Q = 10 18 16 14 12 10 8 6 4 2 fCLK ≤ 1MHz Q = 20 MODE 2 R2 = R4 20 TA = –55°C Q = 10 Q = 20 20 TA = 25°C TA = 125°C 1.0 1.2 1.4 0 ± 1 ± 2 ± 3 ± 4 ± 5 ± 6 ± 7 ± 8 ± 9 ± 10 ± 11 SUPPLY VOLTAGE (± V) LTC1060 • TPC26 LTC1060 • TPC25 1060fb LTC1060 PIN DESCRIPTION AND APPLICATIONS INFORMATIO Power Supplies The V +A and V +D (pins 7 and 8) and the V –A and V –D (Pins 14 and 13) are, respectively, the analog and digital positive and negative supply pins. For most cases, Pins 7 and 8 should be tied together and bypassed by a 0.1µF disc ceramic capacitor. The same holds for Pins 13 and 14. If the LTC1060 operates in a high digital noise environment, the supply pins can be bypassed separately. Pins 7 and 8 are internally connected through the IC substrate and should be biased from the same DC source. Pins 13 and 14 should also be biased from the same DC source. The LTC1060 is designed to operate with ± 2.5V supply (or single 5V) and with ± 5V to ± 8V supplies. The minimum supply, where the filter operates reliably, is ± 2.37V. With low supply operation, the maximum input clock frequency is about 500kHz. Beyond this, the device exhibits excessive Q enhancement and center frequency errors. Clock Input Pins and Level Shift The level shift (LSh) Pin 9 is used to accommodate T2L or CMOS clock levels. With dual supplies equal or higher to ± 4.5V, Pin 9 should be connected to ground (same potential as the AGND pin). Under these conditions the clock levels can be T2L or CMOS. With single supply operation, the negative supply pins and the LSh pin should be tied to the system ground. The AGND, Pin 15, should be biased at 1/2 supplies, as shown in the “Single 5V Gain of 1000 4th Order Bandpass Filter” circuit. Again, under these conditions, the clock levels can be T2L or CMOS. The input clock pins (10,11) share the same level shift pin. The clock logic threshold level over temperature is typically 1.5V ± 0.1V above the LSh pin potential. The duty cycle of the input clock should be close to 50%. For clock frequencies below 1MHz, the (fCLK/f0) ratio is independent from the clock input levels and from its rise and fall times. Fast rising clock edges, however, improve the filter DC offsets. For clock frequencies above 1MHz, T2L level clocks are recommended. 50/100/Hold (Pin 12) By tying Pin 12 to (V +A and V +D), the filter operates in the 50:1 mode. With ±5V supplies, Pin 12 can be typically 1V below the positive supply without affecting the 50:1 operation of the device. By tying Pin 12 to 1/2 supplies (which should be the AGND potential), the LTC1060 operates in the 100:1 mode. The 1/2 supply bias of Pin 12 can vary around the 1/2 supply potential without affecting the 100:1 filter operation. This is shown in Table 1. When Pin 12 is shorted to the negative supply pin, the filter operation is stopped and the bandpass and lowpass outputs act as a S/H circuit holding the last sample. The hold step is 20mV and the droop rate is 150µV/second! Table 1 TOTAL POWER SUPPLY 5V 10V 15V VOLTAGE RANGE OF PIN 12 FOR 100:1 OPERATION 2.5 ± 0.5V 5V ± 1V 7.5V ± 1.5V S1A, S1B (Pins 5 and 16) These are voltage signal input pins and, if used, they should be driven with a source impedance below 5kΩ. The S1A, S1B pins can be used to alter the CLK to center frequency ratio (fCLK/f0) of the filter (see Modes 1b, 1c, 2a, 2b) or to feedforward the input signal for allpass filter configurations (see Modes 4 and 5). When these pins are not used, they should be tied to the AGND pin. SA/B (Pin 6) When SA/B is high, the S2 input of the filter’s voltage summer (see Block Diagram) is tied to the lowpass output. This frees the S1 pin to realize various modes of operation for improved applications flexibility. When the SA/B pin is connected to the negative supply, the S2 input switches to ground and internally becomes inactive. This improves the filter noise performance and typically lowers the value of the offset VOS2. AGND (Pln 15) This should be connected to the system ground for dual supply operation. When the LTC1060 operates with a single positive supply, the analog ground pin should be tied to 1/2 supply and bypassed with a 0.1µF capacitor, as shown in the application, “Single 5V, Gain of 1000 4th Order Bandpass Filter.” The positive inputs of all the 1060fb U W U U UU U 7 LTC1060 APPLICATIO S I FOR ATIO internal op amps, as well as the reference point of all the internal switches are connected to the AGND pin. Because of this, a “clean” ground is recommended. fCLK/f0 Ratio The fCLK/f0 reference of 100:1 or 50:1 is derived from the filter center frequency measured in mode 1, with a Q = 10 and VS = ±5V. The clock frequencies are, respectively, 500kHz/250kHz for the 100:1/150:1 measurement. All the curves shown in the Typical Performance Characteristics section are normalized to the above references. Graphs 1 and 2 in the Typical Performance Characteristics show the (fCLK/f0) variation versus values of ideal Q. The LTC1060 is a sampled data filter and it only approximates continuous time filters. In this data sheet, the LTC1060 is treated in the frequency domain because this approximation is good enough for most filter applications. The LTC1060 deviates from its ideal continuous filter model when the (fCLK/f0) ratio decreases and when the Q’s are low. Since low Q filters are not selective, the frequency domain approximation is well justified. In Graph 15 the LTC1060 is connected in mode 3 and its ( fCLK/f0) ratio is adjusted to 200:1 and 500:1. Under these conditions, the filter is over-sampled and the (fCLK/f0) curves are nearly independent of the Q values. In mode 3, the ( fCLK/f0) ratio typically deviates from the tested one in mode 1 by ± 0.1%. f0 x Q Product Ratio This is a figure of merit of general purpose active filter building blocks. The f0 x Q product of the LTC1060 depends on the clock frequency, the power supply voltages, the junction temperature and the mode of operation. At 25°C ambient temperature for ±5V supplies, and for clock frequencies below 1MHz, in mode 1 and its derivatives, the f0 x Q product is mainly limited by the desired f 0 a nd Q accuracy. For instance,from Graph 4 at 50:1 and for fCLK below 800kHz, a predictable ideal Q of 400 can be obtained. Under this condition, a respectable f0 x Q product of 6.4MHz is achieved. The 16kHz center frequency will be about 0.22% off from the tested value at 250kHz clock (see Graph 1). For the same clock frequency of 800kHz and for the same Q value of 400, the f0 x Q product can be further increased if the 8 U clock-to-center frequency is lowered below 50:1. In mode 1c with R6 = 0 and R6 = ∞, the (fCLK/f0) ratio is 50/√2. The f0 x Q product can now be increased to 9MHz since, with the same clock frequency and same Q value, the filter can handle a center frequency of 16kHz x √2. For clock frequencies above 1MHz, the f0 x Q product is limited by the clock frequency itself. From Graph 4 at ± 7.5V supply, 50:1 and 1.4MHz clock, a Q of 5 has about 8% error; the measured 28kHz center frequency was skewed by 0.8% with respect to the guaranteed value at 250kHz clock. Under these conditions, the f0 x Q product is only 140kHz but the filter can handle higher input signal frequencies than the 800kHz clock frequency, very high Q case described above. Mode 3, Figure 11, and the modes of operation where R4 is finite, are “slower” than the basic mode 1. This is shown in Graph 16 and 17. The resistor R4 places the input op amp inside the resonant loop. The finite GBW of this op amp creates an additional phase shift and enhances the Q value at high clock frequencies. Graph 16 was drawn with a small capacitor, CC, placed across R4 and as such, at VS = ± 5V, the (1/2πR4CC) = 2MHz. With VS = ± 2.5V the (1/ 2πR4CC) should be equal to 1.4MHz. This allows the Q curve to be slightly “flatter” over a wider range of clock frequencies. If, at ± 5V supply, the clock is below 900kHz (or 400kHz for VS = ± 2.5V), this capacitor, CC, is not needed. For Graph 25, the clock-to-center frequency ratios are altered to 70.7:1 and 35.35:1. This is done by using mode 1c with R5 = 0, Figure 7, or mode 2 with R2 = R4 = 10kΩ. The mode 1c, where the input op amp is outside the main loop, is much faster. Mode 2, however, is more versatile. At 50:1, and for TA = 25°C the mode 1c can be tuned for center frequencies up to 30kHz. Output Noise The wideband RMS noise of the LTC1060 outputs is nearly independent from the clock frequency, provided that the clock itself does not become part of the noise. The LTC1060 noise slightly decreases with ±2.5V supply. The noise at the BP and LP outputs increases for high Q’s. Table 2 shows typical values of wideband RMS noise. The numbers in parentheses are the noise measurement in mode 1 with the SA/B pin shorted to V – as shown in Figure 25. 1060fb W UU LTC1060 APPLICATIO S I FOR ATIO Table 2. Wideband RMS Noise VS ± 5V ± 5V ± 2.5V ± 2.5V ± 5V ± 5V ± 2.5V ± 2.5V ± 5V ± 5V ± 2.5V ± 2.5V ± 5V ± 5V ± 2.5V ± 2.5V fCLK f0 50:1 100:1 50:1 100:1 50:1 100:1 50:1 100.1 50:1 100:1 50:1 100.1 50:1 100:1 50:1 100:1 NOTCH/HP (µVRMS) 49 (42) 70 (55) 33 (31) 48 (40) 20 (18) 25 (21) 16 (15) 20 (17) 57 72 40 50 135 170 100 125 BP (µVRMS) 52 (43) 80 (58) 36 (32) 52 (40) 150 (125) 220 (160) 100 (80) 150 (105) 57 72 40 50 120 160 88 115 LP (µVRMS) 75 (65) 90 (88) 48 (43) 66 (55) 186 (155) 240 (180) 106 (87) 150 (119) 62 80 42 53 140 185 100 130 CONDITIONS Mode1, R1 = R2 = R3 Q=1 Short-Circuit Currents Short circuits to ground, positive or negative power supply are allowed as long as the power supplies do not exceed ±5V and the ambient temperature stays below 85˚C. Above ±5V and at elevated temperatures, continuous short circuits to the negative power supply will cause excessive currents to flow. Under these conditions, the device will get damaged if the short-circuit current is allowed to exceed 80mA. DEFINITION OF FILTER FUNCTIONS Each building block of the LTC1060, together with an external clock and a few resistors, closely approximates 2nd order filter functions. These are tabulated below in the frequency domain. 1. Bandpass function: available at the bandpass output Pins 2 (19). (Figure 1.) Q = Quality factor of the complex pole pair. It is the ratio of f0 to the –3dB bandwidth of the 2nd order bandpass function. The Q is always measured at the filter BP output. 2. Lowpass function: available at the LP output Pins 1 (20). (Figure 2.) G(s) = HOBP sωo/Q 2 + (sω /Q) + ω 2 s o o HOBP = Gain at ω = ωo f0 = ω/2π; f0 is the center frequency of the complex pole pair. At this frequency, the phase shift between input and output is –180˚. U U Mode 1, Q = 10 R1 = R3 for BP out R1 = R2 for LP out Mode 3, R1 = R2 = R3 = R4 Q=1 Mode 3, R2 = R4, Q = 10 R3 = R1 for BP out R4 = R1 for LP and HP out U W UU U U G(s) = HOLP ω2 o 2 + s(ω /Q) + ω2 s o o HOLP DC gain of the LP output. 1060fb 9 LTC1060 DEFINITION OF FILTER FUNCTIONS 3. Highpass function: available only in mode 3 at the ouput Pins 3 (18). (Figure 3.) 5. Allpass function: available at Pins 3(18) for mode 4, 4a. G(s) = HOAP [s2 – s(ωo/Q) + ω2] o s2 + s(ωo/Q) + ω2 o G(s) = HOHP s2 s2 + s(ωo/Q) + ω2 o HOHP = gain of the HP output for f→ fCLK 2 4. Notch function: available at Pins 3 (18) for several modes of operation. s2 + ω2o G(s) = (HON2) 2 s + (sωo/Q) + ω2 o fCLK HON2 = gain of the notch output for f→ 2 HON1 = gain of the notch output for f→0 fn = ωn/2π; fn is the frequency of the notch occurrence. GAIN (V/V) BANDPASS OUTPUT HOP HOLP 0.707 HOLP LOWPASS OUTPUT GAIN (V/V) HOBP 0.707 HOBP GAIN (V/V) fL f0 fH f(LOG SCALE) Q= f0 ;f = fH – fL 0 fL fH fC = f0 • fL = f0 –1 + 20 fH = f0 1 + 2Q ( ( ) (( ) (( 1 2+ 1 2Q 1 2+ 1 2Q TLC1060 • DFF01 fP = f0 HOP = HOLP • 1 Q Figure 1 ODES OF OPERATIO MODE 6a 6b 7 PIN 2 (19) LP LP LP Table 3. Modes of Operation: 1st Order Functions PIN 3 (18) HP LP AP fC fZ 10 U U U U U fCLK HOAP = gain of the allpass output for 0 < f < 2 For allpass functions, the center frequency and the Q of the numerator complex zero pair is the same as the denominator. Under these conditions, the magnitude response is a straight line. In mode 5, the center frequency fz, of the numerator complex zero pair, is different than f0. For high numerator Q’s, the magnitude response will have a notch at fz. HIGHPASS OUTPUT HOP HOHP 0.707 HOHP fP fC fC f P f(LOG SCALE) 1 1 ( 1 – 2Q ( + ( 1 – 2Q ( + 1 2 2 2 f(LOG SCALE) 1 1 ( 1 – 2Q ( + ( 1 – 2Q ( + 1 2 2 2 –1 f C = f0 • 1– 1 2 2Q 1 1– 1 2 4Q TLC1060 • DFF02 fP = f 0 • 1– 1 2 2Q 1 1 Q –1 HOP = HOHP • 1– 1 2 4Q TLC1060 • DFF03 Figure 2 Figure 3 W fCLK R2 • 100(50) R3 fCLK R2 • 100(50) R3 fCLK R2 • 100(50) R3 fCLK R2 • 100(50) R3 1060fb LTC1060 ODES OF OPERATIO MODE 1 1a 1b 1c 2 PIN 1 (20) LP LP LP LP LP Table 4. Modes of Operation: 2nd Order Functions PIN 2 (19) BP BP BP BP BP PIN 3 (18) Notch BP Notch Notch Notch fCLK 100(50) 2a 2b 3 3a 4 4a 5 LP LP LP LP LP LP LP BP BP BP BP BP BP BP R3 R2 R1 4 (17) N S1A 3 (18) 5 (16) BP (19) LP (20) VIN – + + Σ – – ∫ ∫ SA/B 6 V+ f0 = 15 1/2 LTC1060 fCLK R2 R3 R2 R3 ; fn = f0 ; HOLP = ; HOBP = – ; HON1 = – ;Q= R1 R1 R1 R2 100(50) Figure 4. Mode 1: 2nd Order Filter Providing Notch, Bandpass, Lowpass U f0 fn W fCLK 100(50) fCLK • 100(50) fCLK • 100(50) fCLK • 100(50) fCLK • 100(50) fCLK • 100(50) fCLK • 100(50) fCLK • 100(50) fCLK 100(50) R6 R5 + R6 1+ 1+ 1+ R6 R5 + R6 R2 R4 R2 R6 + R4 R5 + R6 fCLK • 100(50) fCLK • 100(50) R6 R5 + R6 1+ R6 R5 + R6 fCLK 100(50) fCLK • 100(50) fCLK • 100(50) 1+ R6 R5 + R6 Notch Notch HP Notch AP AP CZ R2 R6 + R4 R5 + R6 R2 R4 R2 R4 R6 R5 + R6 fCLK • 100(50) Rh RI fCLK • 100(50) fCLK • 100(50) R2 R4 1+ R2 R4 VIN R3 R2 BP2 S1A 3 (18) 5 (16) BP1 (19) LP (20) fCLK • 100(50) 1– R1 R4 2 1 2 1 4 (17) – + – + Σ – ∫ ∫ TLC1060 • MOO01 SA/B 6 V+ f0 = 15 1/2 LTC1060 TLC1060 • MOO02 fCLK R3 R3 ;Q= ; HOBP1 = – ; HOBP2 = 1(NON-INVERTING) HOLP = – 1 R2 R2 100(50) Figure 5. Mode 1a: 2nd Order Filter Providing Bandpass, Lowpass 1060fb 11 LTC1060 ODES OF OPERATIO R6 R3 R2 3 R1 4 (17) N S1A 5 (16) R5 VIN – + + – Σ – ∫ ∫ SA/B 6 V– f0 = fCLK 100(50) R6 R3 ; fn = f0 ; Q = R5 + R6 R2 R6 R5 + R6 15 1/2 LTC1060 f R2 –R2/R1 R3 H0N1(f ← 0) = H0N2 f ← CLK = – ; H0LP = ; H0BP = – ; R5 < 5kΩ R1 R6/(R5 + R6) R1 2 ( ) Figure 6. Mode 1b: 2nd Order Filter Providing Notch, Bandpass, Lowpass R4 R3 R2 R1 4 (17) N S1A 3 (18) 5 (16) BP (19) LP (20) VIN R1 4 (17) R3 R2 VIN – + + Σ – – ∫ SA/B 6 V+ f f0 = CLK 100(50) 1+ f R2 R3 ; fn = CLK ; Q = R4 R2 100(50) 1+ 15 1/2 LTC1060 H0BP = – R3/R1 ; H0N1(f ← 0) = f –R2/R1 ; H0N2 = f ← CLK = – R2/R1 1 + (R2 + R4) 2 Figure 8. Mode 2: 2nd Order Filter Providing Notch, Bandpass, Lowpass 12 U R6 R3 R5 W 2 BP (19) 1 LP (20) VIN R1 4 (17) R2 N S1A 3 (18) 5 (16) 2 BP (19) 1 LP (20) – + + – Σ – ∫ ∫ TLC1060 • MOO03 SA/B 6 V+ f f0 = CLK 100(50) 1+ R6 R3 ; fn = f0 ; Q = R5 + R6 R2 1+ 15 1/2 LTC1060 TLC1060 • MOO04 R6 ; R5 + R6 f R2 –R2/R1 R3 H0N1(f ← 0) = H0N2 f ← CLK = – ; H0BP = – ; H0LP = ; R5 < 5kΩ R1 1 + R6/(R5 + R6) R1 2 ( ) Figure 7. Mode 1c: 2nd Order Filter Providing Notch, Bandpass, Lowpass R4 R6 R5 2 1 N S1A 3 (18) 5 (16) 2 BP (19) 1 LP (20) – + ∫ + Σ – – ∫ ∫ TLC1060 • MOO05 SA/B 6 V+ 15 1/2 LTC1060 TLC1060 • MOO06 R2 –R2/R1 ; H0LP = R4 1 + (R2 + R4) ( ) f f0 = CLK 100(50) H0N1(f ← 0) = – 1+ R2 R1 R2 R6 ; f = fCLK + n R4 R5 + R6 100(50) 1+ R6 ; Q = R3 R2 R5 + R6 1+ f 1 + R6/(R5 + R6) ; H0N2f ← CLK = – R2/R1 1 + (R2/R4) + [R6/(R5 + R6)] 2 –R2/R1 1 + (R2/R4) + [R6/(R5 + R6)] ( ) R2 R6 + R4 R5 + R6 H0BP = – R3/R1 ; H0LP = Figure 9. Mode 2a: 2nd Order Filter Providing Notch, Bandpass, Lowpass 1060fb LTC1060 ODES OF OPERATIO R4 R6 R3 R2 R2 R1 4 (17) N S1A 3 (18) 5 (16) VIN – + + Σ – – ∫ ∫ SA/B 6 V– f f0 = CLK 100(50) H0N1(f ← 0) = – f R2 + R6 ; fn = CLK R4 R5 + R6 100(50) R2 R1 15 1/2 LTC1060 R3 R6 ;Q= R2 R5 + R6 f R6/(R5 + R6) ; H0N2 f ← CLK = – R2/R1 (R2/R4) + [R6/(R5 + R6)] 2 –R2/R1 (R2/R4) + [R6/(R5 + R6)] ( H0BP = – R3/R1 ; H0LP = Figure 10. Mode 2b: 2nd Order Filter Providing Notch, Bandpass, Lowpass R4 R3 R2 R1 4 (17) HP S1A 3 (18) 5 (16) BP (19) LP (20) VIN – + SA/B 6 V– f f0 = CLK 100(50) H0N1(f ← 0) = f R2 ; fn = CLK R4 100(50) 15 1/2 LTC1060 Rh Rg f R4 • ; H0N2 f ← CLK R1 RI 2 Figure 12. Mode 3a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass, Notch U R4 W R5 R3 N S1A 3 (18) 5 (16) BP (19) LP (20) 2 1 2 BP (19) 1 LP (20) VIN R1 4 (17) – + + Σ – ∫ ∫ – SA/B TLC1060 • MOO07 TLC1060 • MOO08 6 V– f f0 = CLK 100(50) 15 1/2 LTC1060 ) R2 + R6 R4 R5 + R6 R2 R3 ;Q= R4 R2 R2 ; H0HP = – R2/R1; H0BP = – R3/R1; H0LP = – R4/R1 R4 Figure 11. Mode 3: 2nd Order Filter Providing Highpass, Bandpass, Lowpass 2 1 + Σ – – ∫ ∫ Rg RI – EXTERNAL OP AMP NOTCH + ( Rh ; H0HP = – R2/R1; H0BP = – R3/R1, H0LP = – R4/R1 RI ) = Rg Rg R R2 R3 • ; H0N(f = f0) = Q H0LP – g H0HP ; Q = R1 R2 Rh RI Rh ( ) R2 R4 TLC1060 • MOO09 1060fb 13 LTC1060 ODES OF OPERATIO R3 R2 R1 = R2 4 (17) S1A AP2 3 (18) 5 (16) BP (19) LP (20) VIN – + + Σ – – ∫ ∫ SA/B 6 15 SA/B 6 V+ f0 = 15 1/2 LTC1060 fCLK R3 R2 R3 ;Q= ; HOAP = – ; HOLP = –2 HOBP = – 2 R2 R1 R2 100(50) Figure 13. Mode 4: 2nd Order Filter Providing Allpass, Bandpass, Lowpass R4 R3 R2 R1 VIN 4 (17) CZ S1A 3 (18) 5 (16) BP (19) LP (20) – + + Σ – – ∫ ∫ SA/B 6 V + 15 1/2 LTC1060 f f0 = CLK 100(50) Q2 = R3 R1 1– 1+ f R2 ; fz = CLK R4 100(50) 1– R1 R3 ;Q= R4 R2 f R1 R2 ; HOZ = (f ← 0) = (R4/R1) –1 ; HOZ f ← CLK = ; R4 R1 (R4/R2) + 1 2 R3 R2 1 + (R2/R1) 1+ ; HOLP = R2 R1 1 + (R2/R4) HOBP = ( ) ( Figure 15. Mode 5: 2nd Order Filter Providing Numerator Complex Zeros, Bandpass, Lowpass 14 U R4 R3 R2 R1 4 (17) HP 3 (18) S1A 5 (16) BP 2 (19) LP 1 (20) 2 1 W VIN – + + Σ – – ∫ ∫ R5 1/2 LTC1060 R – EXTERNAL OP AMP TLC1060 • MOO10 V– 2R + () f f0 = CLK 100(50) R2 R3 ;Q= R4 R2 R2 R5 R2 R3 R4 ; H0AP = ; H0HP = – ; H0BP = – ; H0LP = – R4 2R R1 R1 R1 TLC1060 • MOO11 Figure 14. Mode 4a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass, Allpass R3 2 1 R2 R1 4 (17) N S1A 3 (18) 5 (16) 2 BP (19) 1 LP (20) VIN – + + Σ – ∫ ∫ – TLC1060 • MOO12 SA/B 6 1+ R2 R4 TLC1060 • MOO13 15 1/2 LTC1060 ) V– fC = fCLK R2 ; H0LP = – R3/R1 ; H0HP = – R2/R1 100(50) R3 Figure 16. Mode 6a: 1st Order Filter Providing Highpass, Lowpass 1060fb LTC1060 ODES OF OPERATIO R3 R2 VIN LP1 S1A 3 (18) 5 (16) LP2 (19) R1=R2 4 (17) 2 4 (17) – + + Σ – ∫ ∫ SA/B 6 15 – TLC1060 • MOO15 SA/B 6 V– 15 fC = 1/2 LTC1060 TLC1060 • MOO14 fCLK R2 R3 ; HOLP1 = 1 ; HOLP2 = – R2 100(50) R3 Figure 17. Mode 6b: 1st Order Filter Providing Lowpass COMM E TS ON THE M ODES OF OPERATIO There are basically three modes of operation: mode 1, mode 2, mode 3. In the mode 1 (Figure 4), the input amplifier is outside the resonant loop. Because of this, mode 1 and its derivatives (mode 1a, 1b, 1c) are faster than modes 2 and 3. In mode 1, for instance, the Q errors are becoming noticeable above 1MHz clock frequency. Mode 1a (Figure 5), represents the most simple hook-up of the LTC1060. Mode 1a is useful when voltage gain at the bandpass output is required. The bandpass voltage gain, however, is equal to the value of Q; if this is acceptable, a second order, clock tunable, BP resonator can be achieved with only 2 resistors. The filter center frequency directly depends on the external clock frequency. For high order filters, mode 1a is not practical since it may require several clock frequencies to tune the overall filter response. Mode 1 (Figure 4), provides a clock tunable notch; the depth is shown in Graph 14. Mode 1 is a practical configuration for second order clock tunable bandpass/ notch filters. In mode 1, a bandpass output with a very high Q, together with unity gain, can be obtained without creating problems with the dynamics of the remaining notch and lowpass outputs. Modes 1b and 1c (Figures 6 and 7), are similar. They both produce a notch with a frequency which is always equal to the filter building block center frequency. The notch and the center frequency, however, can be adjusted with an external resistor ratio. The practical clock-to-center frequency ratio range is: 500 ≥ fCLK ≥ 100 or 50 ; mode 1b 1 1 1 f0 100 or 50 ≥ fCLK ≥ 100 or 50 ; mode 1c fo 1 1 √2 √2 The input impedance of the S1 pin is clock dependent, and in general R5 should not be larger than 5k. Mode 1b can be used to increase the clock-to-center frequency ratio beyond 100:1. For this mode, a practical limit for the (fCLK/f0) ratio is 500:1. Beyond this, the filter will exhibit large output offsets. Mode 1c is the fastest mode of operation: In the 50:1 mode and with (R5 = 0, R6 = ∞) the clock-to-center frequency ratio becomes (50/√2) and center frequencies beyond 20kHz can easily be achieved as shown in Graph 25. Figure 19 illustrates how to cascade the two sections of the LTC1060 connected in mode 1c to obtain a sharp fourth order, 1dB ripple, BP Chebyshev filter. Note that the center frequency to the BW ratio for this fourth order bandpass filter is 20/1. By varying the clock frequency to sweep the filter, the center frequency of the overall filter will increase proportionally and so will the BW to maintain the 20:1 ratio constant. All the modes of operation yield constant Q’s; with any filter realization the BW’s will vary when the filter is swept. This is shown in Figure 19, where the BP filter is swept from 1kHz to 20kHz center frequency. 1060fb U U R3 R2=R1 AP S1A 3 (18) 5 (16) LP (19) 1 (20) 2 W U U WW W 1 (20) VIN – + + Σ – ∫ ∫ – 1/2 LTC1060 HOLP = 2 x R3 R2 V– fP = f R2 f fCLK R2 ; fz = CLK ; GAIN AT AP OUTPUT = 1 FOR 0 ≤ f ≤ CLK 100(50) R3 100(50) R3 2 Figure 18. Mode 7: 1st Order Filter Providing Allpass, Lowpass 15 LTC1060 COMM E TS ON THE M ODES OF OPERATIO Modes 2, 2a, and 2b have a notch output which frequency, fn, can be tuned independently from the center frequency, f0. For all cases, however, fn