LTC1064-1CSW

LTC1064-1 Low Noise, 8th Order, Clock Sweepable Elliptic Lowpass Filter FEATURES ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO 8th Order Filter in a 14-Pin Package No External Components 100:1 Clock to Center Ratio 150µVRMS Total Wideband Noise 0.03% THD or Better 50kHz Maximum Corner Frequency Operates from ±2.37V to ±8V Power Supplies Passband Ripple Guaranteed Over Full Military Temperature Range The LTC®1064-1 is an 8th order, clock sweepable elliptic (Cauer) lowpass switched capacitor filter. The passband ripple is typically ±0.15dB, and the stopband attenuation at 1.5 times the cutoff frequency is 68dB or more. An external TTL or CMOS clock programs the value of the filter’s cutoff frequency. The clock to cutoff frequency ratio is 100:1. No external components are needed for cutoff frequencies up to 20kHz. For cutoff frequencies over 20kHz two low value capacitors are required to maintain passband flatness. The LTC1064-1 features low wideband noise and low harmonic distortion even for input voltages up to 3VRMS. In fact the LTC1064-1 overall performance completes with equivalent multiple op amp RC active realizations. The LTC1064-1 is available in a 14-pin DIP or 16-pin surface mounted SW package. The LTC1064-1 is pin compatible with the LTC1064-2. , LTC and LT are registered trademarks of Linear Technology Corporation. APPLICATIO S ■ ■ Antialiasing Filters Telecom PCM Filters TYPICAL APPLICATIO 1 VIN 2 3 8V 0.1µF 14 13 8th Order Clock Sweepable Lowpass Elliptic Antialiasing Filter 15 0 –15 INV C VIN R(h, I) COMP2* VOUT/VIN (dB) 12 V– AGND 4 + LTC1064-1 11 CLOCK fCLK V (TTL, ≤5MHz) 5 10 NC AGND 6 7 COMP1* INV A VOUT NC 9 8 VOUT –8V 0.1µF –30 –45 –60 –75 –90 –105 0 5 10 15 20 25 30 FREQUENCY (kHz) 35 40 1064 TA01 NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1µF CAPACITOR CLOSE TO THE PACKAGE. FOR SERVO OFFSET NULLING APPLICATIONS, PIN 1 IS THE 2ND STAGE SUMMING JUNCTION. *FOR CUTOFF FREQUENCY ABOVE 20kHz, USE COMPENSATION CAPACITORS (5pF TO 56pF) BETWEEN PIN 13 AND PIN 1 AND PIN 6 AND PIN 7. 8th ORDER CLOCK SWEEPABLE LOWPASS ELLIPTIC ANTIALIASING FILTER MAINTAINS, FOR 0.1Hz ≤ fCUTOFF ≤ 10kHz, A ±0.15dB PASSBAND RIPPLE AND 72dB STOPBAND ATTENUATION AT 1.5 × fCUTOFF. TOTAL WIDEBAND NOISE = 150µVRMS, THD = 0.03% FOR VIN = 1VRMS 10641fa U Frequency Response 1064 TA02 U U 1 LTC1064-1 ABSOLUTE AXI U RATI GS Total Supply Voltage (V + to V –) ............................ 16.5V Power Dissipation .............................................. 400mW Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C PACKAGE/ORDER I FOR ATIO TOP VIEW INV C VIN AGND V+ AGND COMP1 INV A 1 2 3 4 5 6 7 14 R(h, l) 13 COMP2 12 V – 11 fCLK 10 NC 9 8 VOUT NC ORDER PART NUMBER INV C 1 LTC1064-1CN LTC1064-1ACN N PACKAGE 14-LEAD PDIP TJMAX = 110°C, θJA = 70°C/W J PACKAGE 14-LEAD CERDIP OBSOLETE PACKAGE Consider the N14 Package for Alternate Source LTC1064-1MJ LTC1064-1CJ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS PARAMETER Passband Gain, LTC1064-1, 1A Gain TempCo Passband Edge Frequency, fC Gain at fC LTC1064-1 LTC1064-1A –3dB Frequency Passband Ripple (Note 1) LTC1064-1 LTC1064-1A Ripple TempCo Stopband Attenuation LTC1064-1 LTC1064-1A Stopband Attenuation LTC1064-1 LTC1064-1A CONDITIONS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ± 7.5V, fCLK = 1MHz, R1 = 10k, C1 = 10pF, TTL or CMOS clock input level unless otherwise specified. MIN ● Referenced to 0dB, 1Hz to 0.1fC Referenced to Passband Gain ● ● 0.1fC to 0.85fC Referenced to Passband Gain, Measured at 6.25kHz and 8.5kHz At 1.5fC Referenced to 0dB ● ● At 2fC Referenced to 0dB ● ● 2 U U W WW U W (Note 1) Operating Temperature Range LTC1064-1M (OBSOLETE) ............... – 55°C to 125°C LTC1064-1C/AC .................................. – 40°C to 85°C TOP VIEW 16 R(h, l) 15 COMP2 14 V– ORDER PART NUMBER LTC1064-1CSW VIN 2 AGND 3 V+ 4 AGND 5 NC 6 COMP1 7 INV A 8 13 NC 12 fCLK 11 NC 10 NC 9 VOUT SW PACKAGE 16-LEAD PLASTIC (WIDE) SO TJMAX = 150°C, θJA = 90°C/W TYP ± 0.1 0.0002 10 ± 1% MAX ± 0.35 UNITS dB dB/°C kHz –1.25 – 0.75 10.7 0.85 0.65 dB dB kHz ● ● ± 0.15 ± 0.1 0.0004 66 68 67 68 72 72 72 72 ± 0.32 ± 0.19 dB dB dB/°C dB dB dB dB 10641fa LTC1064-1 The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ± 7.5V, fCLK = 1MHz, R1 = 10k, C1 = 10pF, TTL or CMOS clock input level unless otherwise specified. PARAMETER Input Frequency Range Output Voltage Swing and Operating Input Voltage Range Total Harmonic Distortion Wideband Noise Output DC Offset LTC1064-1 LTC1064-1A Output DC Offset TempCo Input Impedance Output Impedance Output Short-Circuit Current Clock Feedthrough Maximum Clock Frequency Power Supply Current 50% Duty Cycle, VS = ±7.5V VS = ±2.37V VS = ±5V ● ● ELECTRICAL CHARACTERISTICS CONDITIONS VS = ±2.37V VS = ±5V VS = ±7.5V MIN 0 ● ● ● TYP MAX fCLK/2 UNITS kHz V V V ±1 ±3 ±5 0.015 0.03 150 165 50 50 –100 10 20 2 3/1 200 5 10 12 16 22 23 26 28 32 ±8 175 125 VS = ±5V, Input = 1VRMS at 1kHz VS = ±7.5V, Input = 3VRMS at 1kHz VS = ±5V, Input = GND 1Hz to 999kHz VS = ±7.5V, Input = GND 1Hz to 999kHz VS = ±7.5V, Pin 2 Grounded % % µVRMS µVRMS mV mV µV/°C kΩ Ω mA µVRMS MHz mA mA mA mA mA V VS = ±5V f OUT = 10kHz Source/Sink VS = ±7.5V, f CLK = 1MHz ● Power Supply Voltage Range Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. ● ± 2.37 Note 2: For tighter specifications please contact LTC Marketing. TYPICAL PERFOR A CE CHARACTERISTICS Gain vs Frequency 15 0 –15 GAIN (dB) –30 –45 –60 –75 –90 VS = ±5V TA = 25°C f CLK = 1MHz fC = 10kHz ± 0.1dB f –3dB = 10.7kHz 1 10 FREQUENCY (kHz) 100 1064 G01 –180 –225 –270 –315 –360 –405 –450 0 1 2 3 45678 FREQUENCY (kHz) 9 10 11 1064 G02 GROUP DELAY (µs) PHASE (DEG) –105 UW Phase vs Frequency 0 –45 –90 –135 VS = ±5V TA = 25°C f CLK = 1MHz fC = 10kHz 500 Group Delay VS = ±5V 450 TA = 25°C 400 f CLK = 1MHz fC = 10kHz 350 300 250 200 150 100 50 0 0 1 2 3 4 5 6 7 8 9 10 11 12 FREQUENCY (kHz) 1064 G03 10641fa 3 LTC1064-1 TYPICAL PERFOR A CE CHARACTERISTICS Gain vs Frequency 15 0 –15 fCLK = 2MHz, fC = 20kHz COMP1 NOT USED, COMP2 = 20pF fCLK = 3MHz, fC = 30kHz COMP1 = 24pF COMP2 = 36pF fCLK = 4MHz, fC = 40kHz COMP1 = 36pF COMP2 = 47pF VS = ± 5V TA = 25°C 1 10 FREQUENCY (kHz) 100 1064 G04 GAIN (dB) GAIN (dB) –45 –60 –75 –90 –45 –60 –75 –90 fCLK = 4MHz, fC = 40kHz COMP1 = 20pF COMP2 = 30pF fCLK = 5MHz, fC = 50kHz COMP1 = 30pF COMP2 = 47pF VS = ±7.5V TA = 25°C 1 10 FREQUENCY (kHz) 100 1064 G05 GAIN (dB) –30 –105 Typical Wideband Noise (151µVRMS) VS = ± 5V, TA = 25°C f CLK = 1MHz, f C = 10kHz Input Grounded POWER SUPPLY CURRENT (mA) PI FU CTIO S (Pin Numbers Refer to the 14-Pin Package) COMP1, INV A, COMP2, INV C (Pins 1,6,7, and 13): For filter cutoff frequencies higher than 20kHz, in order to minimize the passband ripple, compensation capacitors should be added between Pin 6 and Pin 7 (COMP1) and Pin 1 and Pin 13 (COMP2). For COMP1 (COMP2), add 1pF (1.5pF) mica capacitor for each kHz increase in cutoff frequency above 20kHz. For more detail refer to Gain vs Frequency graphs. VIN, VOUT (Pins 2, 9): The input Pin 2 is connected to an 18k resistor tied to the inverting input of an op amp. Pin 2 4 UW Gain vs Frequency 15 0 –15 –30 fCLK = 3MHz, fC = 30kHz COMP1 = 10pF COMP2 = 15pF 5 0 –5 –10 –15 –20 Gain vs Frequency 25°C GAIN PEAK = 0.4dB AT 30kHz –105 VS = ±7.5V fCLK = 5MHz 125°C GAIN PEAK = f = 50kHz 1dB AT 35kHz –30 C COMP1 = 33pF COMP2 = 56pF –35 1 10 FREQUENCY (kHz) –25 100 1064 G06 Total Harmonic Distortion (0.025%) VS = ± 7.5V, TA = 25°C f CLK = 1MHz, f C = 10kHz Input = 1kHz at 3VRMS 48 44 40 36 32 28 24 20 16 12 8 4 0 Power Supply Current vs Power Supply Voltage f CLK = 1MHz TA = – 55°C TA = 25°C TA = 125°C 02 4 6 8 10 12 14 16 18 20 22 24 TOTAL POWER SUPPLY VOLTAGE (V) 1064 G09 U U U is protected against static discharge. The device’s output, Pin 9, is the output of an op amp which can typically source/ sink 3mA/1mA. Although the internal op amps are unity gain stable, driving long coax cables is not recommended. When testing the device for noise and distortion, the output, Pin 9, should be buffered (Figure 4). The op amp power supply wire (or trace) should be connected directly to the power source. AGND (Pins 3, 5): For dual supply operation these pins should be connected to a ground plane. For single supply 10641fa LTC1064-1 PI FU CTIO S operation both pins should be tied to one half supply (Figure 2). Also Pin 8 and Pin 10, although they are not internally connected should be tied to analog ground or system ground. This improves the clock feedthrough performance. V +, V – (Pins 4, 12): The V+ and V– pins should be bypassed with a 0.1µF capacitor to an adequate analog ground. Low noise, nonswitching power supplies are recommended. To avoid latchup when the power supplies exhibit high turn-on transients, a 1N5817 Schottky diode should be added from the V + and V – pins to ground (Figure 1). INV A, R(h, I) (Pins 7, 14): A very short connection between Pin 14 and Pin 7 is recommended. This connection should be preferably done under the IC package. In a TYPICAL APPLICATIO S 1 VIN 2 3 V+ 1N5817 0.1µF INV C VIN R(h, I) COMP2* 14 13 V– 1N5817 0.1µF AGND 4 + LTC1064-1 11 fCLK V 5 6 7 AGND COMP1* INV A NC VOUT NC 10 9 8 12 V– Figure 1. Using Schottky Diodes to Protect the IC from Power Supply Spikes 1 VIN 2 3 V+ 5k 4 5 6 0.1µF 5k 7 INV C VIN R(h, I) COMP2* 14 13 AGND LTC1064-1 11 fCLK V+ AGND COMP1* INV A NC VOUT NC 10 9 8 12 V– Figure 3. Level Shifting the Input T2L Clock for Single Supply Operation, V+ >6V. U U U U (Pin Numbers Refer to the 14-Pin Package) breadboard, use a one inch, or less, shielded coaxial cable; the shield should be grounded. In a PC board, use a one inch trace or less; surround the trace by a ground plane. NC (Pins 8, 10): The “no connection” pins preferably should be grounded. fCLK (Pin 11): For ±5V supplies the logic threshold level is 1.4V. For ±8V and 0V to 5V supplies the logic threshold levels are 2.2V and 3V respectively. The logic threshold levels vary ±100mV over the full military temperature range. The recommended duty cycle of the input clock is 50% although for clock frequencies below 500kHz the clock “on” time can be as low as 200ns. The maximum clock frequency for ±5V supplies is 4MHz. For ±7V supplies and above, the maximum clock frequency is 5MHz. Do not allow the clock levels to exceed the power supplies. For clock level shifting (see Figure 3). 1 VIN 2 3 V+= 15V 0.1µF VOUT INV C VIN R(h, I) COMP2* 14 13 12 V– AGND LTC1064-1 4+ 11 fCLK V 5k V+/2 0.1µF 5k 5 6 7 AGND COMP1* INV A NC VOUT NC 10 9 8 0V TO 10V VOUT 1064 F01 1064 F02 Figure 2. Single Supply Operation. If Fast Power Up or Down Transients are Expected, Use a 1N5817 Schottky Diode Between Pin 4 and Pin 5. 1 VIN 2 3 R(h, I) 14 COMP2* 13 POWER SOURCE V+ V– INV C VIN V+ 2.2k T LEVEL 5k 1µF VOUT 2L 12 V– AGND LTC1064-1 4+ 11 fCLK V 0.1µF 5 6 AGND COMP1* NC VOUT NC 10 9 8 10k 0.1µF 10k 0.1µF – VOUT 7 INV A + 1064 F03 RECOMMENDED OP AMPS: LT1022, LT318, LT1056 1064 F04 0.1µF Figure 4. Buffering the Filter Output. The Buffer Op Amp Should Not Share the LTC1064-1 Power Lines. 10641fa 5 LTC1064-1 TYPICAL APPLICATIO S Transitional Elliptic-Bessel Dual 5th Order Lowpass Filter C 15 0 1 VIN1 2 3 V+ 0.1µF INV C VIN R(h, I) COMP2* 14 13 V– VOUT/VIN (dB) AGND LTC1064-1 4+ 11 fCLK = 200 fCLK V × f–3dB 5 10 NC AGND 6 COMP1* INV A VOUT NC 1064 TA06 12 V– 9 8 C= C 47.5k VIN2 7 OUTPUT1 WIDEBAND NOISE: 50µVRMS OUTPUT2 WIDEBAND NOISE: 110µVRMS Transient Response to a 2V Step Input VOUT2 1V/DIV 0.1ms/DIV Adding an Output Buffer-Filter to Eliminate Any Clock Feedthrough Over a 10:1 Clock Range, for fCLK = 2kHz to 20kHz 1 VIN 2 3 V+ 0.1µF 4 5 6 7 14 13 V– 0.1µF 200pF 10k VOUT 6 U Amplitude Response f –3dB = 5kHz f CLK = 1MHz 47.5k – LT1056 VOUT1 –15 VOUT2 –30 –45 –60 –75 –90 VOUT1 + 0.1µF VOUT2 5 f –3dB (µF) –105 1 10 fIN (kHz) 100 1064 TA09 Transient Response to a 2V Step Input VOUT1 1V/DIV 0.1ms/DIV INV C VIN R(h, I) COMP2* AGND LTC1064-1 11 fCLK V+ AGND COMP1* INV A NC VOUT NC 10 9 8 4.99k 12 V– 4.99k – LT1056 50Ω 0.027µF 1064 TA10 430pF + 10641fa LTC1064-1 PACKAGE DESCRIPTIO .300 BSC (7.62 BSC) .008 – .018 (0.203 – 0.457) 0° – 15° .045 – .065 (1.143 – 1.651) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .014 – .026 (0.360 – 0.660) .770* (19.558) MAX 14 13 12 11 10 9 8 .255 ± .015* (6.477 ± 0.381) 1 2 3 4 5 6 .030 ±.005 TYP N .420 MIN 1 2 RECOMMENDED SOLDER PAD LAYOUT .291 – .299 (7.391 – 7.595) NOTE 4 .010 – .029 × 45° (0.254 – 0.737) 0° – 8° TYP .005 (0.127) RAD MIN .009 – .013 (0.229 – 0.330) NOTE 3 .016 – .050 (0.406 – 1.270) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U J Package 14-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) .200 (5.080) MAX .015 – .060 (0.381 – 1.524) .005 (0.127) MIN .785 (19.939) MAX 14 13 12 11 10 9 8 .025 (0.635) RAD TYP .100 (2.54) BSC .125 (3.175) MIN J14 0801 .220 – .310 (5.588 – 7.874) 1 2 3 4 5 6 7 OBSOLETE PACKAGE N Package 14-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) .300 – .325 (7.620 – 8.255) .130 ± .005 (3.302 ± 0.127) .020 (0.508) MIN .008 – .015 (0.203 – 0.381) +.035 .325 –.015 7 .005 (0.125) .100 MIN (2.54) BSC .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .120 (3.048) MIN .018 ± .003 (0.457 ± 0.076) ( 8.255 +0.889 –0.381 ) INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) NOTE: 1. DIMENSIONS ARE N14 1002 SW Package 16-Lead Plastic Small Outline (Wide .300 Inch) (Reference LTC DWG # 05-08-1620) .050 BSC .045 ±.005 .398 – .413 (10.109 – 10.490) NOTE 4 16 15 14 13 12 11 10 9 N .325 ±.005 NOTE 3 .394 – .419 (10.007 – 10.643) 3 N/2 N/2 NOTE: 1. DIMENSIONS IN 1 .093 – .104 (2.362 – 2.642) 2 3 4 5 6 7 8 .037 – .045 (0.940 – 1.143) .050 (1.270) BSC INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .004 – .012 (0.102 – 0.305) S16 (WIDE) 0502 .014 – .019 (0.356 – 0.482) TYP 10641fa 7 LTC1064-1 TYPICAL APPLICATIO V+ 0.1µF C 47.5k VIN Amplitude Response 15 0 –15 f –3dB = 3kHz f CLK = 750kHz VOUT/VIN (dB) –30 –45 –60 –75 –90 –105 1 10 fIN (kHz) RELATED PARTS PART NUMBER LTC1069-1 LTC1069-6 LTC1569-6 LTC1569-7 DESCRIPTION 8th Order Elliptic Lowpass Single Supply, 8th Order Elliptic Lowpass DC Accurate, 10th Order, Lowpass DC Accurate, 10th Order, Lowpass COMMENTS S0-8 Package, Low Power S0-8 Package, Very Low Power Internal Precision Clock, Low Power Internal Precision Clock, S0-8 Package 8 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U Transitional Elliptic-Bessel 10th Order Lowpass Filter C 47.5k 1 2 3 INV C VIN R(h, I) COMP2* 14 13 V– – LT1056 VOUT 12 V– AGND LTC1064-1 4+ 11 fCLK = 250 fCLK V × f–3dB 5 10 NC AGND 6 7 COMP1* INV A VOUT NC 9 8 C= 1064 TA03 + 0.1µF 3 (µF) f –3dB OUTPUT WIDEBAND NOISE:110µVRMS Transient Response to a 2V Step Input 1V/DIV 0.1ms/DIV 100 1064 TA05 10641fa LW/TP 1202 1K REV A • PRINTED IN USA www.linear.com  LINEAR TECHNOLOGY CORPORATION 1989