LTC1068CG

LTC1068 Series Clock-Tunable, Quad Second Order, Filter Building Blocks FEATURES s s DESCRIPTIO s s s Four Identical 2nd Order Filter Sections in an SSOP Package 2nd Order Section Center Frequency Error: ±0.3% Typical and ±0.8% Maximum Low Noise per 2nd Order Section, Q ≤ 5: LTC1068-200 50µVRMS, LTC1068 50µVRMS LTC1068-50 75µVRMS, LTC1068-25 90µVRMS Low Power Supply Current: 4.5mA, Single 5V, LTC1068-50 Operation with ± 5V Power Supply, Single 5V Supply or Single 3.3V Supply APPLICATI s S s Lowpass or Highpass Filters: LTC1068-200, 0.5Hz to 25kHz; LTC1068, 1Hz to 50kHz; LTC1068-50, 2Hz to 50kHz; LTC1068-25, 4Hz to 200kHz Bandpass or Bandreject (Notch) Filters: LTC1068-200, 0.5Hz to 15kHz; LTC1068, 1Hz to 30kHz; LTC1068-50, 2Hz to 30kHz; LTC1068-25, 4Hz to 140kHz The LTC®1068 product family consists of four monolithic clock-tunable filter building blocks. Each product contains four matched, low noise, high accuracy 2nd order switchedcapacitor filter sections. An external clock tunes the center frequency of each 2nd order filter section. The LTC1068 products differ only in their clock-to-center frequency ratio. The clock-to-center frequency ratio is set to 200:1 (LTC1068-200), 100:1 (LTC1068), 50:1 (LTC1068-50) or 25:1 (LTC1068-25). External resistors can modify the clock-to-center frequency ratio. High performance, quad 2nd order, dual 4th order or 8th order filters can be designed with an LTC1068 family product. Designing filters with an LTC1068 product is fully supported by FilterCADTM filter design software for Windows®. The LTC1068 products are available in a 28-pin SSOP surface mount package. A customized version of an LTC1068 family product can be obtained in a 16-lead SO package with internal thin-film resistors. Please contact LTC Marketing for details. , LTC and LT are registered trademarks of Linear Technology Corporation. FilterCAD is a trademark of Linear Technology Corporation. Windows is a registered trademark of Microsoft Corporation. TYPICAL APPLICATI Dual, Matched, 4th Order Butterworth Lowpass Filters, Clock-Tunable Up to 200kHz f – 3dB = fCLK/25, 4th Order Filter Noise = 60µVRMS R12 14k R11 20k VIN1 R21 14k R31 20k 1 2 3 4 5 6 7 5V 8 0.1µF 9 10 11 R33 20k R23 14k R13 20k VIN2 12 13 14 INV B HPB/NB BPB LPB SB LTC1068-25 NC AGND V + INV C HPC/NC BPC LPC SC V– NC CLK NC SD LPD BPD HPD/ND INVD 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R14 14k 1068 TA20a R22 20k R32 10k 10 VOUT1 0 –10 GAIN (dB) 1µF – 5V – 20 – 30 – 40 – 50 – 60 fCLK = (25)(f – 3dB) NC SA LPA BPA HPA/NA INVA VOUT2 R34 10k R24 20k – 70 – 80 0.1 1 RELATIVE FREQUENCY [fIN /(f – 3dB)] 10 U Gain vs Frequency 1068 TA20b UO UO 1 LTC1068 Series ABSOLUTE AXI U RATI GS Total Supply Voltage (V + to V –) .............................. 12V Power Dissipation............................................. 500mW Input Voltage at Any Pin .... V – – 0.3V ≤ VIN ≤ V + + 0.3V Storage Temperature Range ................. – 65°C to 150°C PACKAGE/ORDER I FOR ATIO TOP VIEW INV B HPB/NB BPB LPB SB NC AGND V+ NC 1 2 3 4 5 6 7 8 9 28 INV C 27 HPC/NC 26 BPC 25 LPC 24 SC 23 V – 22 NC 21 CLK 20 NC 19 SD 18 LPD 17 BPD 16 HPD/ND 15 INV D ORDER PART NUMBER TOP VIEW SA 10 LPA 11 BPA 12 HPA/NA 13 INV A 14 LTC1068CG LTC1068CG-200 LTC1068CG-50 LTC1068CG-25 LTC1068IG LTC1068IG-200 LTC1068IG-50 LTC1068IG-25 G PACKAGE 28-LEAD PLASTIC SSOP TJMAX = 110°C, θJA = 95°C/W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS PARAMETER Operating Supply Voltage Range Voltage Swings CONDITIONS LTC1068 (Internal Op Amps) VS = ± 5V, TA = 25°V, unless otherwise noted. MIN 3.14 q q q VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ± 5V, RL = 5k VS = ± 4.75V VS = ± 5V RL = 5k VS = ± 5V VS = ± 5V VS = 5V, Voltage at AGND Output Short-Circuit Current (Source/Sink) DC Open-Loop Gain GBW Product Slew Rate Analog Ground Voltage (Note 4) 2 U U W WW U W (Note 1) Operating Temperature Range LTC1068C................................................ 0°C to 70°C LTC1068I ........................................... – 40°C to 85°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER INV B HPB/NB BPB LPB SB AGND V+ SA LPA 1 2 3 4 5 6 7 8 9 24 INV C 23 HPC/NC 22 BPC 21 LPC 20 SC 19 V – 18 CLK 17 SD 16 LPD 15 BPD 14 HPD/ND 13 INV D LTC1068CN LTC1068IN BPA 10 HPA/NA 11 INV A 12 N PACKAGE 24-LEAD PDIP TJMAX = 110°C, θJA = 65°C/W TYP 1.6 3.2 ± 4.1 17/6 20/15 85 6 10 2.5V ± 2% MAX ± 5.5 UNITS V VP-P VP-P V mA mA dB MHz V/µs V 1.2 2.6 ± 3.4 LTC1068 Series ELECTRICAL CHARACTERISTICS PARAMETER Clock-to-Center Frequency Ratio (Note 5) CONDITIONS VS = 4.75V, fCLK = 1MHz, Mode 1 (Note 3), fO = 10kHz, Q = 5, VIN = 0.5VRMS, R1 = R3 = 49.9k, R2 = 10k VS = ± 5V, fCLK = 1MHz, Mode 1, fO = 10kHz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10K Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) Q Accuracy (Note 5) fO Temperature Coefficient Q Temperature Coefficient DC Offset Voltage (Note 5) (See Table 1) VS = ± 5V, fCLK = 1MHz, VOS1 (DC Offset of Input Inverter) VS = ± 5V, fCLK = 1MHz, VOS2 (DC Offset of First Integrator) VS = ± 5V, fCLK = 1MHz, VOS3 (DC Offset of Second Integrator) Clock Feedthrough Max Clock Frequency (Note 6) Power Supply Current VS = ± 5V, fCLK = 1MHz VS = ± 5V, Q ≤ 2.0, Mode 1 VS = 3.14V, fCLK = 1MHz (Note 2) VS = 4.75V, fCLK = 1MHz (Note 3) VS = ± 5V, fCLK = 1MHz q q q q q q q LTC1068 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. MIN TYP 100 ± 0.3 MAX 100 ± 0.8 100 ± 0.9 100 ± 0.8 100 ± 0.9 ± 0.9 ± 0.9 ±3 ±3 UNITS % % % % % % % % ppm/°C ppm/°C ± 15 ± 25 ± 40 mV mV mV mVRMS MHz 8 11 15 mA mA mA 100 ± 0.3 q q q q q VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ± 5V, fCLK = 1MHz, Q = 5 VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ± 5V, fCLK = 1MHz, Q = 5 ± 0.25 ± 0.25 ±1 ±1 ±1 ±5 0 ±2 ±5 0.1 5.6 3.5 6.5 9.5 LTC1068-200 (Internal Op Amps) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER Operating Supply Voltage Range Voltage Swings VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ± 5V, RL = 5k VS = ± 4.75V VS = ± 5V RL = 5k VS = ± 5V VS = ± 5V VS = 5V, Voltage at AGND q q q CONDITIONS MIN 3.14 1.2 2.6 ± 3.4 TYP 1.6 3.2 ± 4.1 17/6 20/15 85 6 10 2.5V ± 2% MAX ± 5.5 UNITS V VP-P VP-P V mA mA dB MHz V/µs V Output Short-Circuit Current (Source/Sink) DC Open-Loop Gain GBW Product Slew Rate Analog Ground Voltage (Note 4) LTC1068-200 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER Clock-to-Center Frequency Ratio (Note 5) CONDITIONS VS = 4.75V, fCLK = 1MHz, Mode 1 (Note 3), fO = 5kHz, Q = 5, VIN = 0.5VRMS, R1 = R3 = 49.9k, R2 = 10k VS = ± 5V, fCLK = 1MHz, Mode 1, fO = 5Hz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10K q MIN TYP 200 ± 0.3 MAX 200 ± 0.8 200 ± 0.9 200 ± 0.8 200 ± 0.9 UNITS % % % % 200 ± 0.3 q 3 LTC1068 Series ELECTRICAL CHARACTERISTICS LTC1068-200 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) Q Accuracy (Note 5) fO Temperature Coefficient Q Temperature Coefficient DC Offset Voltage (Note 5) (See Table 1) VS = ± 5V, fCLK = 1MHz, VOS1 (DC Offset of Input Inverter) VS = ± 5V, fCLK = 1MHz, VOS2 (DC Offset of First Integrator) VS = ± 5V, fCLK = 1MHz, VOS3 (DC Offset of Second Integrator) Clock Feedthrough Max Clock Frequency (Note 6) Power Supply Current VS = ± 5V, fCLK = 1MHz VS = ± 5V, Q ≤ 2.0, Mode 1 VS = 3.14V, fCLK = 1MHz (Note 2) VS = 4.75V, fCLK = 1MHz (Note 3) VS = ± 5V, fCLK = 1MHz q q q q q q CONDITIONS VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ± 5V, fCLK = 1MHz, Q = 5 VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ± 5V, fCLK = 1MHz, Q = 5 q q q q MIN TYP ± 0.25 ± 0.25 ±1 ±1 ±1 ±5 0 ±2 ±5 0.1 5.6 3.5 6.5 9.5 MAX ± 0.9 ± 0.9 ±3 ±3 UNITS % % % % ppm/°C ppm/°C ± 15 ± 25 ± 40 mV mV mV mVRMS MHz 8 11 15 mA mA mA LTC1068-50 (Internal Op Amps) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER Operating Supply Voltage Range Voltage Swings VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ± 5V, RL = 5k VS = ± 3.14V VS = ± 5V RL = 5k VS = ± 5V VS = ± 5V VS = 5V, Voltage at AGND q q q CONDITIONS MIN 3.14 1.2 2.6 ± 3.4 TYP 1.8 3.6 ± 4.1 17/6 20/15 85 4 7 2.175V ± 2% MAX ± 5.5 UNITS V VP-P VP-P V mA mA dB MHz V/µs V Output Short-Circuit Current (Source/Sink) DC Open-Loop Gain GBW Product Slew Rate Analog Ground Voltage (Note 4) LTC1068-50 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER Clock-to-Center Frequency Ratio (Note 5) CONDITIONS VS = 3.14V, fCLK = 250kHz, Mode 1 (Note 2), fO = 5kHz, Q = 5, VIN = 0.34VRMS, R1 = R3 = 49.9k, R2 = 10k VS = ± 5V, fCLK = 500kHz, Mode 1, fO = 10kHz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10K Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) Q Accuracy (Note 5) VS = 3.14V, fCLK = 250kHz, Q = 5 (Note 2) VS = ± 5V, fCLK = 500kHz, Q = 5 VS = 3.14V, fCLK = 250kHz, Q = 5 (Note 2) VS = ± 5V, fCLK = 500kHz, Q = 5 q MIN TYP 50 ± 0.3 MAX 50 ± 0.8 50 ± 0.9 50 ± 0.8 50 ± 0.9 ± 0.9 ± 0.9 ±3 ±3 UNITS % % % % % % % % 50 ± 0.3 q q q q q ± 0.25 ± 0.25 ±1 ±1 4 LTC1068 Series ELECTRICAL CHARACTERISTICS LTC1068-50 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER fO Temperature Coefficient Q Temperature Coefficient DC Offset Voltage (Note 5) (See Table 1) VS = ± 5V, fCLK = 500kHz, VOS1 (DC Offset of Input Inverter) VS = ± 5V, fCLK = 500kHz, VOS2 (DC Offset of First Integrator) VS = ± 5V, fCLK = 500kHz, VOS3 (DC Offset of Second Integrator) Clock Feedthrough Max Clock Frequency (Note 6) Power Supply Current VS = ± 5V, fCLK = 500kHz VS = ± 5V, Q ≤ 1.6, Mode 1 VS = 3.14V, fCLK = 250kHz (Note 2) VS = 4.75V, fCLK = 250kHz (Note 3) VS = ± 5V, fCLK = 500kHz q q q q q q CONDITIONS MIN TYP ±1 ±5 0 –2 –5 0.16 3.4 3.0 4.3 6.0 MAX UNITS ppm/°C ppm/°C ±15 ± 25 ± 40 mV mV mV mVRMS MHz 5 8 11 mA mA mA LTC1068-25 (Internal Op Amps) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER Operating Supply Voltage Range Voltage Swings VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ± 5V, RL = 5k VS = ± 4.75V VS = ± 5V RL = 5k VS = ± 5V VS = ± 5V VS = 5V, Voltage at AGND q q q CONDITIONS MIN 3.14 1.2 2.6 ± 3.4 TYP 1.6 3.4 ± 4.1 17/6 20/15 85 6 10 2.5V ± 2% MAX ± 5.5 UNITS V VP-P VP-P V mA mA dB MHz V/µs V Output Short-Circuit Current (Source/Sink) DC Open-Loop Gain GBW Product Slew Rate Analog Ground Voltage (Note 4) LTC1068-25 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER Clock-to-Center Frequency Ratio (Note 5) CONDITIONS VS = 4.75V, fCLK = 500kHz, Mode 1 (Note 3), fO = 20kHz, Q = 5, VIN = 0.5VRMS, R1 = R3 = 49.9k, R2 = 10k VS = ± 5V, fCLK = 1MHz, Mode 1, fO = 40kHz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10K Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) Q Accuracy (Note 5) fO Temperature Coefficient Q Temperature Coefficient VS = 4.75V, fCLK = 500kHz, Q = 5 (Note 3) VS = ± 5V, fCLK = 1MHz, Q = 5 VS = 4.75V, fCLK = 500kHz, Q = 5 (Note 3) VS = ± 5V, fCLK = 1MHz, Q = 5 q MIN TYP 25 ± 0.3 MAX 25 ± 0.8 25 ± 0.9 25 ± 0.8 25 ± 0.9 ± 0.9 ± 0.9 ±3 ±3 UNITS % % % % % % % % ppm/°C ppm/°C 25 ± 0.3 q q q q q ± 0.25 ± 0.25 ±1 ±1 ±1 ±5 5 LTC1068 Series ELECTRICAL CHARACTERISTICS PARAMETER DC Offset Voltage (Note 5) (See Table 1) CONDITIONS LTC1068-25 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. MIN q q q TYP 0 –2 –5 0.25 5.6 MAX ± 15 ± 25 ± 40 UNITS mV mV mV mVRMS MHz VS = ± 5V, fCLK = 1MHz, VOS1 (DC Offset of Input Inverter) VS = ± 5V, fCLK = 1MHz, VOS2 (DC Offset of First Integrator) VS = ± 5V, fCLK = 1MHz, VOS3 (DC Offset of Second Integrator) Clock Feedthrough Max Clock Frequency (Note 6) Power Supply Current VS = ± 5V, fCLK = 1MHz VS = ± 5V, Q ≤ 1.6, Mode 1 VS = 3.14V, fCLK = 1MHz (Note 2) VS = 4.75V, fCLK = 1MHz (Note 3) VS = ± 5V, fCLK = 1MHz q q q 3.5 6.5 9.5 8 11 15 mA mA mA The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Production testing for single 3.14V supply is achieved by using the equivalent dual supplies of ±1.57V. Note 3: Production testing for single 4.75V supply is achieved by using the equivalent dual supplies of ±2.375V. Note 4: Pin 7 (AGND) is the internal analog ground of the device. For single supply applications this pin should be bypassed with a 1 µF capacitor. The biasing voltage of AGND is set with an internal resistive divider from Pin 8 to Pin 23 (see Block Diagram). Note 5: Side D is guaranteed by design. Note 6: See Typical Performance Characteristics. Table 1. Output DC Offsets One 2nd Order Section MODE 1 1b 2 3 VOSN VOS1[(1/Q) + 1 + ||HOLP||] – VOS3/Q VOS1[(1/Q) + 1 + R2/R1] – VOS3/Q [VOS1(1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)X [R4/(R2 + R4)] + VOS2[R2/(R2 + R4)] VOS2 VOSBP VOS3 VOS3 VOS3 VOS3 VOSLP VOSN – VOS2 ~(VOSN – VOS2)(1 + R5/R6) VOSN – VOS2 VOS1[1 + R4/R1 + R4/R2 + R4/R3] – VOS2(R4/R2) – VOS3(R4/R3) TYPICAL PERFORMANCE CHARACTERISTICS LTC1068 Maximum Q vs Center Frequency (Modes 1, 1b, 2) 50 45 40 35 A. VS = 3.3V, fCLK(MAX) = 1.5MHz B. VS = 5V, fCLK(MAX) = 3.4MHz C. VS = ± 5V, fCLK(MAX) = 5.6MHz (FOR MODE 2 R4 ≥ 10R2) MAXIMUM Q 35 30 25 20 15 10 A B C 70 5 A 0 0 40 30 20 50 10 CENTER FREQUENCY, fO (kHz) 60 1068 G02 TYPICAL MAXIMUM Q MAXIMUM Q 30 25 20 15 10 5 0 0 10 40 30 20 50 60 CENTER FREQUENCY, fO (kHz) 6 UW 1068 G01 LTC1068 Maximum Q vs Center Frequency (Modes 2, 3) 50 45 40 A. VS = 3.3V, fCLK(MAX) = 1MHz B. VS = 5V, fCLK(MAX) = 3MHz C. VS = ± 5V, fCLK(MAX) = 5MHz (FOR MODE 2 R4 < 10R2) 55 50 45 40 35 30 25 20 15 10 LTC1068-200 Maximum Q vs Center Frequency (Modes 1, 1b, 2) A: VS = 3.3V, fCLK(MAX) = 1.2MHz B: VS = 5V, fCLK(MAX) = 3.2MHz C: VS = ± 5V, fCLK(MAX) = 6.1MHz (FOR MODE 2, R4 ≥ 10R2) A B C B C 5 0 0 4 12 16 20 24 28 8 CENTER FREQUENCY, fO (kHz) 32 1068 G03 LTC1068 Series TYPICAL PERFORMANCE CHARACTERISTICS LTC1068-200 Maximum Q vs Center Frequency (Modes 2, 3) 55 50 45 TYPICAL MAXIMUM Q A: VS = 3.3V, fCLK(MAX) = 1.2MHz B: VS = 5V, fCLK(MAX) = 3.2MHz C: VS = ± 5V, fCLK(MAX) = 6.1MHz TYPICAL MAXIMUM Q 35 30 25 20 15 10 5 0 0 4 12 16 20 24 28 8 CENTER FREQUENCY, fO (kHz) 32 A B C 35 30 25 20 15 10 5 0 0 4 12 16 20 24 28 8 CENTER FREQUENCY, fO (kHz) 32 A B C TYPICAL MAXIMUM Q 40 (FOR MODE 2, R4 < 10R2) LTC1068-25 Maximum Q vs Center Frequency (Modes 1, 1b, 2) 55 50 45 40 35 30 25 20 15 10 5 0 0 32 64 96 128 160 192 CENTER FREQUENCY, fO (kHz) 224 A B C A: VS = 3.3V, fCLK(MAX) = 1.2MHz B: VS = 5V, fCLK(MAX) = 3.4MHz C: VS = ± 5V, fCLK(MAX) = 6.1MHz (FOR MODE 2, R4 ≥ 10R2) 55 50 45 TYPICAL MAXIMUM Q TYPICAL MAXIMUM Q 40 35 30 25 20 15 10 5 0 0 32 A A: VS = 3.3V, fCLK(MAX) = 1MHz B: VS = 5V, fCLK(MAX) = 3MHz C: VS = ± 5V, fCLK(MAX) = 5MHz (FOR MODE 2, R4 < 10R2) CENTER FREQUENCY VARIATION (% ERROR) LTC1068-200 Center Frequency Variation vs Clock Frequency CENTER FREQUENCY VARIATION (% ERROR) CENTER FREQUENCY VARIATION (% ERROR) 0.20 0.15 0.10 0.05 MODE 3 0 – 0.05 MODE 1 – 0.10 – 0.15 – 0.20 VS = ± 5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.75MHz 0.2 0.1 0 – 0.1 – 0.2 VS = ± 5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.5MHz 0.5 0.75 1.0 1.25 1.5 1.75 CLOCK FREQUENCY (MHz) 2.0 BATTERY VOLTAGE (V) – 0.25 0.75 1.25 1.75 2.25 2.75 3.25 3.75 4.25 CLOCK FREQUENCY (MHz) 1068 G10 UW LTC1068-50 Maximum Q vs Center Frequency (Modes 1, 1b, 2) 55 50 45 40 A: VS = 3.3V, fCLK(MAX) = 1.1MHz B: VS = 5V, fCLK(MAX) = 2.1MHz C: VS = ± 5V, fCLK(MAX) = 3.6MHz (FOR MODE 2, R4 ≥ 10R2) 55 50 45 40 35 30 25 20 15 10 5 0 LTC1068-50 Maximum Q vs Center Frequency (Modes 2, 3) A: VS = 3.3V, fCLK(MAX) = 1.1MHz B: VS = 5V, fCLK(MAX) = 2.1MHz C: VS = ± 5V, fCLK(MAX) = 3.6MHz (FOR MODE 2, R4 < 10R2) C B A 0 4 12 16 20 24 28 8 CENTER FREQUENCY, fO (kHz) 32 1068 G04 1068 G05 1068 G06 LTC1068-25 Maximum Q vs Center Frequency (Modes 2, 3) 1.2 1.0 0.8 0.6 0.4 LTC1068 Center Frequency Variation vs Clock Frequency VS = ± 5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.75MHz MODE 3 MODE 1 0.2 0 – 0.2 – 0.4 – 0.6 0.75 1.25 1.75 2.25 2.75 3.25 3.75 4.25 CLOCK FREQUENCY (MHz) 1068 G09 B C 192 224 64 96 128 160 FREQUENCY, fO (kHz) 1068 G07 1068 G08 LTC1068-50 Center Frequency Variation vs Clock Frequency 0.4 MODE 1 0.3 MODE 3 1.3 1.8 LTC1068-25 Center Frequency Variation vs Clock Frequency VS = ± 5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.5MHz 0.8 MODE 1 0.3 MODE 3 0 0.5 1.0 3.0 1.5 2.0 2.5 CLOCK FREQUENCY (MHz) 3.5 1068 G12 1068 G11 7 LTC1068 Series TYPICAL PERFORMANCE CHARACTERISTICS LTC1068/LTC1068-200 Noise vs Q 300 250 200 150 5V 100 3.3V 50 0 0 5 10 15 20 Q 50 0 25 30 35 40 0 5 10 15 20 Q 300 250 200 5V 150 100 3.3V ± 5V NOISE (µVRMS) NOISE (µVRMS) NOISE (µVRMS) Noise Increase vs R2/R4 Ratio (Mode 3) 2.0 RELATIVE NOISE INCREASE (REFERENCE NOISE WHEN R2/R4 = 1) 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0 0.2 0.3 0.4 0.5 0.6 0.7 R2/R4 RATIO 0.8 0.9 1.0 RELATIVE NOISE INCREASE (REFERENCE NOISE WHEN R5/R6 = 0.02) LTC1068/LTC1068-200/ LTC1068-25 Power Supply Current vs Power Supply 10.5 8 POWER SUPPLY CURRENT (mA) 9.5 25°C 8.5 POWER SUPPLY CURRENT (mA) 7.5 6.5 5.5 4.5 3 4 7 9 6 8 5 TOTAL POWER SUPPLY (V) 10 8 UW ± 5V 1068 G13 LTC1068-50 Noise vs Q LTC1068-25 Noise vs Q 300 250 200 3.3V 150 100 50 0 0 5 10 15 20 Q 5V ± 5V 25 30 35 40 25 30 35 40 1068 G14 1068 G15 Noise Increase vs R5/R6 Ratio (Mode 1b) 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0 0 0.5 1.0 1.5 2.0 2.5 R5/R6 RATIO 3.0 3.5 1068 G16 1068 G17 LTC1068-50 Power Supply Current vs Power Supply 70°C – 20°C 7 25°C 6 70°C – 20°C 5 4 3 2 3 4 7 9 6 8 5 TOTAL POWER SUPPLY (V) 10 LT1027 • TPCXX 1068 G19 LTC1068 Series PIN FUNCTIONS Power Supply Pins The V + and V – pins should each be bypassed with a 0.1µF capacitor to an adequate analog ground. The filter’s power supplies should be isolated from other digital or high voltage analog supplies. A low noise linear supply is recommended. Using a switching power supply will lower the signal-to-noise ratio of the filter. Figures 1 and 2 show typical connections for dual and single supply operation. Analog Ground Pin The filter’s performance depends on the quality of the analog signal ground. For either dual or single supply operation, an analog ground plane surrounding the package is recommended. The analog ground plane should be connected to any digital ground at a single point. For single supply operation, AGND should be bypassed to the analog ground plane with at least a 0.47µF capacitor (Figure 2). Two internal resistors bias the analog ground pin. For the LTC1068, LTC1068-200 and LTC1068-25, the voltage at the analog ground pin (AGND) for single supply is 0.5 × V+ and for the LTC1068-50 it is 0.435 × V+. ANALOG GROUND PLANE 1 2 3 4 5 6 V+ 0.1µF 7 8 9 10 11 12 13 14 LTC1068 28 27 26 25 24 23 22 21 20 19 18 17 16 15 V– 0.1µF STAR SYSTEM GROUND Figure 1. Dual Supply Ground Plane Connections U U U Clock Input Pin Any TTL or CMOS clock source with a square-wave output and 50% duty cycle (±10%) is an adequate clock source for the device. The power supply for the clock source should not be the filter’s power supply. The analog ground for the filter should be connected to clock’s ground at a single point only. Table 2 shows the clock’s low and high level threshold values for dual or single supply operation. Table 2. Clock Source High and Low Threshold Levels POWER SUPPLY Dual Supply = ± 5V Single Supply = 5V Single Supply = 3.3V HIGH LEVEL ≥ 1.53V ≥ 1.53V ≥ 1.20V LOW LEVEL ≤ 0.53V ≤ 0.53V ≤ 0.53V A pulsed generator can be used as a clock source provided the high level ON time is at least 25% of the pulse period. Sine waves are not recommended for clock input frequencies less than 100kHz, since excessively slow clock rise or fall times generate internal clock jitter (maximum clock rise or fall time ≤ 1µs). The clock signal should be routed from the right side of the IC package and perpendicular to it to avoid coupling to any input or output analog signal ANALOG GROUND PLANE DEVICE RA RB LTC1068 LTC1068-200 10k 10k LTC1068-25 LTC1068-50 11.3k 8.6k VAGND V+ 1 2 3 4 5 6 7 8 0.1µF 9 10 11 12 13 14 RA RB LTC1068 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0.47µF (1µF FOR STOPBAND FREQUENCIES ≤ 1kHz) CLOCK SOURCE 200Ω STAR SYSTEM GROUND CLOCK SOURCE 200Ω DIGITAL GROUND 1068 F01 FOR MODE 3, THE S NODE SHOULD BE TIED TO PIN 7 (AGND) DIGITAL GROUND 1068 F02 Figure 2. Single Supply Ground Plane Connections 9 LTC1068 Series PIN FUNCTIONS path. A 200Ω resistor between clock source and Pin 11 will slow down the rise and fall times of the clock to further reduce charge coupling (Figures 1 and 2). 1k Output Pins Each 2nd order section of an LTC1068 device has three outputs that typically source 17mA and sink 6mA. Driving coaxial cables or resistive loads less than 20k will degrade the total harmonic distortion performance of any filter design. When evaluating the distortion or noise performance of a particular filter design implemented with a LTC1068 device, the final output of the filter should be buffered with a wideband, noninverting high slew rate amplifier (Figure 3). Inverting Input Pins These pins are the inverting inputs of internal op amps and are susceptible to stray capacitive coupling from low impedance signal outputs and power supply lines. BLOCK DIAGRAM INV A (14) AGND (7) INV B (1) INV C (28) INV D (15) 10 W U U U – LT®1354 + 1068 F03 Figure 3. Wideband Buffer In a printed circuit layout any signal trace, clock source trace or power supply trace should be at least 0.1 inches away from any inverting input pins Summing Input Pins These are voltage input pins. If used, they should be driven with a source impedance below 5k. When they are not used, they should be tied to the analog ground pin. The summing pin connections determine the circuit topology (mode) of each 2nd order section. Please refer to Modes of Operation. HPA/NA (13) BPA (12) LPA (11) DEVICE RA RB LTC1068 LTC1068-200 10k 10k LTC1068-25 LTC1068-50 11.3k 8.6k LPB (4) *THE RATIO RA/RB VARIES ± 2% – + HPB/NB (2) + Σ – +∫ BPB (3) +∫ – + HPC/NC (27) SA (10) V + (8) + Σ – SB (5) +∫ BPC (26) +∫ LPC (25) RA* CLK (21) AGND (7) RB* V – (23) NC (6) – + + HPD/ND (16) Σ – SC (24) +∫ BPD (17) +∫ LPD (18) NC (9) NC (20) NC (22) – + + Σ – SD (19) +∫ +∫ PIN 28-LEAD SSOP PACKAGE 1068 BD LTC1068 Series MODES OF OPERATION Mode 1 In Mode 1, the ratio of the external clock frequency to the center frequency of each 2nd order section is internally fixed at the part’s nominal ratio. Figure 4 illustrates Mode 1 providing 2nd order notch, lowpass and bandpass outputs. Mode 1 can be used to make high order Butterworth lowpass filters; it can also be used to make low Q notches and for cascading 2nd order bandpass functions tuned at the same center frequency. Mode 1 is faster than Mode 3. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. CC R3 R2 N VIN R1 S BP LP Linear Technology’s universal switched-capacitor filters are designed for a fixed internal, nominal fCLK/fO ratio. The fCLK/fO ratio is 100 for the LTC1068, 200 for the LTC1068200, 50 for the LTC1068-50 and 25 for the LTC1068-25. Filter designs often require the fCLK/fO ratio of each section to be different from the nominal ratio and in most cases different from each other. Ratios other than the nominal value are possible with external resistors. Operating modes use external resistors, connected in different arrangements to realize different fCLK/fO ratios. By choosing the proper mode, the fCLK/fO ratio can be increased or decreased from the part’s nominal ratio. The choice of operating mode also effects the transfer function at the HP/N pins. The LP and BP pins always give the lowpass and bandpass transfer functions respectively, regardless of the mode utilized. The HP/N pins have a different transfer function depending on the mode used. Mode 1 yields a notch transfer function. Mode 3 yields a highpass transfer function. Mode 2 yields a highpass notch transfer function (i.e., a highpass with a stopband notch). More complex transfer functions, such as lowpass notch, allpass or complex zeros, are achieved by summing two or more of the LP, BP or HP/N outputs. This is illustrated in sections Mode 2n and Mode 3a. Choosing the proper mode(s) for a particular application is not trivial and involves much more than just adjusting the fCLK/fO ratio. Listed here are four of the nearly twenty modes available. To make the design process simpler and quicker, Linear Technology has developed the FilterCAD for Widows design software. FilterCAD is an easy-to-use, powerful and interactive filter design program. The designer can enter a few filter specifications and the program produces a full schematic. FilterCAD allows the designer to concentrate on the filter’s transfer function and not get bogged down in the details of the design. Alternatively, those who have experience with the Linear Technology family of parts can control all of the details themselves. For a complete listing of all the operating modes, consult the appendices of the FilterCAD manual or the Help files in FilterCAD. FilterCAD can be obtained free of charge on the Linear Technology web site (www.linear-tech.com) or you can order the FilterCAD CD-ROM by contacting Linear Technology Marketing. U W – + AGND fO = + Σ – ∫ ∫ RATIO DEVICE 100 LTC1068 LTC1068-200 200 50 LTC1068-50 25 LTC1068-25 1068 F04 fCLK ;f =f RATIO n O R2 R3 Q = R3 ; HON = – ;H =– R1 OBP R1 R2 HOLP = HON Figure 4. Mode 1, 2nd Order Filter Providing Notch, Bandpass and Lowpass Outputs Mode 1b Mode 1b is derived from Mode 1. In Mode 1b (Figure 5) two additional resistors R5 and R6 are added to lower the amount of voltage fed back from the lowpass output into the input of the SA (or SB) switched-capacitor summer. This allows the filter’s clock-to-center frequency ratio to be adjusted beyond the part’s nominal ratio. Mode 1b maintains the speed advantages of Mode 1 and should be considered an optimum mode for high Q designs with fCLK to fCUTOFF (or fCENTER) ratios greater than the part’s nominal ratio. The parallel combination of R5 and R6 should be kept below 5k. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. 11 LTC1068 Series MODES OF OPERATION CC CC R4 R3 R2 R6 R3 R2 N VIN R1 S R5 – + AGND + Σ – ∫ f R6 ; f = f fO = CLK RATIO (R6 + R5) n O R3 R6 ; H = – R2 ; H Q = R3 =– R1 OBP R1 R2 (R6 + R5) ON R2 R6 + R5 HOLP = – R6 R1 √ √ ( ) Figure 5. Mode 1b, 2nd Order Filter Providing Notch, Bandpass and Lowpass Outputs Mode 3 In Mode 3, the ratio of the external clock frequency to the center frequency of each 2nd order section can be adjusted above or below the parts nominal ratio. Figure 6 illustrates Mode 3, the classical state variable configuration, providing highpass, bandpass and lowpass 2nd order filter functions. Mode 3 is slower than Mode 1. Mode 3 can be used to make high order all-pole bandpass, lowpass and highpass filters. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. Mode 2 Mode 2 is a combination of Mode 1 and Mode 3, shown in Figure 7. With Mode 2, the clock-to-center frequency ratio, fCLK/fO, is always less than the part’s nominal ratio. The advantage of Mode 2 is that it provides less sensitivity to resistor tolerances than does Mode 3. Mode 2 has a highpass notch output where the notch frequency depends solely on the clock frequency and is therefore less than the center frequency, fO. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. 12 U W BP LP VIN R1 HP S BP LP – + ∫ RATIO DEVICE 100 LTC1068 LTC1068-200 200 50 LTC1068-50 25 LTC1068-25 1068 F05 + Σ – ∫ ∫ 1/4 LTC1068 1 R3 R2 R2 R3 √ R4 ; Q = 1.005 (R2) √ R4 (1 – (RATIO)(0.32)(R4)) AGND f fO = CLK RATIO R3 HOHP = – R2 ; HOBP = – R1 R1 RATIO DEVICE 100 LTC1068 LTC1068-200 200 50 LTC1068-50 25 LTC1068-25 ( 1 R3 1– (RATIO)(0.32)(R4) ) ; HOLP = – R4 R1 1068 F06 Figure 6. Mode 3, 2nd Order Section Providing Highpass, Bandpass and Lowpass Outputs CC R4 R3 R2 HPN VIN R1 S BP LP – + + Σ – ∫ ∫ RATIO DEVICE 100 LTC1068 LTC1068-200 200 50 LTC1068-50 25 LTC1068-25 1068 F07 AGND √ 1 + R4 ; f = RATIO R3 1 Q = 1.005 ( ) 1 + R2 R2 √ R4 R3 (1– (RATIO)(0.32)(R4)) fO = fCLK RATIO R2 n fCLK HOHPN = – R2 (AC GAIN, f >> fO); HOHPN = – R2 R1 R1 ( 1 1 + R2 R4 ) (DC GAIN) HOBP = – R3 R1 ( 1– 1 ; HOLP = – R2 R1 R3 (RATIO)(0.32)(R4) ) ( 1 1 + R2 R4 ) Figure 7. Mode 2, 2nd Order Filter Providing Highpass Notch, Bandpass and Lowpass Outputs LTC1068 Series APPLICATIONS INFORMATION Operating Limits The Maximum Q vs Center Frequency (fO) graphs, under Typical Performance Characteristics, define an upper limit of operating Q for each LTC1068 device 2nd order section. These graphs indicate the power supply, fO and Q value conditions under which a filter implemented with an LTC1068 device will remain stable when operated at temperatures of 70°C or less. For a 2nd order section, a bandpass gain error of 3dB or less is arbitrarily defined as a condition for stability. When the passband gain error begins to exceed 1dB, the use of capacitor CC will reduce the gain error (capacitor CC is connected from the lowpass node to the inverting node of a 2nd order section). Please refer to Figures 4 through 7. The value of CC can be best determined experimentally, and as a guide it should be about 5pF for each 1dB of gain error and not to exceed 15pF. When operating an LTC1068 device near the limits defined by the Maximum Q vs Frequency graphs, passband gain variations of 2dB or more should be expected. Clock Feedthrough Clock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter’s output pins. The clock feedthrough is tested with the filter’s input grounded and depends on PC board layout and on the value of the power supplies. With proper layout techniques, the typical values of clock feedthrough are listed under Electrical Characteristics. Any parasitic switching transients during the rising and falling edges of the incoming clock are not part of the clock feedthrough specifications. Switching transients have frequency contents much higher than the applied clock; their amplitude strongly depends on scope probing techniques as well as grounding and power supply bypassing. The clock feedthrough, can be greatly reduced by adding a simple RC lowpass network at the final filter output. This RC will completely eliminate any switching transients. Wideband Noise The wideband noise of the filter is the total RMS value of the device’s noise spectral density and is used to determine the operating signal-to-noise ratio. Most of its frequency contents lie within the filter passband and cannot be reduced with post filtering. For a notch filter the noise of the filter is centered at the notch frequency. The total wideband noise (µVRMS) is nearly independent of the value of the clock. The clock feedthrough specifications are not part of the wideband noise. For a specific filter design, the total noise depends on the Q of each section and the cascade sequence. Please refer to the Noise vs Q graphs under the Typical Performance Characteristics. Aliasing Aliasing is an inherent phenomenon of switched-capacitor filters and occurs when the frequency of the input signals that produce the strongest aliased components have a frequency, fIN, such as (fSAMPLING – fIN) that falls into the filter’s passband. For an LTC1068 device the sampling frequency is twice fCLK. If the input signal spectrum is not band-limited, aliasing may occur. Demonstration Circuit 104 DC104 is a surface mount printed circuit board for the evaluation of Linear Technology’s LTC1068 product family in a 28-lead SSOP package. The LTC1068 product family consists of four monolithic clock-tunable filter building blocks. Demo Board 104 is available in four assembled versions: Assembly 104-A features the low noise LTC1068CG (clockto-center frequency ratio = 100), assembly 104-B features the low noise LTC1068CG-200 (clock-to-center frequency ratio = 200), assembly 104-C features the high frequency LTC1068CG-25 (clock-to-center frequency ratio = 25) and assembly 104-D features the low power LTC1068CG-50 (clock-to-center frequency ratio = 50). All DC104 boards are assembled with input, output and power supply test terminals, a 28-lead SSOP filter device (LTC1068CG Series), a dual op amp in an SO-8 for input or output buffers and decoupling capacitors for the filter and op amps. The filter and dual op amps share the power U W U U 13 LTC1068 Series APPLICATIONS INFORMATION supply inputs to the board. Jumpers JPA to JPD on the board configure the filter’s second order circuit modes, jumper JP1 configures the filter for dual or single supply operation and jumpers JP2 (A-D) to JP3 (A-D) configure the op amp buffers as inverting or noninverting. Surface mount pads are available on the board for 1206 size surface mount resistors. The printed circuit layout of DC104 is arranged so that most of the resistor connections for one 8th order filter or two 4th order filters are available on the board. A resistor makes a connection between two filter nodes on the board and for most filter designs, no wiring is required. DC104 Component Side Silkscreen DC104 Component Side 14 U W U U DC104 Solder Side DC104 Schematic CO2 BOLD LINE INDICATES FGND RG2 V RB1 BUFFER 2 2 RH1 JPB R51 C3 0.1µF + V+ E9 V+ 1 FGND LPB 3 RL1 E10 SGND JP2A C6 10µF 16V C7 10µF 16V E1 CI1 RL5 1 INV B INV C HPC/NC BPC LPC SC V– NC U1 CLK NC SD LPD BPD HPD/ND INV D 15 2 JPD R64 16 R24 17 R34 18 R44 R54 19 20 21 R7 200Ω 22 C2 0.1µF 23 24 2 R62 V– JPC 25 R52 R42 26 R32 3 LPC FGND 1 27 R22 HPB/NB BPB LPB SB NC AGND V+ NC SA LPA BPA HPA/NA INV A 4 V– 5 C5 10µF R21 2 3 4 5 6 7 8 9 R63 R43 11 12 13 14 RH2 RB2 RL2 RH3 RB3 RL3 R53 R33 R23 3 FGND LPD 2 JPA 1 10 R31 R41 28 JP2D 3 JP2C 6 RB5 V– R11 RI1 4 C4 0.1µF V– APPLICATIONS INFORMATION E12 FGND V+ C1 0.1µF 3 LPD FGND 1 CO1 RG1 RH4 RB4 2 3 4 7 JP3C JP3D 6 5 JP3A 1 BUFFER 1 E3 VIN1 R12 E13 CLK R G2 SHORT OPEN SHORT OPEN SHORT RES SHORT RES JP2A U2A JP2B SHORT OPEN SHORT OPEN JP2C OPEN OPEN OPEN SHORT JP2D OPEN SHORT OPEN OPEN R G1 SHORT RES SHORT RES JP3A OPEN SHORT OPEN SHORT U2A JP3B SHORT OPEN SHORT OPEN JP3C OPEN OPEN OPEN SHORT JP3D OPEN SHORT OPEN OPEN E4 SGND BUFFERS CONFIGURATION LTC1068 Series ASSEMBLED AS NONINVERTING BUFFER DUAL SUPPLY INVERTING BUFFER DUAL SUPPLY NONINVERTING BUFFER SINGLE SUPPLY FOR NONINVERTING BUFFER SINGLE SUPPLY DEMO BOARD DC104B-A DC104B-B DC104B-C DC104B-D U1 LTC1068CG LTC1068CG-200 LTC1068CG-25 LTC1068CG-50 + RL4 JP3B 5 – 8 6 U2B 7 E7 VOUT1 E8 SGND U2 LT1211 LT1211 LT1213 LT1498 15 1068 TA03 U W E2 SGND 1 DUAL SUPPLY 2 JP1 E6 SGND SINGLE 3 SUPPLY U + VIN2 RH5 2 7 3 JP2B – U2A 1 E11 V– R61 1 8 8 2 E5 VOUT2 U LTC1068 Series APPLICATIONS INFORMATION A Surface Mount Printed Circuit Layout A very compact surface mount printed circuit layout can be designed with 0603 size surface mount resistors, capacitors and a 28-pin SSOP of the LTC1068 product family. An example of a printed circuit layout is shown in the folowing figures for an 8th order elliptic bandpass filter. The total board area of this 8th order filter is 1" by 0.8". No attempt was made to design the smallest possible printed circuit layout. 70kHz Elliptic Bandpass Filter, fCENTER = fCLK/25 (Maximum fCENTER is 80kHz, VS = ± 5V) RH1 28k RL2 23.2k RH2 11.3k 1 R21 4.99k R11 29.4k VIN R31 24.9k R41 20.5k R51 4.99k R61 11.3k 2 3 4 5 INV B HPB/NB BPB LPB SB INV C HPC/NC BPC LPC 28 27 26 25 R52 4.99k R62 56.2k –5V C2 0.1µF 1.75MHz R64 10k R54 4.99k R44 17.4k R34 63.4k R24 7.5k R22 4.99k R32 107k 5V C1 0.1µF R43 43.2k R33 59k R23 4.99k RL3 45.3K FilterCAD Custom Inputs for fC = 70kHz 2nd ORDER SECTION B C A D fO (kHz) 67.7624 67.0851 73.9324 73.3547 Q 5.7236 20.5500 15.1339 16.3491 fN (kHz) 58.3011 81.6810 81.0295 TYPE HPN LPN LPN BP MODE 2b 1bn 2b GAIN (dB) 16 U 9 10 11 12 13 14 W U U 24 U1 SC LTC1068-25 6 23 V– NC 7 22 NC AGND 8+ 21 CLK V NC SA LPA BPA HPA/NA INV A NC SD LPD BPD HPD/ND INV D RH3 15.4k 20 19 18 17 16 15 VOUT 1068 TA07a Gain vs Frequency 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 20 30 40 50 60 70 80 FREQUENCY (kHz) 90 100 2n 1068 TA07b LTC1068 Series APPLICATIONS INFORMATION Surface Mount Components (Board Area = 1" × 0.8") R11 RH1 R21 R51 R31 R41 R61 R62 C1 R43 R33 R23 R24 RH2 RL2 RL3 RH3 1068 TA08 Component Side R11 RH1 R51 R21 R31 R61 GND R41 R22 R32 R52 GND V– R43 R33 R23 RH2 RL2 RH3 VOUT 1068 TA09 1068 TA10 R44 R54 R34 RL3 R24 U W U U R22 U1 R32 R52 C2 R64 R44 R34 R54 Solder Side VIN R62 R64 V+ 17 LTC1068 Series TYPICAL APPLICATIONS LTC1068-200 8th Order Linear Phase Lowpass, fCUTOFF = fCLK/400 for Ultralow Frequency Applications RL1 23.2k 1 R21 12.4k R11 14.3k VIN R31 10k R41 15.4k 2 3 4 5 6 7 5V 8 0.1µF 9 10 R43 12.4k R33 12.4k R23 10k 11 12 13 14 RL3 23.2k INV B HPB/NB BPB LPB SB LTC1068-200 NC AGND V+ NC SA LPA BPA HPA/NA INV A INV C HPC/NC BPC LPC SC V– NC CLK NC SD LPD BPD HPD/ND INV D RB3 23.2k 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R34 10k R24 15.4k 400kHz R64 9.09k R54 5.11k VOUT GAIN (dB) FilterCAD Custom Inputs for fC = 1Hz 2nd ORDER SECTION B C A D fO (Hz) 1.7947 1.6002 1.7961 1.6070 Q 0.7347 0.5195 1.1369 0.5217 1.0159 QN TYPE LP LP LPBP LP MODE 3 1b 3s 1b 18 U RL2 14.3k R22 15.4k R32 10k R52 5.11k R62 9.09k – 5V 0.1µF Gain and Group Delay vs Frequency 10 0 –10 –20 –30 – 40 – 50 – 60 –70 – 80 – 90 0.1 1 FREQUENCY (Hz) 10 1068 TA11b 1.0 GAIN 0.9 0.8 GROUP DELAY (SEC) 0.7 0.6 0.5 GROUP DELAY 0.4 0.3 0.2 0.1 0 1068 TA11a LTC1068 Series TYPICAL APPLICATIONS LTC1068-50 8th Order Linear Phase Lowpass, fCUTOFF = fCLK/50 for Single Supply Low Power Applictions. Maximum fCUTOFF is 20kHz with a 3.3V Supply and 40kHz with a 5V Supply RA1 56.2k RB1 13.3k 1 R21 20.5k R11 22.6k VIN R31 10k R41 22.6k 2 3 4 5 6 7 3.3V 8 0.1µF 9 10 R43 48.7k 1µF R33 12.7k R23 10.7k 11 12 13 14 RL3 26.7k INV B HPB/NB BPB LPB SB LTC1068-50 NC AGND V+ NC SA LPA BPA HPA/NA INV A V INV C HPC/NC BPC LPC SC – CLK NC SD LPD BPD HPD/ND INV D RB3 24.9k 21 20 19 18 17 16 15 R44 34.8k R34 14.3k R24 16.9k GAIN (dB) FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION B C A D fO (kHz) 9.5241 11.0472 11.0441 6.9687 Q 0.5248 1.1258 1.3392 0.6082 21.7724 1.5781 fN (kHz) QN 0.5248 TYPE AP LPN LPBP LP MODE 4a3 2n 2s 3 U RL2 9.09k RH2 34k 28 27 26 25 24 23 22 500kHz R22 43.2k R32 43.2k R42 196k Gain and Group Delay vs Frequency 10 0 –10 –20 –30 – 40 – 50 – 60 –70 – 80 1 10 FREQUENCY (kHz) GROUP DELAY GAIN 150 140 130 GROUP DELAY (µs) 120 110 100 90 80 70 60 100 1068 TA12b NC VOUT 1068 TA12a 19 LTC1068 Series TYPICAL APPLICATIONS LTC1068-25 8th Order Lowpass, fCUTOFF = fCLK/32, Attenuation – 50dB at (1.25)(fCUTOFF)and – 60dB at (1.5)(fCUTOFF). Maximum fCUTOFF = 120kHz RH1 18.2k RL1 26.7k 1 R21 10k R11 32.4k VIN R61 2.21k R51 4.99k R31 10k 2 3 4 5 6 7 5V 8 0.1µF R63 8.45k R53 4.99k R33 118k R23 10k 9 10 11 12 13 14 RL3 20.5K INV B HPB/NB BPB LPB SB LTC1068-25 NC AGND V+ NC SA LPA BPA HPA/NA INV A INV C HPC/NC BPC LPC SC V– NC CLK NC SD LPD BPD HPD/ND INV D RH3 53.6k VOUT 1068 TA13a GAIN (dB) FilterCAD Custom Inputs for fC = 100kHz 2nd ORDER SECTION B C A D fO (kHz) 70.9153 94.2154 101.4936 79.7030 Q 0.5540 2.3848 9.3564 0.9340 fN (kHz) 127.2678 154.1187 230.5192 TYPE LPN LPN LPN LP MODE 1bn 1bn 1bn 1b 20 U RL2 40.2k RH2 36.5k 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R64 3.16k R54 4.99k R34 15k R24 10k 0.1µF R52 4.99k R62 5.9k –5V 10 0 –10 R22 10k R32 32.4k Gain vs Frequency 3.2MHz –20 –30 –40 –50 – 60 –70 – 80 20 100 FREQUENCY (kHz) 500 1069 TA13b LTC1068 Series TYPICAL APPLICATIONS LTC1068 8th Order Linear Phase Bandpass, fCENTER = fCLK/128, Passband – 3dB at (0.88)(fCENTER) and (1.12)(fCENTER). Maximum fCENTER = 40kHz with ± 5V Supplies R L1 63.4k RH1 7.5k 1 R21 4.99k R11 26.1k VIN R31 19.6k R41 12.1k 2 3 4 24 23 22 21 R52 4.99k R62 7.5k –5V 0.1µF 1.28MHz R54 4.99k R34 28.7k R24 4.99k VOUT R64 17.8k R22 4.99k R32 21.5k 10 0 –10 –20 INV B HPB/NB BPB LPB LTC1068 5 SB 6 AGND 7+ V 0.1µF 8 R43 10.7k R33 14.7k R23 4.99k 9 SA LPA 20 SC – 19 V 18 17 16 GAIN(dB) 5V 10 11 12 BPA HPA/NA INV A RL3 14.7k FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION B C A D fO (kHz) 8.2199 9.9188 8.7411 11.3122 Q 2.6702 3.3388 2.1125 5.0830 21.1672 fN (kHz) 4.4025 TYPE HPN BP LPN BP MODE 3a 1b 3a 1b U RB2 16.2k INV C HPC/NC BPC LPC Gain vs Frequency –30 –40 –50 –60 –70 –80 –90 1 10 FREQUENCY (kHz) 100 1068 TA14b CLK SD LPD BPD HPD/ND INV D RH3 40.2k 15 14 13 24-Lead Package 1068 TA14a 21 LTC1068 Series TYPICAL APPLICATIONS LTC1068 8th Order Linear Phase Bandpass, fCENTER = fCLK/100, Passband – 3dB at (0.88)(fCENTER) and (1.12)(fCENTER). Maximum fCENTER = 50kHz with ± 5V Supplies RL1 24.9k RH1 51.1k 1 R21 10k R11 24.3k VIN R31 25.5k R41 107k 2 3 4 5 24 23 22 21 20 19 18 17 R44 12.1k R34 19.1k R24 10k –5V 0.1µF 1MHz GAIN(dB) INV B HPB/NB BPB LPB SB 5V R63 2.32k R43 16.9k R33 17.4k R23 7.32k 0.1µF 6 AGND 7+ V LTC1068 8 SA R53 4.99k 9 LPA BPA HPA/NA INV A RB3 18.7k 10 11 12 FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION B C A D fO (kHz) 10.4569 11.7607 8.6632 9.0909 Q 2.6999 3.9841 2.1384 1.8356 fN (kHz) 17.4706 TYPE LPN BP BP BP MODE 2n 2 2b 3 22 U RB2 14.3k INV C HPC/NC BPC LPC SC V– fCLK SD R22 10k R32 32.4k R42 26.1k Gain vs Frequency 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 1 10 FREQUENCY (kHz) 100 1068 TA15b LPD BPD HPD/ND INV D 16 15 14 13 VOUT 24-Lead Package 1068 TA15a LTC1068 Series TYPICAL APPLICATIONS LTC1068 8th Order Linear Phase Bandpass, fCENTER = fCLK/100, Passband – 3dB at (0.7)(fCENTER) and (1.3)(fCENTER), Superior Sinewave Burst Response, Maximum fCENTER = 60kHz with ± 5V Supplies RL1 348k RH1 11k 1 R21 14.7k R11 11k VIN R31 10k R41 14.3k 2 3 4 5 24 23 22 21 20 19 18 17 R44 10k R34 17.8k R24 15.4k –5V 0.1µF 1MHz R22 18.2k R32 10k R42 18.7k RL2 10k RH2 200k INV B HPB/NB BPB LPB SB 5V 0.1µF 6 AGND 7+ V LTC1068 8 SA fCLK SD GAIN(dB) R43 21.5k R33 11.3k R23 21k 9 10 11 12 LPA BPA HPA/NA INV A RH3 95.3k FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION B C A D fO (kHz) 10.1389 9.8654 9.8830 12.4097 Q 0.7087 0.5540 0.5434 1.5264 fN (kHz) 1.7779 44.7214 27.7227 QN TYPE HPN LPN LPN BP MODE 3a 3a 3a 3 U INV C HPC/NC BPC LPC SC V– Gain vs Frequency 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 1 10 FREQUENCY (kHz) 100 1068 TA16b LPD BPD HPD/ND INV D 16 15 14 13 VOUT RL3 12.4k 24-Lead Package 1068 TA16a 23 LTC1068 Series TYPICAL APPLICATIONS LTC1068-50 8th Order Linear Phase Bandpass, fCENTER = fCLK/40, Passband – 3dB at (0.8)(fCENTER) and (1.2)(fCENTER) for Single Supply Low Power Applicaions. Maximum fCENTER = 25kHz with a Single 5V Supply RH1 18.2k RL2 17.8k RH2 84.5k 1 R21 10k R11 36.5k VIN R31 30.1k R41 10.7k R61 1.74k R51 4.99k 2 3 4 5 6 7 5V 8 1µF 0.1µF 9 10 R43 12.1k R33 26.7k R23 10k 11 12 13 14 RL3 15.8K INV B HPB/NB BPB LPB SB LTC1068-50 NC AGND V+ NC SA LPA BPA HPA/NA INV A INV C HPC/NC BPC LPC SC 28 27 26 25 24 R22 11.3k R32 29.4k R42 10k GAIN (dB) RH3 47.5k VOUT 1068 TA17a FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION B C A D fO (kHz) 8.7384 11.6756 10.8117 9.6415 Q 4.0091 4.6752 4.2066 3.6831 fN (kHz) 4.0678 19.1786 16.0127 TYPE HPN LPN LPN BP MODE 2b 2n 2n 2 24 U Gain vs Frequency 10 0 –10 – 20 400kHz 23 V– 22 NC 21 CLK NC SD LPD 20 19 18 17 16 15 R44 22.1k R34 28k R24 10k – 30 – 40 – 50 – 60 – 70 – 80 2 4 6 8 10 12 14 16 18 20 22 24 26 28 FREQUENCY (kHz) 1068 TA17b BPD HPD/ND INV D LTC1068 Series TYPICAL APPLICATIONS LTC1068-25 8th Order Bandpass, fCENTER = fCLK/32, Passband – 3dB at (0.965)(fCENTER) and (1.35)(fCENTER). Maximum fCENTER = 80kHz with ± 5V Supplies RH1 118k RB2 47.5k 1 R21 4.99k R11 121k VIN R61 8.87k R51 4.99k R31 97.6k 2 3 4 5 6 7 5V 8 0.1µF R63 6.49k R53 4.99k R33 124k R23 4.99k 9 10 11 12 13 14 RL3 78.7K INV B HPB/NB BPB LPB SB LTC1068-25 NC AGND V+ NC SA LPA BPA HPA/NA INV A CLK NC SD LPD BPD HPD/ND INV D 21 20 19 18 17 16 15 R64 6.98k R54 4.99k R34 102k R24 4.99k 320kHz GAIN (dB) FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION B C A D fO (kHz) 10.2398 10.3699 9.6241 9.7744 Q 15.6469 21.1060 18.6841 15.6092 TYPE BP BP LP LP MODE 1b 1b 1b 1b U INV C HPC/NC BPC LPC SC V– NC 28 27 26 25 24 23 22 0.1µF R52 4.99k R62 9.53k –5V R22 4.99k R32 130k 10 0 –10 – 20 – 30 – 40 – 50 – 60 – 70 7.5 8 8.5 9 9.5 10 10.5 11 11.5 12 12.5 FREQUENCY (kHz) 1068 TA18b Gain vs Frequency VOUT 1068 TA18a 25 LTC1068 Series TYPICAL APPLICATIONS LTC1068-200 8th Order Highpass, fCENTER = fCLK/200, Attenuation – 60dB at (0.6)(fCENTER). Maximum fCUTOFF = 20kHz with ± 5V Supplies RH1 11.8k RL2 249k RH2 20.5k 1 R21 10k R11 18.2k VIN R31 16.5k R41 11.3k 2 3 4 5 6 7 5V R63 2.55k 8 0.1µF 9 10 11 12 13 14 INV B HPB/NB BPB LPB SB LTC1068-200 NC AGND V+ NC SA LPA BPA HPA/NA INV A RH3 10k C23 [1/(2π • R23 • C23) = (160)(fCUTOFF)] VOUT INV C HPB/NC BPC LPC SC V– NC CLK NC SD LPD BPD HPD INV D 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R44 21k R34 14.3k R24 20.5k 0.1µF – 5V R22 21.5k R32 10.2k R42 18.7k RL1 66.5k GAIN (dB) R53 R43 20.5k 4.99k R33 36.5k R23 10k FilterCAD Custom Inputs for fC = 1kHz 2nd ORDER SECTION B C A D fO (kHz) 0.9407 1.0723 0.9088 0.9880 Q 1.5964 0.5156 3.4293 0.7001 fN (kHz) 0.4212 0.2869 0.5815 0.0000 TYPE HPN HPN HPN HP MODE 3a 3a 2b 3 26 U Gain vs Frequency 10 0 – 10 – 20 – 30 – 40 – 50 – 60 – 70 – 80 0.2 1 FREQUENCY (kHz) 10 1068TA19b 200kHz 1068 TA19a LTC1068 Series PACKAGE DESCRIPTION 0.205 – 0.212** (5.20 – 5.38) 0.005 – 0.009 (0.13 – 0.22) 0.022 – 0.037 (0.55 – 0.95) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.300 – 0.325 (7.620 – 8.255) 0.020 (0.508) MIN 0.009 – 0.015 (0.229 – 0.381) ( +0.035 0.325 –0.015 8.255 +0.889 –0.381 ) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 0.397 – 0.407* (10.07 – 10.33) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0.301 – 0.311 (7.65 – 7.90) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.068 – 0.078 (1.73 – 1.99) 0° – 8° 0.0256 (0.65) BSC 0.010 – 0.015 (0.25 – 0.38) 0.002 – 0.008 (0.05 – 0.21) G28 SSOP 0694 N Package 24-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 1.265* (32.131) MAX 24 23 22 21 20 19 18 17 16 15 14 13 0.255 ± 0.015* (6.477 ± 0.381) 1 0.130 ± 0.005 (3.302 ± 0.127) 2 3 4 5 6 7 8 9 10 11 12 0.045 – 0.065 (1.143 – 1.651) 0.065 (1.651) TYP 0.018 ± 0.003 (0.457 ± 0.076) N24 1197 0.125 (3.175) MIN 0.100 ± 0.010 (2.540 ± 0.254) 27 LTC1068 Series TYPICAL APPLICATION LTC1068-200 8th Order Notch, fNOTCH = fCLK/256, f – 3dB at (0.9) (fNOTCH) and (1.05)(fNOTCH), Attenuation at fNOTCH Greater Than 70dB for fNOTCH in the Frequency Range 200Hz to 5kHz C22 470pF RH1 5.11k C21 470pF R21 5.11k R11 51.1k VIN R31 51.1k R41 100k R61 8.06k R51 5.11k RH2 5.11k 1 2 3 4 5 6 INV B HPB/NB BPB LPB SB NC INV C HPB/NC BPC LPC SC 28 27 26 25 24 R52 5.11k 0.1µF RL2 66.5k R62 5.76k –5V R22 6.34k R32 84.3k 5V R63 8.06k R43 178k RH3 5.11k RL4 475k 1068 TA01 Gain vs Frequency 10 0 –10 – 20 GAIN (dB) – 30 – 40 – 50 – 60 –70 – 80 – 90 0.8 1.0 1.1 1.2 0.9 RELATIVE FREQUENCY (fIN/fNOTCH) 1068 TA02 RELATED PARTS PART NUMBER LTC1064 LTC1067/LTC1067-50 LTC1164 LTC1264 DESCRIPTION Universal Filter, Quad 2nd Order Low Power, Dual 2nd Order Low Power Universal Filter, Quad 2nd Order High Speed Universal Filter, Quad 2nd Order COMMENTS 50:1 and 100:1 Clock-to-fO Ratios, fO to 100kHz, VS = Up to ± 7.5V Rail-to-Rail, VS = 3V to ± 5V 50:1 and 100:1 Clock-to-fO Ratios, fO to 20kHz, VS = Up to ± 7.5V 20:1 Clock-to-fO Ratio, fO to 200kHz, VS = Up to ± 7.5V 1068fa LT/TP 0998 2K REV A • PRINTED IN USA 28 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com © LINEAR TECHNOLOGY CORPORATION 1996 + – U 0.1µF LTC1068-200 – 23 V 7 22 NC AGND 8+ 21 CLK V 9 10 NC SA LPA BPA HPA/NA INV A NC SD LPD BPD HPD INV D 20 19 18 17 16 15 fCLK = (256)(fNOTCH) R64 7.87k R54 5.11k R34 75k R24 7.32k RG 15k R53 5.11k 11 12 R33 124k R23 10k C23 470pF 13 14 RH4 5.11k LT1354 VOUT