LTC1155IN8

LTC1155 Dual High Side Micropower MOSFET Driver FEATURES s s s s s s s s s s DESCRIPTIO Fully Enhances N-Channel Power MOSFETs 8µA Standby Current 85µA ON Current Short-Circuit Protection Wide Power Supply Range: 4.5V to 18V Controlled Switching ON and OFF Times No External Charge Pump Components Replaces P-Channel High Side MOSFETs Compatible with Standard Logic Families Available in 8-Pin SO Package The LTC®1155 dual high side gate driver allows using low cost N-channel FETs for high side switching applications. An internal charge pump boosts the gate above the positive rail, fully enhancing an N-channel MOSFET with no external components. Micropower operation, with 8µA standby current and 85µA operating current, allows use in virtually all systems with maximum efficiency. Included on-chip is overcurrent sensing to provide automatic shutdown in case of short circuits. A time delay can be added in series with the current sense to prevent false triggering on high in-rush loads such as capacitors and incandescent lamps. The LTC1155 operates off of a 4.5V to 18V supply input and safely drives the gates of virtually all FETs. The LTC1155 is well suited for low voltage (battery-powered) applications, particularly where micropower “sleep” operation is required. The LTC1155 is available in both 8-pin PDIP and 8-pin SO packages. , LTC and LT are registered trademarks of Linear Technology Corporation. APPLICATI s s s s s s s S Laptop Power Bus Switching SCSI Termination Power Switching Cellular Phone Power Management P-Channel Switch Replacement Relay and Solenoid Drivers Low Frequency Half H-Bridge Motor Speed and Torque Control TYPICAL APPLICATI Laptop Computer Power Bus Switch with Short Circuit Protection VS = 4.5V TO 5.5V RSEN 0.02Ω RDLY 100k CDLY 0.1µF + 10µF CDLY 0.1µF RDLY 100k RSEN 0.02Ω DS1 *IRLR034 5A MAX TTL, CMOS INPUT POWER BUS VS DS2 *IRLR034 5A MAX TTL, CMOS INPUT VOLTAGE DROP (V) G1 LTC1155 G2 IN1 GND IN2 µP SYSTEM GND DISK DRIVE DISPLAY PRINTER, ETC. *SURFACE MOUNT 1155 TA01 U Switch Voltage Drop 0.25 0.20 0.15 0.10 0.05 0.00 0 1 2 OUTPUT CURRENT (A) 3 1155 TA02 UO UO 1 LTC1155 ABSOLUTE AXI U RATI GS U WW U W (Note 1) Supply Voltage ........................................................ 22V Input Voltage ...................... (VS + 0.3V) to (GND – 0.3V) Gate Voltage ......................... (VS +24V) to (GND – 0.3V) Current (Any Pin).................................................. 50mA Storage Temperature Range ................. – 65°C to 150°C Operating Temperature Range LTC1155C................................................ 0°C to 70°C LTC1155I........................................... – 40°C to 85°C LTC1155M ........................................ – 55°C to 125°C Lead Temperature Range (Soldering, 10 sec.)...... 300°C PACKAGE/ORDER I FOR ATIO TOP VIEW DS1 1 G1 2 GND 3 IN1 4 J8 PACKAGE 8-LEAD CERDIP 8 DS2 7 G2 6 VS 5 IN2 N8 PACKAGE 8-LEAD PDIP ORDER PART NUMBER DS1 1 LTC1155CN8 LTC1155CJ8 LTC1155IN8 LTC1155MJ8 TJMAX = 150°C, θJA = 100°C/W (J8) TJMAX = 100°C, θJA = 130°C/W (N8) ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 4.5V to 18V, unless otherwise noted. SYMBOL VS IQ PARAMETER Supply Voltage Quiescent Current OFF Quiescent Current ON Quiescent Current ON VINH VINL IIN CIN VSEN ISEN VGATE-VS Input High Voltage Input Low Voltage Input Current Input Capacitance Drain Sense Threshold Voltage q CONDITIONS q VIN = 0V, VS = 5V (Note 2) VS = 5V, VIN = 5V (Note 3) VS = 12V, VIN = 5V (Note 3) q q 0V < VIN < VS Drain Sense Input Current Gate Voltage Above Supply 0V < VSEN < VS VS = 5V VS = 6V VS = 12V VS = 5V, CGATE = 1000pF Time for VGATE > VS + 2V Time for VGATE > VS + 5V VS = 12V, CGATE = 1000pF Time for VGATE > VS + 5V Time for VGATE > VS + 10V q q q tON Turn ON Time 2 U TOP VIEW 8 7 6 5 DS2 G2 VS IN2 W ORDER PART NUMBER LTC1155CS8 LTC1155IS8 S8 PART MARKING 1155 1155I G1 2 GND 3 IN1 4 S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 100°C, θJA = 150°C/W MIN 4.5 LTC1155M TYP MAX 18 8 85 180 20 120 400 LTC1155C/LTC1155I MIN TYP MAX 4.5 8 85 180 2.0 18 20 120 400 0.8 ±1.0 5 80 75 6.0 7.5 15 50 200 50 120 100 100 6.8 8.5 18 250 1100 180 450 120 125 ±0.1 9.0 15 25 750 2000 500 1200 UNITS V µA µA µA V V µA pF mV mV µA V V V µs µs µs µs 2.0 0.8 ±1.0 5 80 75 6.0 7.5 15 50 200 50 120 100 100 6.8 8.5 18 250 1100 180 450 120 125 ±0.1 9.0 15 25 750 2000 500 1200 q LTC1155 ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 4.5V to 18V, unless otherwise noted. SYMBOL tOFF PARAMETER Turn OFF Time CONDITIONS VS = 5V, CGATE = 1000pF Time for VGATE < 1V VS = 12V, CGATE = 1000pF Time for VGATE < 1V tSC Short-Circuit Turn OFF Time VS = 5V, CGATE = 1000pF Time for VGATE < 1V VS = 12V, CGATE = 1000pF Time for VGATE < 1V Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. MIN 10 10 5 5 LTC1155M TYP MAX 36 26 16 16 60 60 30 30 LTC1155C/LTC1155I MIN TYP MAX 10 10 5 5 36 26 16 16 60 60 30 30 UNITS µs µs µs µs Note 2: Quiescent current OFF is for both channels in OFF condition. Note 3: Quiescent current ON is per driver and is measured independently. TYPICAL PERFOR A CE CHARACTERISTICS Standby Supply Current 50 45 40 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) VIN1 = VIN2 = 0V TJ = 25°C 35 30 25 20 15 10 5 0 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 G01 600 500 400 300 200 100 0 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 G02 V GATE – VS (V) Input Threshold Voltage 2.4 2.2 INPUT THRESHOLD VOLTAGE (V) DRAIN SENSE THRESHOLD VOLTAGE (V) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 G04 VON VOFF 100 90 80 70 60 50 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 G05 VGATE (V) UW Supply Current/Side (ON) 1000 900 800 700 VIN1 OR VIN2 = 2V TJ = 25°C 24 22 20 18 16 14 12 10 8 6 4 High Side Gate Voltage 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 TPC03 Drain Sense Threshold Voltage 150 140 130 120 110 30 27 24 21 18 15 12 9 6 3 0 Low Side Gate Voltage 0 2 8 6 4 SUPPLY VOLTAGE (V) 10 1155 G06 3 LTC1155 TYPICAL PERFOR A CE CHARACTERISTICS Turn ON Time 1000 900 800 CGATE = 1000pF 50 45 40 600 500 400 300 200 100 0 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 G07 TURN OFF TIME (µs) TURN-ON TIME (µs) 700 35 30 25 20 15 10 5 0 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 G08 TURN-OFF TIME (µs) VGS = 5V VGS = 2V Standby Supply Current 50 45 40 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 35 30 25 20 15 10 5 VS = 5V 0 25 50 75 TEMPERATURE (°C) 100 125 VS = 18V INPUT THRESHOLD (V) 0 –50 – 25 PIN FUNCTIONS Input Pin The LTC1155 logic input is a high impedance CMOS gate and should be grounded when not in use. These input pins have ESD protection diodes to ground and supply and, therefore, should not be forced beyond the power supply rails. Gate Drive Pin The gate drive pin is either driven to ground when the switch is turned OFF or driven above the supply rail when the switch is turned ON. This pin is a relatively high impedance when driven above the rail (the equivalent of a few hundred kΩ). Care should be taken to minimize any loading of this pin by parasitic resistance to ground or supply. Supply Pin The supply pin of the LTC1155 serves two vital purposes. The first is obvious: it powers the input, gate drive, regulation and protection circuitry. The second purpose is less obvious: it provides a Kelvin connection to the top of the two drain sense resistors for the internal 100mV reference. The supply pin should be connected directly to the power supply source as close as possible to the top of the two sense resistors. 4 UW 1155 G10 Turn OFF Time CGATE = 100pF TIME FOR VGATE < 1V 50 45 40 35 30 25 20 15 10 5 0 Short-Circuit Turn OFF Delay Time CGATE = 1000pF TIME FOR VGATE < 1V VSEN = VS –1V NO EXTERNAL DELAY 0 15 5 10 SUPPLY VOLTAGE (V) 20 1155 G09 Supply Current Per Side (ON) 1000 900 800 700 600 500 400 300 200 100 0 – 50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 VS = 5V VS = 12V 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 Input ON Threshold VS = 5V VS = 18V 0.4 –50 – 25 0 25 50 75 TEMPERATURE (°C) 100 125 1155 G11 1155 G12 U U U LTC1155 PIN FUNCTIONS The supply pin of the LTC1155 should not be forced below ground as this may result in permanent damage to the device. A 300Ω resistor should be inserted in series with the ground pin if negative supply voltages are anticipated. Drain Sense Pin As noted previously, the drain sense pin is compared against the supply pin voltage. If the voltage at this pin is more than 100mV below the supply pin, the input latch will be reset and the MOSFET gate will be quickly discharged. Cycle the input to reset the short-circuit latch and turn the MOSFET back on. This pin is also a high impedance CMOS gate with ESD protection and, therefore, should not be forced beyond the power supply rails. To defeat the over current protection, short the drain sense to supply. Some loads, such as large supply capacitors, lamps or motors require high inrush currents. An RC time delay must be added between the sense resistor and the drain sense pin to ensure that the drain sense circuitry does not false trigger during start-up. This time constant can be set from a few microseconds to many seconds. However, very long delays may put the MOSFET in risk of being destroyed by a short-circuit condition (see Applications Information section). BLOCK DIAGRA VS LOW STANDBY CURRENT REGULATOR IN TTL-TO-CMOS CONVERTER GND 1155 BD OPERATIO The LTC1155 contains two independent power MOSFET gate drivers and protection circuits (refer to the Block Diagram for details). Each half of the LTC1155 consists of the following functional blocks: TTL and CMOS Compatible Inputs Each driver input has been designed to accommodate a wide range of logic families. The input threshold is set at 1.3V with approximately 100mV of hysteresis. A voltage regulator with low standby current provides continuous bias for the TTL to CMOS converters. The TTL W U U U U ANALOG SECTION 100mV REFERENCE 10µs DELAY DRAIN SENSE COMP ANALOG DIGITAL R ONE SHOT S GATE CHARGE AND DISCHARGE CONTROL LOGIC INPUT LATCH OSCILLATOR AND CHARGE PUMP GATE VOLTAGE REGULATORS FAST/SLOW GATE CHARGE LOGIC to CMOS converter output enables the rest of the circuitry. In this way the power consumption is kept to a minimum in the standby mode. Internal Voltage Regulation The output of the TTL to CMOS converter drives two regulated supplies which power the low voltage CMOS logic and analog blocks. The regulator outputs are isolated from each other so that the noise generated by the charge pump logic is not coupled into the 100mV reference or the analog comparator. 5 LTC1155 OPERATIO Gate Charge Pump Gate drive for the power MOSFET is produced by an adaptive charge pump circuit that generates a gate voltage substantially higher than the power supply voltage. The charge pump capacitors are included on-chip and, therefore, no external components are required to generate the gate drive. Drain Current Sense The LTC1155 is configured to sense the drain current of the power MOSFET in high side applications. An internal 100mV reference is compared to the drop across a sense resistor (typically 0.002Ω to 0.1Ω) in series with the drain APPLICATI S I FOR ATIO Protecting the MOSFET The MOSFET is protected against destruction by removing drive from the gate as soon as an overcurrent condition is detected. Resistive and inductive loads can be protected with no external time delay. Large capacitive or lamp loads, however, require that the overcurrent shutdown function be delayed long enough to start the load but short enough to ensure the safety of the MOSFET. Example Calculations Consider the circuit of Figure 1. A power MOSFET is driven by one side of an LTC1155 to switch a high inrush current load. The drain sense resistor is selected to limit the maximum DC current to 3.3A. RSEN = VSEN/ITRIP = 0.1/3.3A = 0.03Ω A time delay is introduced between RSEN and the drain sense pin of the LTC1155 which provides sufficient delay to start a high inrush load such as large supply capacitors. In this example circuit, we have selected the IRLZ34 because of its low RDS(ON )(0.05Ω with VGS = 5V). The FET 6 U W U UO U lead. If the drop across this resistor exceeds the internal 100mV threshold, the input latch is reset and the gate is quickly discharged by a large N-channel transistor. Controlled Gate Rise and Fall Times When the input is switched ON and OFF, the gate is charged by the internal charge pump and discharged in a controlled manner. The charge and discharge rates have been set to minimize RFI and EMI emissions in normal operation. If a short circuit or current overload condition is encountered, the gate is discharged very quickly (typically a few microseconds) by a large N-channel transistor. VS = 5.0V CDLY 0.22µF RDLY 270k DS1 RSEN 0.03Ω VS IN1 LTC1155 G1 IRLZ34 GND LOAD GND 1155 F01 Figure 1. Adding an RC Delay drops 0.1V at 2A and, therefore, dissipates 200mW in normal operation (no heat sinking required). If the output is shorted to ground, the current through the FET rises rapidly and is limited by the RDS(ON) of the FET, the drain sense resistor and the series resistance between the power supply and the FET. Series resistance in the power supply can be substantial and attributed to many sources including harness wiring, PCB traces, supply capacitor ESR, transformer resistance or battery resistance. LTC1155 APPLICATI S I FOR ATIO For this example, we assume a worst-case scenario; i.e., that the power supply to the power MOSFET is “hard” and provides a constant 5V regardless of the current. In this case, the current is limited by the RDS(ON) of the MOSFET and the drain sense resistance. Therefore: IPEAK = VSUPPLY/0.08Ω = 62.5A The drop across the drain sense resistor under these conditions is much larger than 100mV and is equal to the drain current times the sense resistance: VDROP = (IPEAK)(RSEN) = 1.88V By consulting the power MOSFET data sheet SOA graph, we note that the IRLZ34 is capable of delivering 62.5A at a drain-to-source voltage of 3.12V for approximately 10ms. An RC time constant can now be calculated which satisfies this requirement: OVERCURRENT SHUTDOWN TIME (1= RC) RC = –t  VSEN   In 1 −  R SEN • I MAX    – 0.01 RC =   0.10 In 1 −   0.030 • 62.5    = – 0.01/– 0.054 = 182ms This time constant should be viewed as a maximum safe delay time and should be reduced if the competing requirement of starting a high inrush current load is less stringent; i.e., if the inrush time period is calculated at 20ms, the RC time constant should be set at roughly two or three times this time period and not at the maximum of 182ms. A 60ms time constant would be produced with a 270k resistor and a 0.22 µF capacitor (as shown in Figure 1). U Graphical Approach to Selecting RDLY and CDLY Figure 2 is a graph of normalized overcurrent shutdown time versus normalized MOSFET current. This graph can be used instead of the above equation to calculate the RC time constant. The Y axis of the graph is normalized to one RC time constant. The X axis is normalized to the set current. (The set current is defined as the current required to develop 100mV across the drain sense resistor). 10 1 0.1 0.01 1 2 50 100 5 10 20 MOSFET CURRENT (1 = SET CURRENT) 1155 F02 W U UO Figure 2. Shutdown Time vs MOSFET Current Note that the shutdown time is shorter for increasing levels of MOSFET current. This ensures that the total energy dissipated by the MOSFET is always within the bounds established by the MOSFET manufacturer for safe operation. In the example presented above, we established that the power MOSFET should not be allowed to pass 62.5A for more than 10ms. 62.5A is roughly 18 times the set current of 3.3A. By drawing a line up from 18 and reflecting it off the curve, we establish that the RC time constant should be set at 10ms divided by 0.054, or 180ms. Both methods result in the same conclusion. Using a Speed Up Diode A way to further reduce the amount of time that the power MOSFET is in a short-circuit condition is to “bypass”the delay resistor with a small signal diode as shown in Figure 3. The diode will engage when the drop across the drain sense resistor exceeds 0.7V, providing a direct path to the 7 LTC1155 APPLICATI S I FOR ATIO CDLY 0.22µF VS IN1 RDLY 270k DS1 D1 1N4148 VS = 5.0V RSEN 0.025Ω LTC1155 G1 GND IRLZ34 LOAD GND 1155 F03 Figure 3. Using a Speed-Up Diode sense pin and dramatically reducing the amount of time the MOSFET is in an overload condition. The drain sense resistor value is selected to limit the maximum DC current to 4A. Above 28A, the delay time drops to 10µs. Switched Supply Applications Large inductive loads, such as solenoids, relays and motors store energy which must be directed back to either the power supply or to ground when the supply voltage is interrupted (see Figure 4). In normal operation, when the switch is turned OFF, the energy stored in the inductor is harmlessly absorbed by the MOSFET; i.e., the current flows out of the supply through the MOSFET until the inductor current falls to zero. + + CS CDLY RSEN 0.025Ω VS RDLY DS1 IN1 LTC1155 G1 IRLZ34 GND L LOAD GND 1155 F04 Figure 4. Switched Supply 8 U If the MOSFET is turned ON and the power supply (battery) removed, the inductor current is delivered by the supply capacitor. The supply capacitor must be large enough to deliver the energy demanded by the discharging inductor. If the storage capacitor is too small, the supply lead of the LTC1155 may be pulled below ground, permanently destroying the device. Consider the case of a load inductance of 1mH which is supporting 3A when the 6V power supply connection is interrupted. A supply capacitor of at least 250µF is required to prevent the supply lead of the LTC1155 from being pulled below ground (along with any other circuitry tied to the supply). Any wire between the power MOSFET source and the load will add a small amount of parasitic inductance in series with the load (approximately 0.4µH/foot). Bypass the power supply lead of the LTC1155 with a minimum of 10µF to ensure that this parasitic load inductance is discharged safely, even if the load is otherwise resistive. Large Inductive Loads Large inductive loads (>0.1mH) may require diodes connected directly across the inductor to safely divert the stored energy to ground. Many inductive loads have these diodes included. If not, a diode of the proper current rating should be connected across the load to safely divert the stored energy. Reverse-Battery Protection The LTC1155 can be protected against reverse-battery conditions by connecting a resistor in series with the ground lead as shown in Figure 5. The resistor limits the supply current to less than 50mA with –12V applied. Since the LTC1155 draws very little current while in normal operation, the drop across the ground resistor is minimal. The TTL or CMOS driving logic is protected against reverse-battery conditions by the 100k input current limiting resistor. The addition of 100k resistance in series with the input pin will not affect the turn ON and turn OFF times which are dominated by the controlled gate charge and discharge periods. W U UO LTC1155 APPLICATI S I FOR ATIO VS = 4.5V TO 18V CDLY RSEN VS RDLY DS1 + IN1 100k GND 5V 300Ω 1/4W GND LTC1155 G1 10µF 25V LOAD 1155 F05 Figure 5. Reverse Battery Protection IN1 LTC1155 Overvoltage Protection The MOSFET and load can be protected against overvoltage conditions by using the circuit of Figure 6. The drain sense function is used to detect an overvoltage condition and quickly discharge the power MOSFET gate. The 18V zener diode conducts when the supply voltage exceeds GND TYPICAL APPLICATI S Dual 2A Autoreset Electronic Fuse 5V + 10µF 8 4 3 fO = 1Hz 750k 1N4148 LMC555 1N4148 2 6 OUT 1 1.0µF OUT 2 1 ALL COMPONENTS SHOWN ARE SURFACE MOUNT U 18.6V and pulls the drain sense pin 0.6V below the supply pin voltage. The supply voltage is limited to 18.6V and the gate drive is immediately removed from the MOSFET to ensure that it cannot conduct during the overvoltage period. The gate of the MOSFET will be latched OFF until the supply transient is removed and the input turned OFF and ON again. VS = 4.5V TO 18V 510Ω 10k VS DS1 1N4148 G1 18V GND 1155 F06 W UO U UO LOAD Figure 6. Overvoltage Shutdown and Protection 0.03Ω 0.1µF 30k DS1 G1 100k IN1 GND VS LTC1155 IN2 DS2 G2 0.1µF 30k 0.03Ω 1/2 SI9956DY 1/2 SI9956DY 100k 1155 TA03 9 LTC1155 TYPICAL APPLICATI 4.5V TO 6V High Side Driver with VDS Sense Short-Circuit Shutdown + 10µF VS 1/2 LTC1155 GND 0.01µF G1 5V * IN1 DS1 *ANY 74C OR 74HC LOGIC GATE. MOSFET SHUTS DOWN IF VDS > 1V 1155 TA04 Low Side Driver with Drain End Current Sensing 5V + 10µF VS 1/2 LTC1155 GND DS1 LOAD G1 SMP25N05 IN1 10 UO S X-NOR Fault Detection 4.5V TO 6V + 30k 10µF 0.1Ω VS 1/2 LTC1155 GND G1 100k IRLD024 DS1 IN1 IRLZ24 10k 270k FAULT LOAD LOAD 74C266 1155 TA05 Truth Table IN 0 1 0 1 OUT 0 0 1 1 CONDITION Switch OFF Short Circuit Open Load Switch ON FLT 1 0 0 1 Low Side Driver with Source End Current Sensing 5V VLOAD + 0.05Ω 5% 10µF VS 1/2 LTC1155 GND G1 51Ω DS1 LOAD IN1 SMP25N05 7 + 1155 TA06 3 6 LT®1077* – 51Ω 4 2 0.02Ω 5% 1155 TA07 *DO NOT SUBSTITUTE. MUST BE A PRECISION, SINGLE SUPPLY, MICROPOWER OP AMP (IQ < 60µA) LTC1155 TYPICAL APPLICATI Automotive High Side Driver with Reverse-Battery and High Voltage Transient Protection 9V TO 16V + 10µF 5V 100k* IN1 VS 1/2 LTC1155 GND DS1 18V 1N4746A G1 18V 1N4746A FAULT ON/OFF IN1 300Ω 1/4W *PROTECTS TTL/CMOS GATES DURING HIGH VOLTAGE TRANSIENT OR REVERSE BATTERY **NOT REQUIRED FOR INDUCTIVE OR RESISTIVE LOADS Using the Second Channel for Fault Detection 4.5V TO 5.5V + 100k FLT µP OR CONTROL LOGIC ON/OFF 1N4148 10µF DS1 G2 100k IN2 IN1 GND VS LTC1155 1N4148 NOTE: DRAIN SENSE 2 IS USED TO DETECT A FAULT IN CHANNEL 1. GATE 2 PULLS DOWN ON DRAIN SENSE 1 TO DISCHARGE THE MOSFET AND REPORT THE FAULT TO THE µP *NOT REQUIRED FOR RESISTIVE OR INDUCTIVE LOADS UO S 5V/3A Extremely Low Voltage Drop Regulator with 10µA Standby Current and Short-Circuit Protection 5.2V TO 6V CDLY** RDLY** 0.02Ω 5% + 10µF VS 1/2 LTC1155 0.1µF 300k DS1 0.02Ω 100k MTP50N05E GND G1 200pF IRLR024 0.1µF 10k 8 7 M VALVE, ETC. 1 3 LT1431 4 5 5V/3A 1155 TA08 + 6 *CAPACITOR ESR SHOULD BE LESS THAN 0.5Ω 470µF* 1155 TA09 Bootstrapped Gate Drive for (100Hz < FO < 10kHz) 9V TO 18V 0.1µF* DS2 0.05Ω 30k* 5V VS µP OR CMOS/TTL LOGIC 1/2 LTC1155 0.01µF 30k DS1 1N4148 0.01Ω IN1 SMD25N05-45L G1 2N2222 GND G1 0.1µF IRFZ44 VGATE = 2VS – 0.6V 18V 2N3906 LOAD LOAD 1155 TA10 RISE AND FALL TIMES ARE βETA TIMES FASTER 1155 TA11 11 LTC1155 TYPICAL APPLICATI Logic Controlled Boost Mode Switching Regulator with Short-Circuit Protection and 8µA Standby Current 4.75V TO 5.25V + 100µF VS FROM µP, ETC. FAULT 1N4148 5 *COILTRONICS CTX-7-52 110V AC 1N4001 MOSFETs ARE SYNCHRONOUSLY ENHANCED WHEN RECTIFIER CURRENT EXCEEDS 300mA *NO HEATSINK REQUIRED. CASES (DRAINS) CAN BE TIED TOGETHER **INTERNAL BODY DIODE OF MOSFET 12 + 0.03Ω 10k + 3 – 12.6VCT UO IN1 S 0.33µF 100k DS1 0.02Ω 1/2 LTC1155 GND G1 MTM25N05L 5V SWITCHED 50µH* 1N5820 12V/1A 4 68µF 10.7k 1% + 1k 1 LT1170 2 1.24k 1% + 2200µF 3 1µF 1155 TA12 High Efficiency 60Hz Full-Wave Synchronous Rectifier ** 18V 1N4746A 100k S 1N4148 IRFZ44* D 9V/3A DC 10k 10Ω 2 7 LT1006 4 6 1N4148 DS1 IN1 VS LTC1155 DS2 G1 + 1N4148 IN2 GND G2 4700µF 16V 1N4148 10µF 100k 18V 1N4746A S ** D IRFZ44* 1155 TA13 LTC1155 TYPICAL APPLICATI 10k 1N4148 110V AC 6.3V AC 10k 10Ω MOSFETs ARE SYNCHRONOUSLY ENHANCED WHEN RECTIFIER CURRENT EXCEEDS 300mA *NO HEATSINK REQUIRED **INTERNAL BODY DIODE OF MOSFET HI/LO 74HC02 + 3 – 2 7 LT1006 4 6 1N4148 Push-Pull Driver with Shoot-Through Current Lockout (fO < 100Hz) 4.5V TO 6V *OPPOSING GATE MUST DROP BELOW 2V BEFORE THE OTHER IS CHARGED UO S 9V/3A DC High Efficiency 60Hz Full-Wave Synchronous Rectifier 100k DS2 IN1 VS LTC1155 IN2 GND G2 ** 18V 1N4746A S DS1 G1 ** D S D 4 × IRFZ44* D S D S ** + 4700µF 16V ** 100k 18V 1N4746A 0.03Ω 1155 TA14 5V 10µF 0.1µF 300k 0.01Ω 100k 100k DS1 IN1 VS DS2 G1 * IRLZ24 VOUT LTC1155 IN2 GND 1N4148 G2 * IRFZ24 1N4148 1155 TA15 13 LTC1155 TYPICAL APPLICATI Full H-Bridge Driver with Shoot-Through Current Lockout and Stall Current Shutdown (fO < 100Hz) 4.5V TO 6V DIRECTION 74HC02 DS1 IN1 VS LTC1155 IN2 GND DISABLE * IRFZ44 VN2222L 1155 TA16 *OPPOSING GATES ARE HELD OFF UNTIL OTHER GATES DROP BELOW 1.5V DC Motor Speed and Torque Control for Cordless Tools and Appliances + 6V 1M 1M + 1/2 LT1017 – 1M 1M 0.0033µF SPEED IS PROPORTIONAL TO PULSE WIDTH. TORQUE IS PROPORTIONAL TO CURRENT 14 UO S 10µF 0.1µF 100k 0.01Ω 5V DS2 G1 * IRLZ44 IRLZ44 G2 VN2222L M IRFZ44 100Ω + 0.1µF 47µF 16V 300k 1.1k 0.1Ω 10k TORQUE ADJUST 100k DS1 IN1 10k SPEED ADJUST 120k VS DS2 G1 1A TO 10A MAX IRFZ24 + 1/2 LT1017 IN2 LTC1155 G2 GND SMALL DC APPLIANCE OR TOOL MOTOR M – 100k 1155 TA17 LTC1155 PACKAGE DESCRIPTIO 0.300 BSC (0.762 BSC) CORNER LEADS OPTION (4 PLCS) 0.008 – 0.018 (0.203 – 0.457) 0° – 15° 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) 0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076) ( +0.035 0.325 –0.015 +0.889 8.255 –0.381 ) 0.100 ± 0.010 (2.540 ± 0.254) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (milimeters) unless otherwise noted. J8 Package 8-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) 0.005 (0.127) MIN 0.405 (10.287) MAX 8 7 6 5 0.200 (5.080) MAX 0.015 – 0.060 (0.381 – 1.524) 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0.025 (0.635) RAD TYP 1 2 3 0.220 – 0.310 (5.588 – 7.874) 4 J8 1197 0.045 – 0.068 (1.143 – 1.727) 0.014 – 0.026 (0.360 – 0.660) 0.125 3.175 0.100 ± 0.010 MIN (2.540 ± 0.254) N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.400* (10.160) MAX 8 7 6 5 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.255 ± 0.015* (6.477 ± 0.381) 1 2 3 4 N8 1197 S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 8 7 6 5 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) TYP 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) SO8 0996 1 2 3 4 15 LTC1155 TYPICAL APPLICATI 6V TO 12V 1N4148 1/6 74C14 100k 0.1µF 200V 100pF 1N4148 1N5817 1M IN2 5V 1/6 74C14 100k 0.0022µF 100k 1N4148 ON/OFF 1/6 74C14 T1* 100k 300Ω 600Ω 0.1µF 1N5817 5.6V 1N4690A 0.01µF 100k 0.05Ω *PICO ELECTRONICS F-28115 OR EQUIVALENT RELATED PARTS PART NUMBER LTC1153 LT1161 LTC1163 LTC1255 LTC1477 LTC1623 LTC1710 DESCRIPTION Auto-Reset Electronic Circuit Breaker Quad Protected High Side MOSFET Driver Triple 1.8V to 6V High Side MOSFET Driver Dual 24V High Side MOSFET Driver Protected Monolithic High Side Switch SMBus Dual High Side Switch Controller SMBus Dual Monolithic High Side Switch COMMENTS Programmable Trip Current, Fault Status Output 8V to 48V Supply Range, Individual Short-Circuit Protection 0.01µA Standby Current, Triple Driver in SO-8 Package Operates from 9V to 24V, Short-Circuit Protection Low RDS(ON) 0.07Ω Switch, 2A Short-Circuit Protected 2-Wire SMBus Serial Interface, Built-In Gate Charge Pumps Two Low RDS(ON) 0.4Ω/300mA Switches in 8-Lead MSOP Package 1155fa LT/TP 0399 2K REV A • PRINTED IN USA 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com UO S Isolated High Voltage High Side Switch with Circuit Breaker 1N5817 C 1k 10mA CONTROL B 4N28 E DS1 IN1 VS DS2 G1 1k 90V + 10µF 25V 6A MAX LTC1155 G2 GND 1k 2N2222 18V 1N4746A 0.1Ω MUR420 M 1155 TA18 Isolated Solid-State AC Relay with Circuit Breaker 18V 1N4746A 18V 1N4746A IN/OUT IRFZ24 + DS1 IN1 1µF IN2 VS LTC1155 DS2 G1 IRFZ24 G2 GND EQUIVALENT FUNCTION IN/OUT ON/OFF 2A IN/OUT 24V AC 2A MAX IN/OUT 1155 TA19 © LINEAR TECHNOLOGY CORPORATION 1991