LTC1164-7 Low Power, Linear Phase 8th Order Lowpass Filter
FEATURES
■ ■ ■ ■ ■ ■ ■ ■ ■
DESCRIPTIO
Better Than Bessel Roll-Off fCUTOFF up to 20kHz, Single 5V Supply ISUPPLY = 2.5mA (Typ), Single 5V Supply 75dB THD + Noise with Single 5V Supply Phase and Group Delay Response Fully Tested Transient Response with No Ringing Wide Dynamic Range No External Components Needed Available in 14-Lead N and 16-Lead SW Packages
The LTC1164-7 is a low power, clock-tunable monolithic 8th order lowpass filter with linear passband phase and flat group delay. The amplitude response approximates a maximally flat passband and exhibits steeper roll-off than an equivalent 8th order Bessel filter. For instance, at twice the cutoff frequency the filter attains 34dB attenuation (vs12dB for Bessel), while at three times the cutoff frequency the filter attains 68dB attenuation (vs 30dB for Bessel). The cutoff frequency of the LTC1164-7 is tuned via an external TTL or CMOS clock. Low power is achieved without sacrificing dynamic range. With single 5V supply, the S/N + THD is up to 75dB. Optimum 91dB S/N is obtained with ± 7.5V supplies. The clock-to-cutoff frequency ratio of the LTC1164-7 can be set to 50:1 (Pin 10 to V +) or 100:1 (Pin 10 to V –). When the filter operates at the clock-to-cutoff frequency ratio of 50:1, the input is double-sampled to lower the risk of aliasing. The LTC1164-7 is pin-compatible with the LTC1064-X series and LTC1264-7.
APPLICATIO S
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Data Communication Filters Time Delay Networks Phase Matched Filters
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
1 VIN 2 3 5V 4 5 6 7 LTC1164-7 14 13 12 11 10 9 8
10kHz Linear Phase Lowpass Filter
0
–5V CLK = 500kHz 5V VOUT
–10 –20 DELAY
GAIN (dB)
–30 –40 –50 –60
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1µF CAPACITOR CLOSE TO THE PACKAGE AND ANY PRINTED CIRCUIT BOARD ASSEMBLY SHOULD MAINTAIN A DISTANCE OF AT LEAST 0.2 INCHES BETWEEN ANY OUTPUT OR INPUT PIN AND THE fCLK LINE. 1164-7 TA01
–70 –80 1 10 FREQUENCY (kHz)
U
Frequency Response
GAIN 150 140 130 120 110 100 90 80 70 100
1164-7 TA02
U
U
DELAY (µs)
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1
LTC1164-7 ABSOLUTE AXI U
+ –
RATI GS (Note 1)
Operating Temperature Range LTC1164-7C ...................................... – 40°C to 85°C LTC1164-7M ................................... – 55°C to 125°C Lead Temperature (Soldering, 10 sec)................. 300°C
Total Supply Voltage (V to V ) ............................. 16V Power Dissipation ............................................. 400mW Burn-In Voltage ...................................................... 16V Voltage at Any Input ..... (V – – 0.3V) ≤ VIN ≤ (V + + 0.3V) Storage Temperature Range ................ – 65°C to 150°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC VIN GND V
+
1 2 3 4 5 6 7
14 CONNECT 2 13 NC 12 V–
ORDER PART NUMBER
LTC1164-7CN
11 fCLK 10 50/100 9 8 VOUT NC
GND LP6 CONNECT 1
N PACKAGE 14-LEAD PLASTIC DIP
J PACKAGE 14-LEAD CERAMIC DIP TJMAX = 150°C, θJA = 65°C/W (J) TJMAX = 150°C, θJA = 65°C/W (J) TJMAX = 110°C, θJA = 65°C/W (N)
OBSOLETE PACKAGE
Consider the N Package as an Alternate Source
LTC1164-7CJ LTC1164-7MJ
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ± 7.5V, RL = 10k, f CUTOFF = 8kHz or 4kHz, fCLK = 400kHz, TTL or CMOS level and all gain measurements are referenced to passband gain, unless otherwise specified. (Maximum clock rise or fall time ≤ 1µs.) The filter cutoff frequency is abbreviated as fCUTOFF or fC.
PARAMETER Passband Gain Gain at 0.50 fCUTOFF Gain at 0.75 fCUTOFF Gain at fCUTOFF Gain at 2.0 fCUTOFF Gain with fCLK = 20kHz Gain with fCLK = 400kHz, VS = ± 2.375V Phase Factor (F ) Phase = 180° – F (f/fC) (Note 2) CONDITIONS 0.1Hz ≤ f ≤ 0.25 fCUTOFF fTEST = 2kHz, (fCLK / fC) = 50:1 fTEST = 4kHz, (fCLK / fC) = 50:1 fTEST = 2kHz, (fCLK / fC) = 100:1 fTEST = 6kHz, (fCLK / fC) = 50:1 fTEST = 8kHz, (fCLK / fC) = 50:1 fTEST = 4kHz, (fCLK / fC) = 100:1 fTEST = 16kHz, (fCLK / fC) = 50:1 fTEST = 8kHz, (fCLK / fC) = 100:1 fTEST = 200Hz, (fCLK / fC) = 100:1 fTEST = 4kHz, (fCLK / fC) = 50:1 fTEST = 8kHz, (fCLK / fC) = 50:1 0.1Hz ≤ f ≤ fCUTOFF (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 MIN
● ● ● ● ● ● ● ●
ELECTRICAL CHARACTERISTICS
Phase Nonlinearity (Note 2)
2
U
U
W
WW
U
W
TOP VIEW
NC 1 VIN 2 GND 3 V+
16 CONNECT 2 15 NC 14 V – 13 NC 12 fCLK 11 50/100 10 NC 9
VOUT
ORDER PART NUMBER LTC1164-7CSW
4
GND 5 NC 6 LP6 7 CONNECT 1 8
SW PACKAGE 16-LEAD PLASTIC SO (WIDE) TJMAX = 110°C, θJA = 85°C/W
TYP – 0.10 – 0.20 – 0.65 –1.1 – 3.4 – 5.2 – 34 – 34 – 5.2 – 0.2 – 3.4 435 ± 2 428 ± 2
MAX 0.30 0.30 0.15 0.1 –1.9 – 2.5 – 30 – 30 – 2.5 0.2 – 2.5
UNITS dB dB dB dB dB dB dB dB dB dB dB Deg Deg Deg Deg % % % %
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– 0.50 – 0.50 – 0.85 – 1.2 – 4.1 – 5.5 – 37 – 38 – 5.7 – 0.50 – 3.75
● ●
430 423 ±1.0 ±1.0
442 434 ± 2.0 ± 2.5
● ●
LTC1164-7
ELECTRICAL CHARACTERISTICS
PARAMETER Group Delay (td) td = (1/360)(f/fC) (Note 3) Group Delay Deviation (Note 3)
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ± 7.5V, RL = 10k, f CUTOFF = 8kHz or 4kHz, fCLK = 400kHz, TTL or CMOS level and all gain measurements are referenced to passband gain, unless otherwise specified. (Maximum clock rise or fall time ≤ 1µs.) The filter cutoff frequency is abbreviated as fCUTOFF or fC.
CONDITIONS (fCLK/fC) = 50:1, f ≥ f CUTOFF (fCLK/fC) = 100:1, f ≥ fCUTOFF (fCLK/fC) = 50:1, f ≥ f CUTOFF (fCLK/fC) = 100:1, f ≥ fCUTOFF (fCLK/fC) = 50:1, f ≥ f CUTOFF (fCLK/fC) = 100:1, f ≥ fCUTOFF (fCLK/fC) = 50:1, f ≥ f CUTOFF (fCLK/fC) = 100:1, f ≥ fCUTOFF (fCLK/fC) = 50:1 (fCLK/fC) = 100:1 VS = Single 5V (Pins 3 and 5 at 2V) VS = ± 5V VS = ± 7.5V 50:1, ± 5V, Input at GND VS = ± 2.5V VS = ± 5V VS = ± 7.5V VS = ± 2.375V VS = ± 5V VS = ± 7.5V 50:1, VS = ± 5V 100:1, VS = ± 5V 50:1, VS = ± 5V 100:1, VS = ± 5V VS = ± 2.375V, TA = 25°C VS = ± 5V, TA = 25°C VS = ± 7.5V, TA = 25°C Power Supply Range Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Input frequencies, f, are linearly phase shifted through the filter as long as f ≤ fC; f C = cutoff frequency. Figure 1 curve shows the typical phase response of an LTC1164-7 operating at f CLK = 400kHz, f C = 8kHz and it closely matches an ideal straight line. The phase shift is described by: phase shift = 180° – F (f/fC); f ≤ fC. F is arbitrarily called the “phase factor” expressed in degrees. The phase factor together with the specified deviation from the ideal straight line allows the calculation of the phase at a given frequency. Example: The phase shift at 7kHz of the LTC1164-7 shown in Figure 1 is: phase shift = 180° – 434° (7kHz/10kHz) ± nonlinearity = –123.8° ± 1% or –123.9° ± 1.24°. Note 3: Group delay and group delay deviation are calculated from the measured phase factor and phase deviation specifications. Note 4: The AC swing is typically 11VP-P, 7VP-P, 2.8VP-P for ± 7.5V, ± 5V, ± 2.5V supply respectively. For more information refer to the THD + Noise vs Input graphs.
180 90 0 –90
MIN
TYP 151.0 ± 1 297.2 ± 1
MAX
● ●
149.3 293.8 ± 1.0 ± 1.0
153.5 301.4
● ●
± 2.0 ± 2.5
Input Frequency Range (Table 9) Maximum fCLK
Clock Feedthrough (f = fCLK) Wideband Noise (1Hz ≤ f < fCLK) Input Impedance Output DC Voltage Swing (Note 4)
● ●
35 ±1.25 ± 3.70 ± 5.40
Output DC Offset Output DC Offset TempCo Power Supply Current
250kHz) 1.4VRMS (fIN > 20kHz) 0.5VRMS (fIN > 100kHz) 0.5VRMS (fIN > 100kHz)
W
U
UO
Table 10. Transient Response of LTC Lowpass Filters
DELAY TIME* (SEC) 0.50/fC 0.43/fC 0.43/fC 1.15/fC 1.20/fC 1.20/fC 0.80/fC 0.85/fC 0.90/fC 0.85/fC RISE SETTLING OVERTIME** TIME*** SHOOT (SEC) (SEC) (%) 0.34/fC 0.80/fC 0.5 0.34/fC 0.85/fC 0 0.34/fC 1.15/fC 1 0.36/fC 0.39/fC 0.39/fC 0.48/fC 0.54/fC 0.54/fC 0.54/fC 2.05/fC 2.20/fC 2.20/fC 2.40/fC 4.30/fC 4.50/fC 6.50/fC 5 5 5 11 18 20 20
LOWPASS FILTER LTC1064-3 Bessel LTC1164-5 Bessel LTC1164-6 Bessel LTC1264-7 Linear Phase LTC1164-7 Linear Phase LTC1064-7 Linear Phase LTC1164-5 Butterworth LTC1164-6 Elliptic LTC1064-4 Elliptic LTC1064-1 Elliptic
* To 50% ± 5%, ** 10% to 90% ± 5%, *** To 1% ± 0.5%
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LTC1164-7
APPLICATI S I FOR ATIO
Transient Response
2V/DIV
INPUT = 1kHz ± 3V fCLK = 500kHz fC = 10kHz VS = ±7.5V
100µs/DIV
1164-7 F05
Figure 5
ts INPUT 90% OUTPUT
50%
td
10%
tr
RISE TIME (tr) =
1.2 TIME DELAY (td) = GROUP DELAY ≈ fCUTOFF (TO 50% OF OUTPUT)
1164-7 F06
Figure 6
Aliasing Aliasing is an inherent phenomenon of sampled data systems and it occurs when input frequencies close to the sampling frequency are applied. For the LTC1164-7 case at 100:1, an input signal whose frequency is in the range of fCLK ± 3%, will be aliased back into the filter’s passband.
VS = ± 7.5V fCLK = 1MHz fC = 20kHz (fCLK /fC) = 50:1
1V/DIV
0.39 ± 5% fCUTOFF 2.2 SETTLING TIME (ts) = ± 5% f (TO 1% of OUTPUT) CUTOFF
12
U
If, for instance, an LTC1164-7 operating with a 100kHz clock and 1kHz cutoff frequency receives a 98kHz 10mV input signal, a 2kHz, 143µVRMS alias signal will appear at its output. When the LTC1164-7 operates with a clock-tocutoff frequency of 50:1, aliasing occurs at twice the clock frequency. Table 11 shows details.
Table 11. Aliasing (fCLK = 100kHz)
INPUT FREQUENCY (VIN = 1VRMS, fIN = fCLK ± fOUT) (kHz) 50:1, fCUTOFF = 2kHz 190 (or 210) 195 (or 205) 196 (or 204) 197(or 203) 198 (or 202) 199.5 (or 200.5) 100:1, fCUTOFF = 1kHz 97 (or 103) 97.5 (or 102.5) 98 (or 102) 98.5 (or 101.5) 99 (or 101) 99.5 (or 100.5) OUTPUT LEVEL (Relative to Input, 0dB = 1VRMS) (dB) –76.1 – 51.9 – 36.3 – 18.4 – 3.0 – 0.2 –74.2 – 53.2 – 36.9 – 19.6 – 5.2 – 0.7 OUTPUT FREQUENCY (Aliased Frequency fOUT = ABS [fCLK ± fIN]) (kHz) 10.0 5.0 4.0 3.0 2.0 0.5 3.0 2.5 2.0 1.5 1.0 0.5
5µs/DIV
1164-7 F07
W
U
UO
Figure 7. Eye Diagram
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LTC1164-7
PACKAGE DESCRIPTIO U
J Package 14-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
.785 (19.939) MAX 14 13 12 11 10 9 8 .005 (0.127) MIN .025 (0.635) RAD TYP .220 – .310 (5.588 – 7.874) 1 .300 BSC (7.62 BSC) 2 3 4 5 6 7 .200 (5.080) MAX .015 – .060 (0.381 – 1.524) 0° – 15° .045 – .065 (1.143 – 1.651) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .014 – .026 (0.360 – 0.660) .100 (2.54) BSC .125 (3.175) MIN
J14 0801
.008 – .018 (0.203 – 0.457)
OBSOLETE PACKAGE
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LTC1164-7
PACKAGE DESCRIPTIO U
N Package 14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.770* (19.558) MAX 14 13 12 11 10 9 8 .255 ± .015* (6.477 ± 0.381) 1 .300 – .325 (7.620 – 8.255) .130 ± .005 (3.302 ± 0.127) .020 (0.508) MIN .008 – .015 (0.203 – 0.381) +.035 .325 –.015 .005 (0.127) .100 MIN (2.54) BSC 2 3 4 5 6 7 .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .120 (3.048) MIN .018 ± .003 (0.457 ± 0.076)
N14 1103
(
+0.889 8.255 –0.381
)
INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
NOTE: 1. DIMENSIONS ARE
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LTC1164-7
PACKAGE DESCRIPTIO U
SW Package 16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.050 BSC .045 ±.005 .398 – .413 (10.109 – 10.490) NOTE 4 16 15 14 13 12 11 10 9 N .420 MIN .325 ±.005 NOTE 3 .394 – .419 (10.007 – 10.643) N/2 N/2 1 .291 – .299 (7.391 – 7.595) NOTE 4 .010 – .029 × 45° (0.254 – 0.737)
0° – 8° TYP
.030 ±.005 TYP N
1
2
3
RECOMMENDED SOLDER PAD LAYOUT 2 3 4 5 6 7 8
.093 – .104 (2.362 – 2.642)
.037 – .045 (0.940 – 1.143)
.005 (0.127) RAD MIN
.009 – .013 (0.229 – 0.330)
NOTE 3 .016 – .050 (0.406 – 1.270)
.050 (1.270) BSC
.004 – .012 (0.102 – 0.305)
NOTE: 1. DIMENSIONS IN
.014 – .019 (0.356 – 0.482) TYP
S16 (WIDE) 0502
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1164-7
TYPICAL APPLICATIO S
–5V 1 VIN 2 3 +5V 0.1µF 4 5 6 7 LTC1164-7 14 13 12 11 10 9 8 + GND DIGITAL SUPPLY +5V 1k 1MHz CLOCK 0.1µF 1N4148
RELATED PARTS
PART NUMBER LTC1064 LTC1064-1/2/3/4/7 LTC1164 LTC1164-5/6 LTC1264 LTC1264-7 LT6600-2.5 LT6600-10 DESCRIPTION Universal Filter Building Block 8th Order Low Pass Filters, FO Max = 100kHz Universal Filter Building Block 8th Order Low Pass Filters, FO Max = 20kHz Universal Filter Building Block 8th Order Low Pass Filter, FO Max = 200kHz Low Noise Differential Amp and 10MHz Lowpass Low Noise Differential Amp and 20MHz Lowpass COMMENTS Allows for Bandpass (Up to 50kHz) Using Ext Resistors Cauer, Butterworth, Bessel or Improved Bessel Allows for Bandpass (Up to 20kHz) Using Ext Resistors Butterworth, Bessel or Elliptic Allows for Bandpass (Up to 100kHz) Using Ext Resistors Flat Group Delay, High Speed Lowpass Filter 55µVRMS Noise 100kHz to 10MHz 3V Supply 86µVRMS Noise 100kHz to 20MHz 3V Supply
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
U
VOUT
1164-7 TA03
20kHz Linear Phase Lowpass Filter
Eye Diagram
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© LINEAR TECHNOLOGY CORPORATION 1992