LTC1255I

LTC1255 Dual 24V High-Side MOSFET Driver FEATURES s s s s s s s s s DESCRIPTIO Fully Enhances N-Channel Power MOSFETs 12µA Standby Current Operates at Supply Voltages from 9V to 24V Short Circuit Protection Easily Protected Against Supply Transients Controlled Switching ON and OFF Times No External Charge Pump Components Compatible With Standard Logic Families Available in 8-Pin SOIC The LTC1255 dual high-side driver allows using low cost N-channel FETs for high-side industrial and automotive switching applications. An internal charge pump boosts the gate drive voltage above the positive rail, fully enhancing an N-channel MOS switch with no external components. Low power operation, with 12µA standby current, allows use in virtually all systems with maximum efficiency. Included on-chip is independent overcurrent sensing to provide automatic shutdown in case of short circuits. A time delay can be added to the current sense to prevent false triggering on high in-rush current loads. The LTC1255 operates from 9V to 24V supplies and is well suited for industrial and automotive applications. The LTC1255 is available in both an 8-pin DIP and an 8-pin SOIC. APPLICATI s s s s s s s S Solenoid Drivers DC Motor Drivers Stepper Motor Drivers Lamp Drivers/Dimmers Relay Drivers Low Frequency H-Bridge P-Channel Switch Replacement TYPICAL APPLICATI Dual 24V High-Side Switch with Overcurrent Protection 24V + 0.036Ω 10µF VS DS1 DS2 0.036Ω SUPPLY CURRENT (µA) IRLR024 12V G1 LTC1255 G2 IN1 GND IN2 12V IRLR024 24V/0.5A SOLENOID FROM 1N4001 µP, ETC. FROM µP, ETC. 1N4001 24V/0.5A SOLENOID LTC1255 • TA01 U Standby Supply Current 50 45 40 35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VIN1 = VIN2 = 0V TA = 25°C LTC1255 • TA02 UO UO 1 LTC1255 ABSOLUTE AXI U RATI GS Operating Temperature Range LTC1255C............................................... 0°C to 70°C LTC1255I ........................................... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C Supply Voltage ......................................... – 0.3V to 30V Transient Supply Voltage (< 10ms) ......................... 40V Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V) Gate Voltage ...................... (VS + 20V) to (GND – 0.3V) Current (Any Pin)................................................. 50mA PACKAGE/ORDER I FOR ATIO TOP VIEW DS1 1 GATE 1 2 GND 3 IN1 4 8 7 6 5 DS2 GATE 2 VS IN2 ORDER PART NUMBER DS1 1 LTC1255CN8 LTC1255IN8 N8 PACKAGE 8-LEAD PLASTIC DIP TJMAX = 100°C, θJA = 130° C/ W ELECTRICAL CHARACTERISTICS SYMBOL IQ PARAMETER Quiescent Current OFF VS = 9V to 24V, TA = 25°C, unless otherwise noted. MIN TYP 12 12 12 160 350 600 q q CONDITIONS VS = 10V, VIN = 0V (Note 1) VS = 18V, VIN = 0V (Note 1) VS = 24V, VIN = 0V (Note 1) VS = 10V, VGATE = 22V, VIN = 5V (Note 2) VS = 18V, VGATE = 30V, VIN = 5V (Note 2) VS = 24V, VGATE = 36V, VIN = 5V (Note 2) Quiescent Current ON VINH VINL IIN CIN VSEN ISEN VGATE – VS IGATE Input High Voltage Input Low Voltage Input Current Input Capacitance Drain Sense Threshold Voltage Drain Sense Input Current Gate Voltage Above Supply Gate Output Drive Current 0V ≤ VIN ≤ VS 0V ≤ VSEN ≤ VS VS = 9V VS = 18V, VGATE = 30V VS = 24V, VGATE = 36V 2 U U W WW U W TOP VIEW 8 7 6 5 DS2 GATE 2 VS IN2 ORDER PART NUMBER LTC1255CS8 LTC1255IS8 S8 PART MARKING 1255 1255I GATE 1 2 GND 3 IN1 4 S8 PACKAGE 8-LEAD PLASTIC SOIC TJMAX = 100°C, θJA = 150°C/ W MAX 40 40 40 400 800 1200 0.8 ±1 UNITS µA µA µA µA µA µA V V µA pF mV mV µA V µA µA 2 q q q q q q 80 75 7.5 5 5 5 100 100 10.5 20 23 120 125 ± 0.1 12 LTC1255 ELECTRICAL CHARACTERISTICS SYMBOL tON PARAMETER Turn-ON Time VS = 9V to 24V, TA = 25°C, unless otherwise noted. MIN 30 75 40 75 50 10 10 10 5 5 5 TYP 100 250 120 250 180 24 21 19 16 16 16 MAX 300 750 400 750 500 60 60 60 30 30 30 UNITS µs µs µs µs µs µs µs µs µs µs µs CONDITIONS VS = 10V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 2V Time for VGATE > VS + 5V VS = 18V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 5V Time for VGATE > VS + 10V VS = 24V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 10V VS = 10V, CGATE = 1000pF, (Note 3, 4) VS = 18V, CGATE = 1000pF, (Note 3, 4) VS = 24V, CGATE = 1000pF, (Note 3, 4) VS = 10V, CGATE = 1000pF, (Note 3, 4) VS = 18V, CGATE = 1000pF, (Note 3, 4) VS = 24V, CGATE = 1000pF, (Note 3, 4) tOFF Turn-OFF Time tSC Short-Circuit Turn-OFF Time The q denotes specifications which apply over the full operating temperature range. Note 1: Quiescent current OFF is for both channels in OFF condition. Note 2: Quiescent current ON is per driver and is measured independently. The gate voltage is clamped to 12V above the rail to simulate the effects of protection clamps connected across the GATE-SOURCE of the power MOSFET. Note 3: Zener diode clamps must be connected across the GATE-SOURCE of the power MOSFET to limit VGS. 1N5242A (through hole) or MMBZ5242A (surface mount) 12V Zener diodes are recommended. All Turn-ON and Turn-OFF tests are performed with a 12V Zener clamp in series with a small-signal diode connected between VS and the GATE output to simulate the effects of a 12V protection Zener clamp connected across the GATE-SOURCE of the power MOSFET. Note 4: Time for VGATE to drop below 1V. TYPICAL PERFOR A CE CHARACTERISTICS Standby Supply Current 50 45 40 VIN1 = VIN2 = 0V TA = 25°C SUPPLY CURRENT (mA) SUPPLY CURRENT (µA) 35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 1.2 1.0 0.8 0.6 0.4 0.2 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VGATE – VS (V) UW LTC1255 • TPC01 Supply Current per Driver (ON) 2.0 1.8 1.6 1.4 ONE INPUT = 0N OTHER INPUT = OFF TA = 25°C 20 18 16 14 12 10 8 6 4 2 0 Gate Voltage Above Supply VCLAMP = 12V 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 LTC1255 • TPC02 LTC1255 • TPC03 3 LTC1255 TYPICAL PERFOR A CE CHARACTERISTICS Input Threshold Voltage 2.4 125 DRAIN SENSE THRESHOLD VOLTAGE (V) 2.2 INPUT THRESHOLD VOLTAGE (V) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VON VOFF 110 105 100 95 90 85 80 75 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 GATE CLAMP CURRENT (µA) 2.0 Turn-ON Time 1000 900 800 TURN-OFF TIME (µs) CGATE = 1000pF TA = 25°C TURN-OFF TIME (µs) TURN-ON TIME (µs) 700 600 500 400 300 200 100 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VGS = 2V VGS = 5V Standby Supply Current 50 STANDBY SUPPLY CURRENT (µA) 45 40 35 30 25 20 15 10 5 0 –50 –25 VS = 18V VS = 24V VS = 10V SUPPLY CURRENT (mA) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 75 100 0 –50 VS = 18V VS = 10V –25 25 50 0 TEMPERATURE (°C) 75 100 VS = 24V INPUT THRESHOLD VOLTAGE (V) 25 50 0 TEMPERATURE (°C) 4 UW LTC1255 • TPC04 Drain Sense Threshold Voltage 50 TA = 25°C 120 115 Gate Clamp Current 45 40 35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VCLAMP = 12V TA = 25°C LTC1255 • TPC05 LTC1255 • TA06 Turn-OFF Time 50 45 40 35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 CGATE = 1000pF TIME FOR VGATE < 1V 50 45 40 35 30 25 20 15 10 5 0 Short-Circuit Turn-OFF Delay Time CGATE = 1000pF TIME FOR VGATE < 1V 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 LTC1255 • TA07 LTC1255 • TA08 LTC1255 • TA09 Supply Current per Channel (ON) 2.0 1.8 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 Input ON Threshold VS = 10V VS = 24V 0.4 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 LTC1255 • TA10 LTC1255 • TA11 LTC1255 • TA12 LTC1255 PI FU CTIO S Input Pin The LTC1255 input pin is active high and activates all of the protection and charge pump circuitry when switched ON. The LTC1255 logic and shutdown inputs are high impedance CMOS gates with ESD protection diodes to ground and supply and therefore should not be forced beyond the power supply rails. The input pin should be held low during the application of power to properly set the input latch. Gate Drive Pin The gate drive pin is either driven to ground when the switch is turned OFF or driven above the supply rail when the switch is turned ON. This pin is of relatively high impedance when driven above the rail (the equivalent of a few hundred kΩ). Care should be taken to minimize any loading of this pin by parasitic resistance to ground or supply. Supply Pin The supply pin of the LTC1255 serves two vital purposes. The first is obvious; it powers the input, gate drive, regulation and protection circuitry. The second purpose is less obvious; it provides a Kelvin connection to the top of the drain sense resistor for the internal 100mV reference. The LTC1255 is designed to be continuously powered so that the gate of the MOSFET is actively driven at all times. If it is necessary to remove power from the supply pin and then reapply it, the input pin should be cycled (low to high) a few milliseconds after the power is reapplied to reset the input latch and protection circuitry. Also, the input pin should be isolated from the controlling logic by a 10k resistor if there is a possibility that the input pin will be held high after the supply has been removed. Drain Sense Pin The drain sense pin is compared against the supply pin voltage. If the voltage at this pin is more than 100mV below the supply pin, the input latch will be reset and the MOSFET gate will be quickly discharged. Cycle the input to reset the short-circuit latch and turn the MOSFET back on. This pin is also a high impedance CMOS gate with ESD protection and therefore should not be forced outside of the power supply rails. To defeat the overcurrent protection, short the drain sense pin to the supply pin. Some loads, such as large supply capacitors, lamps or motors require high in-rush currents. An RC time delay can be added between the sense resistor and the drain sense pin to ensure that the drain sense circuitry does not false trigger during startup. This time constant can be set from a few microseconds to many seconds. However, very long delays may put the MOSFET at risk of being destroyed by a short-circuit condition (see Applications Information section). The supply pin of the LTC1255 should never be forced below ground as this may result in permanent damage to the device. A 100Ω resistor should be inserted in series with the ground pin if negative supply voltage transients are anticipated. OPERATIO The LTC1255 is a dual 24V MOSFET driver with built-in protection and gate charge pump. The LTC1255 consists of the following functional blocks: TTL and CMOS Compatible Inputs and Latches The LTC1255 inputs have been designed to accommodate a wide range of logic families. Both input thresh- U U U U olds are set at about 1.3V with approximately 100mV of hysteresis. A low standby current regulator provides continuous bias for the TTL-to-CMOS converter. The input/protection latch should be set after initial power-up, or after reapplication of power, by cycling the input low to high. 5 LTC1255 OPERATIO Internal Voltage Regulation The output of the TTL-to-CMOS converter drives two regulated supplies which power the low voltage CMOS logic and analog blocks. The regulator outputs are isolated from each other so that the noise generated by the charge pump logic is not coupled into the 100mV reference or the analog comparator. Gate Charge Pump Gate drive for the power MOSFET is produced by an adaptive charge pump circuit which generates a gate voltage substantially higher than the power supply voltage. The charge pump capacitors are included on-chip and therefore no external components are required to generate the gate drive. The charge pump is designed to drive a 12V Zener diode clamp connected across the gate and source of the MOSFET switch. BLOCK DIAGRA ANALOG SECTION VS LOW STANDBY CURRENT REGULATOR COMP 100mV REFERENCE 10µs DELAY ANALOG TTL-TO-CMOS CONVERTER INPUT GND 6 W U Drain Current Sense The LTC1255 is configured to sense the current flowing into the drain of the power MOSFET in a high-side application. An internal 100mV reference is compared to the drop across a sense resistor (typically 0.002Ω to 0.10Ω) in series with the drain lead. If the drop across this resistor exceeds the internal 100mV threshold, the input latch is reset and the gate is quickly discharged via a relatively large N-channel transistor. Controlled Gate Rise and Fall Times When the input is switched ON and OFF, the gate is charged by the internal charge pump and discharged in a controlled manner. The charge and discharge rates have been set to minimize RFI and EMI emissions in normal operation. If a short circuit or current overload condition is encountered, the gate is discharged very quickly (typically a few microseconds) by a large N-channel transistor. (One Channel) DRAIN SENSE GATE CHARGE AND DISCHARGE CONTROL LOGIC DIGITAL R ONE SHOT S INPUT LATCH OSCILLATOR AND CHARGE PUMP FAST/SLOW GATE CHARGE LOGIC LTC1255 • BD GATE VOLTAGE REGULATOR LTC1255 APPLICATIO S I FOR ATIO MOSFET AND LOAD PROTECTION The LTC1255 protects the power MOSFET switch by removing drive from the gate as soon as an overcurrent condition is detected. Resistive and inductive loads can be protected with no external time delay in series with the drain sense pin. Lamp loads, however, require that the overcurrent protection be delayed long enough to start the lamp but short enough to ensure the safety of the MOSFET. Resistive Loads Loads that are primarily resistive should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The drain sense circuitry has a built-in delay of approximately 10µs to eliminate false triggering by power supply or load transient conditions. This delay is sufficient to “mask” short load current transients and the starting of a small capacitor (< 1µF) in parallel with the load. The drain sense pin can therefore be connected directly to the drain current sense resistor as shown in Figure 1. 18V VS DS1 1/2 LTC1255 IN1 GND G1 12V IRFZ24 + 10µF RSENSE 0.036Ω CLOAD ≤ 1µF RLOAD 18Ω LTC1255 • F01 Figure 1. Protecting Resistive Loads Inductive Loads Loads that are primarily inductive, such as relays, solenoids and stepper motor windings, should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The built-in 10µs delay will ensure that the overcurrent protection is not false triggered by a supply or load transient. No external delay components are required as shown in Figure 2. IN1 U Large inductive loads (> 0.1mH) may require diodes connected directly across the inductor to safely divert the stored energy to ground. Many inductive loads have these diodes included. If not, a diode of the proper current rating should be connected across the load, as shown in Figure 2, to safely divert the stored energy. 12V VS DS1 1/2 LTC1255 IN1 GND G1 12V IRFZ24 W UU + 100µF RSENSE 0.036Ω 1N5400 12V, 1A SOLENOID LTC1255 • F02 Figure 2. Protecting Inductive Loads Capacitive Loads Large capacitive loads, such as complex electrical systems with large bypass capacitors, should be powered using the circuit shown in Figure 3. The gate drive to the power MOSFET is passed through an RC delay network, R1 and C1, which greatly reduces the turn-on ramp rate of the switch. And since the MOSFET source voltage follows the gate voltage, the load is powered smoothly and slowly from ground. This dramatically reduces the startup current flowing into the supply capacitor(s) which, in turn, reduces supply transients and allows for slower activation 15V VS DS1 1/2 LTC1255 G1 GND R1 100k R2 100k C1 0.33µF LTC1255 • F03 CDELAY 0.01µF RDELAY 100k D1 1N4148 + 470µF RSENSE 0.036Ω MTP3055E 12V + CLOAD 100µF Figure 3. Powering Large Capacitive Loads 7 LTC1255 APPLICATIO S I FOR ATIO of sensitive electrical loads. (Resistor R2, and the diode D1, provide a direct path for the LTC1255 protection circuitry to quickly discharge the gate in the event of an overcurrent condition.) The RC network, RDELAY and CDELAY, in series with the drain sense input should be set to trip based on the expected characteristics of the load after startup, i.e., with this circuit, it is possible to power a large capacitive load and still react quickly to an overcurrent condition. The ramp rate at the output of the switch as it lifts off ground is approximately: dV/dt = (VGATE – VTH)/(R1 × C1) Therefore, the current flowing into the capacitor during startup is approximately: ISTARTUP = CLOAD × dV/dt Using the values shown in Figure 3, the startup current is less than 100mA and does not false trigger the drain sense circuitry which is set at 2.7A with a 1ms delay. Lamp Loads The in-rush current created by a lamp during turn-on can be 10 to 20 times greater than the rated operating current. The circuit shown in Figure 4 shifts the current limit threshold up by a factor of 11:1 (to 30A) for a short period of time while the bulb is turned on. The current limit then drops down to 2.7A after the in-rush current has subsided. 12V 10k 100k VS DS1 1/2 LTC1255 IN1 GND G1 1M VN2222LL 0.1µF 9.1V 12V/1A BULB LTC1255 • F04 NORMALIZED DELAY TIME (1 = RC) + 470µF Figure 4. Lamp Driver With Delayed Protection 8 U Selecting RDELAY and CDELAY Figure 5 is a graph of normalized overcurrent shutdown time versus normalized MOSFET current. This graph is used to select the two delay components, RDELAY and CDELAY, which make up a simple RC delay between the drain sense input and the drain sense resistor. The Y axis of the graph is normalized to one RC time constant. The X axis is normalized to the set current. (The set current is defined as the current required to develop 100mV across the drain sense resistor.) Note that the shutdown time is shorter for increasing levels of MOSFET current. This ensures that the total energy dissipated by the MOSFET is always within the bounds established by the manufacturer for safe operation. (See MOSFET data sheet for further S.O.A. information.) 10 1 0.1 0.01 0.1 1 10 100 NORMALIZED MOSFET CURRENT (1 = SET CURRENT) LTC1255 • F05 W UU RSENSE 0.036Ω Figure 5. Normalized Delay Time vs MOSFET Current Using a Speed-Up Diode MTP3055EL Another way to reduce the amount of time that the power MOSFET is in a short-circuit condition is to “bypass” the delay resistor with a small signal diode as shown in Figure 6. The diode will engage when the drop across the drain sense resistor exceeds about 0.7V, providing a direct path to the sense pin and dramatically reducing the amount of time the MOSFET is in an overload condition. The drain sense resistor value is selected to limit the maximum DC current to 4A. LTC1255 APPLICATIO S I FOR ATIO 18V CDELAY 0.01µF RDELAY 100k DS1 1/2 LTC1255 IN1 GND G1 12V 1N4148 + 100µF VS LOAD LTC1255 • F06 Figure 6. Using a Speed-Up Diode Current Limited Power Supplies The LTC1255 requires at least 3.5V at the supply pin to ensure proper operation. It is therefore necessary that the supply to the LTC1255 be held higher than 3.5V at all times, even when the output of the switch is short circuited to ground. The output voltage of a current limited regulator may drop very quickly during short circuit and pull the supply pin of the LTC1255 below 3.5V before the shutdown circuitry has had time to respond and remove drive from the gate of the power MOSFET. A supply filter should be added as shown in Figure 7 which holds the supply pin of the LTC1255 high long enough for the overcurrent shutdown circuitry to respond and fully discharge the gate. Linear regulators with small output capacitors are the most difficult to protect as they can “switch” from a voltage mode to a current limited mode very quickly. 15V 12V/2A REGULATOR 10µF + + 10Ω* 0.01µF VS DS1 1/2 LTC1255 + 100k 10µF 47µF* 1N4148 IN1 GND G1 12V SHORT CIRCUIT LTC1255 • F07 *SUPPLY FILTER COMPONENT Figure 7. Supply Filter for Current Limited Supplies U RSENSE 0.036Ω W UU The large output capacitors on many switching regulators, on the other hand, may be able to hold the supply pin of the LTC1255 above 3.5V sufficiently long that this extra filtering is not required. Because the LTC1255 is micropower in both the standby and ON state, the voltage drop across the supply filter is very small (typically < 6mV) and does not significantly alter the accuracy of the drain sense threshold voltage which is typically 100mV. AUTOMOTIVE APPLICATIONS Reverse Battery Protection The LTC1255 can be protected against reverse battery conditions by connecting a resistor in series with the ground lead as shown in Figure 8. The resistor limits the supply current to less than 120mA with – 12V applied. Since the LTC1255 draws very little current while in normal operation, the drop across the ground resistor is minimal. The 5V µP (or controlling logic) is protected by the 10k resistors in series with the input. 14V 5V 28V VS µp OR CONTROL LOGIC DS1 1/2 LTC1255 10k IN1 GND G1 12V MTP12N06E IRF530 + 10µF RSENSE 0.036Ω 100Ω LTC1255 • F08 LOAD RSENSE 0.1Ω Figure 8. Reverse Battery Protection Transient Overvoltage Protection MTP12N06E A common scheme used to limit overvoltage transients on a 14V nominal automotive power bus is to clamp the supply to the module containing the high-side MOSFET switches with a large transient suppressor diode, D1 in Figure 9. This diode limits the supply voltage to 40V under worse case conditions. The LTC1255 is designed to survive short (10ms) 40V transients and return to normal operation after the transient has passed. 9 LTC1255 APPLICATIO S I FOR ATIO The switches can either be turned OFF by the controlling logic during these transients or latched OFF above 30V by holding the drain sense pin low as shown in Figure 9. Switch status can be ascertained by means of an XNOR gate connected to the input and switch output through 100k current limiting resistors (see Typical Applications section for more detail on this scheme). The switch is reset after the overvoltage event by cycling the input low and then high again. The power MOSFET switch should be selected to have a breakdown voltage sufficiently higher than the 40V supply clamp voltage to ensure that no current is conducted to the load during the transient. TYPICAL APPLICATIO S Dual Automotive High-Side Switch with Overvoltage Protection, XNOR Status and 12µA Standby Current 14V 0.036Ω 10k 10k** MTD3055E 12V MMBZ5242B 100k G1 LTC1255 G2 14V/1A SOLENOID 1N5400 1/4 74C266† FAULT FROM TO µP µP, ETC. 100Ω FROM FAULT µP, ETC. TO µP 1/4 74C266† TRUTH TABLE IN OUT CONDITION 0 0 SWITCH OFF 1 0 OVERCURRENT 0 1 OPEN LOAD** 1 1 SWITCH ON FAULT 1 0 0 1 10 U 14V W U U U + 1µF 50V VS DS1 1/2 LTC1255 D1 MR2535L 1k* RSENSE 0.036Ω FROM µP, ETC. 10k IN1 GND G1 IRF530 12V 1N5242B 100Ω 30V* 1N5256B LTC1255 • F09 LOAD *OPTIONAL OVERVOLTAGE (30V) LATCH-OFF COMPONENTS Figure 9. Overvoltage Transient Protection + 1µF 50V VS DS1 DS2 MR2535L* 0.036Ω 10k 100k IN1 GND 1N5400 IN2 12V MMBZ5242B MTD3055E 10k** 14V/1A SOLENOID LTC1255 • TA03 * LIMITS VS TRANSIENTS TO