LTC1433I

LTC1433/LTC1434 450mA, Low Noise Current Mode Step-Down DC/DC Converters DESCRIPTION The LTC®1433/LTC1434 are monolithic pulse width modulated step-down DC/DC converters. By utilizing current mode switching techniques, they provide excellent AC and DC load and line regulation. Both devices operate at a fixed frequency with the LTC1434 phase-lockable to an external clock signal. Both devices incorporate two internal P-channel power MOSFETs with a parallel combined resistance of 0.6Ω (at a supply of 10V). The Adaptive Power output stage selectively drives one or both of the switches at frequencies up to 700kHz to reduce switching losses and maintain high efficiencies at low output currents. The LTC1433/LTC1434 are capable of supplying up to 450mA of output current and boasts a ± 2.4% output voltage accuracy. An internal low-battery detector has the same level of accuracy as the output voltage. A power-on reset timer (POR) is included which generates a signal delayed by 65536/fCLK (300ms typ) after the output is within 5% of the regulated output voltage. Ideal for current sensitive applications, the devices draw only 470µA of quiescent current. In shutdown the devices draw a mere 15µA. To further maximize the life of the battery source, the internal P-channel MOSFET switch is turned on continuously in dropout. FEATURES s s s s s s s s s s s s High Efficiency: Up to 93% Constant Frequency Adaptive PowerTM Operation Input Voltage Range: 3V to 13.5V Internal 0.6Ω Power Switch (VIN = 10V) Low Dropout Operation: 100% Duty Cycle Low-Battery Detector Internal Power-On Reset Timer Current Mode Operation for Excellent Line and Load Transient Response Low Quiescent Current: 470µA Shutdown Mode Draws Only 15µA Supply Current ±1% Reference Accuracy Available in 16- and 20-Lead Narrow SSOP APPLICATIONS s s s s s s s Cellular Telephones Portable Instruments Wireless Modems RF Communications Distributed Power Systems Scanners Battery-Powered Equipment , LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power is a trademark of Linear Technology Corporation. TYPICAL APPLICATION D1 L1 100µH 1 2 3 4 5 6 0.1µF 7 8 SSW NC BSW NC 0.1µF 68µF** 20V 100 16 PWRVIN PGND 15 SVIN COSC POR ITH VOSENSE VPROG 14 13 12 11 10 9 6800pF D1: MOTOROLA MBRS130LT3 *AVX TPSD107M010R0100 ** AVX TPSE686M020R0150 L1: COILCRAFT D03316-104 1433/34 F01 VIN 3.5V TO 12V 90 + 100µF* 10V LTC1433 EFFICIENCY (%) VOUT 3.3V 10k 80 70 VIN = 9V 60 50 40 0.001 SGND RUN/SS LBO LBI POWER-ON RESET 5.1k 680pF 47pF Figure 1. High Efficiency Step-Down Converter U U U LTC1433 Efficiency for VOUT = 3.3V VIN = 5V VIN = 12V + 0.01 0.1 LOAD CURRENT (A) 1 1433/34 TA01 1 LTC1433/LTC1434 ABSOLUTE AXI U RATI GS (Voltages Referred to PGND Pin) Input Supply Voltage (PWRVIN, SVIN) ... 13.5V to – 0.3V DC Small Switch Current (SSW) ......................... 100mA Peak Small Switch Current (SSW) ..................... 300mA Small Switch Voltage (SSW) ................................(VIN + 0.3V) to (VIN – 13.5V) DC Large Switch Current (BSW) ....................... 600mA Peak Large Switch Current (BSW) .......................... 1.2A Large Switch Voltage (BSW) ................................(VIN + 0.3V) to (VIN – 13.5V) PLLIN, PLL LPF, ITH, COSC ........................2.7V to – 0.3V POR, LBO .................................................. 12V to – 0.3V LBI, VOSENSE ..............................................10V to – 0.3V PACKAGE/ORDER I FOR ATIO TOP VIEW SSW NC BSW NC SGND RUN/SS LBO LBI 1 2 3 4 5 6 7 8 16 PWRVIN 15 PGND 14 SVIN 13 COSC 12 POR 11 ITH 10 VOSENSE 9 VPROG ORDER PART NUMBER LTC1433CGN LTC1433IGN GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 125°C, θJA = 150°C/ W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS TA = 25°C, VIN = 10V, VRUN/SS = 5V, unless otherwise noted. (Notes 2, 3) SYMBOL IIN VOSENSE VOSENSE PARAMETER Feedback Current Regulated Output Voltage 1.19V (Adjustable) Selected 3.3V Selected 5V Selected Output Overvoltage Lockout Reference Voltage Line Regulation Output Voltage Load Regulation CONDITIONS VPROG Pin Open (Note 5) (Note 5) VPROG Pin Open VPROG = 0V VPROG = VIN VPROG Pin Open VIN = 3.6V to 13V (Note 5), VPROG Pin Open ITH Sinking 5µA (Note 5) ITH Sourcing 5µA (Note 5) q q q q q Main Control Loop 10 1.178 3.220 4.880 1.24 1.190 3.300 5.000 1.28 0.002 0.5 – 0.5 50 1.202 3.380 5.120 1.32 0.01 0.8 – 0.8 nA V V V V %/V % % VOVL ∆VOSENSE VLOADREG 2 U U W WW U W (Note 1) RUN/SS, VPROG Voltages VIN ≥ 11.7V ...........................................12V to – 0.3V VIN < 11.7V ............................... (VIN + 0.3V) to – 0.3V Commercial Temperature Range LTC1433C/LTC1434C .............................. 0°C to 70°C Extended Commercial Operating Temperature Range (Note 2) ....................................... – 40°C to 85°C Industrial Temperature Range (Note 3) LTC1433I/LTC1434I ........................... – 40°C to 85°C Junction Temperature (Note 4)............................. 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C TOP VIEW NC SSW NC BSW SGND NC RUN/SS NC LBO 1 2 3 4 5 6 7 8 9 20 PWRVIN 19 PGND 18 SVIN 17 PLLIN 16 PLL LPF 15 COSC 14 POR 13 ITH 12 VOSENSE 11 VPROG ORDER PART NUMBER LTC1434CGN LTC1434IGN LBI 10 GN PACKAGE 20-LEAD PLASTIC SSOP TJMAX = 125° C, θJA = 150°C/ W MIN TYP MAX UNITS LTC1433/LTC1434 ELECTRICAL CHARACTERISTICS TA = 25°C, VIN = 10V, VRUN/SS = 5V, unless otherwise noted. SYMBOL IPROG PARAMETER VPROG Input Current CONDITIONS 0.5V > VPROG VIN – 0.5V < VPROG < VIN (Note 6) 3.6V < VIN < 13V VRUN/SS = 0V, 3.6V < VIN < 13V, LBI > 0.9V VRUN/SS = 0V, 3.6V < VIN < 13V, LBI ≤ 0.48V q MIN TYP –4 4 MAX – 10 10 UNITS µA µA Main Control Loop IQ Input DC Supply Current Normal Mode Shutdown, Reference Alive Complete Shutdown RUN/SS Threshold Soft Start Current Source Oscillator Frequency VCO High PLL Input Resistance Phase Detector Output Current Sinking Capability Sourcing Capability POR Saturation Voltage POR Leakage POR Trip Voltage from Regulated Output POR Delay LBO Saturation Voltage LBO Leakage LBI Trip Voltage Low-Battery Comparator Hysteresis Low-Battery Shutdown Trip Point LBI Input Current RDS(ON) of Small FET RDS(ON) of Big FET Small FET Leakage Big FET Leakage VLBI = 1.19V ISSW = 15mA IBSW = 150mA VRUN/SS = 0V VRUN/SS = 0V q q 470 35 15 0.8 1.2 112 200 1.3 3 125 240 50 70 30 2 4.5 142 µA µA µA V µA kHz kHz kΩ VRUN/SS IRUN/SS fOSC RPLLIN IPLL LPF VRUN/SS = 0V COSC = 100pF (Note 7) VPLL LPF = 2.4V Oscillator and Phase-Locked Loop fPLLIN < fOSC fPLLIN > fOSC IPOR = 1.6mA, VOSENSE = 1V, VPROG Open VPOR = 10V, VOSENSE = 1.2V, VPROG Open VPROG Pin Open, VOSENSE Ramping Negative VPROG Pin Open ILBO = 1.6mA, VLBI = 1.1V VLBO = 10V, VLBI = 1.4V High to Low Transition on LBO 10 10 15 15 0.6 0.2 20 20 1.0 1.0 –4 µA µA V µA % Cycles Power-On Reset VSATPOR ILPOR VTRPOR tDPOR VSATLBO ILLBO VTRLBI VHYSTLB VSDLB IINLBI RSMFET RBIGFET ILSSW ILBSW – 11 – 7.5 65536 0.6 0.01 Low-Battery Comparator 1.0 1.0 1.22 V µA V mV V 50 4.1 1.2 1000 1000 nA Ω Ω nA nA 1.16 1.19 40 0.74 1 3.3 0.8 7 5 P-Channel Power FETs Characteristics The q denotes specifications which apply over the specified temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: C-grade device specifications are guaranteed over the 0°C to 70°C temperature range. In addition, C-grade device specifications are assured over the – 40°C to 85°C temperature range by design or correlation, but are not production tested. Note 3: I-grade device specifications are guaranteed over the – 40°C to 85°C temperature range by design, testing or correlation. Note 4: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: LTC1433/LTC1434: TJ = TA + (PD)(150°C/W) Note 5: The LTC1433/LTC1434 are tested in a feedback loop which servos VOSENSE to the feedback point for the error amplifier (VITH = 1.19V). Note 6: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 7: Oscillator frequency is tested by measuring the COSC charge and discharge currents and applying the formula: 8.4(10 8) 1 + 1 –1 fOSC (kHz) = C OSC (pF) + 11 ICHG IDIS ( )( ) 3 LTC1433/LTC1434 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency of Figure 1 for L = 22µH 100 VIN = 3.6V 90 460 480 SUPPLY CURRENT (µA) OUTPUT VOLTAGE (V) EFFICIENCY (%) 80 70 VIN = 5V VIN = 12V 60 50 40 0.001 VOUT = 3.3V L = 22µH CSOC = 47pF 0.01 0.1 LOAD CURRENT (A) 1 1433/34 G01 Dropout Characteristics at Different Load Currents (VOUT = 5V) 5.1 800 MAXIMUM OUTPUT CURRENT (mA) 5.0 4.9 OUTPUT VOLTAGE (V) REFERENCE VOLTAGE (V) IOUT 200mA IOUT 400mA IOUT 300mA 4.8 4.7 4.6 4.5 4.4 4.3 4.2 4.6 4.8 VPROG = VIN L = 20µH COSC = 50pF 5.0 5.2 5.4 5.6 5.8 SUPPLY VOLTAGE (V) 6.0 6.2 Switch Resistance of Small FET 8 7 RDS(ON) OF SMALL FET (Ω) RDS(ON) OF BIG FET (Ω) 6 5 4 3 2 1 0 TA = 0°C TA = 25°C TA = 70°C 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 3 4 5 6 7 8 9 10 11 12 13 SUPPLY VOLTAGE (V) 1433/34 G07 SWITCH LEAKAGE AT SSW PIN (nA) 4 UW 1433/34 G04 Supply Current vs Supply Voltage 3.4 3.3 Dropout Characteristics at Different Load Currents (VOUT = 3.3V) IOUT 3.2 300mA 3.1 3.0 2.9 2.8 2.7 2.6 2.5 IOUT 400mA IOUT 500mA VPROG = 0V L = 20µH COSC = 50pF 440 420 400 380 360 3 4 8 9 6 5 7 SUPPLY VOLTAGE (V) 10 11 2.4 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 SUPPLY VOLTAGE (V) 1433/34 G03 1433/34 G02 Maximum Output Current vs Input Supply 1.202 L = 22µH COSC = 50pF VOUT 3.3V 1.198 1.194 1.190 1.186 1.182 1.178 1.174 3 5 9 11 7 SUPPLY VOLTAGE (V) 13 1433/34 G05 Reference Voltage vs Temperature 700 600 500 400 300 200 VOUT 5V 1.170 – 45 – 25 –5 15 35 55 75 TEMPERATURE (°C) 95 115 1433/34 G06 Switch Resistance of Big FET 70 60 50 40 30 20 10 0 Switch Leakage Current vs Temperature 280 VIN = 13.5V SWITCH LEAKAGE AT BSW PIN (nA) 240 200 160 120 80 SSW PIN BSW PIN 40 0 140 TA = 25°C TA = 70°C TA = 0°C 0 3 4 5 6 7 8 9 10 11 12 13 SUPPLY VOLTAGE (V) 1433/34 G08 0 20 80 60 100 40 TEMPERATURE (°C) 120 1433/34 G09 LTC1433/LTC1434 PIN FUNCTIONS SSW (Pin 1/Pin 2): Drain of the Small P-Channel MOSFET Switch. BSW (Pin 3/Pin 4): Drain of the Large P-Channel MOSFET Switch. SGND (Pin 5): Small-Signal Ground. Must be routed separately from other grounds to the (–) terminal of COUT. RUN/SS (Pin 6/Pin 7): Combination of Soft Start and Run Control Inputs. A capacitor to ground at this pin sets the ramp time to full current output. The time is approximately 0.5s/µF. Forcing this pin below 1.3V causes all circuitry to be shut down except the low-battery comparator. For input voltages above 6V this pin is clamped by a 6V Zener (see Functional Diagram). Applying voltages greater than 6V to this pin will cause additional current to flow into this pin. LBO (Pin 7/Pin 9): Open-Drain Output of an N-Channel Pull-Down. This pin will sink current when LBI goes below 1.19V. LBI (Pin 8/Pin 10): The (+) Input of the Low-Battery Voltage Comparator. The (–) input is connected to the 1.19V reference. When LBI is grounded along with RUN/ SS, this comparator will shut down along with the rest of the control circuitry. LBO will go to high impedance. VPROG (Pin 9/Pin 11): The voltage at this pin selects the output voltage. When VPROG = 0V or VPROG = VIN, the output is set to 3.3V and 5V respectively, with VOSENSE connected to the output. Leaving VPROG open (DC) allows the output voltage to be set by an external resistive divider. VOSENSE is then connected to the common node of the resistive divider. VOSENSE (Pin 10/Pin 12): This pin receives the feedback voltage either from the output or from an external resistive divider across the output. The VPROG pin determines at which point VOSENSE must be connected. VPROG = 0V VPROG = VIN VPROG = Open (DC) VOUT = 3.3V VOUT = 5V VOUT = Adjustable U U U (LTC1433/LTC1434) ITH (Pin 11/Pin 13): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is 0V to 2.4V. POR (Pin 12/Pin 14): Open-Drain Output of an N-Channel Pull-Down. This pin sinks current when the output voltage is 7.5% out of regulation. When the output rises to – 5% of its regulated value, the pin goes into high impedance after 216 (65536) oscillator cycles. The POR output is asserted when the device is in shutdown, independent of VOUT. COSC (Pin 13/Pin 15): External capacitor connects between this pin and ground to set the operating frequency. PLL LPF (Pin 16 LTC1434): Output of the Phase Detector and Control Input of the Oscillator. Normally a series RC lowpass network is connected from this pin to ground. Tie this pin to SGND in applications which do not use the phase-locked loop. Can be driven by a 0V to 2.4V logic signal for a frequency shifting option. PLLIN (Pin 17 LTC1434): External Synchronizing Input to the Phase Detector. This pin is internally terminated to SGND with 50kΩ. Tie this pin to SGND in applications which do not use the phase-locked loop. SVIN (Pin 14/Pin 18): Main Supply for All the Control Circuitry. PGND (Pin 15/Pin 19): Switch Driver Ground. Connects to the (–) terminal of CIN. Anode of the Schottky diode must be connected close to this pin. PWRVIN (Pin 16/Pin 20): Supply for the Internal Power MOSFETs and Switch Drivers. Must decouple this pin properly to ground. NC (Pins 2, 4,/Pins 1, 3, 6, 8): No Connection. 5 LTC1433/LTC1434 FUNCTIONAL DIAGRA POR PLL LPF COSC LBO + LOBAT LBI VREF – 0.6V SVIN ITH + GM 180k VREF IPEAK DET POR – + OVDET RUN/SS SHDN + 6V – SHDN VREF + 89mV VSET ICOMP – PGND SHDN SVIN REF AND VCC VREF (1.19V) VCC SGND OPERATION Main Control Loop (Refer to Functional Diagram) The LTC1433/LTC1434 is a constant frequency, pulsewidth modulated current mode switching regulator. During normal operation, the internal P-channel power MOSFET is turned on each cycle when the oscillator sets the RS latch FF3, and turned off when the main current comparator ICOMP resets the latch. The peak inductor current at which the ICOMP resets the RS latch is controlled by the voltage on the ITH pin , which is the output of error amplifier GM. Pins VPROG and VOSENSE, described in the Pin Functions section, allow GM to receive an output feedback voltage VFB from either the internal or external resistive dividers. When the load current increases, it causes a slight decrease in VFB relative to the 1.19V reference, which in turn causes the ITH voltage to increase until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN/SS pin low. Releasing RUN/SS allows an internal 3µA current source to charge up the soft start capacitor CSS. When CSS reaches 1.3V, the main control loop is enabled with the ITH voltage clamped at approximately 30% of its maximum value. As CSS continues to charge, ITH is gradually released allowing normal operation to resume. Comparator OVDET guards against transient overshoots > 7.5% by turning off the P-channel power MOSFETs and keeping them off until the fault is removed. Low Current Operation The LTC1433/LTC1434 have two internal P-channel MOSFETs sized for low and high load current conditions. At low load current, only the small MOSFET will be turned on while at high load current both MOSFETs will be on. 6 – 30k SB Q FF3 RB Q – + + W PLL 50k SLOPE COMP VCO OSC CK Q FF1 D Q RSENSE 0.143Ω PLLIN PWRVIN FREQ SHIFT BSW SSW U U U + LIDET – SB Q FF2 RB Q 12mV VOLTAGE SELECT VPROG 120k 60k 240k 60k VOSENSE 1433/34 FD LTC1433/LTC1434 OPERATION Having only the small MOSFET on with low load current reduces switching and gate charge losses, hence boosting efficiency. For the device to go into low current mode, two conditions must be satisfied: the peak current of the inductor should not exceed 260mA and the voltage at the ITH pin should not exceed 0.6V. When either one of the conditions is exceeded, the big MOSFET will be turned on at the next clock cycle. Dropout Operation When the input supply voltage decreases toward the output voltage, the rate of change of inductor current during the on cycle decreases. This reduction means that the P-channel MOSFETs will remain on for more than one oscillator cycle since the ICOMP is not tripped. Further reduction in input supply voltage will eventually cause the P-channel MOSFET to be turned on 100%, i.e., DC. The output voltage will then be determined by the input voltage minus the voltage drop across the MOSFETs. Typically under dropout, both the power MOSFETs are on since the voltage on the ITH pin is greater than 0.6V. Frequency Synchronization A phase-locked loop (PLL) is available on the LTC1434 to allow the oscillator to be synchronized to an external APPLICATIONS INFORMATION The basic LTC1434 application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of COSC and L. Next, the Schottky diode D1 is selected followed by CIN and COUT. COSC Selection for Operating Frequency The LTC1433/LTC1434 use a constant frequency architecture with the frequency determined by an external oscillator capacitor COSC. During the on-time, COSC is charged by a fixed current plus an additional current which is proportional to the output voltage of the phase detector (VPLL LPF on LTC1434). When the voltage on the COSC capacitor reaches 1.19V, it is reset to ground. The process then repeats. The value of COSC is calculated from the desired operating frequency. Assume the phase-locked loop has no external oscillator input, i.e. VPLL LPF = 0V.   4  1.37  10  COSC pF =   Frequency kHz  U W U U U (Refer to Functional Diagram) source connected to the PLLIN pin. The output of the phase detector at the PLL LPF pin is also the control input of the oscillator, which operates over a 0V to 2.4V range corresponding to – 30% to + 30% in the oscillator’s center frequency. When locked, the PLL aligns the turn-on of the MOSFETs to the rising edge of the synchronizing signal. When the PLLIN is left open, PLL LPF goes low, forcing the oscillator to minimum frequency. Power-On Reset The POR pin is an open-drain output which pulls low when the regulator is out of regulation. When the output voltage rises to within 5% of regulation, a timer is started which releases POR after 216 (65536) oscillator cycles. In shutdown the POR output is pulled low. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator will be reduced to about 1/4.5 of its designed rate. This low frequency allows the inductor current to discharge, thereby preventing runaway. The oscillator’s frequency will gradually increase to its designed rate when the output voltage increases above 0.65V. () ()    – 11   A graph for selecting COSC vs Frequency is given in Figure 2. For the LTC1433, the expression above is also applicable since its oscillator is internally set up to run at a condition equal to VPLL LPF = 0V. Therefore when using the graph for determining the capacitance value for the oscillator frequency, the VPLL LPF = 0V curve should be used for LTC1433. 7 LTC1433/LTC1434 APPLICATIONS INFORMATION 700 600 VPLLLPF = 2.5V FREQUENCY (kHz) 500 400 300 VPLLLPF = 1.19V 200 100 0 0 50 100 150 CAPACITANCE ON COSC PIN (pF) 200 VPLLLPF = 0V 1433/34 F02 Figure 2. Selecting COSC for Oscillator Frequency As the operating frequency is increased the gate charge losses will be higher, reducing efficiency. The maximum recommended switching frequency is 700kHz. When using Figure 2 for synchronizable applications, the value of COSC is selected corresponding to a frequency 30% below your center frequency (see Phase-Locked Loop and Frequency Synchronization). Low Supply Operation The LTC1433/LTC1434 can function down to 3V and the maximum allowable output current is also reduced at low input voltages. Figure 3 shows the amount of change as the supply is reduced down to 2.5V. The minimum guaranteed input supply is 3V. 100 MAXIMUM OUTPUT CURRENT (%) 90 80 NOT RECOMMENDED 70 60 50 4.0 3.0 3.5 SUPPLY VOLTAGE (V) 2.5 1433/34 F03 Figure 3. Maximum Allowable Output Current vs Supply Voltage Another important point to note is that at a low supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the 8 U W U U LTC1433/LTC1434 are used at 100% duty cycle with low input voltages. Inductor Value Calculation The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use of a smaller inductor for the same amount of inductor ripple current. However, this is at the expense of efficiency due to an increase in MOSFET gate charge losses. The inductor value has a direct effect on ripple current. The ripple current ∆IL decreases with higher inductance or frequency and increases with higher VIN or VOUT: ∆IL = V  1 VOUT  1– OUT  VIN   ( f)(L) Core losses are dependent on the peak-to-peak ripple current and core material. Hence, by choosing a larger inductance the peak-to-peak inductor ripple current will decrease, therefore decreasing core loss. To further reduce losses, low core loss material such as molypermalloy or Kool Mµ® can be chosen as the inductor core material. An indirect way that the inductor affects efficiency is through the usage of the big P-channel at low load currents. Lower inductance values will result in high peak inductor current. Because one of the conditions that determines the turning on of the large P-channel is peak current, this will result in the usage of the large P-channel even though the load current is low. Hence, efficiency at low load current will be affected. See Efficiency Considerations. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or Kool Mµ cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Kool Mµ is a registered trademark of Magnetics, Inc. LTC1433/LTC1434 APPLICATIONS INFORMATION Ferrite designs have very low core loss and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manufacturer is Kool Mµ . Toroids are very space efficient, especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. However, designs for surface mount are available which do not increase the height significantly. Catch Diode Selection The catch diode carries load current during the off-time. The average diode current is therefore dependent on the P-channel switch duty cycle. At high input voltages the diode conducts most of the time. As VIN approaches VOUT the diode conducts only a small fraction of the time. The most stressful condition for the diode is when the output is short circuited. Under this condition the diode must safely handle IPEAK at close to 100% duty cycle. A fast switching diode must also be used to optimize efficiency. Schottky diodes are a good choice for low forward drop and fast switching times. Most LTC1433/LTC1434 circuits will be well served by either a 1N5818, an MBRS130LT3 or an MBRM5819 Schottky diode. CIN and COUT Selection In continuous mode, the source current of the P-channel MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN required IRMS ≈ IMAX [V (V OUT IN − VOUT VIN This formula has a maximum at VIN = 2VOUT, where U W U U IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically once the ESR requirement is satisfied the capacitance is adequate for filtering. The output ripple (∆VOUT) is determined by:  1 ∆VOUT ≈ ∆IL ESR + 4fCOUT    where f = operating frequency, COUT = output capacitance and ∆IL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ∆IL increases with input voltage. For the LTC1433/LTC1434, the general rule for proper operation is: COUT required ESR < 0.25Ω Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance through-hole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR/size ratio of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. In surface mount applications multiple capacitors may have to be paralleled to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. Other capacitor types include Sanyo OS-CON, Nichicon PL series and Panasonic SP series. Consult the manufacturer for other specific recommendations. )] 1/ 2 9 LTC1433/LTC1434 APPLICATIONS INFORMATION Efficiency Considerations Since there are two separate pins for the drain of the small and large P-channel switch, we could utilize two inductors to further enhance the efficiency of the regulator over the low load current range. Figure 4 shows the circuit connection.(Also refer to the Typical Applications section.) L1 BSW LTC1433/ LTC1434 SSW D2 1433/34 F04 D1 L2 Figure 4. Using Two Inductors for Higher Low Current Efficiency To reduce core losses, the user can use a higher value inductor on the small P-channel switch. Since this switch only carries a small part of the overall current, the user can still use a small physical size inductor without sacrificing on copper losses. The Schottky diode can also be chosen with a lower current rating. For the graph in Figure 5, a Coilcraft DT1608C series inductor is used along with a MBRS0520LT3 Schottky diode on the SSW pin. As can be seen from Figure 5, the average efficiency gain over the region where the small P-channel is on is about 3%. 100 90 EFFICIENCY (%) VOUT = 3.3V COSC = 47pF VIN = 5V 80 70 60 50 40 0.001 VIN = 9V ONE 22µH INDUCTOR ON SSW AND BSW 100µH ON SSW 22µH ON BSW 0.01 0.1 LOAD CURRENT (A) 1 1433/34 • F05 Figure 5. Efficiency Comparison Between Single Inductor and Dual Inductor 10 U W U U Hence, the dual inductor configuration is good for the user who requires as high an efficiency as possible at low load while retaining constant frequency operation. Output Voltage Programming The LTC1433/LTC1434 family all have pin selectable output voltage programming. The output voltage is selected by the VPROG pin as follows: VPROG = 0V VPROG = VIN VPROG = Open (DC) VOUT = 3.3V VOUT = 5V VOUT = Adjustable The LTC1433/LTC1434 family also has remote output voltage sense capability. The top of the internal resistive divider is internally connected to VOSENSE. For fixed output voltage applications, the VOSENSE pin is connected to the output voltage as shown in Figure 6. When using an external resistive divider, the VPROG pin is left open DC and the VOSENSE pin is connected to the feedback resistors as shown in Figure 7. To prevent stray pickup, a 100pF capacitor is suggested across R1 located close to the LTC1433/LTC1434. VPROG LTC1433/ VOSENSE LTC1434 SGND 1433/34 F06 GND: VOUT = 3.3V VIN: VOUT = 5V + COUT VOUT Figure 6. LTC1433/LTC1434 Fixed Output Applications VOUT VPROG LTC1433/ VOSENSE LTC1434 SGND OPEN (DC) R2 100pF R1 VOUT = 1.19V 1 + () R2 R1 1433/34 F07 Figure 7. LTC1433/LTC1434 Adjustable Applications LTC1433/LTC1434 APPLICATIONS INFORMATION Power-On Reset Function (POR) The power-on reset function monitors the output voltage and turns on an open-drain device when it is out of regulation. An external pull-up resistor is required on the POR pin. When power is first applied or when coming out of shutdown, the POR output is pulled to ground. When the output voltage rises above a level which is 5% below the regulated output value, an internal counter starts. After counting 216 (65536) clock cycles the POR pull-down device turns off. The POR output will go low whenever the output voltage drops below 7.5% of its regulated value for longer than approximately 30µs, signaling an out-of-regulation condition. In shutdown the POR output is pulled low even if the regulator’s output is held up by an external source. Run/Soft Start Function The RUN/SS pin is a dual purpose pin which provides the soft start function and a means to shut down the LTC1433/ LTC1434. Soft start reduces input surge currents by providing a gradual ramp-up of the internal current limit. Power supply sequencing can also be accomplished using this pin. An internal 3µA current source charges up an external capacitor CSS. When the voltage on RUN/SS reaches 1.3V the LTC1433/LTC1434 begins operating. As the voltage on RUN/SS continues to ramp from 1.3V to 2.4V the internal current limit is also ramped at a proportional linear rate. The current limit begins at approximately 350mA (at VRUN/SS = 1.3V) and ends at 1.2A (VRUN/SS = 2.4V). The output voltage thus ramps up slowly, charging the output capacitor while input surge currents are reduced. If RUN/SS has been pulled all the way to ground there is a delay of approximately 0.5s/µF before starting, followed by a like time to reach full current. tDELAY = 5(105)CSS seconds By pulling the RUN/SS pin below 1.3V, the LTC1433/ LTC1434 are put in low current shutdown. This pin can be driven directly from logic as shown in Figure 8. Diode D1 in Figure 8 reduces the start delay but allows CSS to ramp up slowly providing the soft start function. This diode can be deleted if soft start is not needed. The RUN/SS pin has an internal 6V Zener clamping the voltage on this pin (see Functional Diagram). RUN/SS D1 RUN/SS U W U U CSS CSS 1433/34 F08 Figure 8. RUN/SS Pin Interfacing Phase-Locked Loop and Frequency Synchronization The LTC1434 has an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop. This allows the MOSFET turn-on to be locked to the rising edge of an external source. The frequency range of the voltage-controlled oscillator is ± 30% around the center frequency fO. The value of COSC is calculated from the desired operating frequency (fO) with the following expression (assuming the phase-locked loop is locked, i.e VPLL LPF = 1.19V):   4  2.06  10  COSC pF =   Frequency kHz  () ()    – 11   Instead of using the above expression, Figure 2 graphically shows the relationship between the oscillator frequency and the value of COSC under various voltage conditions at the PLL LPF pin. The phase detector used is an edge sensitive digital type which provides zero degrees phase shift between the external and internal oscillators. This type of phase detector will not lock up on input frequencies close to the harmonics of the VCO center frequency. The PLL hold-in range ∆ fH is equal to the capture range, ∆fH = ∆fC = ± 0.3fO. The output of the phase detector is a pair of complementary current sources charging or discharging the external filter network on the PLL LPF pin. The relationship between the voltage on the PLL LPF pin and operating frequency is shown in Figure 9. A simplified block diagram is shown in Figure 10. 11 LTC1433/LTC1434 APPLICATIONS INFORMATION 1.3fO FREQUENCY (kHz) fO 0.7fO 0 0.5 1.0 1.5 VPLLLPF (V) 2.0 2.5 1433/34 F09 Figure 9. Relationship Between Oscillator Frequency and Voltage at PLL LPF Pin EXTERNAL FREQUENCY 2.4V PHASE DETECTOR PLLIN PLL LPF CLP RLP 50k DIGITAL PHASE/ FREQUENCY DETECTOR OSC 1433/34 F10 Figure 10. Phase-Locked Loop Block Diagram If the external frequency (VPLLIN) is greater than the center frequency f0, current is sourced continuously, pulling up the PLL LPF pin. When the external frequency is less than f0, current is sunk continuously, pulling down the PLL LPF pin. If the external and internal frequencies are the same but exhibit a phase difference, the current sources turn on for an amount of time corresponding to the phase difference. Thus the voltage on the PLL LPF pin is adjusted until the phase and frequency of the external and internal oscillators are identical. At this stable operating point the phase comparator output is open and the filter capacitor CLP holds the voltage. The loop filter components CLP and RLP smooth out the current pulses from the phase detector and provide a 12 U W U U stable input to the voltage controlled oscillator. The filter components CLP and RLP determine how fast the loop acquires lock. Typically RLP = 10k and CLP is 0.01µF to 0.1µF. Be sure to connect the low side of the filter to SGND. The PLL LPF pin can be driven with external logic to obtain a 1:1.9 frequency shift. The circuit shown in Figure 11 will provide a frequency shift from fO to 1.9fO as the voltage VPLL LPF increases from 0V to 2.4V. Do not exceed 2.4V on VPLL LPF. 3.3V OR 5V PLL LPF 2.4V MAX 18k 1433/34 F11 Figure 11. Directly Driving PLL LPF Pin COSC Low-Battery Comparator COSC The LTC1433/LTC1434 have an on-chip, low-battery comparator which can be used to sense a low-battery condition when implemented as shown in Figure 12. The resistor divider R3/R4 sets the comparator trip point as follows:  R4  VLBTRIP = 1.19  +1   R3  VIN R4 LTC1433/LTC1434 – R3 + 1.19V REFERENCE 1433/34 F12 Figure 12. Low-Battery Comparator The divided down voltage at the negative (–) input to the comparator is compared to an internal 1.19V reference. A 40mV hysteresis is built in to assure rapid switching. The output is an open-drain MOSFET and requires a pull-up resistor to operate. This comparator is active in shutdown. To save more shutdown quiescent current, this comparator can be shut down by taking the LBI pin below 0.74V, LTC1433/LTC1434 APPLICATIONS INFORMATION further reducing the current to 15µA. The low side of the resistive divider should connect to SGND. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1433/LTC1434. These items are also illustrated graphically in the layout diagram of Figure 13. Check the following in your layout: 1. Are the signal and power grounds segregated? The LTC1433/LTC1434 signal ground pin must return to the (–) plate of COUT. The power ground returns to the anode of the Schottky diode and the (–) plate of CIN, which should have as short lead lengths as possible. 2. Does the LTC1433/LTC1434 VOSENSE pin connect to the (+) plate of COUT? In adjustable applications, the resistive divider R1/R2 must be connected between the (+) plate of COUT and signal ground. 3. Does the (+) plate of CIN connect to the power VIN as close as possible? This capacitor provides the AC current to the internal P-channel MOSFETs and their drivers. 4. Is the Schottky diode closely connected between the power ground and switch pin? 5. Keep the switching nodes, SSW and BSW away from sensitive small-signal nodes VOSENSE, PLLIN, PLL LPF, COSC, ITH and LBI. Design Example As a design example, assume VIN = 6V, VOUT = 5V, IMAX = 400mA and fOSC = 200kHz. With these requirements we can start choosing all of the important components. With no frequency synchronization required, the LTC1433 can be used for this circuit. From Figure 2, the VPLL LPF = 0V curve is used to determine the value of the oscillator capacitor. From the graph a value of 50pF will provide the desired frequency. Next the inductor value is selected. From the Maximum Output Current vs Input Supply graph in the Typical Performance Characteristics section, a value of L = 22µH would be able to meet the requirement for the output load current. For the catch diode, a MBRS130LT3 is selected. OUTPUT DIVIDER REQUIRED WITH ADJUSTABLE VERSION ONLY. CONNECT VOSENSE TO VOUT FOR FIXED OUTPUT VOLTAGE L1 VOUT COUT + BOLD LINES INDICATE HIGH CURRENT PATHS Figure 13. LTC1434 Layout Diagram (See Board Layout Check List) U W U U 0.1µF D1 CIN + 1 2 3 4 5 6 CSS 7 8 9 10 NC SSW NC BSW SGND NC RUN/SS NC LBO LBI 20 PWRVIN PGND 19 LTC1434 SVIN 18 17 16 15 14 13 12 11 COSC PLLIN PLL LPF COSC POR ITH VOSENSE VPROG 1433/34 F13 13 LTC1433/LTC1434 APPLICATIONS INFORMATION CIN will require an RMS current rating of at least 0.2A at temperature and COUT will require an ESR of less than 0.25Ω. In most of the applications, the requirements for these capacitors are fairly similar. Figure 14 shows the complete circuit along with its efficiency curve. Latchup Prevention (Figure 15) In applications where the input supply can momentarily dip below the output voltage, it is recommended that a Schottky diode (D2) be connected from VOUT to VIN. This diode will prevent the output capacitor from forward biasing the parasitic diode of the internal monolithic power MOSFET, preventing a large amount of current from flowing into the substrate to create a potential latchup condition. D1: MBRS130LT3 L1: SUMIDA CD54-220 * AVX TPSD107M010R0100 D1 L1 22µH 0.1µF 1 2 3 4 5 6 SSW NC BSW NC 16 PWRVIN PGND 15 SVIN COSC POR ITH VOSENSE VPROG 14 13 12 11 10 9 VIN 6V 10k EFFICIENCY (%) VOUT 5V 400mA + 100µF* 10V LTC1433 SGND RUN/SS LBO LBI 0.1µF 7 8 Figure 14. Design Example Circuit and its Efficiency Curve LTC1434 14 U W U U 100µF* 10V 100 90 80 70 60 50 VIN = 6V VOUT = 5V COSC = 50pF L = 22µH + POWER-ON RESET 5.1k 680pF 50pF 6800pF VIN D2 SW D1 L 40 0.001 0.01 0.1 LOAD CURRENT (A) 1 1433/34 F14 + VOUT COUT 1433/34 F15 Figure 15 LTC1433/LTC1434 TYPICAL APPLICATIONS N L1 100µH L2 22µH VOUT D1 + 100µF* 10V *AVX TPSD107M010R0100 D1: MOTOROLA MBRS0520LT3 ** AVX TPSE686M020R0150 D2: MOTOROLA MBRS130LT3 L1: COILCRAFT DT1608C SERIES L2: SUMIDA CD54 SERIES L1 68µH + 100µF* 10V D1 VOUT –5V 0.01µF D1: MOTOROLA MBRS130LT3 L1: COILCRAFT DO3316 SERIES U Highest Efficiency 3.3V/5V Converter D2 1 2 3 4 5 6 SSW NC BSW NC PWRVIN PGND LTC1433 SVIN COSC POR ITH VOSENSE VPROG 16 15 14 13 12 11 10 9 VPROG = 0V, VOUT = 3.3V VPROG = VIN, VOUT = 5V POWER-ON RESET 5.1k 6800pF 100pF 100k + 68µF** 20V 0.1µF VIN 3.5V TO 12.5V FOR VOUT = 3.3V 6V TO 12.5V FOR VOUT = 5V SGND RUN/SS LBO LBI 0.1µF 7 8 680pF 1433/34 TA02 Positive-to-Negative – 5V Converter 1 2 3 4 5 6 7 8 SSW NC BSW NC PWRVIN PGND LTC1433 SVIN COSC POR ITH VOSENSE VPROG 16 15 14 13 12 11 10 9 680pF 5.1k 1433/34 TA03 + 100pF 100µF** 16V VIN 3.5V TO 7.5V 0.1µF SGND RUN/SS LBO LBI 6800pF VIN (V) IOUT(MAX) (mA) 3.0 4.0 5.0 6.0 7.0 7.5 180 240 290 340 410 420 *AVX TPSD107M010R0100 ** AVX TPSE107M016R0100 15 LTC1433/LTC1434 TYPICAL APPLICATIONS N U + Negative Boost Converter + + 100µF* L1 100µH 16V 100µF* 16V VOUT –9V 68µF** 20V D1 1 2 3 SSW NC BSW NC 0.1µF 310k 1% 16 15 14 13 12 11 10 9 1433/34 TA05 VIN – 3V TO – 7V PWRVIN PGND LTC1433 SVIN COSC POR ITH VOSENSE VPROG 100pF 50k 1% VIN (V) IOUT(MAX) (mA) –3 –4 –5 –6 –7 180 300 400 540 680 100pF 4 5 6 0.1µF 7 8 SGND RUN/SS LBO LBI 6800pF 5.1k 680pF D1: MOTOROLA MBRS130LT3 L1: COILCRAFT DO3316 SERIES *AVX TPSE107M016R0100 ** AVX TPSE686M020R0150 Ultralow Output Ripple 5V to – 1.25V MR Head Amplifier Supply 100µF* 10V 0.1µF D1: MOTOROLA MBRM5819 L1: SUMIDA CD54 SERIES L2: J.W. MILLER PM20-R33M * AVX TPSD107M010R0100 L1 22µH + 1 2 3 D1 4 5 6 0.1µF 7 8 SSW NC BSW NC PWRVIN PGND LTC1433 SVIN COSC POR ITH VOSENSE VPROG 16 15 14 13 12 11 10 9 VIN 5V 10k + VOUT –1.25V 280mA 100µF* L2 0.33µH 10V + 100µF* 10V 23.8k 1% SGND RUN/SS LBO LBI POWER-ON RESET 5.1k 680pF 100pF 6800pF 1433/34 TA04 100pF 1.2k 1% 16 LTC1433/LTC1434 TYPICAL APPLICATIONS N U • 9V to 12V, – 12V Outputs D1 L1B 100µH VOUT 12V 301k 1% VOUT –12V 47µF** 1N914 L1A 100µH 1 2 3 SSW NC BSW NC PWRVIN PGND LTC1433 SVIN COSC POR ITH VOSENSE VPROG 16 15 14 13 12 11 10 9 6800pF 680pF POWER-ON RESET 1k 50pF 100k + • 68µF* 20V VIN 4.5V TO 12.5V 0.1µF + Si6447DQ D2 4 5 6 68µF* 20V SGND RUN/SS LBO LBI 100k 96k *AVX TPSE686M020R0150 ** WIMA MKS2 L1B 3 2 TOP VIEW 4 1• L1B D1, D2: MOTOROLA MBRS130LT3 L1A, L1B: MANUFACTURER COILTRONICS DALE PART NO. CTX100-4 LPT4545-101LA + 34k 1% 100pF 68µF* 20V 0.1µF 30k 7 8 LOW-BATTERY TRIP AT VIN = 5V 1433/34 TA07 L1A EACH OUTPUT VIN (V) IOUT(MAX) (mA) 4.5 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 12.5 50 60 70 100 110 130 145 160 200 205 L1A 17 LTC1433/LTC1434 PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. GN Package 16-Lead Plastic SSOP (Narrow 0.150) (LTC DWG # 05-08-1641) 0.189 – 0.196* (4.801 – 4.978) 16 15 14 13 12 11 10 9 0.009 (0.229) REF 0.229 – 0.244 (5.817 – 6.198) 0.150 – 0.157** (3.810 – 3.988) 1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0.007 – 0.0098 (0.178 – 0.249) 0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0° – 8° TYP 0.053 – 0.068 (1.351 – 1.727) 23 4 56 7 8 0.004 – 0.0098 (0.102 – 0.249) 0.008 – 0.012 (0.203 – 0.305) 0.025 (0.635) BSC GN16 (SSOP) 0398 18 LTC1433/LTC1434 PACKAGE DESCRIPTIO 0.007 – 0.0098 (0.178 – 0.249) 0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (millimeters) unless otherwise noted. GN Package 20-Lead Plastic SSOP (Narrow 0.150) (LTC DWG # 05-08-1641) 0.337 – 0.344* (8.560 – 8.737) 20 19 18 17 16 15 14 13 12 11 0.058 (1.473) REF 0.229 – 0.244 (5.817 – 6.198) 0.150 – 0.157** (3.810 – 3.988) 1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0° – 8° TYP 0.053 – 0.068 (1.351 – 1.727) 23 4 56 7 8 9 10 0.004 – 0.0098 (0.102 – 0.249) 0.008 – 0.012 (0.203 – 0.305) 0.025 (0.635) BSC GN20 (SSOP) 0398 19 LTC1433/LTC1434 TYPICAL APPLICATIO 100µF* 10V L1B 20µH IOUT(MAX) = 130mA IOUT(MIN) = 10mA VOUT = 5V IOUT(MAX) = 130mA IOUT(MIN) = 5mA VOUT = – 5V 100µF* + 10V 3 D1: MOTOROLA MBRS130LT3 *AVX TPSD107M010R0100 ** WIMA MKS2 L1A, L1B: MANUFACTURER COILTRONICS DALE PART NO. CTX20-4 LPT4545-200LA RELATED PARTS PART NUMBER LT®1074/LT1076 LTC1174/LTC1174-3.3/ LTC1174-5 LTC1265 LT1375/LT1376 LTC1474 LTC1435 LTC1436/LTC1436-PLL LTC1438/LTC1439 LTC1538-AUX LTC1539 LTC1627 DESCRIPTION Step-Down Switching Regulators High Efficiency Step-Down and Inverting DC/DC Converters 1.2A High Efficiency Step-Down DC/DC Converter 1.5A, 500kHz Step-Down Switching Regulators High Efficiency Step-Down Converter High Efficiency Synchronous Step-Down Controller High Efficiency Low Noise Synchronous Step-Down Controllers Dual High Efficiency Low Noise Synchronous Step-Down Controllers Dual High Efficiency Synchronous Step-Down Controller Dual High Efficiency Low Noise Synchronous Step-Down Controller High Efficiency Monolithic Synchronous DC/DC Converter COMMENTS 100kHz, 5A (LT1074) or 2A (LT1076) Internal Switch Burst ModeTM Operation Burst Mode Operation High Frequency, Small Inductor, High Efficiency Switchers, 1.5A Switch Low IQ = 10µA, 8-Pin MSOP 16-Pin Narrow SO and SSOP 24-Pin Narrow and 28-Pin SSOP Up to Four Outputs Capability Auxiliary Linear Regulator 5V Standby in Shutdown Auxiliary Linear Regulator 5V Standby in Shutdown Low Supply Voltage: 2.65V to 10V, 0.5A Burst Mode is a trademark of Linear Technology Corporation. 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com U 5V to ± 5V Outputs 2 D1 4.7µF** 4 D2 L1A 20µH 1 2 3 4 5 6 0.01µF 7 8 SSW NC BSW NC LTC1433 PWRVIN PGND SVIN COSC POR ITH VOSENSE VPROG 16 15 14 13 12 11 10 9 6800pF 1433/34 TA06 • • + 50pF 100k 1 100µF* 10V VIN 5V 0.1µF + SGND RUN/SS LBO LBI POWER-ON RESET 5.1k 680pF L1B 3 2 TOP VIEW 4 1• L1B L1A L1A 14334fa LT/TP 1298 2K REV A • PRINTED IN THE USA © LINEAR TECHNOLOGY CORPORATION 1996