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LTC1544

LTC1544

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTC1544 - Software-Selectable Multiprotocol Transceiver - Linear Technology

  • 数据手册
  • 价格&库存
LTC1544 数据手册
LTC1544 Software-Selectable Multiprotocol Transceiver FEATURES s s DESCRIPTIO s s s s Software-Selectable Transceiver Supports: RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21 TUV/Detecon Inc. Certified NET1 and NET2 Compliant (Test Report No. NET2/102201/97) TBR2 Compliant (Test Report No. CTR2/022701/98) Software-Selectable Cable Termination Using the LTC1344A Complete DTE or DCE Port with LTC1543, LTC1344A or LTC1546 with Integrated Termination Operates from Single 5V Supply with LTC1543 APPLICATIO S s s s The LTC®1544 is a 4-driver/4-receiver multiprotocol transceiver. The LTC1544 and LTC1543 form the core of a complete software-selectable DTE or DCE interface port that supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21 protocols. Cable termination for the LTC1543 may be implemented using the LTC1344A software-selectable cable termination chip or by using existing discrete designs. The LTC1546 includes software-selectable cable termination onchip. The LTC1544 runs from a 5V supply and the charge pump on the LTC1543 or LTC1546. The part is available in a 28-lead SSOP surface mount package. Data Networking CSU and DSU Data Routers , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO LL CTS DSR DTE or DCE Multiprotocol Serial Interface with DB-25 Connector DCD DTR RTS RXD RXC TXC SCTE TXD LTC1544 D4 R4 R3 R2 R1 D3 D2 D1 R3 R2 R1 LTC1543 D3 D2 D1 18 LL A (141) 13 5 CTS B CTS A (106) 10 8 DSR B DSR A (109) 22 6 DCD B DCD A (107) 23 20 19 4 DTR B DTR A (108) RTS B RTS A (105) SHIELD (101) 1 SG (102) 7 16 3 RXD B RXD A (104) 9 RXC B 17 RXC A (115) 12 15 11 24 14 SCTE B SCTE A (113) TXD B TXD A (103) TXC B TXC A (114) DB-25 CONNECTOR U LTC1344A 2 1544 TA01 U U 1 LTC1544 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW VCC VDD D1 D2 D3 R1 R2 R3 D4 1 2 3 D1 4 5 6 7 8 9 R1 R2 R3 D4 R4 D2 D3 25 D1 B 24 D2 A 23 D2 B 22 D3/R1 A 21 D3/R1 B 20 R2 A 19 R2 B 18 R3 A 17 R3 B 16 D4/R4 A 15 INVERT G PACKAGE 28-LEAD PLASTIC SSOP 28 VEE 27 GND 26 D1 A Supply Voltage, VCC ................................................ 6.5V Input Voltage Transmitters ........................... – 0.3V to (VCC + 0.3V) Receivers ............................................... – 18V to 18V Logic Pins .............................. – 0.3V to (VCC + 0.3V) Output Voltage Transmitters .................. (VEE – 0.3V) to (VDD + 0.3V) Receivers ................................ – 0.3V to (VCC + 0.3V) VEE ........................................................ – 10V to 0.3V VDD ....................................................... – 0.3V to 10V Short-Circuit Duration Transmitter Output ..................................... Indefinite Receiver Output .......................................... Indefinite VEE .................................................................. 30 sec Operating Temperature Range LTC1544CG ............................................. 0°C to 70°C LTC1544IG ........................................ – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C ORDER PART NUMBER LTC1544CG LTC1544IG R4 10 M0 11 M1 12 M2 13 DCE/DTE 14 TJMAX = 150°C, θJA = 65°C/ W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS SYMBOL Supplies ICC VCC Supply Current (DCE Mode, All Digital Pins = GND or VCC) PARAMETER The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3) CONDITIONS RS530, RS530-A, X.21 Modes, No Load RS530, RS530-A, X.21 Modes, Full Load V.28 Mode, No Load V.28 Mode, Full Load No-Cable Mode RS530, RS530-A, X.21 Modes, No Load RS530, X.21 Modes, Full Load RS530-A, Full Load V.28 Mode, No Load V.28 Mode, Full Load No-Cable Mode RS530, RS530-A, X.21 Modes, NoLoad RS530, RS530-A, X.21 Modes, Full Load V.28 Mode, No Load V.28 Mode, Full Load No-Cable Mode RS530, RS530-A, X.21 Modes, Full Load V.28 Mode, Full Load MIN TYP 2.7 95 1 1 10 2.1 14 25 1 12 10 0.2 0.2 1 12 10 300 54 MAX UNITS mA mA mA mA µA mA mA mA mA mA µA mA mA mA mA µA mW mW q q q q 120 2 2 200 IEE VEE Supply Current (DCE Mode, All Digital Pins = GND or VCC) VEE = – 5.6V (RS530, RS530-A Modes) VEE = – 8.46V (V.28 Mode) IDD VDD Supply Current (DCE Mode, All Digital Pins = GND or VCC) VDD = 8.73V PD Internal Power Dissipation (DCE Mode, (All Digital Pins = GND or VCC) 2 U W U U WW W LTC1544 The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3) SYMBOL VIH VIL IIN PARAMETER Logic Input High Voltage Logic Input Low Voltage Logic Input Current D1, D2, D3, D4 M0, M1, M2, DCE, INVERT = GND (LTC1544C) M0, M1, M2, DCE, INVERT = GND (LTC1544I) M0, M1, M2, DCE, INVERT = VCC IO = – 4mA IO = 4mA 0V ≤ VO ≤ VCC M0 = M1 = M2 = VCC, 0V ≤ VO ≤ VCC RL = 1.95k (Figure 1) RL = 50Ω (Figure 1) RL = 50Ω (Figure 1) RL = 50Ω (Figure 1) RL = 50Ω (Figure 1) RL = 50Ω (Figure 1) VOUT = GND – 0.25V ≤ VO ≤ 0.25V, Power Off or No-Cable Mode or Driver Disabled LTC1544C (Figures 2, 5) LTC1544I (Figures 2, 5) LTC1544C (Figures 2, 5) LTC1544I (Figures 2, 5) LTC1544C (Figures 2, 5) LTC1544I (Figures 2, 5) LTC1544C (Figures 2, 5) LTC1544I (Figures 2, 5) (Figures 2, 5) – 7V ≤ VCM ≤ 7V – 7V ≤ VCM ≤ 7V – 10V ≤ VA,B ≤ 10V – 10V ≤ VA,B ≤ 10V (Figures 2, 6) LTC1544C (Figures 2, 6) LTC1544I (Figures 2, 6) LTC1544C (Figures 2, 6) LTC1544I (Figures 2, 6) LTC1544C (Figures 2, 6) LTC1544I (Figures 2, 6) q q q q q q q q q q q q q q q q q q q q q q q q ELECTRICAL CHARACTERISTICS CONDITIONS q q q q q q q q q MIN 2 TYP MAX UNITS V Logic Inputs and Outputs 0.8 – 100 – 120 3 – 50 – 50 – 50 4.5 0.3 40 ±1 ±5 0.5VODO ±2 0.67VODO 0.2 3 0.2 ± 150 ±1 2 2 20 20 20 20 0 0 15 15 40 40 40 40 3 3 3 – 0.2 15 15 30 15 50 50 50 50 0 0 4 4 80 90 80 90 16 21 0.2 40 ± 0.66 ± 100 25 35 65 75 65 75 12 17 0.8 50 ± 10 – 30 – 30 ± 10 V µA µA µA µA V V mA µA V V V V V V mA µA ns ns ns ns ns ns ns ns ns V mV mA kΩ ns ns ns ns ns ns ns VOH VOL IOSR IOZR V.11 Driver VODO VODL ∆VOD VOC ∆VOC ISS IOZ t r, t f t PLH t PHL ∆t t SKEW VTH ∆VTH IIN RIN t r, t f t PLH t PHL ∆t Output High Voltage Output Low Voltage Output Short-Circuit Current Three-State Output Current Open Circuit Differential Output Voltage Loaded Differential Output Voltage Change in Magnitude of Differential Output Voltage Common Mode Output Voltage Change in Magnitude of Common Mode Output Voltage Short-Circuit Current Output Leakage Current Rise or Fall Time Input to Output Input to Output Input to Output Difference, tPLH – tPHL Output to Output Skew Input Threshold Voltage Input Hysteresis Input Current (A, B) Input Impedance Rise or Fall Time Input to Output Input to Output Input to Output Difference, tPLH – tPHL V.11 Receiver 3 LTC1544 The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3) SYMBOL V.10 Driver VO VT ISS IOZ t r, t f t PLH t PHL VTH ∆VTH IIN RIN t r , tf tPLH tPHL ∆t V.28 Driver VO ISS IOZ SR t PLH t PHL VTHL VTLH ∆VTH RIN t r , tf tPLH tPHL Output Voltage Short-Circuit Current Output Leakage Current Slew Rate Input to Output Input to Output Input Low Threshold Voltage Input High Threshold Voltage Receiver Input Hysterisis Receiver Input Impedance Rise or Fall Time Input to Output Input to Output – 15V ≤ VA ≤ 15V (Figures 4, 8) (Figures 4, 8) (Figures 4, 8) q q ELECTRICAL CHARACTERISTICS PARAMETER Output Voltage Output Voltage Short-Circuit Current Output Leakage Current Rise or Fall Time Input to Output Input to Output Receiver Input Threshold Voltage Receiver Input Hysteresis Receiver Input Current Receiver Input Impedance Rise or Fall Time Input to Output Input to Output Input to Output Difference, tPLH – tPHL CONDITIONS Open Circuit, RL = 3.9k RL = 450Ω (Figure 3) RL = 450Ω (Figure 3) VO = GND – 0.25V ≤ VO ≤ 0.25V, Power Off or No-Cable Mode or Driver Disabled RL = 450Ω, CL = 100pF (Figures 3, 7) RL = 450Ω, CL = 100pF (Figures 3, 7) RL = 450Ω, CL = 100pF (Figures 3, 7) q q q q q MIN ±4 ± 3.6 0.9VO TYP MAX ±6 UNITS V V ± 150 ± 0.1 2 1 1 – 0.25 25 15 30 15 55 109 60 q q q q q q q mA µA µs µs µs ± 100 V.10 Receiver 0.25 50 ± 0.66 V mV mA kΩ ns ns ns ns ± 10 ± 150 ±1 4 1.3 1.3 1.5 2 0 3 1.6 0.1 5 15 60 150 100 450 0.3 7 ± 100 30 2.5 2.5 0.8 V V mA µA V/µs µs µs V V V kΩ ns ns ns – 10V ≤ VA ≤ 10V – 10V ≤ VA ≤ 10V (Figures 4, 8) (Figures 4, 8) (Figures 4, 8) (Figures 4, 8) Open Circuit RL = 3k (Figure 3) VO = GND – 0.25V ≤ VO ≤ 0.25V, Power Off or No-Cable Mode or Driver Disabled RL = 3k, CL = 2500pF (Figures 3, 7) RL = 3k, CL = 2500pF (Figures 3, 7) RL = 3k, CL = 2500pF (Figures 3, 7) q q ±5 ± 8.5 V.28 Receiver q q q q Note 1: Absolute Maximum Ratings are those beyond which the safety of a device may be impaired. Note 2: All currents into device pins are positive; all currents out of device are negative. All voltages are referenced to device ground unless otherwise specified. Note 3: All typicals are given for VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 and TA = 25°C. 4 LTC1544 PI FU CTIO S VCC (Pin 1): Positive Supply for the Transceivers. 4.75V ≤ VCC ≤ 5.25V. Connect a 1µF capacitor to ground. VDD (Pin 2): Positive Supply Voltage for V.28. Connect to VDD Pin 3 on LTC1543 or 8V supply. Connect a 1µF capacitor to ground. D1 (Pin 3): TTL Level Driver 1 Input. D2 (Pin 4): TTL Level Driver 2 Input. D3 (Pin 5): TTL Level Driver 3 Input. R1 (Pin 6): CMOS Level Receiver 1 Output. R2 (Pin 7): CMOS Level Receiver 2 Output. R3 (Pin 8): CMOS Level Receiver 3 Output. D4 (Pin 9): TTL Level Driver 4 Input. R4 (Pin 10): CMOS Level Receiver 4 Output. M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up to VCC. M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up to VCC. M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up to VCC. DCE/DTE (Pin 14): TTL Level Mode Select Input with Pull-Up to VCC. INVERT (Pin 15): TTL Level Mode Select Input with PullUp to VCC. D4/R4 A (Pin 16): Receiver 4 Inverting Input and Driver 4 Output. R3 B (Pin 17): Receiver 3 Noninverting Input. R3 A (Pin 18): Receiver 3 Inverting Input. R2 B (Pin 19): Receiver 2 Noninverting Input. R2 A (Pin 20): Receiver 2 Inverting Input. D3/R1 B (Pin 21): Receiver 1 Noninverting Input and Driver 3 Noninverting Output. D3/R1 A (Pin 22): Receiver 1 Inverting Input and Driver 3 Inverting Output. D2 B (Pin 23): Driver 2 Noninverting Output. D2 A (Pin 24): Driver 2 Inverting Output. D1 B (Pin 25): Driver 1 Noninverting Output. D1 A (Pin 26): Driver 1 Inverting Output. GND (Pin 27): Ground. VEE (Pin 28): Negative Supply Voltage. Connect to VEE Pin 26 on LTC1543 or to – 8V supply. Connect a 1µF capacitor to ground. TEST CIRCUITS A RL 50Ω VOD RL 50Ω B VOC Figure 1. V.11 Driver Test Circuit U U U B A RL 100Ω CL 100pF CL 100pF B A R 15pF 1544 F01 1544 F02 Figure 2. V.11 Driver/Receiver AC Test Circuit 5 LTC1544 TEST CIRCUITS D A CL RL D A A R 15pF 1544 F04 1544 F03 Figure 3. V.10/V.28 Driver Test Circuit Figure 4. V.10/V.28 Receiver Test Circuit ODE SELECTIO M2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 LTC1544 MODE NAME Not Used (Default V.11) RS530A RS530 X.21 V.35 RS449/V.36 V.28/RS232 No Cable Not Used (Default V.11) RS530A RS530 X.21 V.35 RS449/V.36 V.28/RS232 No Cable Not Used (Default V.11) RS530A RS530 X.21 V.35 RS449/V.36 V.28/RS232 No Cable Not Used (Default V.11) RS530A RS530 X.21 V.35 RS449/V.36 V.28/RS232 No Cable 6 U M1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 M0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DCE/DTE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 INVERT 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D1 V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z D2 V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z D3 Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z R1 V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z R2 V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z V.11 V.10 V.11 V.11 V.28 V.11 V.28 Z R3 V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z V.11 V.11 V.11 V.11 V.28 V.11 V.28 Z D4 Z Z Z Z Z Z Z Z V.10 V.10 V.10 V.10 V.28 V.10 V.28 Z V.10 V.10 V.10 V.10 V.28 V.10 V.28 Z Z Z Z Z Z Z Z Z R4 V.10 V.10 V.10 V.10 V.28 V.10 V.28 Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z V.10 V.10 V.10 V.10 V.28 V.10 V.28 Z W LTC1544 SWITCHI G TI E WAVEFOR S 5V D 0V VO B–A –VO A VO B t SKEW t SKEW 1544 F05 1.5V t PLH 50% tr 90% 10% f = 1MHz : t r ≤ 10ns : t f ≤ 10ns 1/2 VO Figure 5. V.11, V.35 Driver Propagation Delays VOD2 B–A –VOD2 VOH R VOL 0V t PLH 1.5V f = 1MHz : t r ≤ 10ns : t f ≤ 10ns Figure 6. V.11, V.35 Receiver Propagation Delays 3V D 0V VO A –VO tf 1.5V t PHL 3V 0V –3V –3V tr 0V 1.5V t PLH 3V 1544 F07 Figure 7. V.10, V.28 Driver Propagation Delays VIH A VIL VOH R VOL 1.3V t PHL 1.7V t PLH 2.4V 0.8V 1544 F08 Figure 8. V.10, V.28 Receiver Propagation Delays W W U 1.5V t PHL VDIFF = V(A) – V(B) 90% tf 50% 10% INPUT 0V t PHL OUTPUT 1.5V 1544 F06 7 LTC1544 APPLICATIONS INFORMATION Overview The LTC1543/LTC1544 form the core of a complete software-selectable DTE or DCE interface port that supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21 protocols. Cable termination may be implemented using the LTC1344A software-selectable cable termination chip or by using existing discrete designs. DTE SERIAL CONTROLLER TXD LTC1543 D1 LTC1344A TXD LTC1344A 103Ω SCTE D2 D3 TXC R1 RXC R2 RXD R3 LTC1544 RTS D1 RTS DTR D2 D3 DCD R1 DSR R2 CTS R3 LL D4 R4 Figure 9. Complete Multiprotocol Interface in EIA530 Mode 8 U W U U A complete DCE-to-DTE interface operating in EIA530 mode is shown in Figure 9. The LTC1543 of each port is used to generate the clock and data signals. The LTC1544 is used to generate the control signals along with LL (Local Loop-back).The LTC1344A cable termination chip is used only for the clock and data signals because they must support V.35 cable termination. The control signals do not need any external resistors. DCE LTC1543 R3 SERIAL CONTROLLER TXD SCTE 103Ω R2 SCTE R1 103Ω TXC D3 TXC 103Ω RXC D2 RXC 103Ω RXD D1 RXD LTC1544 R3 RTS DTR R2 DTR R1 DCD D3 DCD DSR D2 DSR CTS LL D1 CTS R4 D4 LL 1544 F09 LTC1544 APPLICATIONS INFORMATION Mode Selection The interface protocol is selected using the mode select pins M0, M1 and M2 (see the Mode Selection table). For example, if the port is configured as a V.35 interface, the mode selection pins should be M2 = 1, M1 = 0, M0 = 0. For the control signals, the drivers and receivers will operate in V.28 (RS232) electrical mode. For the clock and data signals, the drivers and receivers will operate in V.35 electrical mode. The DCE/DTE pin will configure the port for DCE mode when high, and DTE when low. The interface protocol may be selected simply by plugging the appropriate interface cable into the connector. The mode pins are routed to the connector and are left unconnected (1) or wired to ground (0) in the cable as shown in Figure 10. The internal pull-up current sources will ensure a binary 1 when a pin is left unconnected and that the LTC1543/ LTC1544 and the LTC1344A enter the no-cable mode when the cable is removed. In the no-cable mode the LTC1543/LTC1544 supply current drops to less than 200µA and all LTC1543/LTC1544 driver outputs and LTC1344A resistive terminations are forced into a high impedance state. The mode selection may also be accomplished by using jumpers to connect the mode pins to ground or VCC. LTC1344A DCE/ DTE M2 22 (DATA) M0 LTC1543 M1 M2 DCE/DTE 11 12 13 14 23 M1 M0 (DATA) 24 1 CONNECTOR LTC1544 DCE/DTE M2 M1 M0 (DATA) 14 13 12 11 1544 F10 Figure 10: Single Port DCE V.35 Mode Selection in the Cable U W U U LATCH 21 NC NC CABLE 9 LTC1544 APPLICATIONS INFORMATION Cable Termination Traditional implementations have included switching resistors with expensive relays, or requiring the user to change termination modules every time the interface standard has changed. Custom cables have been used with the termination in the cable head or separate terminations are built on the board and a custom cable routes the signals to the appropriate termination. Switching the terminations with FETs is difficult because the FETs must remain off even though the signal voltage is beyond the supply voltage for the FET drivers or the power is off. Using the LTC1344A along with the LTC1543/LTC1544 solves the cable termination switching problem. Via software control, the LTC1344A provides termination for the V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35 electrical protocols. V.10 (RS423) Interface 1544 F12 A typical V.10 unbalanced interface is shown in Figure 11. A V.10 single-ended generator output A with ground C is connected to a differential receiver with inputs A' connected to A, and input C' connected to the signal return ground C. Usually, no cable termination is required for V.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in Figure 12. GENERATOR BALANCED INTERCONNECTING CABLE LOAD CABLE TERMINATION RECEIVER A A' B' C' C' B R4 20k R7 10k C Figure 11. Typical V.10 Interface 10 U W U U The V.10 receiver configuration in the LTC1544 is shown in Figure 13. In V.10 mode switch S3 inside the LTC1544 is turned off.The noninverting input is disconnected inside the LTC1544 receiver and connected to ground. The cable termination is then the 30k input impedance to ground of the LTC1544 V.10 receiver. IZ 3.25mA –10V –3V VZ 3V 10V –3.25mA Figure 12. V.10 Receiver Input Impedance A' A R8 6k S3 R5 20k R6 10k LTC1544 RECEIVER 1544 F11 GND 1544 F13 Figure 13. V.10 Receiver Configuration LTC1544 APPLICATIONS INFORMATION V.11 (RS422) Interface A typical V.11 balanced interface is shown in Figure 14. A V.11 differential generator with outputs A and B with ground C is connected to a differential receiver with ground C', inputs A' connected to A, B' connected to B. The V.11 interface has a differential termination at the receiver end that has a minimum value of 100Ω. The termination resistor is optional in the V.11 specification, but for the high speed clock and data lines, the termination is required to prevent reflections from corrupting the data. The receiver inputs must also be compliant with the impedance curve shown in Figure 12. In V.11 mode, all switches are off except S1 inside the LTC1344A which connects a 103Ω differential termination impedance to the cable as shown in Figure 15. BALANCED INTERCONNECTING CABLE GENERATOR LOAD CABLE TERMINATION RECEIVER A A' 100Ω MIN B C B' C' Figure 14. Typical V.11 Interface A' A R1 51.5Ω S1 S2 R2 51.5Ω B' C' GND 1544 F15 LTC1344A R8 6k S3 R5 20k R6 10k RECEIVER R3 124Ω B R4 20k R7 10k Figure 15. V.11 Receiver Configuration U W U U V.28 (RS232) Interface A typical V.28 unbalanced interface is shown in Figure 16. A V.28 single-ended generator output A with ground C is connected to a single-ended receiver with input A' connected to A, ground C' connected via the signal return ground C. In V.28 mode all switches are off except S3 inside the LTC1543/LTC1544 which connects a 6k (R8) impedance to ground in parallel with 20k (R5) plus 10k (R6) for a combined impedance of 5k as shown in Figure 17. The noninverting input is disconnected inside the LTC1543/ LTC1544 receiver and connected to a TTL level reference voltage for a 1.4V receiver trip point. GENERATOR BALANCED INTERCONNECTING CABLE LOAD CABLE TERMINATION RECEIVER A A' C 1544 F14 C' 1544 F16 Figure 16. Typical V.28 Interface A' LTC1543 LTC1544 A R1 51.5Ω S1 S2 R2 51.5Ω B' C' GND LTC1344A R8 6k S3 R5 20k R6 10k LTC1543 LTC1544 RECEIVER R3 124Ω B R4 20k R7 10k 1544 F17 Figure 17. V.28 Receiver Configuration 11 LTC1544 APPLICATIONS INFORMATION V.35 Interface A typical V.35 balanced interface is shown in Figure 18. A V.35 differential generator with outputs A and B with ground C is connected to a differential receiver with ground C', inputs A' connected to A, B' connected to B. The V.35 interface requires a T or delta network termination at the receiver end and the generator end. The receiver differential impedance measured at the connector must be 100Ω ±10Ω, and the impedance between shorted terminals (A' and B') and ground C' must be 150Ω ±15Ω. In V.35 mode, both switches S1 and S2 inside the LTC1344A are on, connecting the T network impedance as shown in Figure 19. The switch in the LTC1543 is off. The 30k input impedance of the receiver is placed in parallel with the T network termination, but does not affect the overall input impedance significantly. GENERATOR 50Ω 125Ω 50Ω B C B' C' Figure 18. Typical V.35 Interface A' A R1 51.5Ω S1 S2 R2 51.5Ω B' C' GND 1544 F19 LTC1344A R3 124Ω Figure 19. V.35 Receiver Configuration 12 U A W U U BALANCED INTERCONNECTING CABLE LOAD CABLE TERMINATION A' 125Ω 50Ω RECEIVER 50Ω 1544 F18 LTC1543 R8 6k S3 R5 20k R6 10k RECEIVER B R4 20k R7 10k LTC1544 APPLICATIONS INFORMATION The generator differential impedance must be 50Ω to 150Ω and the impedance between shorted terminals (A and B) and ground C must be 150Ω ±15Ω. For the generator termination, switches S1 and S2 are both on and the top side of the center resistor is brought out to a pin so it can be bypassed with an external capacitor to reduce common mode noise as shown in Figure 20. A LTC1344A 51.5Ω S1 ON 3 C3 1µF 2 C1 1µF 1 VDD C1+ LTC1543 C1– VCC VEE GND 26 25 C5 3.3µF C2 + C2 – 28 27 C2 1µF V.35 DRIVER 124Ω S2 ON 51.5Ω B C1 100pF C 1544 F20 5V C4 1µF 4 Figure 20. V.35 Driver Using the LTC1344A Figure 21. Charge Pump Any mismatch in the driver rise and fall times or skew in the driver propagation delays will force current through the center termination resistor to ground, causing a high frequency common mode spike on the A and B terminals. The common mode spike can cause EMI problems that are reduced by capacitor C1 which shunts much of the common mode energy to ground rather than down the cable. No-Cable Mode The no-cable mode (M0 = M1 = M2 = 1) is intended for the case when the cable is disconnected from the connector. The charge pump, bias circuitry, drivers and receivers are turned off, the driver outputs are forced into a high impedance state, and the supply current drops to less than 200µA. Receiver Fail-Safe All LTC1543/LTC1544 receivers feature fail-safe operation in all modes. If the receiver inputs are left floating or shorted together by a termination resistor, the receiver output will always be forced to a logic high. DTE vs DCE Operation The DCE/DTE pin acts as an enable for Driver 3/Receiver 1 in the LTC1543, and Driver 3/Receiver 1 and Driver 4/ Receiver 4 in the LTC1544. The INVERT pin in the LTC1544 allows the Driver 4/Receiver 4 enable to be high or low true polarity. + U W U U Charge Pump The LTC1543 uses an internal capacitive charge pump to generate VDD and VEE as shown in Figure 21. A voltage doubler generates about 8V on VDD and a voltage inverter generates about – 7.5V for VEE. Four 1µF surface mounted tantalum or ceramic capacitors are required for C1, C2, C3 and C4. The VEE capacitor C5 should be a minimum of 3.3µF. All capacitors are 16V and should be placed as close as possible to the LTC1543 to reduce EMI. 1544 F21 13 LTC1544 APPLICATIONS INFORMATION The LTC1543/LTC1544 can be configured for either DTE or DCE operation in one of two ways: a dedicated DTE or DCE port with a connector of appropriate gender or a port with one connector that can be configured for DTE or DCE operation by rerouting the signals to the LTC1543/LTC1544 using a dedicated DTE cable or dedicated DCE cable. A dedicated DTE port using a DB-25 male connector is shown in Figure 22. The interface mode is selected by logic outputs from the controller or from jumpers to either VCC or GND on the mode select pins. A dedicated DCE port using a DB-25 female connector is shown in Figure 23. A port with one DB-25 connector, but can be configured for either DTE or DCE operation is shown in Figure 24. The configuration requires separate cables for proper signal routing in DTE or DCE operation. For example, in DTE mode, the TXD signal is routed to Pins 2 and 14 via Driver 1 in the LTC1543. In DCE mode, Driver 1 now routes the RXD signal to Pins 2 and 14. Multiprotocol Interface with RL, LL, TM and a DB-25 Connector If the RL, LL and TM signals are implemented, there are not enough drivers and receivers available in the LTC1543/ LTC1544. In Figure 25, the required control signals are handled by the LTC1544 but the clock/data signals use the LTC1343. The LTC1343 has an additional single-ended driver/receiver pair that can handle two more optional control signals such as TM and LL. Cable-Selectable Multiprotocol Interface A cable-selectable multiprotocol DTE/DCE interface is shown in Figure 26. The select lines M0, M1 and DCE/DTE are brought out to the connector. The mode is selected by the cable by wiring M0 (connector Pin 18) and M1 (connector Pin 21) and DCE/DTE (connector Pin 25) to ground (connector Pin 7) or letting them float. If M0, M1 or DCE/ DTE is floating, internal pull-up current sources will pull the signals to VCC. The select bit M2 is hard wired to VCC. When the cable is pulled out, the interface will go into the no-cable mode. Compliance Testing A European standard EN 45001 test report is available for the LTC1543/LTC1544/LTC1344A chipset. A copy of the test report is available from LTC or TUV Telecom Services Inc. (formerly Detecon Inc.) The title of the report is: Test Report No. NET2/102201/97. The address of TUV Telecom Services Inc. is: TUV Telecom Services Inc. Type Approval Division 1775 Old Highway 8, Ste 107 St. Paul, MN 55112 USA Tel. +1 (612) 639-0775 Fax. +1 (612) 639-0873 14 U W U U LTC1544 TYPICAL APPLICATIO S C6 C7 C8 100pF 100pF 100pF 3 VCC 5V 14 3 C3 1µF 1 C1 1µF C5 1µF TXD SCTE 5 2 4 LTC1543 D1 D2 CHARGE PUMP 28 27 26 25 C2 1µF 2 C4 3.3µF C12 1µF 5467 9 10 VEE DCE/DTE M2 M1 M0 24 23 22 21 6 7 D3 20 15 12 17 9 3 16 7 1 TXC 8 R1 19 18 RXC RXD 9 R2 17 16 10 11 12 13 14 M0 M1 M2 R3 15 DCE/DTE C10 1µF C9 1µF VCC 1 VCC 2 VDD 3 D1 VEE GND 28 27 26 C11 1µF 4 19 20 23 RTS 25 24 DTR 4 D2 23 5 D3 LTC1544 22 21 20 R2 19 18 R3 17 16 8 10 6 22 5 13 18 DCD 6 7 R1 DSR CTS 8 10 9 11 12 13 14 M0 M1 M2 LL R4 D4 INVERT 15 NC DCE/DTE M2 M1 M0 Figure 22. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector + U 8 11 12 13 LTC1344A C13 1µF VCC LATCH 21 16 15 18 17 19 20 22 23 24 1 2 14 24 11 TXD A (103) TXD B SCTE A (113) SCTE B TXC A (114) TXC B RXC A (115) RXC B RXD A (104) RXD B SG SHIELD DB-25 MALE CONNECTOR RTS A (105) RTS B DTR A (108) DTR B DCD A (109) DCD B DSR A (107) DSR B CTS A (106) CTS B LL A (141) 1544 F22 15 LTC1544 TYPICAL APPLICATIO S C6 C7 C8 100pF 100pF 100pF 3 VCC 5V 14 3 C3 1µF 1 C1 1µF C5 1µF RXD RXC 5 2 4 LTC1543 D1 D2 CHARGE PUMP 28 27 26 25 C2 1µF 2 C4 3.3µF C12 1µF 5467 9 10 VEE DCE/DTE M2 M1 M0 C13 1µF VCC LATCH 21 8 11 12 13 LTC1344A 24 23 22 21 6 7 D3 20 15 12 24 11 2 14 7 1 TXC 8 R1 19 18 SCTE TXD 9 R2 17 16 10 11 12 13 NC 14 M0 M1 M2 R3 15 DCE/DTE C10 1µF C9 1µF VCC 1 VCC 2 VDD 3 D1 VEE GND 28 27 26 C11 1µF 5 13 6 22 CTS 25 24 DSR 4 D2 23 5 D3 LTC1544 22 21 20 R2 19 18 R3 17 16 8 10 20 23 4 19 18 DCD 6 7 R1 DTR RTS 8 10 9 11 12 13 NC 14 M0 M1 M2 LL R4 D4 INVERT 15 NC DCE/DTE M2 M1 M0 Figure 23. Controller-Selectable DCE Port with DB-25 Connector 16 + U 16 15 18 17 19 20 22 23 24 1 VCC 3 16 17 9 RXD A (104) RXD B RXC A (115) RXC B TXC A (114) TXC B SCTE A (113) SCTE B TXD A (103) TXD B SGND (102) SHIELD (101) DB-25 FEMALE CONNECTOR CTS A (106) CTS B DSR A (107) DSR B DCD A (109) DCD B DTR A (108) DTR B RTS A (105) RTS B LL A (141) 1544 F23 LTC1544 TYPICAL APPLICATIO S VCC 5V 14 3 C3 1µF 1 C1 1µF C5 1µF DTE_TXD/DCE_RXD DTE_SCTE/DCE_RXC 5 2 4 LTC1543 D1 D2 CHARGE PUMP 28 27 26 25 C4 3.3µF C2 1µF 2 C12 1µF VEE C13 1µF VCC DCE/DTE M2 M1 5467 9 10 16 15 18 17 19 20 22 23 24 1 2 14 24 11 DTE TXD A TXD B SCTE A SCTE B DCE RXD A RXD B RXC A RXC B 24 23 22 21 6 7 D3 20 15 12 17 9 3 16 7 1 M0 DTE_TXC/DCE_TXC 8 R1 19 18 DTE_RXC/DCE_SCTE 9 R2 17 16 DTE_RXD/DCE_TXD 10 11 12 M0 R3 15 M1 13 M2 14 DCE/DTE C10 1µF C9 1µF VCC 1 VCC 2 VDD 3 D1 VEE GND 28 27 26 C11 1µF 4 19 20 23 DTE_RTS/DCE_CTS 25 24 DTE_DTR/DCE_DSR 4 D2 23 5 D3 LTC1544 22 21 20 R2 19 18 R3 17 16 8 10 6 22 5 13 18 DTE_DCD/DCE_DCD DTE_DSR/DCE_DTR 6 7 R1 DTE_CTS/DCE_RTS 8 10 9 11 12 13 14 M0 M1 M2 DTE_LL/DCE_LL R4 D4 INVERT 15 NC DCE/DTE DCE/DTE M2 M1 M0 Figure 24. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector + U C6 C7 C8 100pF 100pF 100pF 3 8 11 12 13 LTC1344A LATCH 21 TXC A TXC B RXC A RXC B RXD A RXD B SG SHIELD TXC A TXC B SCTE A SCTE B TXD A TXD B DB-25 CONNECTOR RTS A RTS B DTR A DTR B CTS A CTS B DSR A DSR B DCD A DCD B DSR A DSR B CTS A CTS B LL A DCD A DCD B DTR A DTR B RTS A RTS B LL A 1544 F24 17 LTC1544 TYPICAL APPLICATIO S VCC 5V 14 1 C3 1µF 2 C1 1µF C5 1µF DTE_LL/DCE_TM DTE_TXD/DCE_RXD 4 3 8 LTC1343 5 D1 D2 39 38 6 7 37 36 DTE_SCTE/DCE_RXC D3 35 34 9 10 12 13 D4 33 32 R1 31 30 R2 29 28 R3 27 26 DCE M2 M1 M0 EC 21 19 18 17 VCC 40 GND 24 LB 23 C9 1µF VCC 1 VCC 2 VDD 3 D1 28 27 26 DTE_RTS/DCE_CTS 25 24 D2 23 C11 1µF CHARGE PUMP 44 43 42 41 C2 1µF 2 C4 3.3µF C12 1µF VEE C13 1µF VCC DCE/DTE M2 M1 5467 9 10 16 15 18 17 19 20 22 23 24 1 DTE LL A TXD A TXD B SCTE A SCTE B DCE TM A RXD A RXD B RXC A RXC B M0 18 2 14 24 11 15 12 17 9 3 16 25 7 1 DTE_TXC/DCE_TXC DTE_RXC/DCE_SCTE 14 DTE_RXD/DCE_TXD 15 DTE_TM/DCE_LL 16 20 22 11 25 R1 100k CTRL LATCH R4 INVERT 423SET LB C10 1µF VEE GND DTE_DTR/DCE_DSR 4 5 D3 LTC1544 22 21 20 R2 19 18 R3 17 16 8 10 6 22 5 13 21 DTE_DCD/DCE_DCD DTE_DSR/DCE_DTR 6 7 R1 DTE_CTS/DCE_RTS 8 10 9 11 12 13 14 M0 M1 M2 DTE_RL/DCE_RL R4 D4 INVERT 15 NC DCE/DTE DCE/DTE M2 M1 M0 Figure 25. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector 18 + U C6 C7 C8 100pF 100pF 100pF 3 8 11 12 13 LTC1344A LATCH 21 TXC A TXC B RXC A RXC B RXD A RXD B TM A SG SHIELD TXC A TXC B SCTE A SCTE B TXD A TXD B LL A DB-25 CONNECTOR 4 19 20 23 RTS A RTS B DTR A DTR B CTS A CTS B DSR A DSR B DCD A DCD B DSR A DSR B CTS A CTS B RL A DCD A DCD B DTR A DTR B RTS A RTS B RL A 1544 F25 LTC1544 TYPICAL APPLICATIO S C6 C7 C8 100pF 100pF 100pF 3 VCC 5V 14 3 C3 1µF 1 C1 1µF 2 4 C5 1µF DTE_TXD/DCE_RXD DTE_SCTE/DCE_RXC 5 LTC1543 D1 D2 CHARGE PUMP 28 27 26 25 C4 3.3µF C2 1µF 2 C12 1µF 5467 9 10 VEE DCE/DTE M2 M1 M0 C13 1µF VCC LATCH 21 8 11 12 13 LTC1344A 24 23 22 21 6 7 8 9 D3 20 15 12 17 9 3 16 7 1 R1 TXC A TXC B RXC A RXC B RXD A RXD B SG SHIELD DB-25 CONNECTOR TXC A TXC B SCTE A SCTE B TXD A TXD B 19 18 R2 17 16 R3 M0 M1 M2 DCE/DTE 15 DTE_TXC/DCE_TXC DTE_RXC/DCE_SCTE DTE_RXD/DCE_TXD 10 11 12 NC 13 14 C10 1µF C9 1µF VCC 1 VCC 2 VDD 3 D1 VEE GND 28 27 26 C11 1µF DTE_RTS/DCE_CTS 25 24 DTE_DTR/DCE_DSR 4 D2 23 5 D3 LTC1544 22 21 20 R2 19 18 R3 17 16 CABLE WIRING FOR MODE SELECTION D4 M0 M1 M2 DCE/DTE INVERT 15 NC MODE V.35 RS449, V.36 RS232 PIN 18 PIN 7 NC PIN 7 PIN 21 PIN 7 PIN 7 NC CABLE WIRING FOR DTE/DCE SELECTION MODE PIN 25 DTE PIN 7 DCE NC 8 10 6 22 5 13 DTE_DCD/DCE_DCD DTE_DSR/DCE_DTR 6 7 R1 DTE_CTS/DCE_RTS 8 10 9 11 12 NC 13 14 R4 Figure 26. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. + U 16 15 18 17 19 20 22 23 24 1 VCC 2 14 24 11 DTE TXD A TXD B SCTE A SCTE B DCE RXD A RXD B RXC A RXC B 25 DCE/DTE 21 M1 18 M0 4 RTS A 19 RTS B 20 DTR A 23 DTR B CTS A CTS B DSR A DSR B DCD A DCD B DSR A DSR B CTS A CTS B DCD A DCD B DTR A DTR B RTS A RTS B 1544 F26 19 LTC1544 PACKAGE DESCRIPTIO 5.20 – 5.38** (0.205 – 0.212) 0.13 – 0.22 (0.005 – 0.009) 0.55 – 0.95 (0.022 – 0.037) NOTE: DIMENSIONS ARE IN MILLIMETERS *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.152mm (0.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE RELATED PARTS PART NUMBER LTC1321 LTC1334 LTC1343 LTC1344A LTC1345 LTC1346A LTC1543 LTC1546 DESCRIPTION Dual RS232/RS485 Transceiver Single 5V RS232/RS485 Multiprotocol Transceiver Software-Selectable Multiprotocol Transceiver Software-Selectable Cable Terminator Single Supply V.35 Transceiver Dual Supply V.35 Transceiver Software-Selectable Multiprotocol Transceiver Multiprotocol Transceiver with Termination 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com U Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 10.07 – 10.33* (0.397 – 0.407) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 7.65 – 7.90 (0.301 – 0.311) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1.73 – 1.99 (0.068 – 0.078) 0° – 8° 0.65 (0.0256) BSC 0.25 – 0.38 (0.010 – 0.015) 0.05 – 0.21 (0.002 – 0.008) G28 SSOP 1098 COMMENTS Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs 4-Driver/4-Receiver for Data and Clock Signals Perfect for Terminating the LTC1543 3-Driver/3-Receiver for Data and Clock Signals 3-Driver/3-Receiver for Data and Clock Signals Companion to LTC1544 for Data and Clock Signals Companion to LTC1544 for Data and Clock Signals 1544fa LT/TP 0100 2K REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1998
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