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LTC1701_1

LTC1701_1

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTC1701_1 - 1MHz Step-Down DC/DC Converters in SOT-23 - Linear Technology

  • 数据手册
  • 价格&库存
LTC1701_1 数据手册
LTC1701/LTC1701B 1MHz Step-Down DC/DC Converters in SOT-23 FEATURES s s s s s s s DESCRIPTIO s s s s s s Tiny 5-Lead SOT-23 Package Uses Tiny Capacitors and Inductor High Frequency Operation: 1MHz High Output Current: 500mA Low RDS(ON) Internal Switch: 0.28Ω High Efficiency: Up to 94% Current Mode Operation for Excellent Line and Load Transient Response Short-Circuit Protected Low Quiescent Current: 135µA (LTC1701) Low Dropout Operation: 100% Duty Cycle Ultralow Shutdown Current: IQ < 1µA Peak Inductor Current Independent of Inductor Value Output Voltages from 5V Down to 1.25V The LTC®1701/LTC1701B are the industry’s first SOT-23 step-down, current mode, DC/DC converters. Intended for low to medium power applications, they operate from 2.5V to 5.5V input voltage range and switch at 1MHz, allowing the use of tiny, low cost capacitors and inductors 2mm or less in height. The output voltage is adjustable from 1.25V to 5V. A built-in 0.28Ω switch allows up to 0.5A of output current at high efficiency. OPTI-LOOPTM compensation allows the transient response to be optimized over a wide range of loads and output capacitors. The LTC1701 incorporates automatic power saving Burst ModeTM operation to reduce gate charge losses when the load current drops below the level required for continuous operation. The LTC1701B operates continuously to very low load currents to provide low ripple at the expense of light load efficiency. With no load, the LTC1701 draws only 135µA. In shutdown, both devices draw less than 1µA, making them ideal for current sensitive applications. Their small size and switching frequency enables a complete DC/DC converter function to consume less than 0.3 square inches of PC board area. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode and OPTI-LOOP are trademarks of Linear Technology Corporation. APPLICATIO S s s s s s s PDAs/Palmtop PCs Digital Cameras Cellular Phones Portable Media Players PC Cards Handheld Equipment TYPICAL APPLICATION VIN 2.5V TO 5.5V R4 1M L1 4.7µH VIN SW D1 LTC1701 R2 121k VOUT (2.5V/ 500mA) 100 95 90 85 EFFICIENCY (%) LTC1701 VIN = 3.3V VOUT = 2.5V C1 10µF + + R3 5.1k C3 330pF ITH/RUN GND VFB R1 121k C2 47µF 80 75 70 65 60 LTC1701B C1: TAIYO YUDEN JMK316BJ106ML C2: SANYO POSCAP 6TPA47M D1: MBRM120L L1: SUMIDA CD43-4R7 1701 F01a 55 50 1 10 100 LOAD CURRENT (mA) 1000 1701 F01b Figure 1. 2.5V/500mA Step-Down Regulator U Efficiency Curve U U 1 LTC1701/LTC1701B ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW SW 1 GND 2 VFB 3 4 ITH/RUN 5 VIN (Voltages Referred to GND Pin) VIN Voltage (Pin 5).......................................– 0.3V to 6V ITH/RUN Voltage (Pin 4) ..............................– 0.3V to 3V VFB Voltage (Pin 3) ......................................– 0.3V to 3V VIN – SW (Max Switch Voltage) ................8.5V to – 0.3V Operating Temperature Range (Note 2) .. – 40°C to 85°C Junction Temperature (Note 5) ............................. 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER LTC1701ES5 LTC1701BES5 S5 PART MARKING LTKG LTUD S5 PACKAGE 5-LEAD PLASTIC SOT-23 TJMAX = 125°C, θJA = 250°C/W SEE THE APPLICATION INFORMATION SECTION Consult factory for parts specified with wider operating temperature ranges. The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.3V, RITH/RUN = 1Meg (from VIN to ITH/RUN) unless otherwise specified. (Note 2) SYMBOL VIN IFB VFB ∆VLINE REG ∆VLOAD REG PARAMETER Operating Voltage Range Feedback Pin Input Current Feedback Voltage Reference Voltage Line Regulation Output Voltage Load Regulation Input DC Supply Current (Note 4) Active Mode Sleep Mode Shutdown VITH/RUN IITH/RUN ISW(PEAK) RDS(ON) Run Threshold High Run Threshold Low Run Pullup Current Peak Switch Current Threshold Switch ON Resistance (Note 3) (Note 3) VIN = 2.5V to 5V (Note 3) Measured in Servo Loop, VITH = 1.5V, (Note 3) Measured in Servo Loop, VITH = 1.9V, (Note 3) VFB = 0V VFB = 1.4V (LTC1701 only) VITH/RUN = 0V ITH/RUN Ramping Down ITH/RUN Ramping Up VITH/RUN = 1V VFB = 0V VIN = 5V, VFB = 0V VIN = 3.3V, VFB = 0V VIN = 2.5V, VFB = 0V VIN = 5V, VITH/RUN = 0V, VFB = 0V 400 0.3 50 0.9 q ELECTRICAL CHARACTERISTICS CONDITIONS MIN 2.5 1.22 TYP MAX 5.5 ± 0.1 UNITS V µA V %/V % % µA µA µA V V µA A Ω Ω Ω 1.25 0.04 0.01 – 0.80 185 135 0.25 1.4 0.6 100 1.1 0.28 0.30 0.35 0.01 500 1.28 0.1 0.70 –1.50 300 200 1 1.6 300 ISW(LKG) tOFF Switch Leakage Current Switch Off-Time 1 600 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1701E/LTC1701BE guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the – 40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: The LTC1701/LTC1701B are tested in a feedback loop which servos VFB to the midpoint for the error amplifier without RITH/RUN = 1MHz (VITH = 1.7V unless otherwise specified). Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5: TJ is calculated from the ambient TA and power dissipation PD according to the following formula: LTC1701ES5/LTC1701BES5: TJ = TA + (PD • 250°C/W) 2 U µA ns W U U WW W LTC1701/LTC1701B TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load Current 100 VOUT = 2.5V 95 EFFICIENCY (%) 100 V IN = 3.3V EFFICIENCY (%) 90 V IN = 5.0V 85 80 75 70 LTC1701 LTC1701B 1 10 100 LOAD CURRENT (mA) 1000 1701 • G01 SUPPLY CURRENT (µA) Switch Resistance vs Supply Voltage 370 350 ON RESISTANCE (mΩ) VOUT ERROR (%) 330 310 290 270 250 VOUT ERROR (%) 2 3 5 4 SUPPLY VOLTAGE (V) Dropout Characteristics 3.4 3.3 3.2 VOUT (V) ILOAD = 100mA 3.1 ILOAD = 200mA 3.0 2.9 ILOAD = 500mA 2.8 2.7 2.6 3.0 3.2 3.4 VIN (V) 701 • G07 VOUT = 3.3V FIGURE 1 3.6 3.8 UW 6 1701 • G04 Efficiency vs Input Voltage VOUT = 2.5V ILOAD =100mA DC Supply Current 300 250 200 150 SLEEP 100 50 0 ACTIVE 95 90 85 80 75 70 65 60 2 3 4 LTC1701 LTC1701B ILOAD =10mA 5 6 1701 • G02 2 3 INPUT VOLTAGE (V) 5 4 INPUT VOLTAGE (V) 6 1701 • G03 Load Regulation 0.60 0.40 0.20 0.00 –0.20 –0.40 –0.60 –0.80 –1.00 –1.20 –1.40 0 400 200 LOAD CURRENT (mA) 600 1701 • G05 Line Regulation 0.30 VOUT = 5.0V 0.25 ILOAD = 200mA 0.20 0.15 0.10 ILOAD = 400mA 0.05 0 VOUT = 3.3V 2 3 4 VIN (V) 5 6 1701 • G06 Start-Up VOUT 1V/DIV Transient Response VOUT 50mV/DIV AC COUPLED ITH 2V/DIV IL 500mA/DIV IL 200mA/DIV VIN = 3.3V, VOUT = 2.5V CIRCUIT OF FIGURE 1 RLOAD = 6Ω 1701 G08 VIN = 3.3V, VOUT = 2.5V CIRCUIT OF FIGURE 1 ILOAD = 100mA TO 500mA STEP 1701 G09 3 LTC1701/LTC1701B PI FU CTIO S SW (Pin 1): The Switch Node Connection to the Inductor. This pin swings from VIN to a Schottky diode (external) voltage drop below ground. The cathode of the Schottky diode must be closely connected to this pin. GND (Pin 2): Ground Pin. Connect to the (–) terminal of COUT, the Schottky diode and (–) terminal of CIN. VFB (Pin 3): Receives the feedback voltage from the external resistive divider across the output. Nominal voltage for this pin is 1.25V. ITH/RUN (Pin 4): Combination of Error Amplifier Compensation Point and Run Control Input. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is 1.25V to 2.25V. Forcing this pin below 0.8V causes the device to be shut down. In shutdown all functions are disabled. VIN (Pin 5): Main Supply Pin and the (+) Input to the Current Comparator. Must be closely decoupled to ground. Pin Limit Table PIN 1 2 3 4 5 NAME SW GND VFB ITH/RUN VIN DESCRIPTION Switch Node Ground Pin Output Feedback Pin Error Amplifier Compensation and RUN Pin Main Power Supply 0 0 2.5 MIN – 0.3 0 1.25 1.35 2.25 5.5 – 0.3 – 0.3 – 0.3 3 3 6 NOMINAL (V) TYP MAX VIN ABSOLUTE MAX (V) MIN MAX VIN – 8.5 VIN + 0.3 BLOCK DIAGRA VREF + ITH/REF CLAMP – ITH/RUN VREF SHDN + ERROR AMP VFB – SW + 1.4V – OVER VOLTAGE COMP PULSE STRETCHER VFB < 0.6V 4 W U U U VIN VIN 50µA 1.25V BANDGAP REFERENCE VREF (1.25V) VIN + + CURRENT COMP CURRENT SENSE AMP 1.5V + ITH COMP – – VREF – (1.25V TO 2.25V) (LTC1701 only) OFF-TIMER AND GATE CONTROL LOGIC GATE DRIVER GND 1701 BD LTC1701/LTC1701B OPERATIO The LTC1701 uses a contant off-time, current mode architecture. The operating frequency is then determined by the off-time and the difference between VIN and VOUT. The output voltage is set by an external divider returned to the VFB pin. An error amplfier compares the divided output voltage with a reference voltage of 1.25V and adjusts the peak inductor current accordingly. Main Control Loop During normal operation, the internal PMOS switch is turned on when the VFB voltage is below the reference voltage. The current into the inductor and the load increases until the current limit is reached. The switch turns off and energy stored in the inductor flows through the external Schottky diode into the load. After the constant off-time interval, the switch turns on and the cycle repeats. The peak inductor current is controlled by the voltage on the ITH/RUN pin, which is the output of the error amplifier.This amplifier compares the VFB pin to the 1.25V reference. When the load current increases, the FB voltage decreases slightly below the reference. This decrease causes the error amplifier to increase the ITH/RUN voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the ITH/RUN pin to ground. When the pin is released an external resistor is used to charge the compensation capacitor. When the voltage at the ITH/RUN pin reaches 0.8V, the main control APPLICATIO S I FOR ATIO The basic LTC1701 application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of L1. Once L1 is chosen, the Schottky diode D1 can be selected followed by CIN and COUT. L Selection and Operating Frequency The operating frequency is fixed by VIN, VOUT and the constant off-time of about 500ns. The complete expression for operating frequency is given by: U W U U U loop is enabled and the error amplifier drives the ITH/RUN pin. Soft-start can be implemented by ramping the voltage on the ITH/RUN pin (see Applications Information section). Low Current Operation To optimize efficiency when the load is relatively light, the LTC1701 automatically switches to Burst Mode operation in which the internal PMOS switch operates intermittently based on load demand. The main control loop is interrupted when the output voltage reaches the desired regulated value. The hysteretic voltage comparator trips when ITH/RUN is below 1.5V, shutting off the switch and reducing the power consumed. The output capacitor and the inductor supply the power to the load until the output voltage drops slightly and the ITH/RUN pin exceeds 1.5V, turning on the switch and the main control loop which starts another cycle. For reduced output ripple, the LTC1701B doesn't use Burst Mode operation and operates continuously down to very low currents where the part starts skipping cycles. Dropout Operation In dropout, the internal PMOS switch is turned on continuously (100% duty cycle) providing low dropout operation with VOUT at VIN. Since the LTC1701 does not incorporate an under voltage lockout, care should be taken to shut down the LTC1701 for VIN < 2.5V. V −V   1  fO =  IN OUT     VIN + VD   TOFF  Although the inductor does not influence the operating frequency, the inductor value has a direct effect on ripple current. The inductor ripple current ∆IL decreases with higher inductance and increases with higher VIN or VOUT:  V − V  V +V  ∆IL =  IN OUT   OUT D  fL    VIN + VD  where VD is the output Schottky diode forward drop. 5 LTC1701/LTC1701B APPLICATIO S I FOR ATIO Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ∆IL = 0.4A. The inductor value also has an effect on low current operation. Lower inductor values (higher ∆IL) will cause Burst Mode operation to begin at higher load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to decrease. Inductor Core Selection Once the value for L is selected, the type of inductor must be chosen. Basically, there are two kinds of losses in an inductor —core and copper losses. Core losses are dependent on the peak-to-peak ripple current and core material. However, it is independent of the physical size of the core. By increasing inductance, the peak-to-peak inductor ripple current will decrease, therefore reducing core loss. Unfortunately, increased inductance requires more turns of wire and, therefore, copper losses will increase. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or Kool Mµ® cores. Ferrite designs have very low core loss and are preferred at high switching frequencies. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manufacturer is Kool Mµ core material. Toroids are very space efficient, expecially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. However, surface mount designs that do not increase the height significantly are available 6 U Catch Diode Selection The diode D1 shown in Figure 1 conducts during the offtime. It is important to adequately specify the diode peak current and average power dissipation so as not to exceed the diode ratings. Losses in the catch diode depend on forward drop and switching times. Therefore, Schottky diodes are a good choice for low drop and fast switching times. Since the catch diode carries the load current during the off-time, the average diode current is dependent on the switch duty cycle. At high input voltages, the diode conducts most of the time. As VIN approaches VOUT, the diode conducts only a small fraction of the time. The most stressful condition for the diode is when the regulator output is shorted to ground. Under short-circuit conditions (VOUT = 0V), the diode must safely handle ISC(PK) at close to 100% duty cycle. Under normal load conditions, the average current conducted by the diode is simply: V −V  IDIODE(avg) = ILOAD(avg)  IN OUT   VIN + VD  W U U Remember to keep lead lengths short and observe proper grounding (see Board Layout Considerations) to avoid ringing and increased dissipation. The forward voltage drop allowed in the diode is calculated from the maximum short-circuit current as:  P  V + V  VD ≈  D   IN D   ISC(avg)   VIN  where PD is the allowable diode power dissipation and will be determined by efficiency and/or thermal requirements (see Efficiency Considerations). Most LTC1701 circuits will be well served by either an MBR0520L or an MBRM120L. An MBR0520L is a good choice for IOUT(MAX) ≤ 500mA, as long as the output doesn’t need to sustain a continuous short. Kool Mµ is a registered trademark of Magnetics, Inc. LTC1701/LTC1701B APPLICATIO S I FOR ATIO Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT/ VIN. To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≈ IMAX VOUT VIN − VOUT VIN ( ) where the maximum average output current IMAX equals the peak current (1 Amp) minus half the peak-to-peak ripple current, IMAX = 1 – ∆IL/2. This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours lifetime. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the design. An additional 0.1µF to 1µF ceramic capacitor is also recommended on VIN for high frequency decoupling. Output Capacitor (COUT) Selection The selection of COUT is driven by the required ESR. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple (∆VOUT) is determined by:  1 ∆VOUT ≈ ∆IL  ESR +   8 fCOUT  where f = operating frequency, COUT = output capacitance and ∆IL = ripple current in the inductor. With ∆IL = 0.4 IOUT(MAX) the output ripple will be less than 100mV with: ESRCOUT < 100mΩ Once the ESR requirements for COUT have been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. U When the capacitance of COUT is made too small, the output ripple at low frequencies will be large enough to trip the ITH comparator. This causes Burst Mode operation to be activated when the LTC1701 would normally be in continuous mode operation. The effect can be improved at higher frequencies with lower inductor values. In surface mount applications, multiple capacitors may have to be paralleled to meet the capacitance, ESR or RMS current handling requirement of the application. Aluminum electrolyte and dry tantulum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS, AVX TPSV and KEMET T510 series of surface mount tantalums, avalable in case heights ranging from 2mm to 4mm. Other capacitor types include Nichicon PL series, Sanyo POSCAP and Panasonic SP. Ceramic Capacitors Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. These are tempting for switching regulator use because of their very low ESR. Unfortunately, the ESR is so low that it can cause loop stability problems. Solid tantalum capacitor ESR generates a loop “zero” at 5kHz to 50kHz that is instrumental in giving acceptable loop phase margin. Ceramic capacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective. Also, ceramic caps are prone to temperature effects which requires the designer to check loop stability over the operating temperature range. For these reasons, most of the input and output capacitance should be composed of tantalum capacitors for stability combined with about 0.1µF to 1µF of ceramic capacitors for high frequency decoupling. Great care must be taken when using only ceramic input and output capacitors. The OPTI-LOOP compensation allows transient response to be optimized for all types of output capacitors, including low ESR ceramics. Setting the Output Voltage The LTC1701 develops a 1.25V reference voltage between the feedback pin, VFB, and the signal ground as shown in W U U 7 LTC1701/LTC1701B APPLICATIO S I FOR ATIO VOUT = 1.25V(1 + R2/R1) To prevent stray pickup, a capacitor of about 5pF can be added across R1, located close to the LTC1701. Unfortunately, the load step response is degraded by this capacitor. Using a good printed circuit board layout eliminates the need for this capacitor. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. VOUT Figure 2. The output voltage is set by a resistive divider according to the following formula: LTC1701 VFB SGND 5pF CF R2 1% R1 1% 1701 F02 Figure 2. Setting the Output Voltage Transient Response The OPTI-LOOP compensation allows the transient response to be optimized for a wide range of loads and output capacitors. The availability of the ITH pin not only allows optimization of the control loop behavior but also provides a DC coupled and AC filtered closed-loop response test point. The DC step, rise time and settling at this test point truly reflects the closed-loop response. Assuming a predominately second order system, phase margin and/or damping factor can be estimated using the percentage of overshoot seen at this pin. The bandwidth can also be estimated by examining the rise time at the pin. The ITH external components shown in the Figure 1 circuit will provide an adequate starting point for most applications. The series R3-C3 filter sets the dominant pole-zero loop compensation. The values can be modified slightly (from 0.5 to 2 times their suggested values) to optimize transient response once the final PC layout is done and the particular output capacitor type and value have been determined. The output capacitors need to be selected because the various types and values determine the loop feedback factor gain and phrase. An output current pulse 8 U of 20% to 100% of full-load current having a rise time of 1µs to 10µs will produce output voltage and ITH pin waveforms that will give a sense of the overall loop stability without breaking the feedback loop. The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard secondorder overshoot/DC ratio cannot be used to determine phase margin. The gain of the loop increases with R3 and the bandwidth of the loop increases with decreasing C3. If R3 is increased by the same factor that C3 is decreased, the zero frequency will be kept the same, thereby keeping the phase the same in the most critical frequency range of the feedback loop. In addition, a feed-forward capacitor, CF, can be added to improve the high frequency response, as shown in Figure 2. Capacitor CF provides phase lead by creating a high frequency zero with R2 which improves the phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. RUN Function The ITH/RUN pin is a dual purpose pin that provides the loop compensation and a means to shut down the LTC1701. Soft-start can also be implemented with this pin. Soft-start reduces surge currents from VIN by gradually increasing the internal peak inductor current. Power supply sequencing can also be accomplished using this pin. An external pull-up is required to charge the external capacitor C3 in Figure 1. Typically, a 1M resistor between VIN and ITH/RUN is used. When the voltage on ITH/RUN reaches about 0.8V the LTC1701 begins operating. At this point the error amplifier pulls up the ITH/RUN pin to the normal operating range of 1.25V to 2.25V. Soft-start can be implemented by ramping the voltage on ITH/RUN during start-up as shown in Figure 3(b). As the voltage on ITH/RUN ramps through its operating range the internal peak current limit is also ramped at a proportional linear rate. W U U LTC1701/LTC1701B APPLICATIO S I FOR ATIO During normal operation the voltage on the ITH/RUN pin will vary from 1.25V to 2.25V depending on the load current. Pulling the ITH/RUN pin below 0.8V puts the LTC1701 into a low quiescent current shutdown mode (IQ < 1µA). This pin can be driven directly from logic as shown in Figures 3(a). ITH/RUN R1 D1 CC C1 RC ITH/RUN CC RC (a) (b) Figure 3. ITH/RUN Pin Interfacing Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and what change would produce the most improvement. Percent efficiency can be expressed as: %Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, 4 main sources usually account for most of the losses in LTC1701 circuits: 1) LTC1701 VIN current, 2) switching losses, 3) I2R losses, 4) Schottky diode losses. 1) The VIN current is the DC supply current given in the electrical characteristics which excludes MOSFET driver and control currents. VIN current results in a small (< 0.1%) loss that increases with VIN, even at no load. 2) The switching current is the sum of the internal MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFET. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the control circuit current. In U continuous mode, IGATECHG = f • QP, where QP is the gate charge of the internal MOSFET switch. 3) I2R Losses are predicted from the DC resistances of the MOSFET and inductor. In continuous mode the average output current flows through L, but is “chopped” between the topside internal MOSFET and the Schottky diode. At low supply voltages where the switch on-resistance is higher and the switch is on for longer periods due to the higher duty cycle, the switch losses will dominate. Using a larger inductance helps minimize these switch losses. At high supply voltages, these losses are proportional to the load. I2R losses cause the efficiency to drop at high output currents. 4) The Schottky diode is a major source of power loss at high currents and gets worse at low output voltages. The diode loss is calculated by multiplying the forward voltage drop times the diode duty cycle multiplied by the load current. Other “hidden” losses such as copper trace and internal battery resistances can account for additional efficiency degradations in portable systems. It is very important to include these “system” level losses in the design of a system. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses including Schottky conduction losses during dead-time and inductor core losses generally account for less than 2% total additional loss. THERMAL CONSIDERATIONS The power handling capability of the device at high ambient temperatures will be limited by the maximum rated junction temperature (125°C). It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices. 1701 F03 W U U 9 LTC1701/LTC1701B APPLICATIO S I FOR ATIO The following table lists thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 3/32" FR-4 board with one ounce copper. Table 1. Measured Thermal Resistance COPPER AREA TOPSIDE* 2500mm2 1000mm2 225mm2 100mm2 50mm2 BACKSIDE 2500mm2 2500mm2 2500mm2 2500mm2 2500mm2 BOARD AREA 2500mm2 2500mm2 2500mm2 2500mm2 2500mm2 THERMAL RESISTANCE θJA 125°C/W 125°C/W 130°C/W 135°C/W 150°C/W *Device is mounted on topside. Calculating Junction Temperature In a majority of applications, the LTC1701 does not dissipate much heat due to its high efficiency. However, in applications where the switching regulator is running at high duty cycles or the part is in dropout with the switch turned on continuously (DC), some thermal analysis is required. The goal of the thermal analysis is to determine whether the power dissipated by the regulator exceeds the maximum junction temperature. The temperature rise is given by: TRISE = PD • θJA where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature is given by: TJ = TRISE + TAMBIENT As an example, consider the case when the LTC1701 is in dropout at an input voltage of 3.3V with a load current of 0.5A. The ON resistance of the P-channel switch is approximately 0.30Ω. Therefore, power dissipated by the part is: PD = I2 • RDS(ON) = 75mW The SOT package junction-to-ambient thermal resistance, θJA, will be in the range of 125°C/W to 150°C/W. Therefore, the junction temperature of the regulator operating in a 25°C ambient temperature is approximately: TJ = 0.075 • 150 + 25 = 36°C 10 U Remembering that the above junction temperature is obtained from a RDS(ON) at 25°C, we might recalculate the junction temperature based on a higher RDS(ON) since it increases with temperature. However, we can safely assume that the actual junction temperature will not exceed the absolute maximum junction temperature of 125°C. Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1701. These items are also illustrated graphically in the layout diagram of Figure 4. Check the following in your layout: 1. Does the capacitor CIN connect to the power VIN (Pin 5) and GND (Pin 2) as close as possible? This capacitor provides the AC current to the internal P-channel MOSFET and its driver. 2. Is the Schottky diode closely connected between the ground (Pin 2) and switch output (Pin 1)? 3. Are the COUT, L1 and D1 closely connected? The Schottky anode should connect directly to the input capacitor ground. 4. The resistor divider, R1 and R2, must be connected between the (+) plate of COUT and a ground line terminated near GND (Pin 2). The feedback signal FB should be routed away from noisy components and traces, such as the SW line (Pin 1). 5. Keep sensitive components away from the SW pin. The input capacitor CIN, the compensation capacitor CC and all the resistors R1, R2, RC and RS should be routed away from the SW trace and the components L1 and D1. L1 VOUT COUT 1 SW LTC1701 2 GND R2 3 VFB ITH/RUN 4 VIN 5 VIN CIN W U U + D1 + RS RC CC R1 BOLD LINES INDICATE HIGH CURRENT PATHS 1701 F04 Figure 4. LTC1701 Layout Diagram (See Board Layout Checklist) LTC1701/LTC1701B TYPICAL APPLICATIO S 2mm Nominal Height 1.5V Converter VIN 2.5V TO 5.5V R4 1M C4 1µF R3 5.1k L1 4.7µH VIN SW D1 R2 20k ITH/RUN GND C3 330pF C1: AVX TAJA156M010R C2: AVX TAJA226M006R C4: TAIYO YUDEN LMK212BJ105MG C5: TAIYO YUDEN JMK212BJ475MG VFB R1 100k C2 22µF C1 15µF + + EFFICIENCY (%) LTC1701 All Ceramic Capacitor 2.5V Converter VIN 2.5V TO 5.5V R4 1M C1 10µF C4 1µF R3 5.1k C3 180pF C1, C2: TAIYO YUDEN JMK316BJ106ML C4, C5: TAIYO YUDEN LMK212BJ105MG L1 4.7µH VIN SW D1 LTC1701 ITH/RUN GND R1 121k C6 33pF VFB R2 121k C2 10µF C5 1µF EFFICIENCY (%) 5V to 3.3V Converter with Push-Button On/Off VIN 3.3V TO 5.5V ON 15µF L1 4.7µH VIN SW D1 LTC1701 R4 1M ITH/RUN GND R5 5.1M R3 5.1k C3 330pF D1: MBRM120L L1: MURATA LQH3C4R7M24 1701 TA03a + C1 C4 1µF OFF C1: AVX TAJA156M010R C2: AVX TAJA226M006R C4, C5: TAIYO YUDEN LMK212BJ105MG Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Efficiency Curve 90 VOUT (1.5V/0.5A) 85 80 V IN = 2.5V V IN = 3.3V C5 4.7µF 75 70 65 60 D1: MBRM120L L1: MURATA LQH3C4R7M24 1701 TA01a 55 VOUT = 1.5V 50 1 10 100 LOAD CURRENT (mA) LTC1701 LTC1701B 1000 1701TA01b Efficiency Curve 100 VOUT (2.5V/0.5A) VOUT = 2.5V 95 V IN = 3.3V 90 85 80 75 V IN = 5.0V L1: MURATA LQH3C4R7M24 D1: MBRM120L 1701 TA02 LTC1701 LTC1701B 70 1 10 100 LOAD CURRENT (mA) 1000 1701 TA02b LTC1701B Low Current Pulse Skip VOUT (3.3V/ 0.5A) VOUT 20mV/DIV R2 34k VFB R1 20.5k C2 22µF + C5 1µF IL 50mA/DIV VIN = 5V VOUT = 2.5V 5µs/DIV 1701 TA03b 11 LTC1701/LTC1701B TYPICAL APPLICATIO VIN 2.5V TO 4.2V + C4 1µF ×5R R4 1M C1 22µF R3 5.1k LTC1701 C1, C2: AVX TAJA226M006R C6: TAIYO YUDEN JMK212BJ475MG PACKAGE DESCRIPTIO 2.60 – 3.00 (0.102 – 0.118) 1.50 – 1.75 (0.059 – 0.069) 0.35 – 0.55 (0.014 – 0.022) 0.09 – 0.20 (0.004 – 0.008) (NOTE 2) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DIMENSIONS ARE INCLUSIVE OF PLATING 3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 4. MOLD FLASH SHALL NOT EXCEED 0.254mm 5. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ) RELATED PARTS PART NUMBER LTC1174/LTC1174-3.3/ LTC1174-5 LTC1265 LT1375/LT1376 LTC1474/LTC1475 LTC1622 LTC1627 LTC1707 LTC1771 LTC1772 LTC1877/LTC1878 LTC3404 DESCRIPTION High Efficiency Step-Down and Inverting DC/DC Converters 1.2A, High Efficiency Step-Down DC/DC Converter 1.5A, 500kHz Step-Down Switching Regulators Low Quiescent Current High Efficiency Step-Down Converters Low Input Voltage Current Mode Step-Down DC/DC Controller Monolithic Synchronous Step-Down Switching Regulator Monolithic Synchronous Step-Down Switching Regulator Low Quiescent Current, High Efficiency Step-Down Controller Low Input Voltage Current Mode Step-Down DC/DC Controller High Efficiency, Monolithic Synchronous Step-Down Regulators 1.4MHz High Efficiency Monolithic Synchronous Step-Down Reg COMMENTS Monolithic Switching Regulator, Burst Mode Operation, IOUT Up to 300mA, SO-8 Monolithic, Burst Mode Operation, High Efficiency High Frequency, Small Inductor, High Efficiency, SO-8 10µA IQ, 8-Pin MSOP and SO Packages High Frequency, High Efficiency, 8-Pin MSOP SO-8, 2.65V ≤ VIN ≤ 10V, IOUT Up to 500mA SO-8, 2.95V ≤ VIN ≤ 10V, VREF Output 10µA IQ, 8-Pin MSOP and SO Packages 550kHz, 6-Pin SOT-23, IOUT Up to 5A, 2.2V < VIN < 10V 10µA IQ, 2.65 ≤ VIN ≤ 10V, MSOP Package, up to 600mA 95% Efficiency, 10µA IQ, MSOP Package, up to 600mA 1701Bfa LT/TP 1100 REV A 2K • PRINTED IN USA 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com U U Single Cell Li-Ion to 3.3V Zeta Converter C6 4.7µF L1 4.7µH + VIN SW L2 D1 R2 34k VOUT (3.3V) VIN 2.5V 3.0V 3.5V 4.0V 4.2V IOUT(MAX) 200mA 225mA 250mA 280mA 290mA + C2 22µF ITH/RUN GND C3 330pF VFB R1 20.5k D1: MBR0520L L1, L2: SUMIDA CLQ72-4R7 DRG NO 6333-JPS-010 1701 TA04 Dimensions in inches (millimeters) unless otherwise noted. S5 Package 5-Lead Plastic SOT-23 (LTC DWG # 05-08-1633) 0.00 – 0.15 (0.00 – 0.006) 0.90 – 1.45 (0.035 – 0.057) 2.80 – 3.00 (0.110 – 0.118) (NOTE 3) 0.35 – 0.50 0.90 – 1.30 (0.014 – 0.020) (0.035 – 0.051) FIVE PLACES (NOTE 2) 1.90 (0.074) REF 0.95 (0.037) REF S5 SOT-23 0599 © LINEAR TECHNOLOGY CORPORATION 1999
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