LTC1707 High Efficiency Monolithic Synchronous Step-Down Switching Regulator
FEATURES
s s s
DESCRIPTIO
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s s s
s s s
600mA Output Current (VIN ≥ 4V) High Efficiency: Up to 96% Constant Frequency: 350kHz Synchronizable to 550kHz 2.85V to 8.5V VIN Range 0.8V Feedback Reference Allows Low Voltage Outputs: 0.8V ≤ VOUT ≤ VIN No Schottky Diode Required 1.19V ± 1% Reference Output Pin Selectable Burst ModeTM Operation/Pulse Skipping Mode Low Dropout Operation: 100% Duty Cycle Precision 2.7V Undervoltage Lockout Current Mode Control for Excellent Line and Load Transient Response Low Quiescent Current: 200µA Shutdown Mode Draws Only 11µA Supply Current Available in 8-Lead SO Package
The LTC®1707 is a high efficiency monolithic current mode synchronous buck regulator using a fixed frequency architecture. The operating supply range is from 8.5V down to 2.85V, making it suitable for both single and dual lithium-ion battery-powered applications. Burst Mode operation provides high efficiency at low load currents. 100% duty cycle provides low dropout operation, extending operating time in battery-powered systems. The switching frequency is internally set at 350kHz, allowing the use of small surface mount inductors. For noise sensitive applications it can be externally synchronized up to 550kHz. Burst Mode operation is inhibited during synchronization or when the SYNC/MODE pin is pulled low preventing low frequency ripple from interfering with audio circuitry. Soft-start is provided by an external capacitor. The internal synchronous MOSFET switch increases efficiency and eliminates the need for an external Schottky diode, saving components and board space. Low output voltages down to 0.8V are easily achieved due to the 0.8V internal reference. The LTC1707 comes in an 8-lead SO package.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a trademark of Linear Technology Corporation.
APPLICATIO S
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Cellular Telephones Portable Instruments Wireless Modems RF Communications Distributed Power Systems Single and Dual Cell Lithium
TYPICAL APPLICATIO
VIN* 3V TO 8.5V
100 VOUT = 3.3V 95 VIN = 6V VIN = 3.6V
6
+
VIN RUN LTC1707 SYNC/MODE ITH
SW VREF VFB
5 8 3
15µH
22µF 16V
+
249k
2 7 1 47pF
100µF 6.3V
VOUT 3.3V
EFFICIENCY (%)
90 85 80 75 VIN = 8.4V
80.6k GND 4 *VOUT FOLLOWS VIN FOR 3V < VIN < 3.3V
1707 F01a
70 1 10 100 OUTPUT CURRENT (mA) 1000
1707 F01b
Figure 1a. High Efficiency Low Dropout Step-Down Converter
Figure 1b. Efficiency vs Output Load Current
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LTC1707
ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW ITH 1 RUN/SS 2 VFB 3 GND 4 8 7 6 5 VREF SYNC/MODE VIN SW
Input Supply Voltage ................................ – 0.3V to 10V ITH Voltage ................................................. – 0.3V to 5V RUN/SS, VFB Voltages ............................... – 0.3V to VIN SYNC/MODE Voltage ................................. – 0.3V to VIN P-Channel Switch Source Current (DC) .............. 800mA N-Channel Switch Sink Current (DC) .................. 800mA Peak SW Sink and Source Current ......................... 1.5A Operating Ambient Temperature Range Commercial ............................................ 0°C to 70°C Industrial ........................................... – 40°C to 85°C Junction Temperature (Note 2) ............................. 125°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART NUMBER LTC1707CS8 LTC1707IS8 S8 PART MARKING 1707 1707I
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125°C, θJA = 120°C/ W
Consult factory for Military grade parts.
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise specified.
SYMBOL IVFB VFB ∆VOVL ∆VFB VLOADREG IS PARAMETER Feedback Current Regulated Feedback Voltage Output Overvoltage Lockout Reference Voltage Line Regulation Output Voltage Load Regulation Input DC Bias Current Pulse Skipping Mode Burst Mode Operation Shutdown Shutdown Run/SS Threshold Soft-Start Current Source SYNC/MODE Pull-Up Current Oscillator Frequency Undervoltage Lockout CONDITIONS (Note 3) (Note 3) ∆VOVL = VOVL – VFB VIN = 3V to 8.5V (Note 3) ITH Sinking 2µA (Note 3) ITH Sourcing 2µA (Note 3) (Note 4) VIN = 8.5V, VOUT = 3.3V, VSYNC/MODE = 0V VITH = 0V, VIN = 8.5V, VSYNC/MODE = Open VRUN/SS = 0V, 3V < VIN < 8.5V VRUN/SS = 0V, VIN < 3V VRUN/SS Ramping Positive VRUN/SS = 0V VSYNC/MODE = 0V VFB = 0.7V VFB = 0V VIN Ramping Down from 3V (0°C to 70°C) VIN Ramping Up from 0V (0°C to 70°C) VIN Ramping Down from 3V (–40°C to 85°C) VIN Ramping Up from 0V (–40°C to 85°C) ISW = – 100mA ISW = – 100mA VIN = 4V, ITH = 1.4V, Duty Cycle < 40% VRUN/SS = 0V IREF = 0µA 0V ≤ IREF ≤ 100µA MIN
q
ELECTRICAL CHARACTERISTICS
0.78 20
TYP 6 0.80 60 0.002 0.5 – 0.5 300 200 11 6 0.7 2.25 1.5 350 35 2.70 2.80 2.70 2.80 0.5 0.6 0.915 ±10 1.19 2.3
MAX 60 0.82 110 0.01 0.8 – 0.8
UNITS nA V mV %/V % % µA µA µA µA V µA µA kHz kHz V V V V Ω Ω A nA mV mV
320 35 1.0 3.3 2.5 385 2.85 3.00 2.85 3.00 0.7 0.8 1.10 ±1000 1.202 15
VRUN/SS IRUN/SS ISYNC/MODE fOSC VUVLO
0.4 1.2 0.5 315 2.55 2.60 2.45 2.50
RPFET RNFET IPK ILSW VREF ∆VREF
RDS(ON) of P-Channel FET RDS(ON) of N-Channel FET Peak Inductor Current SW Leakage Reference Output Voltage Reference Output Load Regulation
0.70
q q
1.178
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • 110°C/W)
Note 3: The LTC1707 is tested in a feedback loop that servos VFB to the balance point for the error amplifier (VITH = 0.8V). Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency.
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LTC1707 TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Input Voltage
100
95
ILOAD = 100mA ILOAD = 300mA ILOAD = 10mA
EFFICIENCY (%)
EFFICIENCY (%)
90
80 75 70 65
PULSE SKIPPING MODE
EFFICIENCY (%)
85
80
VOUT = 2.5V L = 15µH Burst Mode OPERATION 0 2 6 4 INPUT VOLTAGE (V) 8 10
1707 G01
75
Undervoltage Lockout Threshold vs Temperature
3.00 350
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
2.95
SUPPLY CURRENT IN SHUTDOWN (µA)
DC SUPPLY CURRENT (µA)
2.90 2.85 2.80 2.75 2.70 2.65 2.60 2.55 2.50 – 50 – 25
VIN RAMPING UP
VIN RAMPING DOWN
0 25 50 75 TEMPERATURE (°C)
Reference Voltage vs Temperature
1.200 VIN = 5V
OSCILLATOR FREQUENCY (kHz)
REFERENCE VOLTAGE (V)
1.195
370 360 350 340 330 320 310
OSCILLATOR FREQUENCY (kHz)
1.190
1.185
1.180 – 50
– 25
0 25 50 75 TEMPERATURE (°C)
UW
100
1707 G04
Efficiency vs Load Current
100 95 Burst Mode 90 OPERATION 85 100
Efficiency vs Load Current
VIN = 2.8V 95 90 85 VIN = 7.2V 80 75 70 1 10 100 OUTPUT CURRENT (mA) 1000
1707 G03
VIN = 3.6V
60 55 50 1
VIN = 3.6V VOUT = 2.5V L = 15µH 10 100 OUTPUT CURRENT (mA) 1000
1707 G02
VOUT = 2.5V L = 15µH Burst Mode OPERATION
DC Supply Current vs Input Voltage
22 20 18 16 14 12 10 8 6 4 2.5 3.5 4.5 5.5 6.5 INPUT VOLTAGE (V) 7.5 8.5 PULSE SKIPPING MODE 300 250 200 150 100 50 0 125 TJ = 25°C VOUT = 1.8V LOAD CURRENT = 0A
Supply Current in Shutdown vs Input Voltage
VRUN/SS = 0V TJ = 85°C TJ = 25°C
Burst Mode OPERATION
TJ = – 40°C
2.5
3.5
4.5 5.5 6.5 INPUT VOLTAGE (V)
7.5
8.5
1707 G05
1707 G06
Oscillator Frequency vs Temperature
390 380 VIN = 5V 390 380 370 360 350 340 330 320 310 300 – 25 0 25 50 75 TEMPERATURE (°C) 100 125
Oscillator Frequency vs Input Voltage
100
125
300 – 50
2.5
3.5
4.5 5.5 6.5 INPUT VOLTAGE (V)
7.5
8.5
1707 G07
1707 G08
1627 G09
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LTC1707 TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Output Current vs Input Voltage
1000 VOUT = 1.8V 800
OUTPUT CURRENT (mA) SWITCH LEAKAGE (nA)
1200 1000 800 600 400 SYNCHRONOUS SWITCH
SWITCH RESISTANCE (Ω)
VOUT = 1.5V
600 VOUT = 5V 400 VOUT = 3.3V VOUT = 2.5V VOUT = 2.9V TJ = 85°C L = 15µH 0 2.5 3.5 4.5 5.5 6.5 INPUT VOLTAGE (V) 7.5 8.5
200
Switch Resistance vs Input Voltage
0.9 0.8
SWITCH RESISTANCE (Ω)
0.7 SYNCHRONOUS SWITCH 0.6 0.5 0.4 0.3 0.2 0.1 0 2.5 3.5 4.5 5.5 6.5 INPUT VOLTAGE (V) 7.5 8.5 MAIN SWITCH
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UW
1707 G10
1707 G13
Switch Leakage Current vs Temperature
1800 1600 1400 VIN = 8.4V
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1
Switch Resistance vs Temperature
VIN = 5V SYNCHRONOUS SWITCH
MAIN SWITCH
200 0 – 50 – 25 0 25 50 75 TEMPERATURE (°C)
MAIN SWITCH 100 125
0 – 50
– 25
0 25 50 75 TEMPERATURE (°C)
100
125
1707 G11
1707 G12
Load Step Transient Response
ITH 0.5V/DIV SW 5V/DIV VOUT 20mV/DIV AC COUPLED ILOAD 200mA/DIV 25µs/DIV VIN = 5V VOUT = 3.3V L = 15µH CIN = 22µF COUT = 100µF ILOAD = 0mA TO 500mA Burst Mode OPERATION
1707 G14
Burst Mode Operation
VOUT 50mV/DIV AC COUPLED ILOAD 500mA/DIV
VIN = 5V VOUT = 3.3V L = 15µH CIN = 22µF COUT = 100µF ILOAD = 50mA
10µs/DIV
1707 G15
LTC1707
PI FU CTIO S
ITH (Pin 1): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is 0V to 1.2V. RUN/SS (Pin 2): Combination of Soft-Start and Run Control Inputs. A capacitor to ground at this pin sets the ramp time to full current output. The time is approximately 0.5s/µF. Forcing this pin below 0.4V shuts down the LTC1707. VFB (Pin 3): Feedback Pin. Receives the feedback voltage from an external resistive divider across the output. GND (Pin 4): Ground Pin. SW (Pin 5): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. VIN (Pin 6): Main Supply Pin. Must be closely decoupled to GND, Pin 4. SYNC/MODE (Pin 7): This pin performs two functions: 1) synchronize with an external clock and 2) select between two modes of low load current operation. To synchronize with an external clock, apply a TTL/CMOS compatible clock with a frequency between 385kHz and 550kHz. To select Burst Mode operation, float the pin or tie it to VIN. Grounding Pin 7 forces pulse skipping mode operation. VREF (Pin 8): The Output of a 1.19V ±1% Precision Reference. May be loaded up to 100µA and is stable with up to 2000pF load capacitance.
FU CTIO AL DIAGRA
BURST DEFEAT X 1.5µA SYNC/MODE 7
Y = “0” ONLY WHEN X IS A CONSTANT “1” Y
VIN
OSC
0.6V VFB 3
VREF 8
VIN 0.8V
+
EA 0.12V ITH 1 S RUN/SOFT START R Q Q
1.19V REF
2.25µA VIN RUN/SS 2
–
UVLO TRIP = 2.7V
+
OVDET 0.86V SHUTDOWN
– +
IRCMP 5 SW 4 GND
1707 BD
+
–
+
FREQ SHIFT
–
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+ –
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VIN
VIN
SLOPE COMP 0.4V
6 VIN EN SLEEP
–
+
6Ω
ICOMP
BURST
SWITCHING LOGIC AND BLANKING CIRCUIT
ANTISHOOT-THRU
–
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LTC1707
OPERATIO
Main Control Loop The LTC1707 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of error amplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.8V reference, which, in turn, causes the ITH voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse as indicated by the current reversal comparator IRCMP, or the beginning of the next cycle. The main control loop is shut down by pulling the RUN/SS pin low. Releasing RUN/SS allows an internal 2.25µA current source to charge soft-start capacitor CSS. When CSS reaches 0.7V, the main control loop is enabled with the ITH voltage clamped at approximately 5% of its maximum value. As CSS continues to charge, ITH is gradually released, allowing normal operation to resume. Comparator OVDET guards against transient overshoots > 7.5% by turning the main switch off and keeping it off until the fault is removed. Burst Mode Operation The LTC1707 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply allow the SYNC/MODE pin to float or connect it to a logic high. To disable Burst Mode operation and enable pulse skipping mode, connect the SYNC/MODE pin to GND. In this mode, efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 30mA.
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(Refer to Functional Diagram)
When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 200mA, even though the voltage at the ITH pin indicates a lower value. The voltage at the ITH pin drops when the inductor’s average current is greater than the load requirement. As the ITH voltage drops below 0.12V, the BURST comparator trips, causing the internal sleep line to go high and forcing off both internal power MOSFETs. In sleep mode, both power MOSFETs are held off and the internal circuitry is partially turned off, reducing the quiescent current to 200µA. The load current is now being supplied from the output capacitor. When the output voltage drops, causing ITH to rise above 0.22V, the top MOSFET is again turned on and this process repeats. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator is reduced to about 35kHz, 1/10 the nominal frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing runaway. The oscillator’s frequency will progressively increase to 350kHz (or the synchronized frequency) when VFB rises above 0.3V. Frequency Synchronization The LTC1707 can be synchronized with an external TTL/CMOS compatible clock signal with an amplitude of at least 2VP-P. The frequency range of this signal must be from 385kHz to 550kHz. Do not attempt to synchronize the LTC1707 below 385kHz as this may cause abnormal operation and an undesired frequency spectrum. The top MOSFET turn-on follows the rising edge of the external source. When the LTC1707 is synchronized to an external source, the LTC1707 operates in PWM pulse skipping mode. In this mode, when the output load is very low, current comparator ICOMP remains tripped for more than one cycle and forces the main switch to stay off for the same number of cycles. Increasing the output load slightly allows constant frequency PWM operation to resume. This mode exhibits low output ripple as well as low audio noise and reduced RF interference while providing reasonable low current efficiency.
LTC1707
OPERATIO
Frequency synchronization is inhibited when the feedback voltage VFB is below 0.6V. This prevents the external clock from interfering with the frequency foldback for shortcircuit protection. Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. In Burst Mode operation or pulse skipping mode operation with the output lightly loaded, the LTC1707 transitions through continuous mode as it enters dropout. Undervoltage Lockout A precision undervoltage lockout shuts down the LTC1707 when VIN drops below 2.7V, making it ideal for single lithium-ion battery applications. In lockout, the LTC1707 draws only several microamperes, which is low enough to prevent deep discharge and possible damage to the lithiumion battery nearing its end of charge. A 100mV hysteresis ensures reliable operation with noisy input supplies. Low Supply Operation The LTC1707 is designed to operate down to a 2.85V input voltage. At this voltage the converter is most likely to be running at high duty cycles or in dropout where the main
1200 1000 OUTPUT CURRENT (mA) 800 VOUT = 5V 600 400 200 0 2.5 3.5 4.5 5.5 6.5 INPUT VOLTAGE (V) 7.5 8.5 VOUT = 3.3V VOUT = 2.5V VOUT = 2.9V TJ = 25°C L = 15µH
OUTPUT CURRENT (mA)
VOUT = 1.8V VOUT = 1.5V
MAXIMUM INDUCTOR PEAK CURRENT (mA)
Figure 2a. Maximum Output Current vs Input Voltage (Unsynchronized)
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switch is on continuously. Hence, the I2R loss is due mainly to the RDS(ON) of the P-channel MOSFET. See Efficiency Considerations in the Applications Information section. Below VIN = 4V, the output current must be derated as shown in Figures 2a and 2b. For applications that require 500mA below VIN = 4V, select the LTC1627.
1200 1000 800 600 400 200 0 2.5 3.5 4.5 5.5 6.5 INPUT VOLTAGE (V) 7.5 8.5 VOUT = 3.3V VOUT = 2.5V VOUT = 2.9V TJ = 25°C L = 15µH EXT SYNC AT 400kHz VOUT = 1.8V VOUT = 1.5V VOUT = 5V
1707 F02b
Figure 2b. Maximum Output Current vs Input Voltage (Synchronized)
Slope Compensation and Inductor Peak Current Slope compensation provides stability by preventing subharmonic oscillations. It works by internally adding a ramp to the inductor current signal at duty cycles in excess of 40%. As a result, the maximum inductor peak current is lower for VOUT/VIN > 0.4 than when VOUT/VIN < 0.4. See the inductor peak current as a function of duty cycle graph in Figure 3. The worst-case peak current reduction occurs
1000 WITHOUT EXTERNAL CLOCK SYNC WORST-CASE EXTERNAL CLOCK SYNC
900
800
700
600 VIN = 4V 500 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%)
1707 F03
1707 F02a
Figure 3. Maximum Inductor Peak Current vs Duty Cycle
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LTC1707
APPLICATIO S I FOR ATIO
with the oscillator synchronized at its minimum frequency, i.e., to a clock just above the oscillator free-running frequency. The actual reduction in average current is less than for peak current. The basic LTC1707 application circuit is shown in Figure 1a. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Value Calculation The inductor selection will depend on the operating frequency of the LTC1707. The internal preset frequency is 350kHz, but can be externally synchronized up to 550kHz. The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use of smaller inductor and capacitor values. However, operating at a higher frequency generally results in lower efficiency because of increased internal gate charge losses. The inductor value has a direct effect on ripple current. The ripple current ∆IL decreases with higher inductance or frequency and increases with higher VIN or VOUT.
∆IL =
( )( )
V VOUT 1 − OUT VIN fL 1
Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ∆IL = 0.4(IMAX). The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 200mA. Lower inductor values (higher ∆IL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores,
Kool Mµ is a registered trademark of Magnetics, Inc.
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forcing the use of more expensive ferrite, molypermalloy, or Kool Mµ® cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Kool Mµ (from Magnetics, Inc.) is a very good, low loss core material for toroids with a “soft” saturation characteristic. Molypermalloy is slightly more efficient at high (>200kHz) switching frequencies but quite a bit more expensive. Toroids are very space efficient, especially when you can use several layers of wire, while inductors wound on bobbins are generally easier to surface mount. New designs for surface mount are available from Coiltronics, Coilcraft and Sumida. CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN required IRMS ≅ IMAX
(1)
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[
VOUT VIN − VOUT VIN
(
)]
1/ 2
This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT /2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet
LTC1707
APPLICATIO S I FOR ATIO
size or height requirements in the design. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple ∆VOUT is determined by:
1 ∆VOUT ≅ ∆IL ESR + 8 fCOUT
where f = operating frequency, COUT = output capacitance and ∆IL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ∆IL increases with input voltage. For the LTC1707, the general rule for proper operation is: COUT required ESR < 0.25Ω Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR/size ratio of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. Remember ESR is typically a direct function of the volume of the capacitor. In surface mount applications multiple capacitors may have to be paralleled to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum, available in case heights ranging from 2mm to 4mm. Other capacitor types include Sanyo POSCAP, KEMET T510
0.8V ≤ VOUT ≤ 8.5V R2 VFB LTC1707 GND
1707 F04
R1
CSS CSS
1707 F05
Figure 4. Setting the LTC1707 Output Voltage
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and T495 series, Nichicon PL series and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Output Voltage Programming The output voltage is set by a resistive divider according to the following formula:
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R2 VOUT = 0.8V 1 + R1
(2)
The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 4. Run/Soft-Start Function The RUN/SS pin is a dual purpose pin that provides the soft-start function and a means to shut down the LTC1707. Soft-start reduces surge currents from VIN by gradually increasing the internal current limit. Power supply sequencing can also be accomplished using this pin. An internal 2.25µA current source charges up an external capacitor CSS. When the voltage on RUN/SS reaches 0.7V the LTC1707 begins operating. As the voltage on RUN/SS continues to ramp from 0.7V to 1.8V, the internal current limit is also ramped at a proportional linear rate. The current limit begins at 25mA (at VRUN/SS ≤ 0.7V) and ends at the Figure 3 value (VRUN/SS ≈ 1.8V). The output current thus ramps up slowly, charging the output capacitor. If RUN/SS has been pulled all the way to ground, there will be a delay before the current starts increasing and is given by:
tDELAY =
0.7CSS 2.25µA
Pulling the RUN/SS pin below 0.4V puts the LTC1707 into a low quiescent current shutdown (IQ < 15µA). This pin can be driven directly from logic as shown in Figure 5. Diode
3.3V OR 5V D1
RUN/SS
RUN/SS
Figure 5. RUN/SS Pin Interfacing
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LTC1707
APPLICATIO S I FOR ATIO
D1 in Figure 5 reduces the start delay but allows CSS to ramp up slowly providing the soft-start function. This diode can be deleted if soft-start is not needed. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC1707 circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in Figure 6. 1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low or from low to high, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches RSW and external inductor RL. In continuous mode the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into SW pin from L is a function of
POWER LOST (W)
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both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses, MOSFET switching losses and inductor core and copper losses generally account for less than 2% total additional loss.
1 VOUT = 1.5V VOUT = 3.3V VOUT = 5V 0.1 0.01 0.001 1 10 100 LOAD CURRENT (mA) VIN = 6V 1000
1707 F06
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Figure 6. Power Lost vs Load Current
Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (∆ILOAD • ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The internal compensation provides adequate compensation for most applications. But if additional compensation is required, the ITH pin can be used for external compensation as shown in Figure 7 (the 47pF capacitor, CC2, is typically needed for noise decoupling).
LTC1707
APPLICATIO S I FOR ATIO
A second, more severe transient is caused by switching in loads with large (>1µF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10µF capacitor charging to 3.3V would require a 250µs rise time, limiting the charging current to about 130mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1707. These items are also illustrated graphically in the layout diagram of Figure 7. Check the following in your layout:
CC2
OPTIONAL
RC
CC1 CSS R2 R1
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 7. LTC1707 Layout Diagram
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1. Are the signal and power grounds segregated? The LTC1707 signal ground consists of the resistive divider, the optional compensation network (RC and CC1), CSS, CREF and CC2. The power ground consists of the (–) plate of CIN, the (–) plate of COUT and Pin 4 of the LTC1707. The power ground traces should be kept short, direct and wide. The signal ground and power ground should converge to a common node in a starground configuration. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and signal ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node SW away from sensitive smallsignal nodes.
CREF 1 2 3 4 ITH VREF 8 7 6 RUN/SS SYNC/MODE LTC1707 VFB GND VIN SW
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+
5 L1
+ +
VOUT COUT VIN
+
CIN
–
1707 F07
–
11
LTC1707
APPLICATIO S I FOR ATIO
Design Example
As a design example, assume the LTC1707 is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.85V. The load current requirement is a maximum of 0.3A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using equation (1),
L=
( )( )
V VOUT 1 − OUT VIN f ∆IL 1
Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL = 120mA and f = 350kHz in equation (3) gives:
L=
(
2.5V 1 − = 24.1µH 350kHz 120mA 4.2V 2.5V
)(
)
CITH 47pF 1 2 CSS 0.1µF 3 4 ITH VREF 8 7 6 5 22µH* R2 169k 1% R1 80.6k 1% * SUMIDA CD54-220 † AVX TPSC107M006R0150 †† AVX TPSC226M016R0375 VOUT 2.5V 0.3A VIN 2.85V TO 4.5V
EFFICIENCY (%) 100 VIN = 3.6V 90 VIN = 4.2V 80
RUN/SS SYNC/MODE LTC1707 VFB GND VIN SW
Figure 8. Single Lithium-Ion to 2.5V/0.3A Regulator from Design Example
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A 22µH inductor works well for this application. For best efficiency choose a 1A inductor with less than 0.25Ω series resistance. CIN will require an RMS current rating of at least 0.15A at temperature and COUT will require an ESR of less than 0.25Ω. In most applications, the requirements for these capacitors are fairly similar. For the feedback resistors, choose R1 = 80.6k. R2 can then be calculated from equation (2) to be:
(3)
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V R2 = OUT − 1 R1 = 171k; use 169k 0.8
Figure 8 shows the complete circuit along with its efficiency curve.
+
COUT† 100µF 6.3V
+
CIN†† 22µF 16V
70
60
1707 F08a
50 1
VOUT = 2.5V L = 22µH Burst Mode OPERATION 10 100 OUTPUT CURRENT (mA) 1000
1707 F08b
LTC1707
TYPICAL APPLICATIO S
5V Input to 3.3V/0.6A Regulator
CITH 47pF 1 2 CSS 0.1µF ITH VREF 8
Double Lithium-Ion Battery to 5V/0.5A Low Dropout Regulator
CITH 47pF 1 2 CSS 0.1µF ITH VREF 8
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* SUMIDA CD54-150 ** AVX TPSC107M006R0150 *** TAIYO YUDEN LMK325BJ106K-T
7 RUN/SS SYNC/MODE LTC1707 3 6 VFB VIN 4 GND SW 5 15µH* R2 249k 1% R1 80.6k 1% VOUT 3.3V 0.6A
VIN = 5V CIN*** 10µF CERAMIC
+
COUT ** 100µF 6.3V
1707 TA01
** AVX TPSD107M010R0100 *** AVX TPSC226M016R0375
* SUMIDA CD54-330
7 RUN/SS SYNC/MODE LTC1707 3 6 VFB VIN 4 GND SW 5 33µH* R2 422k 1% R1 80.6k 1% VOUT 5V 0.5A
VIN ≤ 8.4V
+
+
COUT ** 100µF 10V
CIN*** 22µF 16V
1707 TA02
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LTC1707
TYPICAL APPLICATIO S
3.3V Input to 2.5V/0.4A Regulator
CITH 47pF 1 2 CSS 0.1µF 3 4 ITH RUN/SS VFB GND VREF 8
* SUMIDA CD54-100 ** TAIYO YUDEN LMK325BJ106K-T † AVX TPSC107M006R0150
CITH 47pF 1 2 CSS 0.1µF ITH VREF 8
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7 SYNC/MODE LTC1707 6 VIN SW 5 10µH* R2 169k 1% R1 80.6k 1% VOUT 2.5V 0.4A
VIN = 3.3V
+
COUT† 100µF 6.3V
CIN** 10µF CERAMIC
1707 TA03
Double Lithium-Ion to 2.5V/0.5A Regulator
* SUMIDA CD54-250 ** AVX TPSC107M006R0150 *** AVX TPSC226M016R0375
7 RUN/SS SYNC/MODE LTC1707 3 6 VFB VIN 4 GND SW 5 25µH* R2 169k 1% R1 80.6k 1% VOUT 2.5V 0.5A
VIN ≤ 8.4V
+
+
COUT ** 100µF 6.3V
CIN*** 22µF 16V
1707 TA05
LTC1707
PACKAGE DESCRIPTIO
0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP
0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 – 0.050 (0.406 – 1.270)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Dimensions in inches (millimeters) unless otherwise noted.
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197* (4.801 – 5.004) 8 7 6 5
0.228 – 0.244 (5.791 – 6.197)
0.150 – 0.157** (3.810 – 3.988)
1
2
3
4
0.053 – 0.069 (1.346 – 1.752)
0.004 – 0.010 (0.101 – 0.254)
0.050 (1.270) BSC
SO8 1298
15
LTC1707
TYPICAL APPLICATIO
CITH 47pF 1 2 CSS 0.1µF ITH VREF 8
RELATED PARTS
PART NUMBER LTC1174/LTC1174-3.3 LTC1174-5 LTC1265 LT 1375/LT1376 LTC1436A/LTC1436A-PLL LTC1474/LTC1475 LTC1504A LTC1622 LTC1626 LTC1627 LTC1701 LTC1735 LTC1772 LTC1877 LTC1878
®
DESCRIPTION High Efficiency Step-Down and Inverting DC/DC Converters 1.2A, High Efficiency Step-Down DC/DC Converter 1.5A, 500kHz Step-Down Switching Regulators High Efficiency, Low Noise, Synchronous Step-Down Converters Low Quiescent Current Step-Down DC/DC Converters Monolithic Synchronous Step-Down Switching Regulator Low Input Voltage Current Mode Step-Down DC/DC Controller Low Voltage, High Efficiency Step-Down DC/DC Converter Monolithic Synchronous Step-Down Switching Regulator Monolithic Current Mode Step-Down Switching Regulator High Efficiency, Synchronous Step-Down Converter Low Input Voltage Current Mode Step-Down DC/DC Controller High Efficiency Monolithic Step-Down Regulator High Efficiency Monolithic Step-Down Regulator
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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Single Lithium-Ion to 1.8V/0.3A Regulator
* SUMIDA CD54-150 ** AVX TPSC107M006R0150 *** TAIYO YUDEN LMK325BJ106K-T 7 RUN/SS SYNC/MODE LTC1707 3 6 VFB VIN 4 GND SW 5 15µH* R2 100k 1% R1 80.6k 1% VOUT 1.8V 0.3A VIN ≤ 4.2V
+
COUT ** 100µF 6.3V
CIN*** 10µF CERAMIC
1707 TA04
COMMENTS Monolithic Switching Regulators, IOUT to 450mA, Burst Mode Operation Constant Off-Time, Monolithic, Burst Mode Operation High Frequency, Small Inductor, High Efficiency 24-Pin Narrow SSOP Monolithic, IOUT to 250mA, IQ = 10µA, 8-Pin MSOP Low Cost, Voltage Mode IOUT to 500mA, VIN from 4V to 10V 550kHz Constant Frequency, External P-Channel Switch, IOUT to 4A, VIN From 2V to 10V Monolithic, Constant Off-Time, IOUT to 600mA, Low Supply Voltage Range: 2.5V to 6V Constant Frequency, IOUT to 500mA, Secondary Winding Regulation, VIN from 2.65V to 8.5V Constant Off-Time, IOUT to 500mA, 1MHz Operation, VIN from 2.5V to 5.5V 16-Pin SO and SSOP, VIN Up to 36V, Fault Protection 550kHz, 6-Pin SOT-23, IOUT Up to 5A, VIN from 2.2V to 10V 550kHz, MS8, VIN Up to 10V, IQ = 10µA, IOUT to 600mA 550kHz, MS8, VIN Up to 6V, IQ = 10µA, IOUT to 600mA
1707f LT/TP 0600 4K • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 1999