LTC1821-1AIGW

LTC1821 16-Bit, Ultra Precise, Fast Settling VOUT DAC FEATURES s s DESCRIPTIO s s s s s s 2µs Settling to 0.0015% for 10V Step 1LSB Max DNL and INL Over Industrial Temperature Range On-Chip 4-Quadrant Resistors Allow Precise 0V to 10V, 0V to –10V or ±10V Outputs Low Glitch Impulse: 2nV•s Low Noise: 13nV/√Hz 36-Lead SSOP Package Power-On Reset Asynchronous Clear Pin LTC1821: Reset to Zero Scale LTC1821-1: Reset to Midscale The LTC®1821 is a parallel input 16-bit multiplying voltage output DAC that operates from analog supply voltages of ± 5V up to ±15V. INL and DNL are accurate to 1LSB over the industrial temperature range in both unipolar 0V to 10V and bipolar ±10V modes. Precise 16-bit bipolar ±10V outputs are achieved with on-chip 4-quadrant multiplication resistors. The LTC1821 is available in a 36-lead SSOP package and is specified over the industrial temperature range. The device includes an internal deglitcher circuit that reduces the glitch impulse to less than 2nV•s (typ). The LTC1821 settles to 1LBS in 2µs with a full-scale 10V step. The combination of fast, precise settling and ultra low glitch make the LTC1821 ideal for precision industrial control applications. The asynchronous CLR pin resets the LTC1821 to zero scale and resets the LTC1821-1 to midscale. APPLICATIO S s s s s s Process Control and Industrial Automation Precision Instrumentation Direct Digital Waveform Generation Software-Controlled Gain Adjustment Automatic Test Equipment , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO VREF –VREF 16-Bit, 4-Quadrant Multiplying DAC with a Minimum of External Components LTC1821/LTC1821-1 Integral Nonlinearity 1.0 0.8 INTEGRAL NONLINEARITY (LSB) 10 R1 R1 16 DATA INPUTS 3 TO 6, 25 TO 36 9 RCOM R2 LTC1821-1 16-BIT DAC WR LD CLR WR LD CLR 24 23 7 DNC* DNC* DNC* NC 18 19 21 22 DGND 1 AGNDF AGNDS 17 16 1821 TA01 *DO NOT CONNECT + – – 2 + 3 5V 6 0.1µF 15pF 8 REF 2 VCC 11 ROFS ROFS RFB 13 VOUT – LT®1468 15pF 12 RFB 14 IOUT V+ 15 15V 0.1µF VREF VOUT = –VREF –15V 0.1µF V 20 U VREF = 10V VOUT = ±10V BIPOLAR 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 49152 32768 16384 DIGITAL INPUT CODE 65535 1821 TA02 U U 1 LTC1821 ABSOLUTE MAXIMUM RATINGS (Note 1) PACKAGE/ORDER INFORMATION TOP VIEW DGND VCC D3 D2 D1 D0 CLR REF RCOM 1 2 3 4 5 6 7 8 9 36 D4 35 D5 34 D6 33 D7 32 D8 31 D9 30 D10 29 D11 28 D12 27 D13 26 D14 25 D15 24 WR 23 LD 22 NC 21 DNC* 20 V – 19 DNC* VCC to AGNDF, AGNDS ............................... – 0.3V to 7V VCC to DGND .............................................. – 0.3V to 7V Total Supply Voltage (V+ to V–) ............................... 36V AGNDF, AGNDS to DGND ............................. VCC + 0.3V DGND to AGNDF, AGNDS ............................. VCC + 0.3V REF, RCOM to AGNDF, AGNDS, DGND .................. ± 15V ROFS, RFB, R1, to AGNDF, AGNDS, DGND ............ ± 15V Digital Inputs to DGND ............... – 0.3V to (VCC + 0.3V) IOUT to AGNDF, AGNDS............... – 0.3V to (VCC + 0.3V) Maximum Junction Temperature .......................... 150°C Operating Temperature Range LTC1821C/LTC1821-1C .......................... 0°C to 70°C LTC1821I/LTC1821-1I ....................... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C ORDER PART NUMBER LTC1821ACGW LTC1821BCGW LTC1821-1ACGW LTC1821-1BCGW LTC1821AIGW LTC1821BIGW LTC1821-1AIGW LTC1821-1BIGW R1 10 ROFS 11 RFB 12 VOUT 13 IOUT 14 V+ 15 AGNDS 16 AGNDF 17 DNC* 18 GW PACKAGE 36-LEAD PLASTIC SSOP WIDE TJMAX = 125°C, θJA = 80°C/ W *DO NOT CONNECT Consult factory for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX, V+ = 15V, V– = –15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V. SYMBOL PARAMETER Accuracy Resolution Monotonicity INL DNL GE Integral Nonlinearity Differential Nonlinearity Gain Error TA = 25°C (Note 2) TMIN to TMAX TA = 25°C TMIN to TMAX Unipolar Mode TA = 25°C (Note 3) TMIN to TMAX Bipolar Mode TA = 25°C (Note 3) TMIN to TMAX Gain Temperature Coefficient Unipolar Zero-Scale Error Bipolar Zero Error PSRR Power Supply Rejection Ratio ∆Gain/∆Temperature (Note 4) TA = 25°C TMIN to TMAX TA = 25°C TMIN to TMAX VCC = 5V ± 10% V+, V – = ± 4.5V to ± 16.5V q q q q CONDITIONS LTC1821B/-1B MIN TYP MAX 16 16 ±2 ±2 ±1 ±1 ± 16 ± 24 ± 16 ± 24 1 3 ±3 ±6 ± 12 ± 16 2 ±2 LTC1821A/-1A MIN TYP MAX 16 16 ± 0.25 ± 0.35 ± 0.2 ± 0.2 ±5 ±8 ±2 ±5 1 ± 0.25 ± 0.50 ±2 ±3 0.7 ± 0.1 ±1 ±1 ±1 ±1 ± 16 ± 16 ± 16 ± 16 3 ±2 ±4 ±8 ± 10 2 ±2 UNITS Bits Bits LSB LSB LSB LSB LSB LSB LSB LSB ppm/°C LSB LSB LSB LSB LSB/V LSB/V q q q q q q q 2 U W U U WW W LTC1821 ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX, V + = 15V, V – = – 15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V. SYMBOL RREF R1/R2 ROFS, RFB PARAMETER DAC Input Resistance (Unipolar) R1/R2 Resistance (Bipolar) Feedback and Offset Resistances Output Voltage Settling Time Midscale Glitch Impulse Digital-Feedthrough Multiplying Feedthrough Error Multiplying Bandwidth Output Noise Voltage Density CONDITIONS (Note 6) (Notes 6, 11) (Note 6) ∆VOUT = 10V (Notes 7, 8) (Note 10) (Note 9) VREF = ±10V, 10kHz Sine Wave (Note 7) Code = Full Scale (Note 7) 1kHz to 100kHz (Note 7) Code = Zero Scale Code = Full Scale 0.1Hz to 10Hz (Note 7) Code = Zero Scale Code = Full Scale (Note 7) RL = 2k, V + = 15V, V – = – 15V RL = 2k, V + = 5V, V – = – 5V V + = 15V, V – = – 15V, ±5mA Load VOUT = 0V, V + = 15V, V – = – 15V RL = 2k, V + = 15V, V – = – 15V RL = 2k, V + = 5V, V – = – 5V q q q q q q q q q q MIN 4.5 9 9 TYP 6 12 12 2 2 2 1 600 13 20 0.45 1 30 MAX 10 20 20 UNITS kΩ kΩ kΩ µs nV•s nV•s mVP-P kHz nV/√Hz nV/√Hz µVRMS µVRMS Hz V V Reference Input AC Performance (Note 4) Output Noise Voltage 1/f Noise Corner Analog Outputs (Note 4) VOUT DAC Output Swing DAC Output Load Regulation ISC SR Short-Circuit Current Slew Rate ± 12.6 ± 2.6 0.02 12 40 20 14 2.4 0.8 0.001 ±1 8 60 0 60 110 60 0 1.5 4.5 4.0 4.5 4.5 –16.5 5 10 7.0 6.8 5.5 16.5 – 4.5 20 –12 25 55 40 0.2 LSB/mA mA V/µs V/µs V V µA pF ns ns ns ns ns ns µA mA mA V V V Digital Inputs VIH VIL IIN CIN t DS t DH t WR t LD t CLR t LWD ICC IS VCC V+ V– Digital Input High Voltage Digital Input Low Voltage Digital Input Current Digital Input Capacitance Data to WR Setup Time Data to WR Hold Time WR Pulse Width LD Pulse Width Clear Pulse Width WR to LD Delay Time Supply Current, VCC Supply Current, V+, V – Supply Voltage Supply Voltage Supply Voltage Digital Inputs = 0V or VCC ±15V ±5V (Note 4 ) VIN = 0V q Timing Characteristics q q q q q q Power Supply q q q q q q 3 LTC1821 ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: ± 1LSB = ± 0.0015% of full scale = ± 15.3ppm of full scale. Note 3: Using internal feedback resistor. Note 4: Guaranteed by design, not subject to test. Note 5: IOUT with DAC register loaded to all 0s. Note 6: Typical temperature coefficient is 100ppm/°C. Note 7: Measured in unipolar mode. Note 8: To 0.0015% for a full-scale change, measured from the rising edge of LD. Note 9: REF = 0V. DAC register contents changed from all 0s to all 1s or all 1s to all 0s. LD low and WR high. Note 10: Midscale transition code: 0111 1111 1111 1111 to 1000 0000 0000 0000. Unipolar mode, CFEEDBACK = 33pF. Note 11: R1 and R2 are measured between R1 and RCOM, REF and RCOM. TYPICAL PERFOR A CE CHARACTERISTICS Midscale Glitch Impulse 40 30 OUTPUT VOLTAGE (mV) SIGNAL/(NOISE + DISTORTION) (dB) CFEEDBACK = 30pF VREF = 10V LD PULSE 5V/DIV GATED SETTLING WAVEFORM 500µV/DIV 1821 G02 20 10 0 –10 –20 – 30 – 40 0 0.2 0.4 0.6 TIME (µs) 0.8 1.0 1821 G01 1nV-s TYPICAL Bipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency, Code = All Zeros – 40 SIGNAL/(NOISE + DISTORTION) (dB) – 50 – 60 – 70 – 80 SIGNAL/(NOISE + DISTORTION) (dB) VCC = 5V USING AN LT1468 CFEEDBACK = 15pF REFERENCE = 6VRMS – 60 – 70 – 80 500kHz FILTER – 90 80kHz FILTER 30kHz FILTER SUPPLY CURRENT (mA) 500kHz FILTER – 90 80kHz FILTER 30kHz FILTER 10 100 1k 10k FREQUENCY (Hz) 100k 1821 G04 –100 –110 4 UW Full-Scale Setting Waveform – 40 – 50 – 60 – 70 – 80 Unipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency VCC = 5V CFEEDBACK = 30pF REFERENCE = 6VRMS 500kHz FILTER – 90 80kHz FILTER 30kHz FILTER 10 100 1k 10k FREQUENCY (Hz) 100k 1821 G03 500ns/DIV VREF = –10V CFEEDBACK = 20pF 0V TO 10V STEP –100 –110 Bipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency, Code = All Ones – 40 – 50 5 VCC Supply Current vs Digital Input Voltage VCC = 5V ALL DIGITAL INPUTS TIED TOGETHER VCC = 5V USING AN LT1468 CFEEDBACK = 15pF REFERENCE = 6VRMS 4 3 2 1 –100 –110 10 100 0 1k 10k FREQUENCY (Hz) 100k 1821 G05 0 1 3 2 INTPUT VOLTAGE (V) 4 5 1821 G06 LTC1821 TYPICAL PERFOR A CE CHARACTERISTICS Logic Threshold vs VCC Supply Voltage 3.0 INTEGRAL NONLINEARITY (LSB) 2.5 LOGIC THRESHOLD (V) 2.0 1.5 1.0 0.5 0 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 DIFFERENTIAL NONLINEARITY (LSB) 0 1 5 2 3 4 SUPPLY VOLTAGE (V) Integral Nonlinearity vs Reference Voltage in Unipolar Mode 1.0 0.8 INTEGRAL NONLINEARITY (LSB) INTEGRAL NONLINEARITY (LSB) 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 10 DIFFERENTIAL NONLINEARITY (LSB) Differential Nonlinearity vs Reference Voltage in Bipolar Mode 1.0 DIFFERENTIAL NONLINEARITY (LSB) 1.0 0.8 INTEGRAL NONLINEARITY (LSB) 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 10 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1821 G14 INTEGRAL NONLINEARITY (LSB) UW 6 7 1821 G07 Integral Nonlinearity (INL) 1.0 0.8 1.0 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 Differential Nonlinearity (DNL) 0 49152 32768 16384 DIGITAL INPUT CODE 65535 1821 G08 0 49152 32768 16384 DIGITAL INPUT CODE 65535 1821 G09 Integral Nonlinearity vs Reference Voltage in Bipolar Mode 1.0 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 10 1.0 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 Differential Nonlinearity vs Reference Voltage in Unipolar Mode –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 10 1821 G10 1821 G11 1821 G12 Integral Nonlinearity vs VCC Supply Voltage in Unipolar Mode 2.0 1.5 1.0 0.5 0 Integral Nonlinearity vs VCC Supply Voltage in Bipolar Mode VREF = 10V VREF = 2.5V VREF = 10V VREF = 2.5V VREF = 10V VREF = 2.5V VREF = 10V VREF = 2.5V – 0.5 –1.0 –1.5 –2.0 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1821 G15 1821 G13 5 LTC1821 TYPICAL PERFOR A CE CHARACTERISTICS Differential Nonlinearity vs VCC Supply Voltage in Unipolar Mode 1.0 1.0 DIFFERENTIAL NONLINEARITY (LSB) 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1821 G16 DIFFERENTIAL NONLINEARITY (LSB) 0.8 Unipolar Multiplying Mode Frequency Response vs Digital Code 0 – 20 ATTENUATION (dB) ALL BITS ON D15 ON D14 ON D13 ON D12 ON D11 ON D10 ON D9 ON D8 ON D7 ON D6 ON D5 ON D4 ON D3 ON D2 ON D1 ON D0 ON ALL BITS OFF ATTENUATION (dB) – 40 – 60 – 80 – 40 – 60 – 80 ATTENUATION (dB) – 100 – 120 100 1k 10k 100k FREQUENCY (Hz) VREF 30pF 8 9 10 11 12 14 LTC1821 13 1 16 17 VOUT 6 UW 1M 1821 G18 Differential Nonlinearity vs VCC Supply Voltage in Bipolar Mode 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1821 G17 VREF = 10V VREF = 2.5V VREF = 10V VREF = 2.5V VREF = 2.5V VREF = 10V VREF = 10V VREF = 2.5V Bipolar Multiplying Mode Frequency Response vs Digital Code 0 – 20 ALL BITS ON D15 AND D14 ON D15 AND D13 ON D15 AND D12 ON D15 AND D11 ON D15 AND D10 ON D15 AND D9 ON D15 AND D8 ON D15 AND D7 ON D15 AND D6 ON D15 AND D5 ON D15 AND D4 ON D15 AND D3 ON D15 AND D2 ON Bipolar Multiplying Mode Frequency Response vs Digital Code 0 – 20 ALL BITS OFF D14 ON D14 AND D13 ON D14 TO D12 ON D14 TO D11 ON D14 TO D10 ON D14 TO D9 ON D14 TO D8 ON D14 TO D7 ON D14 TO D6 ON D14 TO D5 ON D14 TO D4 ON D14 TO D3 ON D14 TO D2 ON D14 TO D1 ON – 40 CODES FROM MIDSCALE TO FULL SCALE – 60 – 80 – 100 10M 10 100 D15 AND D1 ON D15 AND D0 ON D15 ON* CODES FROM MIDSCALE TO ZERO SCALE D14 TO D0 ON 100k 1k 10k FREQUENCY (Hz) 1M 10M 1821 G19 – 100 10 100 D15 ON* 100k 1k 10k FREQUENCY (Hz) 1M 10M 1821 G20 *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 96dB TYPICAL (–78dB MAX, A GRADE) VREF 3 *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 96dB TYPICAL (–78dB MAX, A GRADE) VREF 3 + LT1468 – 2 12pF 12pF 6 + LT1468 – 2 12pF 12pF 6 15pF 10 9 LTC1821 1 16 17 8 11 12 14 13 10 9 LTC1821 1 16 17 8 11 12 14 13 15pF VOUT VOUT LTC1821 PIN FUNCTIONS DGND (Pin 1): Digital Ground. Connect to analog ground. VCC (Pin 2): Positive Supply Input. 4.5V ≤ VCC ≥ 5.5V. Requires a bypass capacitor to ground. D3 (Pin 3): Digital Input Data Bit 3. D2 (Pin 4): Digital Input Data Bit 2. D1 (Pin 5): Digital Input Data Bit 1. D0 (Pin 6): LSB or Digital Input Data Bit 0. CLR (Pin 7): Digital Clear Control Function for the DAC. When CLR is taken to a logic low, it sets the DAC output and all internal registers to: zero code for the LTC1821 and midscale code for the LTC1821-1. REF (Pin 8): Reference Input and 4-Quadrant Resistor R2. Typically ± 10V, accepts up to ± 15V. In 2-quadrant mode, tie this pin to the external reference signal. In 4-quadrant mode, this pin is driven by external inverting reference amplifier. RCOM (Pin 9): Center Tap Point of the Two 4-Quadrant Resistors R1 and R2. Normally tied to the inverting input of an external amplifier in 4-quadrant operation. Otherwise this pin is shorted to the REF pin. See Figures 1 and 2. R1 (Pin 10): 4-Quadrant Resistor R1. In 2-quadrant operation, short this pin to the REF pin. In 4-quadrant mode, tie this pin to the external reference signal. ROFS (Pin 11): Bipolar Offset Resistor. Typically swings ± 10V, accepts up to ± 15V. For 2-quadrant operation, tie this pin to RFB and for 4-quadrant operation, tie this pin to R1. RFB (Pin12): Feedback Resistor. Normally connected to VOUT. Typically swings ± 10V. The voltage at this pin swings 0 to VREF in unipolar mode and ± VREF in bipolar mode. VOUT (Pin 13): DAC Voltage Output. Normally connected to RFB and to IOUT through a 22pF feedback capacitor in unipolar mode (15pF in bipolar mode). Typically swings ±10V. IOUT (Pin 14): DAC Current Output. Normally tied through a 22pF feedback capacitor in unipolar mode (15pF in bipolar mode) to VOUT. V + (Pin 15): Amplifier Positive Supply. Range is 4.5V to 16.5V. AGNDS (Pin 16): Analog Ground Sense. Connect to analog ground. AGNDF (Pin 17): Analog Ground Force. Connect to analog ground. DNC (Pin 18, 19, 21): Connected internally. Do not connect external circuitry to these pins. V – (Pin 20): Amplifier Negative Supply. Range is – 4.5V to – 16.5V. NC (Pin 22): No Connection. LD (Pin 23): DAC Digital Input Load Control Input. When LD is taken to a logic high, data is loaded from the input register into the DAC register, updating the DAC output. WR (Pin 24): DAC Digital Write Control Input. When WR is taken to a logic low, data is written from the digital input pins into the 16-bit wide input reigster. D15 (Pins 25): MSB or Digital Input Data Bit 15. D14 (Pin 26): Digital Input Data Bit 14. D13 (Pin 27): Digital Input Data Bit 13. D12 (Pin 28): Digital Input Data Bit 12. D11 (Pin 29): Digital Input Data Bit 11. D10 (Pin 30): Digital Input Data Bit 10. D9 (Pin 31): Digital Input Data Bit 9. D8 (Pin 32): Digital Input Data Bit 8. D7 (Pin 33): Digital Input Data Bit 7. D6 (Pin 34): Digital Input Data Bit 6. D5 (Pin 35): Digital Input Data Bit 5. D4 (Pin 36): Digital Input Data Bit 4. U U U 7 LTC1821 TRUTH TABLE Table 1 CONTROL INPUTS CLR WR LD 0 1 1 1 1 1 1 0 X 0 1 0 X 0 1 1 REGISTER OPERATION Reset Input and DAC Register to All 0s for LTC1821 and Midscale for LTC1821-1 (Asynchronous Operation) Write Input Register with All 16 Data Bits Load DAC Register with the Contents of the Input Register Input and DAC Register Are Transparent CLK = LD and WR Tied Together. The 16 Data Bits Are Written Into the Input Register on the Falling Edge of the CLK and Then Loaded Into the DAC Register on the Rising Edge of the CLK No Register Operation BLOCK DIAGRA REF 8 12k RCOM 9 12k R1 10 48k 48k VCC 2 DECODER LD 23 LOAD D15 (MSB) D14 D13 D12 D11 ••• DAC REGISTER D0 (LSB) RST WR 24 WR INPUT REGISTER RST 25 D15 26 D14 •••• 36 D4 3 D3 4 D2 5 D1 6 D0 *CONNECTED INTERNALLY. DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS 8 + – W 48k 48k 12 RFB 48k 48k 48k 48k 48k 96k 96k 96k 96k 12k 12k 11 ROFS 14 IOUT 15 V + 13 VOUT 20 V – 16 AGNDS 17 AGNDF 7 CLR 18 DNC* 19 DNC* 21 DNC* 22 NC 1 DGND 1821 BD LTC1821 TI I G DIAGRA W tWR WR DATA tDS tDH tLWD LD tLD tCLR CLR 1821 TD APPLICATIONS INFORMATION Description The LTC1821 is a 16-bit voltage output DAC with a full parallel 16-bit digital interface. The device can operate from 5V and ± 15 supplies and provides both unipolar 0V to – 10V or 0V to 10V and bipolar ±10V output ranges from a 10V or –10V reference input. Additionally, the power supplies for the LTC1821 can go as low as 4.5V and ± 4.5V. In this case for a 2.5V or – 2.5V reference, the output range is 0V to – 2.5V, 0V to 2.5V and ± 2.5V. The LTC1821 has three additional precision resistors on chip for bipolar operation. Refer to the block diagram regarding the following description. The 16-bit DAC consists of a precision R-2R ladder for the 13 LSBs. The three MSBs are decoded into seven segments of resistor value R. Each of these segments and the R-2R ladder carries an equally weighted current of one eighth of full scale. The feedback resistor RFB and 4-quadrant resistor ROFS have a value of R/4. 4-quadrant resistors R1 and R2 have a magnitude of R/4. R1 and R2 together with an external op amp (see Figure 2) inverts the reference input voltage and applies it to the 16-bit DAC input REF, in 4-quadrant operation. The REF pin presents a constant input impedance of R/8 in unipolar mode and R/12 in bipolar mode. The LTC1821 contains an onboard precision high speed amplifier. This amplifier together with the feedback resistor (RFB) form a precision current-to-voltage converter for the DAC’s current output. The amplifier has very low noise, offset, input bias current and settles in less than 2µs to 0.0015% for a 10V step. It can sink and source 22mA (±15V) typically and can drive a 300pF capacitive load. An added feature of these devices, especially for waveform generation, is a proprietary deglitcher that reduces glitch impulse to below 2nV-s over the DAC output voltage range. Digital Section The LTC1821 has a 16-bit wide full parallel data bus input. The device is double-buffered with two 16-bit registers. The double-buffered feature permits the update of several DACs simultaneously. The input register is loaded directly from a 16-bit microprocessor bus when the WR pin is brought to a logic low level. The second register (DAC register) is updated with the data from the input register when the LD signal is brought to a logic high. Updating the DAC register updates the DAC output with the new data. To make both registers transparent in flowthrough mode, tie WR low and LD high. However, this defeats the deglitcher operation and output glitch impulse may increase. The deglitcher is activated on the rising edge of the LD pin. The U W U U UW 9 LTC1821 APPLICATIONS INFORMATION versatility of the interface also allows the use of the input and DAC registers in a master slave or edge-triggered configuration. This mode of operation occurs when WR and LD are tied together. The asynchronous clear pin resets the LTC1821 to zero scale and the LTC1821-1 to midscale. CLR resets both the input and DAC registers. These devices also have a power-on reset. Table 1 shows the truth table for the LTC1821. 5V 0.1µF VREF 10 R1 R1 16 DATA INPUTS 25 TO 36, 3 TO 6 WR WR LD CLR 24 LD 23 CLR 7 DNC* DNC* DNC* 18 19 21 NC 22 DGND 1 AGNDF AGNDS 17 16 *DO NOT CONNECT 9 RCOM R2 8 REF 2 VCC 11 ROFS ROFS RFB 12 RFB 14 IOUT V+ 15 15V 0.1µF 13 VOUT V – 20 VOUT = 0V TO –VREF –15V 0.1µF 22pF 16-BIT DAC Unipolar Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER MSB 1111 1000 0000 0000 1111 0000 0000 0000 1111 0000 0000 0000 LSB 1111 0000 0001 0000 –VREF (65,535/65,536) –VREF (32,768/65,536) = –VREF/ 2 –VREF (1/65,536) 0V 1821 F01 ANALOG OUTPUT VOUT Figure 1. Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to – VREF 10 + LTC1821 – U W U U Unipolar Mode (2-Quadrant Multiplying, VOUT = 0V to – VREF) The LTC1821 can be used to provide 2-quadrant multiplying operation as shown in Figure 1. With a fixed – 10V reference, the circuit shown gives a precision unipolar 0V to 10V output swing. LTC1821 APPLICATIONS INFORMATION Bipolar Mode (4-Quadrant Multiplying, VOUT = – VREF to VREF) The LTC1821 contains on chip all the 4-quadrant resistors necessary for bipolar operation. 4-quadrant multiplying operation can be achieved with a minimum of external components—a capacitor and a single op amp, as shown in Figure 2. With a fixed 10V reference, the circuit shown gives a precision bipolar – 10V to 10V output swing. VREF 10 R1 R1 16 DATA INPUTS 25 TO 36, 3 TO 6 WR WR LD CLR 24 LD 9 RCOM R2 16-BIT DAC CLR DNC* DNC* DNC* NC 7 18 19 21 22 DGND 1 AGNDF AGNDS 17 16 *DO NOT CONNECT 23 Bipolar Offset Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER MSB 1111 1000 1000 0111 0000 1111 0000 0000 1111 0000 1111 0000 0000 1111 0000 LSB 1111 0001 0000 1111 0000 VREF (32,767/32,768) VREF (1/32,768) 0V –VREF (1/32,768) –VREF 1821 F02 ANALOG OUTPUT VOUT Figure 2. Bipolar Operation (4-Quadrant Multiplication) VOUT = – VREF to VREF + LTC1821 – – 2 + 3 LT1001 6 8 REF U W U U 5V 0.1µF 22pF 2 VCC 11 ROFS ROFS RFB 13 VOUT V – 20 12 RFB 14 IOUT V+ 15 15V 0.1µF VOUT = –VREF TO VREF –15V 0.1µF 11 LTC1821 APPLICATIONS INFORMATION Precision Voltage Reference Considerations Because of the extremely high accuracy of the 16-bit LTC1821, careful thought should be given to the selection of a precision voltage reference. As shown in the section describing the basic operation of the LTC1821, the output voltage of the DAC circuit is directly affected by the voltage reference; thus, any voltage reference error will appear as a DAC output voltage error. There are three primary error sources to consider when selecting a precision voltage reference for 16-bit applications: output voltage initial tolerance, output voltage temperature coefficient (TC), and output voltage noise. Initial reference output voltage tolerance, if uncorrected, generates a full-scale error term. Choosing a reference with low output voltage initial tolerance, like the LT1236 (± 0.05%), minimizes the gain error due to the reference; however, a calibration sequence that corrects for system zero- and full-scale error is always recommended. A reference’s output voltage temperature coefficient affects not only the full-scale error, but can also affect the circuit’s INL and DNL performance. If a reference is chosen with a loose output voltage temperature coefficient, then the DAC output voltage along its transfer characteristic will be very dependent on ambient conditions. Minimizing the error due to reference temperature coefficient can be achieved by choosing a precision reference with a low output voltage temperature coefficient and/or tightly controlling the ambient temperature of the circuit to minimize temperature gradients. As precision DAC applications move to 16-bit and higher performance, reference output voltage noise may contribute a dominant share of the system’s noise floor. This in turn can degrade system dynamic range and signal-tonoise ratio. Care should be exercised in selecting a voltage reference with as low an output noise voltage as practical for the system resolution desired. Precision voltage references, like the LT1236, produce low output noise in the 0.1Hz to 10Hz region, well below the 16-bit LSB level in 5V or 10V full-scale systems. However, as the circuit bandwidths increase, filtering the output of the reference may be required to minimize output noise. Grounding As with any high resolution converter, clean grounding is important. A low impedance analog ground plane and star grounding should be used. AGNDF and AGNDS must be tied to the star ground with as low a resistance as possible. When it is not possible to locate star ground close to AGNDF and AGNDS, separate traces should be used to route these pins to the star ground. This minimizes the voltage drop from these pins to ground due to the code dependent current flowing into the ground plane. If the resistance of these separate circuit board traces exceeds 1Ω, the circuit of Figure 3 eliminates this code dependent voltage drop error for high resistance traces. To calculate PC track resistance in squares, divide the length of the PC track by the width and multiply this result by the sheet resistance of copper foil. For 1 oz copper (≈ 1.4 mils thick), the sheet resistance is 0.045Ω per square. Table 2. Partial List of LTC Precision References Recommended for Use with the LTC1821, with Relevant Specifications REFERENCE LT1019A-5, LT1019A-10 LT1236A-5, LT1236A-10 LT1460A-5, LT1460A-10 LT1790A-2.5 INITIAL TOLERANCE ± 0.05% ± 0.05% ± 0.075% ±0.05% TEMPERATURE DRIFT 5ppm/°C 5ppm/°C 10ppm/°C 10ppm/°C 0.1Hz to 10Hz NOISE 12µVP-P 3µVP-P 20µVP-P 12µVP-P 12 U W U U LTC1821 APPLICATIONS INFORMATION 5V 0.1µF 9 RCOM R1 R2 8 REF 2 VCC 11 ROFS ROFS RFB 12 RFB 14 IOUT V + 15 15V 0.1µF 13 VOUT V – 20 AGNDS WR WR LD CLR 24 LD 23 CLR DNC* DNC* DNC* 7 18 19 21 NC 22 DGND 19 AGNDF 17 2 16 VOUT = 0V TO –10V 22pF 15V 2 4 LT1236A-10 6 10V 10 R1 LTC1821 25 TO 36, 3 TO 6 16-BIT DAC *DO NOT CONNECT 6 ERA82.004 LT1001 3 ALTERNATE AMPLIFIER FOR OPTIMUM SETTLING TIME PERFORMANCE AGNDF 17 AGNDS 16 200Ω 2 200Ω 1000pF 6 ERA82.004 LT1468 3 Figure 3. Driving AGNDF and AGNDS with a Force/Sense Amplifier – + + – 16 DATA INPUTS – + U W U U –15V 0.1µF 1821 F03 13 LTC1821 TYPICAL APPLICATION 17-Bit Sign Magnitude Output Voltage DAC with Bipolar Zero Error of 140µV (0.92LSB at 17 Bits) 16 15V 2 1 LT1236A-10 4 6 V+ 3 2 3 0.1µF 10 SIGN BIT R1 R1 16 DATA INPUTS 25 TO 36, 3 TO 6 WR WR LD CLR 24 LD 9 RCOM R2 LTC1821 16-BIT DAC CLR DNC* DNC* DNC* NC 7 18 19 21 22 DGND 1 AGNDF 17 AGNDS 16 *DO NOT CONNECT 23 14 + – – 2 + U 15 14 LTC203AC 5V LT1468 0.1µF V– 15pF 8 REF 2 11 VCC ROFS ROFS RFB 13 VOUT V– 20 12 RFB 14 IOUT V+ 15 15V 0.1µF VOUT 22pF 6 0.1µF –15V 0.1µF 1821 TA03 LTC1821 PACKAGE DESCRIPTION 7.417 – 7.595** (0.292 – 0.299) 0.254 – 0.406 × 45° (0.010 – 0.016) 0° – 8° TYP 0.231 – 0.3175 (0.0091 – 0.0125) 0.610 – 1.016 (0.024 – 0.040) NOTE: DIMENSIONS ARE IN MILLIMETERS *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.152mm (0.006") PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (millimeters) unless otherwise noted. GW Package 36-Lead Plastic SSOP (Wide 0.300) (LTC DWG # 05-08-1642) 15.290 – 15.544* (0.602 – 0.612) 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 10.160 – 10.414 (0.400 – 0.410) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 2.463 – 2.641 (0.097 – 0.104) 2.286 – 2.387 (0.090 – 0.094) 0.800 (0.0315) BSC 0.304 – 0.431 (0.012 – 0.017) 0.127 – 0.305 (0.005 – 0.0115) **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE GW36 SSOP 1098 15 LTC1821 RELATED PARTS PART NUMBER ADCs LTC1417 LTC1418 LTC1604/LTC1608 LTC1605/LTC1606 LTC1609 LTC2400 LTC2410 DACs LTC1591/LTC1597 LTC1595/LTC1596 LTC1599 LTC1650 LTC1654 LTC1655/LTC1655L LTC1657/LTC1657L LTC1658 Op Amps LT1001 LT1468 References LT1019 LT1236 LT1460 LT1790 DESCRIPTION Low Power 400ksps, 14-Bit ADC 14-Bit, 200ksps, Single 5V ADC 16-Bit, 333ksps/500ksps, ± 5V ADC 16-Bit, 100ksps/250ksps, Single 5V ADC 16-Bit, 200ksps, Single 5V ADC 24-Bit, Micropower ∆Σ ADC in SO-8 24-Bit, Fully Differential, No Latency ∆Σ ADC Parallel 14-/16-Bit Current Output DACs Serial 16-Bit Current Output DACs in SO-8/S16 Parallel 2 Byte 16-Bit Current Output DAC Serial 16-Bit ± 5V Voltage Output DAC Dual 14-Bit Rail-to-Rail VOUT DAC Serial 5V/3V 16-Bit Voltage Output DAC in SO-8 Parallel 5V/3V 16-Bit Voltage Output DAC Serial 14-Bit Voltage Output DAC Precision Operational Amplifier 90MHz, 22V/µs, 16-Bit Accurate Op Amp Bandgap Reference Precision Buried Zener Reference Micropower Bandgap Reference SOT-23 Micropower, Low Dropout Reference COMMENTS 20mW, Single or ±5V, Serial I/O 15mW, Serial/Parallel ± 10V 90dB SINAD, 100dB THD, ±2.5V Inputs ±10V Inputs, 55mW/75mW, Byte or Parallel I/O ±10V Inputs, 65mW, Serial I/O 0.3ppm Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200µA 0.16ppm Noise, 2ppm INL, 10ppm Total Unadjusted Error, 200µA On-Chip 4-Quadrant Resistors Low Glitch, ±1LSB Maximum INL, DNL On-Chip 4-Quadrant Resistors Low Noise and Low Glitch Rail-to-Rail VOUT Programmable Speed/Power, 3.5µs/750µA, 8µs/450µA Low Power, Deglitched, Rail-to-Rail VOUT Low Power, Deglitched, Rail-to-Rail VOUT Low Power, 8-Lead MSOP Rail-to-Rail VOUT Low Offset, Low Drift Precise, 1µs Settling to 0.0015% ± 0.05% Initial Tolerance, 5ppm/°C ± 0.05% Initial Tolerance, Low Noise 3µVP-P ± 0.075% Initial Tolerance, 10ppm/°C ±0.05% Initial Tolerance, 10ppm/°C 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com 1821f LT/TP 0401 4K • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2000